diff options
Diffstat (limited to 'platforms/chibios')
27 files changed, 234 insertions, 146 deletions
diff --git a/platforms/chibios/bootloaders/stm32_dfu.c b/platforms/chibios/bootloaders/stm32_dfu.c index 0a113570f7..0e74111367 100644 --- a/platforms/chibios/bootloaders/stm32_dfu.c +++ b/platforms/chibios/bootloaders/stm32_dfu.c @@ -72,7 +72,7 @@ void enter_bootloader_mode_if_requested(void) {} # define MAGIC_ADDR (unsigned long *)(SYMVAL(__ram0_end__) - 4) __attribute__((weak)) void bootloader_jump(void) { - *MAGIC_ADDR = BOOTLOADER_MAGIC; // set magic flag => reset handler will jump into boot loader + *MAGIC_ADDR = BOOTLOADER_MAGIC; // set magic flag => reset handler will jump into boot loader NVIC_SystemReset(); } diff --git a/platforms/chibios/bootloaders/stm32duino.c b/platforms/chibios/bootloaders/stm32duino.c index dd1d551fa9..53d3ba0adb 100644 --- a/platforms/chibios/bootloaders/stm32duino.c +++ b/platforms/chibios/bootloaders/stm32duino.c @@ -18,4 +18,6 @@ #include <ch.h> -__attribute__((weak)) void bootloader_jump(void) { NVIC_SystemReset(); } +__attribute__((weak)) void bootloader_jump(void) { + NVIC_SystemReset(); +} diff --git a/platforms/chibios/chibios_config.h b/platforms/chibios/chibios_config.h index 4e35736606..67d7541ba2 100644 --- a/platforms/chibios/chibios_config.h +++ b/platforms/chibios/chibios_config.h @@ -16,7 +16,7 @@ #pragma once #ifndef USB_VBUS_PIN -# define SPLIT_USB_DETECT // Force this on when dedicated pin is not used +# define SPLIT_USB_DETECT // Force this on when dedicated pin is not used #endif // STM32 compatibility @@ -76,7 +76,7 @@ # if defined(K20x) || defined(KL2x) # define USE_I2CV1 -# define USE_I2CV1_CONTRIB // for some reason a bunch of ChibiOS-Contrib boards only have clock_speed +# define USE_I2CV1_CONTRIB // for some reason a bunch of ChibiOS-Contrib boards only have clock_speed # define USE_GPIOV1 # endif #endif diff --git a/platforms/chibios/drivers/analog.c b/platforms/chibios/drivers/analog.c index eb437665f1..48a59fd290 100644 --- a/platforms/chibios/drivers/analog.c +++ b/platforms/chibios/drivers/analog.c @@ -101,9 +101,9 @@ // Options are 12, 10, 8, and 6 bit. #ifndef ADC_RESOLUTION -# ifdef ADC_CFGR_RES_10BITS // ADCv3, ADCv4 +# ifdef ADC_CFGR_RES_10BITS // ADCv3, ADCv4 # define ADC_RESOLUTION ADC_CFGR_RES_10BITS -# else // ADCv1, ADCv5, or the bodge for ADCv2 above +# else // ADCv1, ADCv5, or the bodge for ADCv2 above # define ADC_RESOLUTION ADC_CFGR1_RES_10BIT # endif #endif @@ -123,7 +123,7 @@ static ADCConversionGroup adcConversionGroup = { .smpr = ADC_SAMPLING_RATE, #elif defined(USE_ADCV2) # if !defined(STM32F1XX) && !defined(GD32VF103) - .cr2 = ADC_CR2_SWSTART, // F103 seem very unhappy with, F401 seems very unhappy without... + .cr2 = ADC_CR2_SWSTART, // F103 seem very unhappy with, F401 seems very unhappy without... # endif .smpr2 = ADC_SMPR2_SMP_AN0(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN1(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN2(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN3(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN4(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN5(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN6(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN7(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN8(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN9(ADC_SAMPLING_RATE), .smpr1 = ADC_SMPR1_SMP_AN10(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN11(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN12(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN13(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN14(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN15(ADC_SAMPLING_RATE), diff --git a/platforms/chibios/drivers/analog.h b/platforms/chibios/drivers/analog.h index e61c394265..8a821719e3 100644 --- a/platforms/chibios/drivers/analog.h +++ b/platforms/chibios/drivers/analog.h @@ -28,7 +28,9 @@ typedef struct { uint8_t adc; } adc_mux; #define TO_MUX(i, a) \ - (adc_mux) { i, a } + (adc_mux) { \ + i, a \ + } int16_t analogReadPin(pin_t pin); int16_t analogReadPinAdc(pin_t pin, uint8_t adc); diff --git a/platforms/chibios/drivers/audio_dac_additive.c b/platforms/chibios/drivers/audio_dac_additive.c index db304adb87..db07c4b393 100644 --- a/platforms/chibios/drivers/audio_dac_additive.c +++ b/platforms/chibios/drivers/audio_dac_additive.c @@ -52,19 +52,19 @@ static const dacsample_t dac_buffer_sine[AUDIO_DAC_BUFFER_SIZE] = { // 256 values, max 4095 0x0, 0x1, 0x2, 0x6, 0xa, 0xf, 0x16, 0x1e, 0x27, 0x32, 0x3d, 0x4a, 0x58, 0x67, 0x78, 0x89, 0x9c, 0xb0, 0xc5, 0xdb, 0xf2, 0x10a, 0x123, 0x13e, 0x159, 0x175, 0x193, 0x1b1, 0x1d1, 0x1f1, 0x212, 0x235, 0x258, 0x27c, 0x2a0, 0x2c6, 0x2ed, 0x314, 0x33c, 0x365, 0x38e, 0x3b8, 0x3e3, 0x40e, 0x43a, 0x467, 0x494, 0x4c2, 0x4f0, 0x51f, 0x54e, 0x57d, 0x5ad, 0x5dd, 0x60e, 0x63f, 0x670, 0x6a1, 0x6d3, 0x705, 0x737, 0x769, 0x79b, 0x7cd, 0x800, 0x832, 0x864, 0x896, 0x8c8, 0x8fa, 0x92c, 0x95e, 0x98f, 0x9c0, 0x9f1, 0xa22, 0xa52, 0xa82, 0xab1, 0xae0, 0xb0f, 0xb3d, 0xb6b, 0xb98, 0xbc5, 0xbf1, 0xc1c, 0xc47, 0xc71, 0xc9a, 0xcc3, 0xceb, 0xd12, 0xd39, 0xd5f, 0xd83, 0xda7, 0xdca, 0xded, 0xe0e, 0xe2e, 0xe4e, 0xe6c, 0xe8a, 0xea6, 0xec1, 0xedc, 0xef5, 0xf0d, 0xf24, 0xf3a, 0xf4f, 0xf63, 0xf76, 0xf87, 0xf98, 0xfa7, 0xfb5, 0xfc2, 0xfcd, 0xfd8, 0xfe1, 0xfe9, 0xff0, 0xff5, 0xff9, 0xffd, 0xffe, 0xfff, 0xffe, 0xffd, 0xff9, 0xff5, 0xff0, 0xfe9, 0xfe1, 0xfd8, 0xfcd, 0xfc2, 0xfb5, 0xfa7, 0xf98, 0xf87, 0xf76, 0xf63, 0xf4f, 0xf3a, 0xf24, 0xf0d, 0xef5, 0xedc, 0xec1, 0xea6, 0xe8a, 0xe6c, 0xe4e, 0xe2e, 0xe0e, 0xded, 0xdca, 0xda7, 0xd83, 0xd5f, 0xd39, 0xd12, 0xceb, 0xcc3, 0xc9a, 0xc71, 0xc47, 0xc1c, 0xbf1, 0xbc5, 0xb98, 0xb6b, 0xb3d, 0xb0f, 0xae0, 0xab1, 0xa82, 0xa52, 0xa22, 0x9f1, 0x9c0, 0x98f, 0x95e, 0x92c, 0x8fa, 0x8c8, 0x896, 0x864, 0x832, 0x800, 0x7cd, 0x79b, 0x769, 0x737, 0x705, 0x6d3, 0x6a1, 0x670, 0x63f, 0x60e, 0x5dd, 0x5ad, 0x57d, 0x54e, 0x51f, 0x4f0, 0x4c2, 0x494, 0x467, 0x43a, 0x40e, 0x3e3, 0x3b8, 0x38e, 0x365, 0x33c, 0x314, 0x2ed, 0x2c6, 0x2a0, 0x27c, 0x258, 0x235, 0x212, 0x1f1, 0x1d1, 0x1b1, 0x193, 0x175, 0x159, 0x13e, 0x123, 0x10a, 0xf2, 0xdb, 0xc5, 0xb0, 0x9c, 0x89, 0x78, 0x67, 0x58, 0x4a, 0x3d, 0x32, 0x27, 0x1e, 0x16, 0xf, 0xa, 0x6, 0x2, 0x1}; -#endif // AUDIO_DAC_SAMPLE_WAVEFORM_SINE +#endif // AUDIO_DAC_SAMPLE_WAVEFORM_SINE #ifdef AUDIO_DAC_SAMPLE_WAVEFORM_TRIANGLE static const dacsample_t dac_buffer_triangle[AUDIO_DAC_BUFFER_SIZE] = { // 256 values, max 4095 0x0, 0x20, 0x40, 0x60, 0x80, 0xa0, 0xc0, 0xe0, 0x100, 0x120, 0x140, 0x160, 0x180, 0x1a0, 0x1c0, 0x1e0, 0x200, 0x220, 0x240, 0x260, 0x280, 0x2a0, 0x2c0, 0x2e0, 0x300, 0x320, 0x340, 0x360, 0x380, 0x3a0, 0x3c0, 0x3e0, 0x400, 0x420, 0x440, 0x460, 0x480, 0x4a0, 0x4c0, 0x4e0, 0x500, 0x520, 0x540, 0x560, 0x580, 0x5a0, 0x5c0, 0x5e0, 0x600, 0x620, 0x640, 0x660, 0x680, 0x6a0, 0x6c0, 0x6e0, 0x700, 0x720, 0x740, 0x760, 0x780, 0x7a0, 0x7c0, 0x7e0, 0x800, 0x81f, 0x83f, 0x85f, 0x87f, 0x89f, 0x8bf, 0x8df, 0x8ff, 0x91f, 0x93f, 0x95f, 0x97f, 0x99f, 0x9bf, 0x9df, 0x9ff, 0xa1f, 0xa3f, 0xa5f, 0xa7f, 0xa9f, 0xabf, 0xadf, 0xaff, 0xb1f, 0xb3f, 0xb5f, 0xb7f, 0xb9f, 0xbbf, 0xbdf, 0xbff, 0xc1f, 0xc3f, 0xc5f, 0xc7f, 0xc9f, 0xcbf, 0xcdf, 0xcff, 0xd1f, 0xd3f, 0xd5f, 0xd7f, 0xd9f, 0xdbf, 0xddf, 0xdff, 0xe1f, 0xe3f, 0xe5f, 0xe7f, 0xe9f, 0xebf, 0xedf, 0xeff, 0xf1f, 0xf3f, 0xf5f, 0xf7f, 0xf9f, 0xfbf, 0xfdf, 0xfff, 0xfdf, 0xfbf, 0xf9f, 0xf7f, 0xf5f, 0xf3f, 0xf1f, 0xeff, 0xedf, 0xebf, 0xe9f, 0xe7f, 0xe5f, 0xe3f, 0xe1f, 0xdff, 0xddf, 0xdbf, 0xd9f, 0xd7f, 0xd5f, 0xd3f, 0xd1f, 0xcff, 0xcdf, 0xcbf, 0xc9f, 0xc7f, 0xc5f, 0xc3f, 0xc1f, 0xbff, 0xbdf, 0xbbf, 0xb9f, 0xb7f, 0xb5f, 0xb3f, 0xb1f, 0xaff, 0xadf, 0xabf, 0xa9f, 0xa7f, 0xa5f, 0xa3f, 0xa1f, 0x9ff, 0x9df, 0x9bf, 0x99f, 0x97f, 0x95f, 0x93f, 0x91f, 0x8ff, 0x8df, 0x8bf, 0x89f, 0x87f, 0x85f, 0x83f, 0x81f, 0x800, 0x7e0, 0x7c0, 0x7a0, 0x780, 0x760, 0x740, 0x720, 0x700, 0x6e0, 0x6c0, 0x6a0, 0x680, 0x660, 0x640, 0x620, 0x600, 0x5e0, 0x5c0, 0x5a0, 0x580, 0x560, 0x540, 0x520, 0x500, 0x4e0, 0x4c0, 0x4a0, 0x480, 0x460, 0x440, 0x420, 0x400, 0x3e0, 0x3c0, 0x3a0, 0x380, 0x360, 0x340, 0x320, 0x300, 0x2e0, 0x2c0, 0x2a0, 0x280, 0x260, 0x240, 0x220, 0x200, 0x1e0, 0x1c0, 0x1a0, 0x180, 0x160, 0x140, 0x120, 0x100, 0xe0, 0xc0, 0xa0, 0x80, 0x60, 0x40, 0x20}; -#endif // AUDIO_DAC_SAMPLE_WAVEFORM_TRIANGLE +#endif // AUDIO_DAC_SAMPLE_WAVEFORM_TRIANGLE #ifdef AUDIO_DAC_SAMPLE_WAVEFORM_SQUARE static const dacsample_t dac_buffer_square[AUDIO_DAC_BUFFER_SIZE] = { - [0 ... AUDIO_DAC_BUFFER_SIZE / 2 - 1] = 0, // first and - [AUDIO_DAC_BUFFER_SIZE / 2 ... AUDIO_DAC_BUFFER_SIZE - 1] = AUDIO_DAC_SAMPLE_MAX, // second half + [0 ... AUDIO_DAC_BUFFER_SIZE / 2 - 1] = 0, // first and + [AUDIO_DAC_BUFFER_SIZE / 2 ... AUDIO_DAC_BUFFER_SIZE - 1] = AUDIO_DAC_SAMPLE_MAX, // second half }; -#endif // AUDIO_DAC_SAMPLE_WAVEFORM_SQUARE +#endif // AUDIO_DAC_SAMPLE_WAVEFORM_SQUARE /* // four steps: 0, 1/3, 2/3 and 1 static const dacsample_t dac_buffer_staircase[AUDIO_DAC_BUFFER_SIZE] = { @@ -77,7 +77,7 @@ static const dacsample_t dac_buffer_staircase[AUDIO_DAC_BUFFER_SIZE] = { #ifdef AUDIO_DAC_SAMPLE_WAVEFORM_TRAPEZOID static const dacsample_t dac_buffer_trapezoid[AUDIO_DAC_BUFFER_SIZE] = {0x0, 0x1f, 0x7f, 0xdf, 0x13f, 0x19f, 0x1ff, 0x25f, 0x2bf, 0x31f, 0x37f, 0x3df, 0x43f, 0x49f, 0x4ff, 0x55f, 0x5bf, 0x61f, 0x67f, 0x6df, 0x73f, 0x79f, 0x7ff, 0x85f, 0x8bf, 0x91f, 0x97f, 0x9df, 0xa3f, 0xa9f, 0xaff, 0xb5f, 0xbbf, 0xc1f, 0xc7f, 0xcdf, 0xd3f, 0xd9f, 0xdff, 0xe5f, 0xebf, 0xf1f, 0xf7f, 0xfdf, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfdf, 0xf7f, 0xf1f, 0xebf, 0xe5f, 0xdff, 0xd9f, 0xd3f, 0xcdf, 0xc7f, 0xc1f, 0xbbf, 0xb5f, 0xaff, 0xa9f, 0xa3f, 0x9df, 0x97f, 0x91f, 0x8bf, 0x85f, 0x7ff, 0x79f, 0x73f, 0x6df, 0x67f, 0x61f, 0x5bf, 0x55f, 0x4ff, 0x49f, 0x43f, 0x3df, 0x37f, 0x31f, 0x2bf, 0x25f, 0x1ff, 0x19f, 0x13f, 0xdf, 0x7f, 0x1f, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}; -#endif // AUDIO_DAC_SAMPLE_WAVEFORM_TRAPEZOID +#endif // AUDIO_DAC_SAMPLE_WAVEFORM_TRAPEZOID static dacsample_t dac_buffer_empty[AUDIO_DAC_BUFFER_SIZE] = {AUDIO_DAC_OFF_VALUE}; @@ -98,7 +98,7 @@ typedef enum { OUTPUT_REACHED_ZERO_BEFORE_OFF, OUTPUT_OFF, OUTPUT_OFF_1, - OUTPUT_OFF_2, // trailing off: giving the DAC two more conversion cycles until the AUDIO_DAC_OFF_VALUE reaches the output, then turn the timer off, which leaves the output at that level + OUTPUT_OFF_2, // trailing off: giving the DAC two more conversion cycles until the AUDIO_DAC_OFF_VALUE reaches the output, then turn the timer off, which leaves the output at that level number_of_output_states } output_states_t; output_states_t state = OUTPUT_OFF_2; @@ -171,7 +171,7 @@ static void dac_end(DACDriver *dacp) { // work on the other half of the buffer if (dacIsBufferComplete(dacp)) { - sample_p += AUDIO_DAC_BUFFER_SIZE / 2; // 'half_index' + sample_p += AUDIO_DAC_BUFFER_SIZE / 2; // 'half_index' } for (uint8_t s = 0; s < AUDIO_DAC_BUFFER_SIZE / 2; s++) { @@ -196,8 +196,8 @@ static void dac_end(DACDriver *dacp) { * * * * =====*=*================================================= 0x0 */ - if (((sample_p[s] + (AUDIO_DAC_SAMPLE_MAX / 100)) > AUDIO_DAC_OFF_VALUE) && // value approaches from below - (sample_p[s] < (AUDIO_DAC_OFF_VALUE + (AUDIO_DAC_SAMPLE_MAX / 100))) // or above + if (((sample_p[s] + (AUDIO_DAC_SAMPLE_MAX / 100)) > AUDIO_DAC_OFF_VALUE) && // value approaches from below + (sample_p[s] < (AUDIO_DAC_OFF_VALUE + (AUDIO_DAC_SAMPLE_MAX / 100))) // or above ) { if ((OUTPUT_SHOULD_START == state) && (active_tones_snapshot_length > 0)) { state = OUTPUT_RUN_NORMALLY; @@ -220,7 +220,7 @@ static void dac_end(DACDriver *dacp) { // -> saves cpu cycles (?) for (uint8_t i = 0; i < active_tones; i++) { float freq = audio_get_processed_frequency(i); - if (freq > 0) { // disregard 'rest' notes, with valid frequency 0.0f; which would only lower the resulting waveform volume during the additive synthesis step + if (freq > 0) { // disregard 'rest' notes, with valid frequency 0.0f; which would only lower the resulting waveform volume during the additive synthesis step active_tones_snapshot[active_tones_snapshot_length++] = freq; } } @@ -321,7 +321,9 @@ void audio_driver_initialize() { gptStart(&GPTD6, &gpt6cfg1); } -void audio_driver_stop(void) { state = OUTPUT_SHOULD_STOP; } +void audio_driver_stop(void) { + state = OUTPUT_SHOULD_STOP; +} void audio_driver_start(void) { gptStartContinuous(&GPTD6, 2U); diff --git a/platforms/chibios/drivers/audio_dac_basic.c b/platforms/chibios/drivers/audio_dac_basic.c index fac6513506..64439a1e3c 100644 --- a/platforms/chibios/drivers/audio_dac_basic.c +++ b/platforms/chibios/drivers/audio_dac_basic.c @@ -115,13 +115,15 @@ void channel_1_set_frequency(float freq) { channel_1_frequency = freq; channel_1_stop(); - if (freq <= 0.0) // a pause/rest has freq=0 + if (freq <= 0.0) // a pause/rest has freq=0 return; gpt6cfg1.frequency = 2 * freq * AUDIO_DAC_BUFFER_SIZE; channel_1_start(); } -float channel_1_get_frequency(void) { return channel_1_frequency; } +float channel_1_get_frequency(void) { + return channel_1_frequency; +} void channel_2_start(void) { gptStart(&GPTD7, &gpt7cfg1); @@ -140,13 +142,15 @@ void channel_2_set_frequency(float freq) { channel_2_frequency = freq; channel_2_stop(); - if (freq <= 0.0) // a pause/rest has freq=0 + if (freq <= 0.0) // a pause/rest has freq=0 return; gpt7cfg1.frequency = 2 * freq * AUDIO_DAC_BUFFER_SIZE; channel_2_start(); } -float channel_2_get_frequency(void) { return channel_2_frequency; } +float channel_2_get_frequency(void) { + return channel_2_frequency; +} static void gpt_audio_state_cb(GPTDriver *gptp) { if (audio_update_state()) { @@ -155,8 +159,8 @@ static void gpt_audio_state_cb(GPTDriver *gptp) { channel_1_set_frequency(audio_get_processed_frequency(0)); channel_2_set_frequency(audio_get_processed_frequency(0)); -#else // two separate audio outputs/speakers - // primary speaker on A4, optional secondary on A5 +#else // two separate audio outputs/speakers + // primary speaker on A4, optional secondary on A5 if (AUDIO_PIN == A4) { channel_1_set_frequency(audio_get_processed_frequency(0)); if (AUDIO_PIN_ALT == A5) { diff --git a/platforms/chibios/drivers/audio_pwm_hardware.c b/platforms/chibios/drivers/audio_pwm_hardware.c index cd40019ee7..710f397609 100644 --- a/platforms/chibios/drivers/audio_pwm_hardware.c +++ b/platforms/chibios/drivers/audio_pwm_hardware.c @@ -72,7 +72,7 @@ static float channel_1_frequency = 0.0f; void channel_1_set_frequency(float freq) { channel_1_frequency = freq; - if (freq <= 0.0) // a pause/rest has freq=0 + if (freq <= 0.0) // a pause/rest has freq=0 return; pwmcnt_t period = (pwmCFG.frequency / freq); @@ -82,14 +82,18 @@ void channel_1_set_frequency(float freq) { PWM_PERCENTAGE_TO_WIDTH(&AUDIO_PWM_DRIVER, (100 - note_timbre) * 100)); } -float channel_1_get_frequency(void) { return channel_1_frequency; } +float channel_1_get_frequency(void) { + return channel_1_frequency; +} void channel_1_start(void) { pwmStop(&AUDIO_PWM_DRIVER); pwmStart(&AUDIO_PWM_DRIVER, &pwmCFG); } -void channel_1_stop(void) { pwmStop(&AUDIO_PWM_DRIVER); } +void channel_1_stop(void) { + pwmStop(&AUDIO_PWM_DRIVER); +} static void gpt_callback(GPTDriver *gptp); GPTConfig gptCFG = { @@ -108,9 +112,9 @@ void audio_driver_initialize(void) { pwmStart(&AUDIO_PWM_DRIVER, &pwmCFG); // connect the AUDIO_PIN to the PWM hardware -#if defined(USE_GPIOV1) // STM32F103C8 +#if defined(USE_GPIOV1) // STM32F103C8 palSetLineMode(AUDIO_PIN, PAL_MODE_ALTERNATE_PUSHPULL); -#else // GPIOv2 (or GPIOv3 for f4xx, which is the same/compatible at this command) +#else // GPIOv2 (or GPIOv3 for f4xx, which is the same/compatible at this command) palSetLineMode(AUDIO_PIN, PAL_MODE_ALTERNATE(AUDIO_PWM_PAL_MODE)); #endif @@ -135,10 +139,10 @@ void audio_driver_stop(void) { * and updates the pwm to output that frequency */ static void gpt_callback(GPTDriver *gptp) { - float freq; // TODO: freq_alt + float freq; // TODO: freq_alt if (audio_update_state()) { - freq = audio_get_processed_frequency(0); // freq_alt would be index=1 + freq = audio_get_processed_frequency(0); // freq_alt would be index=1 channel_1_set_frequency(freq); } } diff --git a/platforms/chibios/drivers/audio_pwm_software.c b/platforms/chibios/drivers/audio_pwm_software.c index 15c3e98b6a..e01f86ea52 100644 --- a/platforms/chibios/drivers/audio_pwm_software.c +++ b/platforms/chibios/drivers/audio_pwm_software.c @@ -57,7 +57,7 @@ static float channel_1_frequency = 0.0f; void channel_1_set_frequency(float freq) { channel_1_frequency = freq; - if (freq <= 0.0) // a pause/rest has freq=0 + if (freq <= 0.0) // a pause/rest has freq=0 return; pwmcnt_t period = (pwmCFG.frequency / freq); @@ -68,7 +68,9 @@ void channel_1_set_frequency(float freq) { PWM_PERCENTAGE_TO_WIDTH(&AUDIO_PWM_DRIVER, (100 - note_timbre) * 100)); } -float channel_1_get_frequency(void) { return channel_1_frequency; } +float channel_1_get_frequency(void) { + return channel_1_frequency; +} void channel_1_start(void) { pwmStop(&AUDIO_PWM_DRIVER); @@ -81,10 +83,10 @@ void channel_1_start(void) { void channel_1_stop(void) { pwmStop(&AUDIO_PWM_DRIVER); - palClearLine(AUDIO_PIN); // leave the line low, after last note was played + palClearLine(AUDIO_PIN); // leave the line low, after last note was played #if defined(AUDIO_PIN_ALT) && defined(AUDIO_PIN_ALT_AS_NEGATIVE) - palClearLine(AUDIO_PIN_ALT); // leave the line low, after last note was played + palClearLine(AUDIO_PIN_ALT); // leave the line low, after last note was played #endif } @@ -100,7 +102,7 @@ static void pwm_audio_period_callback(PWMDriver *pwmp) { static void pwm_audio_channel_interrupt_callback(PWMDriver *pwmp) { (void)pwmp; if (channel_1_frequency > 0) { - palSetLine(AUDIO_PIN); // generate a PWM signal on any pin, not necessarily the one connected to the timer + palSetLine(AUDIO_PIN); // generate a PWM signal on any pin, not necessarily the one connected to the timer #if defined(AUDIO_PIN_ALT) && defined(AUDIO_PIN_ALT_AS_NEGATIVE) palClearLine(AUDIO_PIN_ALT); #endif @@ -131,7 +133,7 @@ void audio_driver_initialize(void) { palClearLine(AUDIO_PIN_ALT); #endif - pwmEnablePeriodicNotification(&AUDIO_PWM_DRIVER); // enable pwm callbacks + pwmEnablePeriodicNotification(&AUDIO_PWM_DRIVER); // enable pwm callbacks pwmEnableChannelNotification(&AUDIO_PWM_DRIVER, AUDIO_PWM_CHANNEL - 1); gptStart(&AUDIO_STATE_TIMER, &gptCFG); @@ -155,10 +157,10 @@ void audio_driver_stop(void) { * and updates the pwm to output that frequency */ static void gpt_callback(GPTDriver *gptp) { - float freq; // TODO: freq_alt + float freq; // TODO: freq_alt if (audio_update_state()) { - freq = audio_get_processed_frequency(0); // freq_alt would be index=1 + freq = audio_get_processed_frequency(0); // freq_alt would be index=1 channel_1_set_frequency(freq); } } diff --git a/platforms/chibios/drivers/eeprom/eeprom_stm32_L0_L1.h b/platforms/chibios/drivers/eeprom/eeprom_stm32_L0_L1.h index a35defca8b..616d7ccbee 100644 --- a/platforms/chibios/drivers/eeprom/eeprom_stm32_L0_L1.h +++ b/platforms/chibios/drivers/eeprom/eeprom_stm32_L0_L1.h @@ -24,7 +24,7 @@ # define STM32_ONBOARD_EEPROM_SIZE 1024 # else # include "eeconfig.h" -# define STM32_ONBOARD_EEPROM_SIZE (((EECONFIG_SIZE + 3) / 4) * 4) // based off eeconfig's current usage, aligned to 4-byte sizes, to deal with LTO and EEPROM page sizing +# define STM32_ONBOARD_EEPROM_SIZE (((EECONFIG_SIZE + 3) / 4) * 4) // based off eeconfig's current usage, aligned to 4-byte sizes, to deal with LTO and EEPROM page sizing # endif #endif diff --git a/platforms/chibios/drivers/i2c_master.c b/platforms/chibios/drivers/i2c_master.c index 4a5d4760d0..d10bdbabc1 100644 --- a/platforms/chibios/drivers/i2c_master.c +++ b/platforms/chibios/drivers/i2c_master.c @@ -203,4 +203,6 @@ i2c_status_t i2c_readReg16(uint8_t devaddr, uint16_t regaddr, uint8_t* data, uin return chibios_to_qmk(&status); } -void i2c_stop(void) { i2cStop(&I2C_DRIVER); } +void i2c_stop(void) { + i2cStop(&I2C_DRIVER); +} diff --git a/platforms/chibios/drivers/serial.c b/platforms/chibios/drivers/serial.c index 17d0b32be8..6db5d85250 100644 --- a/platforms/chibios/drivers/serial.c +++ b/platforms/chibios/drivers/serial.c @@ -50,14 +50,30 @@ # error invalid SELECT_SOFT_SERIAL_SPEED value #endif -inline static void serial_delay(void) { wait_us(SERIAL_DELAY); } -inline static void serial_delay_half(void) { wait_us(SERIAL_DELAY / 2); } -inline static void serial_delay_blip(void) { wait_us(1); } -inline static void serial_output(void) { setPinOutput(SOFT_SERIAL_PIN); } -inline static void serial_input(void) { setPinInputHigh(SOFT_SERIAL_PIN); } -inline static bool serial_read_pin(void) { return !!readPin(SOFT_SERIAL_PIN); } -inline static void serial_low(void) { writePinLow(SOFT_SERIAL_PIN); } -inline static void serial_high(void) { writePinHigh(SOFT_SERIAL_PIN); } +inline static void serial_delay(void) { + wait_us(SERIAL_DELAY); +} +inline static void serial_delay_half(void) { + wait_us(SERIAL_DELAY / 2); +} +inline static void serial_delay_blip(void) { + wait_us(1); +} +inline static void serial_output(void) { + setPinOutput(SOFT_SERIAL_PIN); +} +inline static void serial_input(void) { + setPinInputHigh(SOFT_SERIAL_PIN); +} +inline static bool serial_read_pin(void) { + return !!readPin(SOFT_SERIAL_PIN); +} +inline static void serial_low(void) { + writePinLow(SOFT_SERIAL_PIN); +} +inline static void serial_high(void) { + writePinHigh(SOFT_SERIAL_PIN); +} void interrupt_handler(void *arg); @@ -226,7 +242,7 @@ bool soft_serial_transaction(int sstd_index) { uint8_t checksum = 0; // send data to the slave - serial_write_byte(sstd_index); // first chunk is transaction id + serial_write_byte(sstd_index); // first chunk is transaction id sync_recv(); for (int i = 0; i < trans->initiator2target_buffer_size; ++i) { @@ -238,7 +254,7 @@ bool soft_serial_transaction(int sstd_index) { sync_recv(); serial_delay(); - serial_delay(); // read mid pulses + serial_delay(); // read mid pulses // receive data from the slave uint8_t checksum_computed = 0; diff --git a/platforms/chibios/drivers/serial_usart.c b/platforms/chibios/drivers/serial_usart.c index 42c476a374..85c64214d1 100644 --- a/platforms/chibios/drivers/serial_usart.c +++ b/platforms/chibios/drivers/serial_usart.c @@ -238,7 +238,7 @@ void soft_serial_initiator_init(void) { usart_master_init(&serial_driver); #if defined(MCU_STM32) && defined(SERIAL_USART_PIN_SWAP) - serial_config.cr2 |= USART_CR2_SWAP; // master has swapped TX/RX pins + serial_config.cr2 |= USART_CR2_SWAP; // master has swapped TX/RX pins #endif sdStart(serial_driver, &serial_config); diff --git a/platforms/chibios/drivers/serial_usart.h b/platforms/chibios/drivers/serial_usart.h index 7b135b31e0..81fe9e0113 100644 --- a/platforms/chibios/drivers/serial_usart.h +++ b/platforms/chibios/drivers/serial_usart.h @@ -50,15 +50,15 @@ #endif #if !defined(USART_CR1_M0) -# define USART_CR1_M0 USART_CR1_M // some platforms (f1xx) dont have this so +# define USART_CR1_M0 USART_CR1_M // some platforms (f1xx) dont have this so #endif #if !defined(SERIAL_USART_CR1) -# define SERIAL_USART_CR1 (USART_CR1_PCE | USART_CR1_PS | USART_CR1_M0) // parity enable, odd parity, 9 bit length +# define SERIAL_USART_CR1 (USART_CR1_PCE | USART_CR1_PS | USART_CR1_M0) // parity enable, odd parity, 9 bit length #endif #if !defined(SERIAL_USART_CR2) -# define SERIAL_USART_CR2 (USART_CR2_STOP_1) // 2 stop bits +# define SERIAL_USART_CR2 (USART_CR2_STOP_1) // 2 stop bits #endif #if !defined(SERIAL_USART_CR3) diff --git a/platforms/chibios/drivers/spi_master.c b/platforms/chibios/drivers/spi_master.c index dde0bb0597..998bace550 100644 --- a/platforms/chibios/drivers/spi_master.c +++ b/platforms/chibios/drivers/spi_master.c @@ -115,7 +115,7 @@ bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) { #elif defined(HT32) spiConfig.cr0 = SPI_CR0_SELOEN; - spiConfig.cr1 = SPI_CR1_MODE | 8; // 8 bits and in master mode + spiConfig.cr1 = SPI_CR1_MODE | 8; // 8 bits and in master mode if (lsbFirst) { spiConfig.cr1 |= SPI_CR1_FIRSTBIT; diff --git a/platforms/chibios/drivers/uart.c b/platforms/chibios/drivers/uart.c index d2ea5d6415..dbe991efa3 100644 --- a/platforms/chibios/drivers/uart.c +++ b/platforms/chibios/drivers/uart.c @@ -43,7 +43,9 @@ void uart_init(uint32_t baud) { } } -void uart_write(uint8_t data) { sdPut(&SERIAL_DRIVER, c); } +void uart_write(uint8_t data) { + sdPut(&SERIAL_DRIVER, c); +} uint8_t uart_read(void) { msg_t res = sdGet(&SERIAL_DRIVER); @@ -51,8 +53,14 @@ uint8_t uart_read(void) { return (uint8_t)res; } -void uart_transmit(const uint8_t *data, uint16_t length) { sdWrite(&SERIAL_DRIVER, data, length); } +void uart_transmit(const uint8_t *data, uint16_t length) { + sdWrite(&SERIAL_DRIVER, data, length); +} -void uart_receive(uint8_t *data, uint16_t length) { sdRead(&SERIAL_DRIVER, data, length); } +void uart_receive(uint8_t *data, uint16_t length) { + sdRead(&SERIAL_DRIVER, data, length); +} -bool uart_available(void) { return !sdGetWouldBlock(&SERIAL_DRIVER); } +bool uart_available(void) { + return !sdGetWouldBlock(&SERIAL_DRIVER); +} diff --git a/platforms/chibios/drivers/usbpd_stm32g4.c b/platforms/chibios/drivers/usbpd_stm32g4.c index f16ca8aeae..0096f22f07 100644 --- a/platforms/chibios/drivers/usbpd_stm32g4.c +++ b/platforms/chibios/drivers/usbpd_stm32g4.c @@ -18,7 +18,7 @@ #ifndef USBPD_UCPD1_CFG1 # define USBPD_UCPD1_CFG1 (UCPD_CFG1_PSC_UCPDCLK_0 | UCPD_CFG1_TRANSWIN_3 | UCPD_CFG1_IFRGAP_4 | UCPD_CFG1_HBITCLKDIV_4) -#endif // USBPD_UCPD1_CFG1 +#endif // USBPD_UCPD1_CFG1 // Initialises the USBPD subsystem __attribute__((weak)) void usbpd_init(void) { @@ -64,7 +64,7 @@ __attribute__((weak)) usbpd_allowance_t usbpd_get_allowance(void) { switch (vstate_max) { case 0: case 1: - return USBPD_500MA; // Note that this is 500mA (i.e. max USB 2.0), not 900mA, as we're not using USB 3.1 as a sink device. + return USBPD_500MA; // Note that this is 500mA (i.e. max USB 2.0), not 900mA, as we're not using USB 3.1 as a sink device. case 2: return USBPD_1500MA; case 3: diff --git a/platforms/chibios/drivers/ws2812.c b/platforms/chibios/drivers/ws2812.c index 7e870661de..1b3bb59842 100644 --- a/platforms/chibios/drivers/ws2812.c +++ b/platforms/chibios/drivers/ws2812.c @@ -10,7 +10,7 @@ # define NOP_FUDGE 0.4 # else # error("NOP_FUDGE configuration required") -# define NOP_FUDGE 1 // this just pleases the compile so the above error is easier to spot +# define NOP_FUDGE 1 // this just pleases the compile so the above error is easier to spot # endif #endif @@ -25,12 +25,12 @@ // The reset gap can be 6000 ns, but depending on the LED strip it may have to be increased // to values like 600000 ns. If it is too small, the pixels will show nothing most of the time. #ifndef WS2812_RES -# define WS2812_RES (1000 * WS2812_TRST_US) // Width of the low gap between bits to cause a frame to latch +# define WS2812_RES (1000 * WS2812_TRST_US) // Width of the low gap between bits to cause a frame to latch #endif #define NUMBER_NOPS 6 #define CYCLES_PER_SEC (CPU_CLOCK / NUMBER_NOPS * NOP_FUDGE) -#define NS_PER_SEC (1000000000L) // Note that this has to be SIGNED since we want to be able to check for negative values of derivatives +#define NS_PER_SEC (1000000000L) // Note that this has to be SIGNED since we want to be able to check for negative values of derivatives #define NS_PER_CYCLE (NS_PER_SEC / CYCLES_PER_SEC) #define NS_TO_CYCLES(n) ((n) / NS_PER_CYCLE) @@ -67,7 +67,9 @@ void sendByte(uint8_t byte) { } } -void ws2812_init(void) { palSetLineMode(RGB_DI_PIN, WS2812_OUTPUT_MODE); } +void ws2812_init(void) { + palSetLineMode(RGB_DI_PIN, WS2812_OUTPUT_MODE); +} // Setleds for standard RGB void ws2812_setleds(LED_TYPE *ledarray, uint16_t leds) { diff --git a/platforms/chibios/drivers/ws2812_pwm.c b/platforms/chibios/drivers/ws2812_pwm.c index 19ea3cfe8a..57187676d7 100644 --- a/platforms/chibios/drivers/ws2812_pwm.c +++ b/platforms/chibios/drivers/ws2812_pwm.c @@ -11,19 +11,19 @@ #endif #ifndef WS2812_PWM_DRIVER -# define WS2812_PWM_DRIVER PWMD2 // TIMx +# define WS2812_PWM_DRIVER PWMD2 // TIMx #endif #ifndef WS2812_PWM_CHANNEL -# define WS2812_PWM_CHANNEL 2 // Channel +# define WS2812_PWM_CHANNEL 2 // Channel #endif #ifndef WS2812_PWM_PAL_MODE -# define WS2812_PWM_PAL_MODE 2 // DI Pin's alternate function value +# define WS2812_PWM_PAL_MODE 2 // DI Pin's alternate function value #endif #ifndef WS2812_DMA_STREAM -# define WS2812_DMA_STREAM STM32_DMA1_STREAM2 // DMA Stream for TIMx_UP +# define WS2812_DMA_STREAM STM32_DMA1_STREAM2 // DMA Stream for TIMx_UP #endif #ifndef WS2812_DMA_CHANNEL -# define WS2812_DMA_CHANNEL 2 // DMA Channel for TIMx_UP +# define WS2812_DMA_CHANNEL 2 // DMA Channel for TIMx_UP #endif #if (STM32_DMA_SUPPORTS_DMAMUX == TRUE) && !defined(WS2812_DMAMUX_ID) # error "please consult your MCU's datasheet and specify in your config.h: #define WS2812_DMAMUX_ID STM32_DMAMUX1_TIM?_UP" @@ -56,7 +56,7 @@ #ifndef WS2812_PWM_TARGET_PERIOD //# define WS2812_PWM_TARGET_PERIOD 800000 // Original code is 800k...? -# define WS2812_PWM_TARGET_PERIOD 80000 // TODO: work out why 10x less on f303/f4x1 +# define WS2812_PWM_TARGET_PERIOD 80000 // TODO: work out why 10x less on f303/f4x1 #endif /* --- PRIVATE CONSTANTS ---------------------------------------------------- */ @@ -259,8 +259,10 @@ write/read to/from the other buffer). void ws2812_init(void) { // Initialize led frame buffer uint32_t i; - for (i = 0; i < WS2812_COLOR_BIT_N; i++) ws2812_frame_buffer[i] = WS2812_DUTYCYCLE_0; // All color bits are zero duty cycle - for (i = 0; i < WS2812_RESET_BIT_N; i++) ws2812_frame_buffer[i + WS2812_COLOR_BIT_N] = 0; // All reset bits are zero + for (i = 0; i < WS2812_COLOR_BIT_N; i++) + ws2812_frame_buffer[i] = WS2812_DUTYCYCLE_0; // All color bits are zero duty cycle + for (i = 0; i < WS2812_RESET_BIT_N; i++) + ws2812_frame_buffer[i + WS2812_COLOR_BIT_N] = 0; // All reset bits are zero palSetLineMode(RGB_DI_PIN, WS2812_OUTPUT_MODE); @@ -268,22 +270,22 @@ void ws2812_init(void) { //#pragma GCC diagnostic ignored "-Woverride-init" // Turn off override-init warning for this struct. We use the overriding ability to set a "default" channel config static const PWMConfig ws2812_pwm_config = { .frequency = WS2812_PWM_FREQUENCY, - .period = WS2812_PWM_PERIOD, // Mit dieser Periode wird UDE-Event erzeugt und ein neuer Wert (Länge WS2812_BIT_N) vom DMA ins CCR geschrieben + .period = WS2812_PWM_PERIOD, // Mit dieser Periode wird UDE-Event erzeugt und ein neuer Wert (Länge WS2812_BIT_N) vom DMA ins CCR geschrieben .callback = NULL, .channels = { - [0 ... 3] = {.mode = PWM_OUTPUT_DISABLED, .callback = NULL}, // Channels default to disabled - [WS2812_PWM_CHANNEL - 1] = {.mode = WS2812_PWM_OUTPUT_MODE, .callback = NULL}, // Turn on the channel we care about + [0 ... 3] = {.mode = PWM_OUTPUT_DISABLED, .callback = NULL}, // Channels default to disabled + [WS2812_PWM_CHANNEL - 1] = {.mode = WS2812_PWM_OUTPUT_MODE, .callback = NULL}, // Turn on the channel we care about }, .cr2 = 0, - .dier = TIM_DIER_UDE, // DMA on update event for next period + .dier = TIM_DIER_UDE, // DMA on update event for next period }; //#pragma GCC diagnostic pop // Restore command-line warning options // Configure DMA // dmaInit(); // Joe added this dmaStreamAlloc(WS2812_DMA_STREAM - STM32_DMA_STREAM(0), 10, NULL, NULL); - dmaStreamSetPeripheral(WS2812_DMA_STREAM, &(WS2812_PWM_DRIVER.tim->CCR[WS2812_PWM_CHANNEL - 1])); // Ziel ist der An-Zeit im Cap-Comp-Register + dmaStreamSetPeripheral(WS2812_DMA_STREAM, &(WS2812_PWM_DRIVER.tim->CCR[WS2812_PWM_CHANNEL - 1])); // Ziel ist der An-Zeit im Cap-Comp-Register dmaStreamSetMemory0(WS2812_DMA_STREAM, ws2812_frame_buffer); dmaStreamSetTransactionSize(WS2812_DMA_STREAM, WS2812_BIT_N); dmaStreamSetMode(WS2812_DMA_STREAM, STM32_DMA_CR_CHSEL(WS2812_DMA_CHANNEL) | STM32_DMA_CR_DIR_M2P | STM32_DMA_CR_PSIZE_WORD | STM32_DMA_CR_MSIZE_WORD | STM32_DMA_CR_MINC | STM32_DMA_CR_CIRC | STM32_DMA_CR_PL(3)); @@ -302,7 +304,7 @@ void ws2812_init(void) { // ChibiOS driver code, so we don't have to do anything special to the timer. If we did, we'd have to start the timer, // disable counting, enable the channel, and then make whatever configuration changes we need. pwmStart(&WS2812_PWM_DRIVER, &ws2812_pwm_config); - pwmEnableChannel(&WS2812_PWM_DRIVER, WS2812_PWM_CHANNEL - 1, 0); // Initial period is 0; output will be low until first duty cycle is DMA'd in + pwmEnableChannel(&WS2812_PWM_DRIVER, WS2812_PWM_CHANNEL - 1, 0); // Initial period is 0; output will be low until first duty cycle is DMA'd in } void ws2812_write_led(uint16_t led_number, uint8_t r, uint8_t g, uint8_t b) { diff --git a/platforms/chibios/drivers/ws2812_spi.c b/platforms/chibios/drivers/ws2812_spi.c index ba471e0b8e..76191db165 100644 --- a/platforms/chibios/drivers/ws2812_spi.c +++ b/platforms/chibios/drivers/ws2812_spi.c @@ -42,7 +42,7 @@ # define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_0) #elif WS2812_SPI_DIVISOR == 8 # define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_1) -#elif WS2812_SPI_DIVISOR == 16 // same as default +#elif WS2812_SPI_DIVISOR == 16 // same as default # define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_1 | SPI_CR1_BR_0) #elif WS2812_SPI_DIVISOR == 32 # define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2) @@ -53,14 +53,14 @@ #elif WS2812_SPI_DIVISOR == 256 # define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) #else -# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_1 | SPI_CR1_BR_0) // default +# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_1 | SPI_CR1_BR_0) // default #endif // Use SPI circular buffer #ifdef WS2812_SPI_USE_CIRCULAR_BUFFER -# define WS2812_SPI_BUFFER_MODE 1 // circular buffer +# define WS2812_SPI_BUFFER_MODE 1 // circular buffer #else -# define WS2812_SPI_BUFFER_MODE 0 // normal buffer +# define WS2812_SPI_BUFFER_MODE 0 // normal buffer #endif #if defined(USE_GPIOV1) @@ -104,20 +104,30 @@ static void set_led_color_rgb(LED_TYPE color, int pos) { uint8_t* tx_start = &txbuf[PREAMBLE_SIZE]; #if (WS2812_BYTE_ORDER == WS2812_BYTE_ORDER_GRB) - for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + j] = get_protocol_eq(color.g, j); - for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE + j] = get_protocol_eq(color.r, j); - for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE * 2 + j] = get_protocol_eq(color.b, j); + for (int j = 0; j < 4; j++) + tx_start[BYTES_FOR_LED * pos + j] = get_protocol_eq(color.g, j); + for (int j = 0; j < 4; j++) + tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE + j] = get_protocol_eq(color.r, j); + for (int j = 0; j < 4; j++) + tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE * 2 + j] = get_protocol_eq(color.b, j); #elif (WS2812_BYTE_ORDER == WS2812_BYTE_ORDER_RGB) - for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + j] = get_protocol_eq(color.r, j); - for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE + j] = get_protocol_eq(color.g, j); - for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE * 2 + j] = get_protocol_eq(color.b, j); + for (int j = 0; j < 4; j++) + tx_start[BYTES_FOR_LED * pos + j] = get_protocol_eq(color.r, j); + for (int j = 0; j < 4; j++) + tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE + j] = get_protocol_eq(color.g, j); + for (int j = 0; j < 4; j++) + tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE * 2 + j] = get_protocol_eq(color.b, j); #elif (WS2812_BYTE_ORDER == WS2812_BYTE_ORDER_BGR) - for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + j] = get_protocol_eq(color.b, j); - for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE + j] = get_protocol_eq(color.g, j); - for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE * 2 + j] = get_protocol_eq(color.r, j); + for (int j = 0; j < 4; j++) + tx_start[BYTES_FOR_LED * pos + j] = get_protocol_eq(color.b, j); + for (int j = 0; j < 4; j++) + tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE + j] = get_protocol_eq(color.g, j); + for (int j = 0; j < 4; j++) + tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE * 2 + j] = get_protocol_eq(color.r, j); #endif #ifdef RGBW - for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE * 4 + j] = get_protocol_eq(color.w, j); + for (int j = 0; j < 4; j++) + tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE * 4 + j] = get_protocol_eq(color.w, j); #endif } @@ -126,7 +136,7 @@ void ws2812_init(void) { #ifdef WS2812_SPI_SCK_PIN palSetLineMode(WS2812_SPI_SCK_PIN, WS2812_SCK_OUTPUT_MODE); -#endif // WS2812_SPI_SCK_PIN +#endif // WS2812_SPI_SCK_PIN // TODO: more dynamic baudrate static const SPIConfig spicfg = {WS2812_SPI_BUFFER_MODE, NULL, PAL_PORT(RGB_DI_PIN), PAL_PAD(RGB_DI_PIN), WS2812_SPI_DIVISOR_CR1_BR_X}; diff --git a/platforms/chibios/eeprom_stm32.c b/platforms/chibios/eeprom_stm32.c index 8bf0b19c3d..a15bfe09ed 100644 --- a/platforms/chibios/eeprom_stm32.c +++ b/platforms/chibios/eeprom_stm32.c @@ -560,9 +560,13 @@ uint16_t EEPROM_ReadDataWord(uint16_t Address) { /***************************************************************************** * Bind to eeprom_driver.c *******************************************************************************/ -void eeprom_driver_init(void) { EEPROM_Init(); } +void eeprom_driver_init(void) { + EEPROM_Init(); +} -void eeprom_driver_erase(void) { EEPROM_Erase(); } +void eeprom_driver_erase(void) { + EEPROM_Erase(); +} void eeprom_read_block(void *buf, const void *addr, size_t len) { const uint8_t *src = (const uint8_t *)addr; diff --git a/platforms/chibios/eeprom_stm32_defs.h b/platforms/chibios/eeprom_stm32_defs.h index 581434eb5e..a6ceb41355 100644 --- a/platforms/chibios/eeprom_stm32_defs.h +++ b/platforms/chibios/eeprom_stm32_defs.h @@ -20,41 +20,41 @@ #if !defined(FEE_PAGE_SIZE) || !defined(FEE_PAGE_COUNT) # if defined(STM32F103xB) || defined(STM32F042x6) || defined(GD32VF103C8) || defined(GD32VF103CB) # ifndef FEE_PAGE_SIZE -# define FEE_PAGE_SIZE 0x400 // Page size = 1KByte +# define FEE_PAGE_SIZE 0x400 // Page size = 1KByte # endif # ifndef FEE_PAGE_COUNT -# define FEE_PAGE_COUNT 2 // How many pages are used +# define FEE_PAGE_COUNT 2 // How many pages are used # endif # elif defined(STM32F103xE) || defined(STM32F303xC) || defined(STM32F072xB) || defined(STM32F070xB) # ifndef FEE_PAGE_SIZE -# define FEE_PAGE_SIZE 0x800 // Page size = 2KByte +# define FEE_PAGE_SIZE 0x800 // Page size = 2KByte # endif # ifndef FEE_PAGE_COUNT -# define FEE_PAGE_COUNT 4 // How many pages are used +# define FEE_PAGE_COUNT 4 // How many pages are used # endif # elif defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F405xG) || defined(STM32F411xE) # ifndef FEE_PAGE_SIZE -# define FEE_PAGE_SIZE 0x4000 // Page size = 16KByte +# define FEE_PAGE_SIZE 0x4000 // Page size = 16KByte # endif # ifndef FEE_PAGE_COUNT -# define FEE_PAGE_COUNT 1 // How many pages are used +# define FEE_PAGE_COUNT 1 // How many pages are used # endif # endif #endif #if !defined(FEE_MCU_FLASH_SIZE) # if defined(STM32F042x6) -# define FEE_MCU_FLASH_SIZE 32 // Size in Kb +# define FEE_MCU_FLASH_SIZE 32 // Size in Kb # elif defined(GD32VF103C8) -# define FEE_MCU_FLASH_SIZE 64 // Size in Kb +# define FEE_MCU_FLASH_SIZE 64 // Size in Kb # elif defined(STM32F103xB) || defined(STM32F072xB) || defined(STM32F070xB) || defined(GD32VF103CB) -# define FEE_MCU_FLASH_SIZE 128 // Size in Kb +# define FEE_MCU_FLASH_SIZE 128 // Size in Kb # elif defined(STM32F303xC) || defined(STM32F401xC) -# define FEE_MCU_FLASH_SIZE 256 // Size in Kb +# define FEE_MCU_FLASH_SIZE 256 // Size in Kb # elif defined(STM32F103xE) || defined(STM32F401xE) || defined(STM32F411xE) -# define FEE_MCU_FLASH_SIZE 512 // Size in Kb +# define FEE_MCU_FLASH_SIZE 512 // Size in Kb # elif defined(STM32F405xG) -# define FEE_MCU_FLASH_SIZE 1024 // Size in Kb +# define FEE_MCU_FLASH_SIZE 1024 // Size in Kb # endif #endif @@ -62,7 +62,7 @@ #if !defined(FEE_PAGE_BASE_ADDRESS) # if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F405xG) || defined(STM32F411xE) # ifndef FEE_PAGE_BASE_ADDRESS -# define FEE_PAGE_BASE_ADDRESS 0x08004000 // bodge to force 2nd 16k page +# define FEE_PAGE_BASE_ADDRESS 0x08004000 // bodge to force 2nd 16k page # endif # else # ifndef FEE_FLASH_BASE diff --git a/platforms/chibios/eeprom_teensy.c b/platforms/chibios/eeprom_teensy.c index 575f51526e..c8777febde 100644 --- a/platforms/chibios/eeprom_teensy.c +++ b/platforms/chibios/eeprom_teensy.c @@ -60,19 +60,19 @@ // Minimum EEPROM Endurance // ------------------------ -# if (EEPROM_SIZE == 2048) // 35000 writes/byte or 70000 writes/word +# if (EEPROM_SIZE == 2048) // 35000 writes/byte or 70000 writes/word # define EEESIZE 0x33 -# elif (EEPROM_SIZE == 1024) // 75000 writes/byte or 150000 writes/word +# elif (EEPROM_SIZE == 1024) // 75000 writes/byte or 150000 writes/word # define EEESIZE 0x34 -# elif (EEPROM_SIZE == 512) // 155000 writes/byte or 310000 writes/word +# elif (EEPROM_SIZE == 512) // 155000 writes/byte or 310000 writes/word # define EEESIZE 0x35 -# elif (EEPROM_SIZE == 256) // 315000 writes/byte or 630000 writes/word +# elif (EEPROM_SIZE == 256) // 315000 writes/byte or 630000 writes/word # define EEESIZE 0x36 -# elif (EEPROM_SIZE == 128) // 635000 writes/byte or 1270000 writes/word +# elif (EEPROM_SIZE == 128) // 635000 writes/byte or 1270000 writes/word # define EEESIZE 0x37 -# elif (EEPROM_SIZE == 64) // 1275000 writes/byte or 2550000 writes/word +# elif (EEPROM_SIZE == 64) // 1275000 writes/byte or 2550000 writes/word # define EEESIZE 0x38 -# elif (EEPROM_SIZE == 32) // 2555000 writes/byte or 5110000 writes/word +# elif (EEPROM_SIZE == 32) // 2555000 writes/byte or 5110000 writes/word # define EEESIZE 0x39 # endif @@ -88,9 +88,9 @@ void eeprom_initialize(void) { if (FTFL->FCNFG & FTFL_FCNFG_RAMRDY) { // FlexRAM is configured as traditional RAM // We need to reconfigure for EEPROM usage - FTFL->FCCOB0 = 0x80; // PGMPART = Program Partition Command - FTFL->FCCOB4 = EEESIZE; // EEPROM Size - FTFL->FCCOB5 = 0x03; // 0K for Dataflash, 32K for EEPROM backup + FTFL->FCCOB0 = 0x80; // PGMPART = Program Partition Command + FTFL->FCCOB4 = EEESIZE; // EEPROM Size + FTFL->FCCOB5 = 0x03; // 0K for Dataflash, 32K for EEPROM backup __disable_irq(); // do_flash_cmd() must execute from RAM. Luckily the C syntax is simple... (*((void (*)(volatile uint8_t *))((uint32_t)do_flash_cmd | 1)))(&(FTFL->FSTAT)); @@ -98,7 +98,7 @@ void eeprom_initialize(void) { status = FTFL->FSTAT; if (status & (FTFL_FSTAT_RDCOLERR | FTFL_FSTAT_ACCERR | FTFL_FSTAT_FPVIOL)) { FTFL->FSTAT = (status & (FTFL_FSTAT_RDCOLERR | FTFL_FSTAT_ACCERR | FTFL_FSTAT_FPVIOL)); - return; // error + return; // error } } // wait for eeprom to become ready (is this really necessary?) @@ -162,7 +162,9 @@ void eeprom_read_block(void *buf, const void *addr, uint32_t len) { * * FIXME: needs doc */ -int eeprom_is_ready(void) { return (FTFL->FCNFG & FTFL_FCNFG_EEERDY) ? 1 : 0; } +int eeprom_is_ready(void) { + return (FTFL->FCNFG & FTFL_FCNFG_EEERDY) ? 1 : 0; +} /** \brief flexram wait * @@ -486,7 +488,9 @@ void eeprom_read_block(void *buf, const void *addr, uint32_t len) { } } -int eeprom_is_ready(void) { return 1; } +int eeprom_is_ready(void) { + return 1; +} void eeprom_write_word(uint16_t *addr, uint16_t value) { uint8_t *p = (uint8_t *)addr; @@ -515,7 +519,9 @@ void eeprom_write_block(const void *buf, void *addr, uint32_t len) { #endif /* chip selection */ // The update functions just calls write for now, but could probably be optimized -void eeprom_update_byte(uint8_t *addr, uint8_t value) { eeprom_write_byte(addr, value); } +void eeprom_update_byte(uint8_t *addr, uint8_t value) { + eeprom_write_byte(addr, value); +} void eeprom_update_word(uint16_t *addr, uint16_t value) { uint8_t *p = (uint8_t *)addr; diff --git a/platforms/chibios/gd32v_compatibility.h b/platforms/chibios/gd32v_compatibility.h index f4dcfd8c55..a3148fb6d2 100644 --- a/platforms/chibios/gd32v_compatibility.h +++ b/platforms/chibios/gd32v_compatibility.h @@ -97,10 +97,10 @@ /* Serial USART redefines. */ #if HAL_USE_SERIAL # if !defined(SERIAL_USART_CR1) -# define SERIAL_USART_CR1 (USART_CTL0_PCEN | USART_CTL0_PM | USART_CTL0_WL) // parity enable, odd parity, 9 bit length +# define SERIAL_USART_CR1 (USART_CTL0_PCEN | USART_CTL0_PM | USART_CTL0_WL) // parity enable, odd parity, 9 bit length # endif # if !defined(SERIAL_USART_CR2) -# define SERIAL_USART_CR2 (USART_CTL1_STB_1) // 2 stop bits +# define SERIAL_USART_CR2 (USART_CTL1_STB_1) // 2 stop bits # endif # if !defined(SERIAL_USART_CR3) # define SERIAL_USART_CR3 0x0 diff --git a/platforms/chibios/sleep_led.c b/platforms/chibios/sleep_led.c index 477056a454..a777d60468 100644 --- a/platforms/chibios/sleep_led.c +++ b/platforms/chibios/sleep_led.c @@ -93,7 +93,7 @@ void sleep_led_init(void) { /* Reset LPTMR settings */ LPTMR0->CSR = 0; /* Set the compare value */ - LPTMR0->CMR = 0; // trigger on counter value (i.e. every time) + LPTMR0->CMR = 0; // trigger on counter value (i.e. every time) /* Set up clock source and prescaler */ /* Software PWM @@ -118,11 +118,11 @@ void sleep_led_init(void) { /* === OPTION 2 === */ # if 1 // nMHz IRC (n=4 on KL25Z, KL26Z and K20x; n=2 or 8 on KL27Z) - MCG->C2 |= MCG_C2_IRCS; // fast (4MHz) internal ref clock -# if defined(KL27) // divide the 8MHz IRC by 2, to have the same MCGIRCLK speed as others + MCG->C2 |= MCG_C2_IRCS; // fast (4MHz) internal ref clock +# if defined(KL27) // divide the 8MHz IRC by 2, to have the same MCGIRCLK speed as others MCG->MC |= MCG_MC_LIRC_DIV2_DIV2; -# endif /* KL27 */ - MCG->C1 |= MCG_C1_IRCLKEN; // enable internal ref clock +# endif /* KL27 */ + MCG->C1 |= MCG_C1_IRCLKEN; // enable internal ref clock // to work in stop mode, also MCG_C1_IREFSTEN // Divide 4MHz by 2^N (N=6) => 62500 irqs/sec => // => approx F=61, R=256, duration = 4 @@ -140,7 +140,7 @@ void sleep_led_init(void) { /* === END OPTIONS === */ /* Interrupt on TCF set (compare flag) */ - nvicEnableVector(LPTMR0_IRQn, 2); // vector, priority + nvicEnableVector(LPTMR0_IRQn, 2); // vector, priority LPTMR0->CSR |= LPTMRx_CSR_TIE; } @@ -169,21 +169,33 @@ static void gptTimerCallback(GPTDriver *gptp) { static const GPTConfig gptcfg = {1000000, gptTimerCallback, 0, 0}; /* Initialise the timer */ -void sleep_led_init(void) { gptStart(&SLEEP_LED_GPT_DRIVER, &gptcfg); } +void sleep_led_init(void) { + gptStart(&SLEEP_LED_GPT_DRIVER, &gptcfg); +} -void sleep_led_enable(void) { gptStartContinuous(&SLEEP_LED_GPT_DRIVER, gptcfg.frequency / 0xFFFF); } +void sleep_led_enable(void) { + gptStartContinuous(&SLEEP_LED_GPT_DRIVER, gptcfg.frequency / 0xFFFF); +} -void sleep_led_disable(void) { gptStopTimer(&SLEEP_LED_GPT_DRIVER); } +void sleep_led_disable(void) { + gptStopTimer(&SLEEP_LED_GPT_DRIVER); +} -void sleep_led_toggle(void) { (SLEEP_LED_GPT_DRIVER.state == GPT_READY) ? sleep_led_enable() : sleep_led_disable(); } +void sleep_led_toggle(void) { + (SLEEP_LED_GPT_DRIVER.state == GPT_READY) ? sleep_led_enable() : sleep_led_disable(); +} #else /* platform selection: not on familiar chips */ void sleep_led_init(void) {} -void sleep_led_enable(void) { led_set(1 << USB_LED_CAPS_LOCK); } +void sleep_led_enable(void) { + led_set(1 << USB_LED_CAPS_LOCK); +} -void sleep_led_disable(void) { led_set(0); } +void sleep_led_disable(void) { + led_set(0); +} void sleep_led_toggle(void) { // not implemented diff --git a/platforms/chibios/syscall-fallbacks.c b/platforms/chibios/syscall-fallbacks.c index 7150a46326..86f7907bfc 100644 --- a/platforms/chibios/syscall-fallbacks.c +++ b/platforms/chibios/syscall-fallbacks.c @@ -87,9 +87,13 @@ __attribute__((weak, used)) int _kill(int pid, int sig) { return -1; } -__attribute__((weak, used)) pid_t _getpid(void) { return 1; } +__attribute__((weak, used)) pid_t _getpid(void) { + return 1; +} -__attribute__((weak, used)) void _fini(void) { return; } +__attribute__((weak, used)) void _fini(void) { + return; +} __attribute__((weak, used, noreturn)) void _exit(int i) { while (1) diff --git a/platforms/chibios/timer.c b/platforms/chibios/timer.c index 74fdd7a6fc..e3bdfdcc37 100644 --- a/platforms/chibios/timer.c +++ b/platforms/chibios/timer.c @@ -73,7 +73,9 @@ void timer_clear(void) { chSysUnlock(); } -uint16_t timer_read(void) { return (uint16_t)timer_read32(); } +uint16_t timer_read(void) { + return (uint16_t)timer_read32(); +} uint32_t timer_read32(void) { chSysLock(); @@ -90,12 +92,16 @@ uint32_t timer_read32(void) { ms_offset += OVERFLOW_ADJUST_MS; } last_ticks = ticks; - uint32_t ms_offset_copy = ms_offset; // read while still holding the lock to ensure a consistent value + uint32_t ms_offset_copy = ms_offset; // read while still holding the lock to ensure a consistent value chSysUnlock(); return (uint32_t)TIME_I2MS(ticks) + ms_offset_copy; } -uint16_t timer_elapsed(uint16_t last) { return TIMER_DIFF_16(timer_read(), last); } +uint16_t timer_elapsed(uint16_t last) { + return TIMER_DIFF_16(timer_read(), last); +} -uint32_t timer_elapsed32(uint32_t last) { return TIMER_DIFF_32(timer_read32(), last); } +uint32_t timer_elapsed32(uint32_t last) { + return TIMER_DIFF_32(timer_read32(), last); +} |