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Diffstat (limited to 'keyboards/chavdai40/mcuconf.h')
-rw-r--r--keyboards/chavdai40/mcuconf.h198
1 files changed, 18 insertions, 180 deletions
diff --git a/keyboards/chavdai40/mcuconf.h b/keyboards/chavdai40/mcuconf.h
index 0cc575d40f..a73580e0a2 100644
--- a/keyboards/chavdai40/mcuconf.h
+++ b/keyboards/chavdai40/mcuconf.h
@@ -1,190 +1,28 @@
-/*
- ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-#ifndef MCUCONF_H
-#define MCUCONF_H
-
-/*
- * STM32F0xx drivers configuration.
- * The following settings override the default settings present in
- * the various device driver implementation headers.
- * Note that the settings for each driver only have effect if the whole
- * driver is enabled in halconf.h.
+/* Copyright 2020 QMK
*
- * IRQ priorities:
- * 3...0 Lowest...Highest.
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
*
- * DMA priorities:
- * 0...3 Lowest...Highest.
- */
-
-#define STM32F0xx_MCUCONF
-
-/*
- * HAL driver system settings.
- */
-#define STM32_NO_INIT FALSE
-#define STM32_PVD_ENABLE FALSE
-#define STM32_PLS STM32_PLS_LEV0
-#define STM32_HSI_ENABLED TRUE
-#define STM32_HSI14_ENABLED TRUE
-#define STM32_HSI48_ENABLED FALSE
-#define STM32_LSI_ENABLED TRUE
-#define STM32_HSE_ENABLED FALSE
-#define STM32_LSE_ENABLED FALSE
-#define STM32_SW STM32_SW_PLL
-#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2
-#define STM32_PREDIV_VALUE 1
-#define STM32_PLLMUL_VALUE 12
-#define STM32_HPRE STM32_HPRE_DIV1
-#define STM32_PPRE STM32_PPRE_DIV1
-#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
-#define STM32_MCOPRE STM32_MCOPRE_DIV1
-#define STM32_PLLNODIV STM32_PLLNODIV_DIV2
-#define STM32_USBSW STM32_USBSW_HSI48
-#define STM32_CECSW STM32_CECSW_HSI
-#define STM32_I2C1SW STM32_I2C1SW_HSI
-#define STM32_USART1SW STM32_USART1SW_PCLK
-#define STM32_RTCSEL STM32_RTCSEL_LSI
-
-/*
- * IRQ system settings.
- */
-#define STM32_IRQ_EXTI0_1_IRQ_PRIORITY 3
-#define STM32_IRQ_EXTI2_3_IRQ_PRIORITY 3
-#define STM32_IRQ_EXTI4_15_IRQ_PRIORITY 3
-#define STM32_IRQ_EXTI16_IRQ_PRIORITY 3
-#define STM32_IRQ_EXTI17_20_IRQ_PRIORITY 3
-#define STM32_IRQ_EXTI21_22_IRQ_PRIORITY 3
-
-/*
- * ADC driver system settings.
- */
-#define STM32_ADC_USE_ADC1 FALSE
-#define STM32_ADC_ADC1_CKMODE STM32_ADC_CKMODE_ADCCLK
-#define STM32_ADC_ADC1_DMA_PRIORITY 2
-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2
-#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
-
-/*
- * GPT driver system settings.
- */
-#define STM32_GPT_USE_TIM1 FALSE
-#define STM32_GPT_USE_TIM2 FALSE
-#define STM32_GPT_USE_TIM3 FALSE
-#define STM32_GPT_USE_TIM14 FALSE
-#define STM32_GPT_TIM1_IRQ_PRIORITY 2
-#define STM32_GPT_TIM2_IRQ_PRIORITY 2
-#define STM32_GPT_TIM3_IRQ_PRIORITY 2
-#define STM32_GPT_TIM14_IRQ_PRIORITY 2
-
-/*
- * I2C driver system settings.
- */
-#define STM32_I2C_USE_I2C1 FALSE
-#define STM32_I2C_BUSY_TIMEOUT 50
-#define STM32_I2C_I2C1_IRQ_PRIORITY 3
-#define STM32_I2C_USE_DMA TRUE
-#define STM32_I2C_I2C1_DMA_PRIORITY 1
-#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
-#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
-
-/*
- * I2S driver system settings.
- */
-#define STM32_I2S_USE_SPI1 FALSE
-#define STM32_I2S_SPI1_MODE (STM32_I2S_MODE_MASTER | \
- STM32_I2S_MODE_RX)
-#define STM32_I2S_SPI1_IRQ_PRIORITY 2
-#define STM32_I2S_SPI1_DMA_PRIORITY 1
-#define STM32_I2S_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
-#define STM32_I2S_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
-#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure")
-
-/*
- * ICU driver system settings.
- */
-#define STM32_ICU_USE_TIM1 FALSE
-#define STM32_ICU_USE_TIM2 FALSE
-#define STM32_ICU_USE_TIM3 FALSE
-#define STM32_ICU_TIM1_IRQ_PRIORITY 3
-#define STM32_ICU_TIM2_IRQ_PRIORITY 3
-#define STM32_ICU_TIM3_IRQ_PRIORITY 3
-
-/*
- * PWM driver system settings.
- */
-#define STM32_PWM_USE_ADVANCED FALSE
-#define STM32_PWM_USE_TIM1 FALSE
-#define STM32_PWM_USE_TIM2 FALSE
-#define STM32_PWM_USE_TIM3 FALSE
-#define STM32_PWM_TIM1_IRQ_PRIORITY 3
-#define STM32_PWM_TIM2_IRQ_PRIORITY 3
-#define STM32_PWM_TIM3_IRQ_PRIORITY 3
-
-/*
- * SERIAL driver system settings.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#define STM32_SERIAL_USE_USART1 FALSE
-#define STM32_SERIAL_USE_USART2 TRUE
-#define STM32_SERIAL_USART1_PRIORITY 3
-#define STM32_SERIAL_USART2_PRIORITY 3
/*
- * SPI driver system settings.
+ * This file was auto-generated by:
+ * `qmk chibios-confupdate -i keyboards/chavdai40/mcuconf.h -r platforms/chibios/GENERIC_STM32_F042X6/configs/mcuconf.h`
*/
-#define STM32_SPI_USE_SPI1 FALSE
-#define STM32_SPI_SPI1_DMA_PRIORITY 1
-#define STM32_SPI_SPI1_IRQ_PRIORITY 2
-#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
-#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
-#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
-/*
- * ST driver system settings.
- */
-#define STM32_ST_IRQ_PRIORITY 2
-#define STM32_ST_USE_TIMER 2
+#pragma once
-/*
- * UART driver system settings.
- */
-#define STM32_UART_USE_USART1 FALSE
-#define STM32_UART_USE_USART2 FALSE
-#define STM32_UART_USART1_IRQ_PRIORITY 3
-#define STM32_UART_USART2_IRQ_PRIORITY 3
-#define STM32_UART_USART1_DMA_PRIORITY 0
-#define STM32_UART_USART2_DMA_PRIORITY 0
-#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
-#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
-#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
-#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
-#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
+#include_next <mcuconf.h>
-/*
- * WDG driver system settings.
- */
-#define STM32_WDG_USE_IWDG FALSE
-
-/*
- * USB driver system settings.
- */
-#define STM32_USB_USE_USB1 TRUE
-#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
-#define STM32_USB_USB1_LP_IRQ_PRIORITY 3
+#undef STM32_SERIAL_USE_USART2
+#define STM32_SERIAL_USE_USART2 TRUE
-#endif /* MCUCONF_H */