diff options
Diffstat (limited to 'drivers/sensors/adns5050.c')
| -rw-r--r-- | drivers/sensors/adns5050.c | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/drivers/sensors/adns5050.c b/drivers/sensors/adns5050.c index b76268fba2..97daa8db09 100644 --- a/drivers/sensors/adns5050.c +++ b/drivers/sensors/adns5050.c @@ -47,9 +47,9 @@ void adns5050_init(void) { // Initialize the ADNS serial pins. - setPinOutput(ADNS5050_SCLK_PIN); - setPinOutput(ADNS5050_SDIO_PIN); - setPinOutput(ADNS5050_CS_PIN); + gpio_set_pin_output(ADNS5050_SCLK_PIN); + gpio_set_pin_output(ADNS5050_SDIO_PIN); + gpio_set_pin_output(ADNS5050_CS_PIN); // reboot the adns. // if the adns hasn't initialized yet, this is harmless. @@ -69,30 +69,30 @@ void adns5050_init(void) { // Just as with the serial protocol, this is used by the slave to send a // synchronization signal to the master. void adns5050_sync(void) { - writePinLow(ADNS5050_CS_PIN); + gpio_write_pin_low(ADNS5050_CS_PIN); wait_us(1); - writePinHigh(ADNS5050_CS_PIN); + gpio_write_pin_high(ADNS5050_CS_PIN); } void adns5050_cs_select(void) { - writePinLow(ADNS5050_CS_PIN); + gpio_write_pin_low(ADNS5050_CS_PIN); } void adns5050_cs_deselect(void) { - writePinHigh(ADNS5050_CS_PIN); + gpio_write_pin_high(ADNS5050_CS_PIN); } uint8_t adns5050_serial_read(void) { - setPinInput(ADNS5050_SDIO_PIN); + gpio_set_pin_input(ADNS5050_SDIO_PIN); uint8_t byte = 0; for (uint8_t i = 0; i < 8; ++i) { - writePinLow(ADNS5050_SCLK_PIN); + gpio_write_pin_low(ADNS5050_SCLK_PIN); wait_us(1); - byte = (byte << 1) | readPin(ADNS5050_SDIO_PIN); + byte = (byte << 1) | gpio_read_pin(ADNS5050_SDIO_PIN); - writePinHigh(ADNS5050_SCLK_PIN); + gpio_write_pin_high(ADNS5050_SCLK_PIN); wait_us(1); } @@ -100,19 +100,19 @@ uint8_t adns5050_serial_read(void) { } void adns5050_serial_write(uint8_t data) { - setPinOutput(ADNS5050_SDIO_PIN); + gpio_set_pin_output(ADNS5050_SDIO_PIN); for (int8_t b = 7; b >= 0; b--) { - writePinLow(ADNS5050_SCLK_PIN); + gpio_write_pin_low(ADNS5050_SCLK_PIN); if (data & (1 << b)) - writePinHigh(ADNS5050_SDIO_PIN); + gpio_write_pin_high(ADNS5050_SDIO_PIN); else - writePinLow(ADNS5050_SDIO_PIN); + gpio_write_pin_low(ADNS5050_SDIO_PIN); wait_us(2); - writePinHigh(ADNS5050_SCLK_PIN); + gpio_write_pin_high(ADNS5050_SCLK_PIN); } // tSWR. See page 15 of the ADNS spec sheet. |