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-rw-r--r--drivers/chibios/i2c_master.c8
-rw-r--r--drivers/chibios/i2c_master.h9
2 files changed, 13 insertions, 4 deletions
diff --git a/drivers/chibios/i2c_master.c b/drivers/chibios/i2c_master.c
index ede915fa4a..4bd8e2af76 100644
--- a/drivers/chibios/i2c_master.c
+++ b/drivers/chibios/i2c_master.c
@@ -32,7 +32,9 @@
static uint8_t i2c_address;
static const I2CConfig i2cconfig = {
-#ifdef USE_I2CV1
+#if defined(USE_I2CV1_CONTRIB)
+ I2C1_CLOCK_SPEED,
+#elif defined(USE_I2CV1)
I2C1_OPMODE,
I2C1_CLOCK_SPEED,
I2C1_DUTY_CYCLE,
@@ -62,8 +64,8 @@ __attribute__((weak)) void i2c_init(void) {
chThdSleepMilliseconds(10);
#if defined(USE_GPIOV1)
- palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);
- palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);
+ palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, I2C1_SCL_PAL_MODE);
+ palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, I2C1_SDA_PAL_MODE);
#else
palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_ALTERNATE(I2C1_SCL_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN);
palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_ALTERNATE(I2C1_SDA_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN);
diff --git a/drivers/chibios/i2c_master.h b/drivers/chibios/i2c_master.h
index 3d3891289f..b3e234e161 100644
--- a/drivers/chibios/i2c_master.h
+++ b/drivers/chibios/i2c_master.h
@@ -81,7 +81,14 @@
# define I2C_DRIVER I2CD1
#endif
-#ifndef USE_GPIOV1
+#ifdef USE_GPIOV1
+# ifndef I2C1_SCL_PAL_MODE
+# define I2C1_SCL_PAL_MODE PAL_MODE_STM32_ALTERNATE_OPENDRAIN
+# endif
+# ifndef I2C1_SDA_PAL_MODE
+# define I2C1_SDA_PAL_MODE PAL_MODE_STM32_ALTERNATE_OPENDRAIN
+# endif
+#else
// The default PAL alternate modes are used to signal that the pins are used for I2C
# ifndef I2C1_SCL_PAL_MODE
# define I2C1_SCL_PAL_MODE 4