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authortmk <nobody@nowhere>2012-06-07 02:25:15 +0900
committertmk <nobody@nowhere>2012-06-07 02:47:33 +0900
commitf4125707399d11a7d80587659c464b9bcddb8c56 (patch)
tree1d2a02e30f8cd103e8f4dc36629c09f6a3d44fef /protocol/pjrc/bootloader_teensy.c
parent225de7a847a511d004bf909b1334e19497cf2f9d (diff)
Moved files to common, protocol and doc directory
Diffstat (limited to 'protocol/pjrc/bootloader_teensy.c')
-rw-r--r--protocol/pjrc/bootloader_teensy.c40
1 files changed, 40 insertions, 0 deletions
diff --git a/protocol/pjrc/bootloader_teensy.c b/protocol/pjrc/bootloader_teensy.c
new file mode 100644
index 0000000000..9d34852f16
--- /dev/null
+++ b/protocol/pjrc/bootloader_teensy.c
@@ -0,0 +1,40 @@
+/* See http://www.pjrc.com/teensy/jump_to_bootloader.html */
+#include <avr/io.h>
+#include <avr/interrupt.h>
+#include <util/delay.h>
+#include "bootloader.h"
+
+void bootloader_jump(void) {
+ cli();
+ // disable watchdog, if enabled
+ // disable all peripherals
+ UDCON = 1;
+ USBCON = (1<<FRZCLK); // disable USB
+ UCSR1B = 0;
+ _delay_ms(5);
+#if defined(__AVR_AT90USB162__) // Teensy 1.0
+ EIMSK = 0; PCICR = 0; SPCR = 0; ACSR = 0; EECR = 0;
+ TIMSK0 = 0; TIMSK1 = 0; UCSR1B = 0;
+ DDRB = 0; DDRC = 0; DDRD = 0;
+ PORTB = 0; PORTC = 0; PORTD = 0;
+ asm volatile("jmp 0x3E00");
+#elif defined(__AVR_ATmega32U4__) // Teensy 2.0
+ EIMSK = 0; PCICR = 0; SPCR = 0; ACSR = 0; EECR = 0; ADCSRA = 0;
+ TIMSK0 = 0; TIMSK1 = 0; TIMSK3 = 0; TIMSK4 = 0; UCSR1B = 0; TWCR = 0;
+ DDRB = 0; DDRC = 0; DDRD = 0; DDRE = 0; DDRF = 0; TWCR = 0;
+ PORTB = 0; PORTC = 0; PORTD = 0; PORTE = 0; PORTF = 0;
+ asm volatile("jmp 0x7E00");
+#elif defined(__AVR_AT90USB646__) // Teensy++ 1.0
+ EIMSK = 0; PCICR = 0; SPCR = 0; ACSR = 0; EECR = 0; ADCSRA = 0;
+ TIMSK0 = 0; TIMSK1 = 0; TIMSK2 = 0; TIMSK3 = 0; UCSR1B = 0; TWCR = 0;
+ DDRA = 0; DDRB = 0; DDRC = 0; DDRD = 0; DDRE = 0; DDRF = 0;
+ PORTA = 0; PORTB = 0; PORTC = 0; PORTD = 0; PORTE = 0; PORTF = 0;
+ asm volatile("jmp 0xFC00");
+#elif defined(__AVR_AT90USB1286__) // Teensy++ 2.0
+ EIMSK = 0; PCICR = 0; SPCR = 0; ACSR = 0; EECR = 0; ADCSRA = 0;
+ TIMSK0 = 0; TIMSK1 = 0; TIMSK2 = 0; TIMSK3 = 0; UCSR1B = 0; TWCR = 0;
+ DDRA = 0; DDRB = 0; DDRC = 0; DDRD = 0; DDRE = 0; DDRF = 0;
+ PORTA = 0; PORTB = 0; PORTC = 0; PORTD = 0; PORTE = 0; PORTF = 0;
+ asm volatile("jmp 0x1FC00");
+#endif
+}