diff options
author | Ryan <fauxpark@gmail.com> | 2023-09-13 22:48:01 +1000 |
---|---|---|
committer | GitHub <noreply@github.com> | 2023-09-13 22:48:01 +1000 |
commit | 4a0badfb34257b8af819433a6358ed16a50455cb (patch) | |
tree | 9882a8b5d1423b2527a66c8af90ea864b4e8cd94 /drivers | |
parent | 35aceab1a48076a0c508c663781de30717518fcb (diff) |
is31fl3741: driver naming cleanups (#21929)
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/led/issi/is31fl3741.c | 126 | ||||
-rw-r--r-- | drivers/led/issi/is31fl3741.h | 49 |
2 files changed, 103 insertions, 72 deletions
diff --git a/drivers/led/issi/is31fl3741.c b/drivers/led/issi/is31fl3741.c index 5c84ac2067..2459677df0 100644 --- a/drivers/led/issi/is31fl3741.c +++ b/drivers/led/issi/is31fl3741.c @@ -17,12 +17,10 @@ * along with this program. If not, see <http://www.gnu.org/licenses/>. */ -#include "wait.h" - #include "is31fl3741.h" #include <string.h> #include "i2c_master.h" -#include "progmem.h" +#include "wait.h" // This is a 7-bit address, that gets left-shifted and bit 0 // set to 0 for write, 1 for read (as per I2C protocol) @@ -34,50 +32,50 @@ // ADDR1 represents A1:A0 of the 7-bit address. // ADDR2 represents A3:A2 of the 7-bit address. // The result is: 0b101(ADDR2)(ADDR1) -#define ISSI_ADDR_DEFAULT 0x60 - -#define ISSI_COMMANDREGISTER 0xFD -#define ISSI_COMMANDREGISTER_WRITELOCK 0xFE -#define ISSI_INTERRUPTMASKREGISTER 0xF0 -#define ISSI_INTERRUPTSTATUSREGISTER 0xF1 -#define ISSI_IDREGISTER 0xFC - -#define ISSI_PAGE_PWM0 0x00 // PG0 -#define ISSI_PAGE_PWM1 0x01 // PG1 -#define ISSI_PAGE_SCALING_0 0x02 // PG2 -#define ISSI_PAGE_SCALING_1 0x03 // PG3 -#define ISSI_PAGE_FUNCTION 0x04 // PG4 - -#define ISSI_REG_CONFIGURATION 0x00 // PG4 -#define ISSI_REG_GLOBALCURRENT 0x01 // PG4 -#define ISSI_REG_PULLDOWNUP 0x02 // PG4 -#define ISSI_REG_RESET 0x3F // PG4 - -#ifndef ISSI_TIMEOUT -# define ISSI_TIMEOUT 100 +#define IS31FL3741_I2C_ADDRESS_DEFAULT 0x60 + +#define IS31FL3741_COMMANDREGISTER 0xFD +#define IS31FL3741_COMMANDREGISTER_WRITELOCK 0xFE +#define IS31FL3741_INTERRUPTMASKREGISTER 0xF0 +#define IS31FL3741_INTERRUPTSTATUSREGISTER 0xF1 +#define IS31FL3741_IDREGISTER 0xFC + +#define IS31FL3741_PAGE_PWM0 0x00 // PG0 +#define IS31FL3741_PAGE_PWM1 0x01 // PG1 +#define IS31FL3741_PAGE_SCALING_0 0x02 // PG2 +#define IS31FL3741_PAGE_SCALING_1 0x03 // PG3 +#define IS31FL3741_PAGE_FUNCTION 0x04 // PG4 + +#define IS31FL3741_REG_CONFIGURATION 0x00 // PG4 +#define IS31FL3741_REG_GLOBALCURRENT 0x01 // PG4 +#define IS31FL3741_REG_PULLDOWNUP 0x02 // PG4 +#define IS31FL3741_REG_RESET 0x3F // PG4 + +#ifndef IS31FL3741_I2C_TIMEOUT +# define IS31FL3741_I2C_TIMEOUT 100 #endif -#ifndef ISSI_PERSISTENCE -# define ISSI_PERSISTENCE 0 +#ifndef IS31FL3741_I2C_PERSISTENCE +# define IS31FL3741_I2C_PERSISTENCE 0 #endif -#ifndef ISSI_CONFIGURATION -# define ISSI_CONFIGURATION 0x01 +#ifndef IS31FL3741_CONFIGURATION +# define IS31FL3741_CONFIGURATION 0x01 #endif -#ifndef ISSI_SWPULLUP -# define ISSI_SWPULLUP PUR_32KR +#ifndef IS31FL3741_SWPULLUP +# define IS31FL3741_SWPULLUP IS31FL3741_PUR_32KR #endif -#ifndef ISSI_CSPULLUP -# define ISSI_CSPULLUP PUR_32KR +#ifndef IS31FL3741_CSPULLUP +# define IS31FL3741_CSPULLUP IS31FL3741_PUR_32KR #endif -#ifndef ISSI_GLOBALCURRENT -# define ISSI_GLOBALCURRENT 0xFF +#ifndef IS31FL3741_GLOBALCURRENT +# define IS31FL3741_GLOBALCURRENT 0xFF #endif -#define ISSI_MAX_LEDS 351 +#define IS31FL3741_MAX_LEDS 351 // Transfer buffer for TWITransmitData() uint8_t g_twi_transfer_buffer[20] = {0xFF}; @@ -88,22 +86,22 @@ uint8_t g_twi_transfer_buffer[20] = {0xFF}; // We could optimize this and take out the unused registers from these // buffers and the transfers in is31fl3741_write_pwm_buffer() but it's // probably not worth the extra complexity. -uint8_t g_pwm_buffer[DRIVER_COUNT][ISSI_MAX_LEDS]; -bool g_pwm_buffer_update_required[DRIVER_COUNT] = {false}; -bool g_scaling_registers_update_required[DRIVER_COUNT] = {false}; +uint8_t g_pwm_buffer[IS31FL3741_DRIVER_COUNT][IS31FL3741_MAX_LEDS]; +bool g_pwm_buffer_update_required[IS31FL3741_DRIVER_COUNT] = {false}; +bool g_scaling_registers_update_required[IS31FL3741_DRIVER_COUNT] = {false}; -uint8_t g_scaling_registers[DRIVER_COUNT][ISSI_MAX_LEDS]; +uint8_t g_scaling_registers[IS31FL3741_DRIVER_COUNT][IS31FL3741_MAX_LEDS]; void is31fl3741_write_register(uint8_t addr, uint8_t reg, uint8_t data) { g_twi_transfer_buffer[0] = reg; g_twi_transfer_buffer[1] = data; -#if ISSI_PERSISTENCE > 0 - for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) == 0) break; +#if IS31FL3741_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3741_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, IS31FL3741_I2C_TIMEOUT) == 0) break; } #else - i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT); + i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, IS31FL3741_I2C_TIMEOUT); #endif } @@ -113,21 +111,21 @@ bool is31fl3741_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { for (int i = 0; i < 342; i += 18) { if (i == 180) { // unlock the command register and select PG1 - is31fl3741_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); - is31fl3741_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM1); + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_PWM1); } g_twi_transfer_buffer[0] = i % 180; memcpy(g_twi_transfer_buffer + 1, pwm_buffer + i, 18); -#if ISSI_PERSISTENCE > 0 - for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 19, ISSI_TIMEOUT) != 0) { +#if IS31FL3741_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3741_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 19, IS31FL3741_I2C_TIMEOUT) != 0) { return false; } } #else - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 19, ISSI_TIMEOUT) != 0) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 19, IS31FL3741_I2C_TIMEOUT) != 0) { return false; } #endif @@ -137,14 +135,14 @@ bool is31fl3741_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { g_twi_transfer_buffer[0] = 162; memcpy(g_twi_transfer_buffer + 1, pwm_buffer + 342, 9); -#if ISSI_PERSISTENCE > 0 - for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 10, ISSI_TIMEOUT) != 0) { +#if IS31FL3741_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3741_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 10, IS31FL3741_I2C_TIMEOUT) != 0) { return false; } } #else - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 10, ISSI_TIMEOUT) != 0) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 10, IS31FL3741_I2C_TIMEOUT) != 0) { return false; } #endif @@ -160,18 +158,18 @@ void is31fl3741_init(uint8_t addr) { // Unlock the command register. // Unlock the command register. - is31fl3741_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); // Select PG4 - is31fl3741_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_FUNCTION); + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_FUNCTION); // Set to Normal operation - is31fl3741_write_register(addr, ISSI_REG_CONFIGURATION, ISSI_CONFIGURATION); + is31fl3741_write_register(addr, IS31FL3741_REG_CONFIGURATION, IS31FL3741_CONFIGURATION); // Set Golbal Current Control Register - is31fl3741_write_register(addr, ISSI_REG_GLOBALCURRENT, ISSI_GLOBALCURRENT); + is31fl3741_write_register(addr, IS31FL3741_REG_GLOBALCURRENT, IS31FL3741_GLOBALCURRENT); // Set Pull up & Down for SWx CSy - is31fl3741_write_register(addr, ISSI_REG_PULLDOWNUP, ((ISSI_CSPULLUP << 4) | ISSI_SWPULLUP)); + is31fl3741_write_register(addr, IS31FL3741_REG_PULLDOWNUP, ((IS31FL3741_CSPULLUP << 4) | IS31FL3741_SWPULLUP)); // is31fl3741_update_led_scaling_registers(addr, 0xFF, 0xFF, 0xFF); @@ -228,8 +226,8 @@ void is31fl3741_set_led_control_register(uint8_t index, bool red, bool green, bo void is31fl3741_update_pwm_buffers(uint8_t addr, uint8_t index) { if (g_pwm_buffer_update_required[index]) { // unlock the command register and select PG2 - is31fl3741_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); - is31fl3741_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM0); + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_PWM0); is31fl3741_write_pwm_buffer(addr, g_pwm_buffer[index]); } @@ -248,8 +246,8 @@ void is31fl3741_set_pwm_buffer(const is31_led *pled, uint8_t red, uint8_t green, void is31fl3741_update_led_control_registers(uint8_t addr, uint8_t index) { if (g_scaling_registers_update_required[index]) { // unlock the command register and select PG2 - is31fl3741_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); - is31fl3741_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_SCALING_0); + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_SCALING_0); // CS1_SW1 to CS30_SW6 are on PG2 for (int i = CS1_SW1; i <= CS30_SW6; ++i) { @@ -257,8 +255,8 @@ void is31fl3741_update_led_control_registers(uint8_t addr, uint8_t index) { } // unlock the command register and select PG3 - is31fl3741_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); - is31fl3741_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_SCALING_1); + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_SCALING_1); // CS1_SW7 to CS39_SW9 are on PG3 for (int i = CS1_SW7; i <= CS39_SW9; ++i) { diff --git a/drivers/led/issi/is31fl3741.h b/drivers/led/issi/is31fl3741.h index 4ae84dc3c6..ffa4be9250 100644 --- a/drivers/led/issi/is31fl3741.h +++ b/drivers/led/issi/is31fl3741.h @@ -23,6 +23,39 @@ #include <stdbool.h> #include "progmem.h" +// ======== DEPRECATED DEFINES - DO NOT USE ======== +#ifdef DRIVER_COUNT +# define IS31FL3741_DRIVER_COUNT DRIVER_COUNT +#endif +#ifdef ISSI_TIMEOUT +# define IS31FL3741_I2C_TIMEOUT ISSI_TIMEOUT +#endif +#ifdef ISSI_PERSISTENCE +# define IS31FL3741_I2C_PERSISTENCE ISSI_PERSISTENCE +#endif +#ifdef ISSI_CONFIGURATION +# define IS31FL3741_CONFIGURATION ISSI_CONFIGURATION +#endif +#ifdef ISSI_SWPULLUP +# define IS31FL3741_SWPULLUP ISSI_SWPULLUP +#endif +#ifdef ISSI_CSPULLUP +# define IS31FL3741_CSPULLUP ISSI_CSPULLUP +#endif +#ifdef ISSI_GLOBALCURRENT +# define IS31FL3741_GLOBALCURRENT ISSI_GLOBALCURRENT +#endif + +#define PUR_0R IS31FL3741_PUR_0R +#define PUR_05KR IS31FL3741_PUR_05KR +#define PUR_1KR IS31FL3741_PUR_1KR +#define PUR_2KR IS31FL3741_PUR_2KR +#define PUR_4KR IS31FL3741_PUR_4KR +#define PUR_8KR IS31FL3741_PUR_8KR +#define PUR_16KR IS31FL3741_PUR_16KR +#define PUR_32KR IS31FL3741_PUR_32KR +// ======== + typedef struct is31_led { uint32_t driver : 2; uint32_t r : 10; @@ -51,14 +84,14 @@ void is31fl3741_set_scaling_registers(const is31_led *pled, uint8_t red, uint8_t void is31fl3741_set_pwm_buffer(const is31_led *pled, uint8_t red, uint8_t green, uint8_t blue); -#define PUR_0R 0x00 // No PUR resistor -#define PUR_05KR 0x01 // 0.5k Ohm resistor -#define PUR_1KR 0x02 // 1.0k Ohm resistor -#define PUR_2KR 0x03 // 2.0k Ohm resistor -#define PUR_4KR 0x04 // 4.0k Ohm resistor -#define PUR_8KR 0x05 // 8.0k Ohm resistor -#define PUR_16KR 0x06 // 16k Ohm resistor -#define PUR_32KR 0x07 // 32k Ohm resistor +#define IS31FL3741_PUR_0R 0x00 // No PUR resistor +#define IS31FL3741_PUR_05KR 0x01 // 0.5k Ohm resistor +#define IS31FL3741_PUR_1KR 0x02 // 1.0k Ohm resistor +#define IS31FL3741_PUR_2KR 0x03 // 2.0k Ohm resistor +#define IS31FL3741_PUR_4KR 0x04 // 4.0k Ohm resistor +#define IS31FL3741_PUR_8KR 0x05 // 8.0k Ohm resistor +#define IS31FL3741_PUR_16KR 0x06 // 16k Ohm resistor +#define IS31FL3741_PUR_32KR 0x07 // 32k Ohm resistor #define CS1_SW1 0x00 #define CS2_SW1 0x01 |