diff options
| author | Joel Challis <git@zvecr.com> | 2019-07-16 09:30:53 +0100 |
|---|---|---|
| committer | skullydazed <skullydazed@users.noreply.github.com> | 2019-07-16 01:30:53 -0700 |
| commit | 4e375aa1f536e979a587534df0b6951fa39e8a30 (patch) | |
| tree | b858c1cecf7af98092f9abc02aa5f9b4cdf9bd0a /drivers/arm/i2c_master.c | |
| parent | f859375284f5a27f5b4f8cbe654e305ca3face17 (diff) | |
Add ARM I2Cv1 support to i2c_master (#6262)
* Add ARM I2Cv1 support to i2c_master
* Add I2Cv1 docs
Diffstat (limited to 'drivers/arm/i2c_master.c')
| -rw-r--r-- | drivers/arm/i2c_master.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/arm/i2c_master.c b/drivers/arm/i2c_master.c index 5814375f37..9b4a752b1c 100644 --- a/drivers/arm/i2c_master.c +++ b/drivers/arm/i2c_master.c @@ -33,11 +33,17 @@ static uint8_t i2c_address; static const I2CConfig i2cconfig = { +#ifdef USE_I2CV1 + I2C1_OPMODE, + I2C1_CLOCK_SPEED, + I2C1_DUTY_CYCLE, +#else STM32_TIMINGR_PRESC(I2C1_TIMINGR_PRESC) | STM32_TIMINGR_SCLDEL(I2C1_TIMINGR_SCLDEL) | STM32_TIMINGR_SDADEL(I2C1_TIMINGR_SDADEL) | STM32_TIMINGR_SCLH(I2C1_TIMINGR_SCLH) | STM32_TIMINGR_SCLL(I2C1_TIMINGR_SCLL), 0, 0 +#endif }; static i2c_status_t chibios_to_qmk(const msg_t* status) { @@ -61,8 +67,13 @@ void i2c_init(void) chThdSleepMilliseconds(10); +#ifdef USE_I2CV1 + palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); + palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); +#else palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_ALTERNATE(I2C1_SCL_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN); palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_ALTERNATE(I2C1_SDA_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN); +#endif //i2cInit(); //This is invoked by halInit() so no need to redo it. } |