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authorJoel Challis <git@zvecr.com>2019-12-31 17:26:40 +0000
committerGitHub <noreply@github.com>2019-12-31 17:26:40 +0000
commit680ebef0869b7860017a80bd601faac61227cd28 (patch)
tree4915395331bac5952a17d9e8a2912433f4c5b916 /docs/ws2812_driver.md
parent7ba6456c0b2e041bb9f97dbed265c5b8b4b12192 (diff)
SPI DMA based RGB Underglow for STM32 (#7674)
* Initial stash of ws2812 spi driver * Update comment, add sync backup plan * Add testing notes to spi ws2812 driver * Align RGBW error messages
Diffstat (limited to 'docs/ws2812_driver.md')
-rw-r--r--docs/ws2812_driver.md29
1 files changed, 28 insertions, 1 deletions
diff --git a/docs/ws2812_driver.md b/docs/ws2812_driver.md
index 67481c458d..80b6948586 100644
--- a/docs/ws2812_driver.md
+++ b/docs/ws2812_driver.md
@@ -14,7 +14,7 @@ These LEDs are called "addressable" because instead of using a wire per color, e
|----------|--------------------|--------------------|
| bit bang | :heavy_check_mark: | :heavy_check_mark: |
| I2C | :heavy_check_mark: | |
-| SPI | | Soon™ |
+| SPI | | :heavy_check_mark: |
| PWM | | Soon™ |
## Driver configuration
@@ -40,3 +40,30 @@ Configure the hardware via your config.h:
#define WS2812_ADDRESS 0xb0 // default: 0xb0
#define WS2812_TIMEOUT 100 // default: 100
```
+
+### SPI
+Targeting STM32 boards where WS2812 support is offloaded to an SPI hardware device. The advantage is that the use of DMA offloads processing of the WS2812 protocol from the MCU. `RGB_DI_PIN` for this driver is the configured SPI MOSI pin. Due to the nature of repurposing SPI to drive the LEDs, the other SPI pins, MISO and SCK, **must** remain unused. To configure it, add this to your rules.mk:
+
+```make
+WS2812_DRIVER = spi
+```
+
+Configure the hardware via your config.h:
+```c
+#define WS2812_SPI SPID1 // default: SPID1
+#define WS2812_SPI_MOSI_PAL_MODE 5 // Pin "alternate function", see the respective datasheet for the appropriate values for your MCU. default: 5
+```
+
+You must also turn on the SPI feature in your halconf.h and mcuconf.h
+
+#### Testing Notes
+
+While not an exhaustive list, the following table provides the scenarios that have been partially validated:
+
+| | SPI1 | SPI2 | SPI3 |
+|-|-|-|-|
+| f072 | ? | B15 :heavy_check_mark: | N/A |
+| f103 | A7 :heavy_check_mark: | B15 :heavy_check_mark: | N/A |
+| f303 | A7 :heavy_check_mark: B5 :heavy_check_mark: | B15 :heavy_check_mark: | B5 :heavy_check_mark: |
+
+*Other supported ChibiOS boards and/or pins may function, it will be highly chip and configuration dependent.* \ No newline at end of file