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LR_IROM1 0x1A000000 0x00080000 { ; load region size_region
ER_IROM1 0x1A000000 0x00080000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
; ER_IROM2 0x1B000000 0x00080000 { ; load address = execution address
; .ANY (+RO)
; }
; 8_byte_aligned(69 vect * 4 bytes) = 8_byte_aligned(0x0114) = 0x0118
RW_IRAM1 0x10000000+0x118 0x8000-0x118 {
.ANY (+RW +ZI)
}
; RW_IRAM2 0x10080000 0xA000 { ; RW data
; .ANY (IRAM2)
; }
; RW_IRAM3 0x20000000 0x10000 { ; RW data
; .ANY (AHBSRAM)
; }
}
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