/* Copyright 2020 Nick Brassel (tzarc) * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program. If not, see . */ #pragma once #include_next "board.h" // Force B9 as input to align with qmk defaults #undef VAL_GPIOB_MODER #define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \ PIN_MODE_INPUT(GPIOB_PIN1) | \ PIN_MODE_INPUT(GPIOB_PIN2) | \ PIN_MODE_ALTERNATE(GPIOB_SWO) | \ PIN_MODE_INPUT(GPIOB_PIN4) | \ PIN_MODE_INPUT(GPIOB_PIN5) | \ PIN_MODE_INPUT(GPIOB_LSM303DLHC_SCL) | \ PIN_MODE_INPUT(GPIOB_PIN7) | \ PIN_MODE_INPUT(GPIOB_PIN8) | \ PIN_MODE_INPUT(GPIOB_LSM303DLHC_SDA) | \ PIN_MODE_ALTERNATE(GPIOB_MP45DT02_CLK_IN) |\ PIN_MODE_INPUT(GPIOB_PIN11) | \ PIN_MODE_INPUT(GPIOB_PIN12) | \ PIN_MODE_INPUT(GPIOB_PIN13) | \ PIN_MODE_INPUT(GPIOB_PIN14) | \ PIN_MODE_INPUT(GPIOB_PIN15)) #undef VAL_GPIOB_PUPDR #define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \ PIN_PUPDR_PULLUP(GPIOB_PIN1) | \ PIN_PUPDR_PULLUP(GPIOB_PIN2) | \ PIN_PUPDR_PULLUP(GPIOB_SWO) | \ PIN_PUPDR_PULLUP(GPIOB_PIN4) | \ PIN_PUPDR_PULLUP(GPIOB_PIN5) | \ PIN_PUPDR_PULLUP(GPIOB_LSM303DLHC_SCL) |\ PIN_PUPDR_PULLUP(GPIOB_PIN7) | \ PIN_PUPDR_PULLUP(GPIOB_PIN8) | \ PIN_PUPDR_PULLUP(GPIOB_LSM303DLHC_SDA) |\ PIN_PUPDR_FLOATING(GPIOB_MP45DT02_CLK_IN) |\ PIN_PUPDR_PULLUP(GPIOB_PIN11) | \ PIN_PUPDR_PULLUP(GPIOB_PIN12) | \ PIN_PUPDR_PULLUP(GPIOB_PIN13) | \ PIN_PUPDR_PULLUP(GPIOB_PIN14) | \ PIN_PUPDR_PULLUP(GPIOB_PIN15)) #undef VAL_GPIOB_AFRL #define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0U) | \ PIN_AFIO_AF(GPIOB_PIN1, 0U) | \ PIN_AFIO_AF(GPIOB_PIN2, 0U) | \ PIN_AFIO_AF(GPIOB_SWO, 0U) | \ PIN_AFIO_AF(GPIOB_PIN4, 0U) | \ PIN_AFIO_AF(GPIOB_PIN5, 0U) | \ PIN_AFIO_AF(GPIOB_LSM303DLHC_SCL, 0) | \ PIN_AFIO_AF(GPIOB_PIN7, 0U)) #undef VAL_GPIOB_AFRH #define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | \ PIN_AFIO_AF(GPIOB_LSM303DLHC_SDA, 0) | \ PIN_AFIO_AF(GPIOB_MP45DT02_CLK_IN, 5U) |\ PIN_AFIO_AF(GPIOB_PIN11, 0U) | \ PIN_AFIO_AF(GPIOB_PIN12, 0U) | \ PIN_AFIO_AF(GPIOB_PIN13, 0U) | \ PIN_AFIO_AF(GPIOB_PIN14, 0U) | \ PIN_AFIO_AF(GPIOB_PIN15, 0U)) #undef STM32_HSE_BYPASS