From d18698a8e8d83d47d48b8501932e6a046148f95a Mon Sep 17 00:00:00 2001 From: Ryan Date: Mon, 29 Aug 2022 06:20:43 +1000 Subject: Remove deprecated USBasp and bootloadHID bootloader types (#18195) --- platforms/avr/flash.mk | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'platforms') diff --git a/platforms/avr/flash.mk b/platforms/avr/flash.mk index 6d50e72534..cd980b9733 100644 --- a/platforms/avr/flash.mk +++ b/platforms/avr/flash.mk @@ -177,9 +177,9 @@ else ifeq ($(strip $(BOOTLOADER)), halfkay) $(UNSYNC_OUTPUT_CMD) && $(call EXEC_TEENSY) else ifeq (dfu,$(findstring dfu,$(BOOTLOADER))) $(UNSYNC_OUTPUT_CMD) && $(call EXEC_DFU) -else ifneq (,$(filter $(BOOTLOADER), usbasploader USBasp)) +else ifeq ($(strip $(BOOTLOADER)), usbasploader) $(UNSYNC_OUTPUT_CMD) && $(call EXEC_USBASP) -else ifneq (,$(filter $(BOOTLOADER), bootloadhid bootloadHID)) +else ifeq ($(strip $(BOOTLOADER)), bootloadhid) $(UNSYNC_OUTPUT_CMD) && $(call EXEC_BOOTLOADHID) else ifeq ($(strip $(BOOTLOADER)), qmk-hid) $(UNSYNC_OUTPUT_CMD) && $(call EXEC_HID_LUFA) -- cgit v1.2.3 From 9632360caa5e6511b0ec13cb4c55eb64408232b5 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Tue, 30 Aug 2022 03:20:04 -0500 Subject: Use a macro to compute the size of arrays at compile time (#18044) * Add ARRAY_SIZE and CEILING utility macros * Apply a coccinelle patch to use ARRAY_SIZE * fix up some straggling items * Fix 'make test:secure' * Enhance ARRAY_SIZE macro to reject acting on pointers The previous definition would not produce a diagnostic for ``` int *p; size_t num_elem = ARRAY_SIZE(p) ``` but the new one will. * explicitly get definition of ARRAY_SIZE * Convert to ARRAY_SIZE when const is involved The following spatch finds additional instances where the array is const and the division is by the size of the type, not the size of the first element: ``` @ rule5a using "empty.iso" @ type T; const T[] E; @@ - (sizeof(E)/sizeof(T)) + ARRAY_SIZE(E) @ rule6a using "empty.iso" @ type T; const T[] E; @@ - sizeof(E)/sizeof(T) + ARRAY_SIZE(E) ``` * New instances of ARRAY_SIZE added since initial spatch run * Use `ARRAY_SIZE` in docs (found by grep) * Manually use ARRAY_SIZE hs_set is expected to be the same size as uint16_t, though it's made of two 8-bit integers * Just like char, sizeof(uint8_t) is guaranteed to be 1 This is at least true on any plausible system where qmk is actually used. Per my understanding it's universally true, assuming that uint8_t exists: https://stackoverflow.com/questions/48655310/can-i-assume-that-sizeofuint8-t-1 * Run qmk-format on core C files touched in this branch Co-authored-by: Stefan Kerkmann --- platforms/chibios/drivers/ws2812_spi.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'platforms') diff --git a/platforms/chibios/drivers/ws2812_spi.c b/platforms/chibios/drivers/ws2812_spi.c index a73eb69720..390884a2a4 100644 --- a/platforms/chibios/drivers/ws2812_spi.c +++ b/platforms/chibios/drivers/ws2812_spi.c @@ -181,7 +181,7 @@ void ws2812_init(void) { spiStart(&WS2812_SPI, &spicfg); /* Setup transfer parameters. */ spiSelect(&WS2812_SPI); /* Slave Select assertion. */ #ifdef WS2812_SPI_USE_CIRCULAR_BUFFER - spiStartSend(&WS2812_SPI, sizeof(txbuf) / sizeof(txbuf[0]), txbuf); + spiStartSend(&WS2812_SPI, ARRAY_SIZE(txbuf), txbuf); #endif } @@ -200,9 +200,9 @@ void ws2812_setleds(LED_TYPE* ledarray, uint16_t leds) { // Instead spiSend can be used to send synchronously (or the thread logic can be added back). #ifndef WS2812_SPI_USE_CIRCULAR_BUFFER # ifdef WS2812_SPI_SYNC - spiSend(&WS2812_SPI, sizeof(txbuf) / sizeof(txbuf[0]), txbuf); + spiSend(&WS2812_SPI, ARRAY_SIZE(txbuf), txbuf); # else - spiStartSend(&WS2812_SPI, sizeof(txbuf) / sizeof(txbuf[0]), txbuf); + spiStartSend(&WS2812_SPI, ARRAY_SIZE(txbuf), txbuf); # endif #endif } -- cgit v1.2.3 From bb6f02883363b815de8e2510964787634f86d635 Mon Sep 17 00:00:00 2001 From: Ryan Date: Thu, 1 Sep 2022 00:17:24 +1000 Subject: Move bootloader.mk to platforms (#18228) --- platforms/arm_atsam/bootloader.mk | 46 ++++++++++++ platforms/avr/bootloader.mk | 144 ++++++++++++++++++++++++++++++++++++++ platforms/chibios/bootloader.mk | 122 ++++++++++++++++++++++++++++++++ 3 files changed, 312 insertions(+) create mode 100644 platforms/arm_atsam/bootloader.mk create mode 100644 platforms/avr/bootloader.mk create mode 100644 platforms/chibios/bootloader.mk (limited to 'platforms') diff --git a/platforms/arm_atsam/bootloader.mk b/platforms/arm_atsam/bootloader.mk new file mode 100644 index 0000000000..1ec42edeb6 --- /dev/null +++ b/platforms/arm_atsam/bootloader.mk @@ -0,0 +1,46 @@ +# Copyright 2017 Jack Humbert +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# If it's possible that multiple bootloaders can be used for one project, +# you can leave this unset, and the correct size will be selected +# automatically. +# +# Sets the bootloader defined in the keyboard's/keymap's rules.mk +# +# Current options for ARM (ATSAM): +# md-boot Atmel SAM-BA (only used by Drop boards) +# +# If you need to provide your own implementation, you can set inside `rules.mk` +# `BOOTLOADER = custom` -- you'll need to provide your own implementations. See +# the respective file under `platforms//bootloaders/custom.c` to see +# which functions may be overridden. + +ifeq ($(strip $(BOOTLOADER)), custom) + OPT_DEFS += -DBOOTLOADER_CUSTOM + BOOTLOADER_TYPE = custom +endif + +ifeq ($(strip $(BOOTLOADER)), md-boot) + OPT_DEFS += -DBOOTLOADER_MD_BOOT + BOOTLOADER_TYPE = md_boot +endif + +ifeq ($(strip $(BOOTLOADER_TYPE)),) + ifneq ($(strip $(BOOTLOADER)),) + $(call CATASTROPHIC_ERROR,Invalid BOOTLOADER,Invalid bootloader specified. Please set an appropriate bootloader in your rules.mk or info.json.) + else + $(call CATASTROPHIC_ERROR,Invalid BOOTLOADER,No bootloader specified. Please set an appropriate bootloader in your rules.mk or info.json.) + endif +endif diff --git a/platforms/avr/bootloader.mk b/platforms/avr/bootloader.mk new file mode 100644 index 0000000000..63fe635d96 --- /dev/null +++ b/platforms/avr/bootloader.mk @@ -0,0 +1,144 @@ +# Copyright 2017 Jack Humbert +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# If it's possible that multiple bootloaders can be used for one project, +# you can leave this unset, and the correct size will be selected +# automatically. +# +# Sets the bootloader defined in the keyboard's/keymap's rules.mk +# +# Current options for AVR: +# halfkay PJRC Teensy +# caterina Pro Micro (Sparkfun/generic) +# atmel-dfu Atmel factory DFU +# lufa-dfu LUFA DFU +# qmk-dfu QMK DFU (LUFA + blinkenlight) +# qmk-hid QMK HID (LUFA + blinkenlight) +# bootloadhid HIDBootFlash compatible (ATmega32A) +# usbasploader USBaspLoader (ATmega328P) +# +# If you need to provide your own implementation, you can set inside `rules.mk` +# `BOOTLOADER = custom` -- you'll need to provide your own implementations. See +# the respective file under `platforms//bootloaders/custom.c` to see +# which functions may be overridden. +# +# BOOTLOADER_SIZE can still be defined manually, but it's recommended +# you add any possible configuration to this list + +ifeq ($(strip $(BOOTLOADER)), custom) + OPT_DEFS += -DBOOTLOADER_CUSTOM + BOOTLOADER_TYPE = custom +endif + +ifeq ($(strip $(BOOTLOADER)), atmel-dfu) + OPT_DEFS += -DBOOTLOADER_ATMEL_DFU + OPT_DEFS += -DBOOTLOADER_DFU + BOOTLOADER_TYPE = dfu + + ifneq (,$(filter $(MCU), at90usb162 atmega16u2 atmega32u2 atmega16u4 atmega32u4 at90usb646 at90usb647)) + BOOTLOADER_SIZE = 4096 + endif + ifneq (,$(filter $(MCU), at90usb1286 at90usb1287)) + BOOTLOADER_SIZE = 8192 + endif +endif +ifeq ($(strip $(BOOTLOADER)), lufa-dfu) + OPT_DEFS += -DBOOTLOADER_LUFA_DFU + OPT_DEFS += -DBOOTLOADER_DFU + BOOTLOADER_TYPE = dfu + + ifneq (,$(filter $(MCU), at90usb162 atmega16u2 atmega32u2 atmega16u4 atmega32u4 at90usb646 at90usb647)) + BOOTLOADER_SIZE ?= 4096 + endif + ifneq (,$(filter $(MCU), at90usb1286 at90usb1287)) + BOOTLOADER_SIZE ?= 8192 + endif +endif +ifeq ($(strip $(BOOTLOADER)), qmk-dfu) + OPT_DEFS += -DBOOTLOADER_QMK_DFU + OPT_DEFS += -DBOOTLOADER_DFU + BOOTLOADER_TYPE = dfu + + ifneq (,$(filter $(MCU), at90usb162 atmega16u2 atmega32u2 atmega16u4 atmega32u4 at90usb646 at90usb647)) + BOOTLOADER_SIZE ?= 4096 + endif + ifneq (,$(filter $(MCU), at90usb1286 at90usb1287)) + BOOTLOADER_SIZE ?= 8192 + endif +endif +ifeq ($(strip $(BOOTLOADER)), qmk-hid) + OPT_DEFS += -DBOOTLOADER_QMK_HID + OPT_DEFS += -DBOOTLOADER_HID + BOOTLOADER_TYPE = dfu + + BOOTLOADER_SIZE ?= 4096 +endif +ifeq ($(strip $(BOOTLOADER)), halfkay) + OPT_DEFS += -DBOOTLOADER_HALFKAY + BOOTLOADER_TYPE = halfkay + + # Teensy 2.0 + ifeq ($(strip $(MCU)), atmega32u4) + BOOTLOADER_SIZE = 512 + endif + # Teensy 2.0++ + ifeq ($(strip $(MCU)), at90usb1286) + BOOTLOADER_SIZE = 1024 + endif +endif +ifeq ($(strip $(BOOTLOADER)), caterina) + OPT_DEFS += -DBOOTLOADER_CATERINA + BOOTLOADER_TYPE = caterina + + BOOTLOADER_SIZE = 4096 +endif +ifeq ($(strip $(BOOTLOADER)), bootloadhid) + OPT_DEFS += -DBOOTLOADER_BOOTLOADHID + BOOTLOADER_TYPE = bootloadhid + + BOOTLOADER_SIZE = 4096 +endif +ifeq ($(strip $(BOOTLOADER)), usbasploader) + OPT_DEFS += -DBOOTLOADER_USBASP + BOOTLOADER_TYPE = usbasploader + + BOOTLOADER_SIZE = 4096 +endif +ifeq ($(strip $(BOOTLOADER)), lufa-ms) + OPT_DEFS += -DBOOTLOADER_MS + BOOTLOADER_TYPE = dfu + + BOOTLOADER_SIZE ?= 8192 + FIRMWARE_FORMAT = bin +cpfirmware: lufa_warning +.INTERMEDIATE: lufa_warning +lufa_warning: $(FIRMWARE_FORMAT) + $(info @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@) + $(info LUFA MASS STORAGE Bootloader selected) + $(info DO NOT USE THIS BOOTLOADER IN NEW PROJECTS!) + $(info It is extremely prone to bricking, and is only included to support existing boards.) + $(info @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@) +endif +ifdef BOOTLOADER_SIZE + OPT_DEFS += -DBOOTLOADER_SIZE=$(strip $(BOOTLOADER_SIZE)) +endif + +ifeq ($(strip $(BOOTLOADER_TYPE)),) + ifneq ($(strip $(BOOTLOADER)),) + $(call CATASTROPHIC_ERROR,Invalid BOOTLOADER,Invalid bootloader specified. Please set an appropriate bootloader in your rules.mk or info.json.) + else + $(call CATASTROPHIC_ERROR,Invalid BOOTLOADER,No bootloader specified. Please set an appropriate bootloader in your rules.mk or info.json.) + endif +endif diff --git a/platforms/chibios/bootloader.mk b/platforms/chibios/bootloader.mk new file mode 100644 index 0000000000..0568d35321 --- /dev/null +++ b/platforms/chibios/bootloader.mk @@ -0,0 +1,122 @@ +# Copyright 2017 Jack Humbert +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# If it's possible that multiple bootloaders can be used for one project, +# you can leave this unset, and the correct size will be selected +# automatically. +# +# Sets the bootloader defined in the keyboard's/keymap's rules.mk +# +# Current options for ARM: +# halfkay PJRC Teensy +# kiibohd Input:Club Kiibohd bootloader (only used on their boards) +# stm32duino STM32Duino (STM32F103x8) +# stm32-dfu STM32 USB DFU in ROM +# apm32-dfu APM32 USB DFU in ROM +# wb32-dfu WB32 USB DFU in ROM +# tinyuf2 TinyUF2 +# rp2040 Raspberry Pi RP2040 +# Current options for RISC-V: +# gd32v-dfu GD32V USB DFU in ROM +# +# If you need to provide your own implementation, you can set inside `rules.mk` +# `BOOTLOADER = custom` -- you'll need to provide your own implementations. See +# the respective file under `platforms//bootloaders/custom.c` to see +# which functions may be overridden. + +ifeq ($(strip $(BOOTLOADER)), custom) + OPT_DEFS += -DBOOTLOADER_CUSTOM + BOOTLOADER_TYPE = custom +endif + +ifeq ($(strip $(BOOTLOADER)), halfkay) + OPT_DEFS += -DBOOTLOADER_HALFKAY + BOOTLOADER_TYPE = halfkay + + # Teensy LC, 3.0, 3.1/2, 3.5, 3.6 + ifneq (,$(filter $(MCU_ORIG), MKL26Z64 MK20DX128 MK20DX256 MK64FX512 MK66FX1M0)) + FIRMWARE_FORMAT = hex + endif +endif +ifeq ($(strip $(BOOTLOADER)), stm32-dfu) + OPT_DEFS += -DBOOTLOADER_STM32_DFU + BOOTLOADER_TYPE = stm32_dfu + + # Options to pass to dfu-util when flashing + DFU_ARGS ?= -d 0483:DF11 -a 0 -s 0x08000000:leave + DFU_SUFFIX_ARGS ?= -v 0483 -p DF11 +endif +ifeq ($(strip $(BOOTLOADER)), apm32-dfu) + OPT_DEFS += -DBOOTLOADER_APM32_DFU + BOOTLOADER_TYPE = stm32_dfu + + # Options to pass to dfu-util when flashing + DFU_ARGS ?= -d 314B:0106 -a 0 -s 0x08000000:leave + DFU_SUFFIX_ARGS ?= -v 314B -p 0106 +endif +ifeq ($(strip $(BOOTLOADER)), gd32v-dfu) + OPT_DEFS += -DBOOTLOADER_GD32V_DFU + BOOTLOADER_TYPE = gd32v_dfu + + # Options to pass to dfu-util when flashing + DFU_ARGS ?= -d 28E9:0189 -a 0 -s 0x08000000:leave + DFU_SUFFIX_ARGS ?= -v 28E9 -p 0189 +endif +ifeq ($(strip $(BOOTLOADER)), kiibohd) + OPT_DEFS += -DBOOTLOADER_KIIBOHD + BOOTLOADER_TYPE = kiibohd + + ifeq ($(strip $(MCU_ORIG)), MK20DX128) + MCU_LDSCRIPT = MK20DX128BLDR4 + endif + ifeq ($(strip $(MCU_ORIG)), MK20DX256) + MCU_LDSCRIPT = MK20DX256BLDR8 + endif + + # Options to pass to dfu-util when flashing + DFU_ARGS = -d 1C11:B007 + DFU_SUFFIX_ARGS = -v 1C11 -p B007 +endif +ifeq ($(strip $(BOOTLOADER)), stm32duino) + OPT_DEFS += -DBOOTLOADER_STM32DUINO + MCU_LDSCRIPT = STM32F103x8_stm32duino_bootloader + BOARD = STM32_F103_STM32DUINO + BOOTLOADER_TYPE = stm32duino + + # Options to pass to dfu-util when flashing + DFU_ARGS = -d 1EAF:0003 -a 2 -R + DFU_SUFFIX_ARGS = -v 1EAF -p 0003 +endif +ifeq ($(strip $(BOOTLOADER)), tinyuf2) + OPT_DEFS += -DBOOTLOADER_TINYUF2 + BOOTLOADER_TYPE = tinyuf2 + FIRMWARE_FORMAT = uf2 +endif +ifeq ($(strip $(BOOTLOADER)), rp2040) + OPT_DEFS += -DBOOTLOADER_RP2040 + BOOTLOADER_TYPE = rp2040 +endif +ifeq ($(strip $(BOOTLOADER)), wb32-dfu) + OPT_DEFS += -DBOOTLOADER_WB32_DFU + BOOTLOADER_TYPE = wb32_dfu +endif + +ifeq ($(strip $(BOOTLOADER_TYPE)),) + ifneq ($(strip $(BOOTLOADER)),) + $(call CATASTROPHIC_ERROR,Invalid BOOTLOADER,Invalid bootloader specified. Please set an appropriate bootloader in your rules.mk or info.json.) + else + $(call CATASTROPHIC_ERROR,Invalid BOOTLOADER,No bootloader specified. Please set an appropriate bootloader in your rules.mk or info.json.) + endif +endif -- cgit v1.2.3 From b5a52b4cff55520462559bf6b79b3ce5b32d661e Mon Sep 17 00:00:00 2001 From: Joy Lee Date: Fri, 2 Sep 2022 11:48:02 +0800 Subject: Prevent USB peripheral fault when restarting USB on WB32 MCUs (#18058) Co-authored-by: Joy --- platforms/chibios/boards/GENERIC_WB32_F3G71XX/board/board.c | 4 ++++ platforms/chibios/boards/GENERIC_WB32_FQ95XX/board/board.c | 4 ++++ platforms/chibios/boards/GENERIC_WB32_FQ95XX/configs/config.h | 2 ++ 3 files changed, 10 insertions(+) (limited to 'platforms') diff --git a/platforms/chibios/boards/GENERIC_WB32_F3G71XX/board/board.c b/platforms/chibios/boards/GENERIC_WB32_F3G71XX/board/board.c index e38a7e0054..f74c9e8be7 100644 --- a/platforms/chibios/boards/GENERIC_WB32_F3G71XX/board/board.c +++ b/platforms/chibios/boards/GENERIC_WB32_F3G71XX/board/board.c @@ -80,3 +80,7 @@ void __early_init(void) { void boardInit(void) { } + +void restart_usb_driver(USBDriver *usbp) { + // Do nothing. Restarting the USB driver on these boards breaks it. +} diff --git a/platforms/chibios/boards/GENERIC_WB32_FQ95XX/board/board.c b/platforms/chibios/boards/GENERIC_WB32_FQ95XX/board/board.c index 22b4ff73b5..a99537fc27 100644 --- a/platforms/chibios/boards/GENERIC_WB32_FQ95XX/board/board.c +++ b/platforms/chibios/boards/GENERIC_WB32_FQ95XX/board/board.c @@ -80,3 +80,7 @@ void __early_init(void) { void boardInit(void) { } + +void restart_usb_driver(USBDriver *usbp) { + // Do nothing. Restarting the USB driver on these boards breaks it. +} diff --git a/platforms/chibios/boards/GENERIC_WB32_FQ95XX/configs/config.h b/platforms/chibios/boards/GENERIC_WB32_FQ95XX/configs/config.h index e02e526113..d4c7e54642 100644 --- a/platforms/chibios/boards/GENERIC_WB32_FQ95XX/configs/config.h +++ b/platforms/chibios/boards/GENERIC_WB32_FQ95XX/configs/config.h @@ -18,3 +18,5 @@ #ifndef EARLY_INIT_PERFORM_BOOTLOADER_JUMP # define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE #endif + +#define USB_ENDPOINTS_ARE_REORDERABLE -- cgit v1.2.3 From fb6e82154140df1b87f74f80dac911c96163e82e Mon Sep 17 00:00:00 2001 From: Danny Date: Thu, 8 Sep 2022 14:59:27 -0400 Subject: Add Elite-Pi converter (#18236) Co-authored-by: Joel Challis --- .../converters/promicro_to_elite_pi/_pin_defs.h | 36 ++++++++++++++++++++++ .../converters/promicro_to_elite_pi/converter.mk | 9 ++++++ 2 files changed, 45 insertions(+) create mode 100644 platforms/chibios/converters/promicro_to_elite_pi/_pin_defs.h create mode 100644 platforms/chibios/converters/promicro_to_elite_pi/converter.mk (limited to 'platforms') diff --git a/platforms/chibios/converters/promicro_to_elite_pi/_pin_defs.h b/platforms/chibios/converters/promicro_to_elite_pi/_pin_defs.h new file mode 100644 index 0000000000..1372bef79e --- /dev/null +++ b/platforms/chibios/converters/promicro_to_elite_pi/_pin_defs.h @@ -0,0 +1,36 @@ +// Copyright 2022 QMK +// SPDX-License-Identifier: GPL-2.0-or-later + +#pragma once + +// Left side (front) +#define D3 0U +#define D2 1U +// GND +// GND +#define D1 2U +#define D0 3U +#define D4 4U +#define C6 5U +#define D7 6U +#define E6 7U +#define B4 8U +#define B5 9U + +// Right side (front) +// RAW +// GND +// RESET +// VCC +#define F4 29U +#define F5 28U +#define F6 27U +#define F7 26U +#define B1 22U +#define B3 20U +#define B2 23U +#define B6 21U + +// LEDs +#define D5 12U +#define B0 13U diff --git a/platforms/chibios/converters/promicro_to_elite_pi/converter.mk b/platforms/chibios/converters/promicro_to_elite_pi/converter.mk new file mode 100644 index 0000000000..590a004189 --- /dev/null +++ b/platforms/chibios/converters/promicro_to_elite_pi/converter.mk @@ -0,0 +1,9 @@ +# Elite-Pi MCU settings for converting AVR projects +MCU := RP2040 +BOARD := QMK_PM2040 +BOOTLOADER := rp2040 + +# These are defaults based on what has been implemented for RP2040 boards +SERIAL_DRIVER ?= vendor +WS2812_DRIVER ?= vendor +BACKLIGHT_DRIVER ?= software -- cgit v1.2.3 From 4087251da6ffcbfd16a9b655b7816803a565f0a6 Mon Sep 17 00:00:00 2001 From: Joel Challis Date: Sat, 10 Sep 2022 01:14:12 +0100 Subject: Reboot wb32 devices after flashing (#18323) --- platforms/chibios/flash.mk | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'platforms') diff --git a/platforms/chibios/flash.mk b/platforms/chibios/flash.mk index 790c4f3316..2802368b5d 100644 --- a/platforms/chibios/flash.mk +++ b/platforms/chibios/flash.mk @@ -23,6 +23,7 @@ define EXEC_DFU_UTIL $(DFU_UTIL) $(DFU_ARGS) -D $(BUILD_DIR)/$(TARGET).bin endef +WB32_DFU_UPDATER ?= wb32-dfu-updater_cli define EXEC_WB32_DFU_UPDATER if ! wb32-dfu-updater_cli -l | grep -q "Found DFU"; then \ @@ -34,7 +35,7 @@ define EXEC_WB32_DFU_UPDATER done ;\ printf "\n" ;\ fi - wb32-dfu-updater_cli -D $(BUILD_DIR)/$(TARGET).bin + $(WB32_DFU_UPDATER) -D $(BUILD_DIR)/$(TARGET).bin && $(WB32_DFU_UPDATER) -R endef dfu-util: $(BUILD_DIR)/$(TARGET).bin cpfirmware sizeafter -- cgit v1.2.3 From 33c47fe0106b5b1ec307d81bc6ee92cce3be50d5 Mon Sep 17 00:00:00 2001 From: Ryan Date: Sat, 17 Sep 2022 11:24:03 +1000 Subject: Add UART support for Kinetis boards (#18370) * Add UART support for Kinetis boards * Default PAL mode for GPIOV1 --- platforms/chibios/drivers/uart.c | 12 ++++++++--- platforms/chibios/drivers/uart.h | 46 ++++++++++++++++++++++++++++------------ 2 files changed, 41 insertions(+), 17 deletions(-) (limited to 'platforms') diff --git a/platforms/chibios/drivers/uart.c b/platforms/chibios/drivers/uart.c index 396803f33b..b16130d80b 100644 --- a/platforms/chibios/drivers/uart.c +++ b/platforms/chibios/drivers/uart.c @@ -18,7 +18,9 @@ #include "quantum.h" -#if defined(WB32F3G71xx) || defined(WB32FQ95xx) +#if defined(MCU_KINETIS) +static SerialConfig serialConfig = {SERIAL_DEFAULT_BITRATE}; +#elif defined(WB32F3G71xx) || defined(WB32FQ95xx) static SerialConfig serialConfig = {SERIAL_DEFAULT_BITRATE, SD1_WRDLEN, SD1_STPBIT, SD1_PARITY, SD1_ATFLCT}; #else static SerialConfig serialConfig = {SERIAL_DEFAULT_BITRATE, SD1_CR1, SD1_CR2, SD1_CR3}; @@ -30,11 +32,15 @@ void uart_init(uint32_t baud) { if (!is_initialised) { is_initialised = true; +#if defined(MCU_KINETIS) + serialConfig.sc_speed = baud; +#else serialConfig.speed = baud; +#endif #if defined(USE_GPIOV1) - palSetLineMode(SD1_TX_PIN, PAL_MODE_ALTERNATE_OPENDRAIN); - palSetLineMode(SD1_RX_PIN, PAL_MODE_ALTERNATE_OPENDRAIN); + palSetLineMode(SD1_TX_PIN, SD1_TX_PAL_MODE); + palSetLineMode(SD1_RX_PIN, SD1_RX_PAL_MODE); #else palSetLineMode(SD1_TX_PIN, PAL_MODE_ALTERNATE(SD1_TX_PAL_MODE) | PAL_OUTPUT_TYPE_OPENDRAIN); palSetLineMode(SD1_RX_PIN, PAL_MODE_ALTERNATE(SD1_RX_PAL_MODE) | PAL_OUTPUT_TYPE_OPENDRAIN); diff --git a/platforms/chibios/drivers/uart.h b/platforms/chibios/drivers/uart.h index 603d51037b..db97840270 100644 --- a/platforms/chibios/drivers/uart.h +++ b/platforms/chibios/drivers/uart.h @@ -28,32 +28,50 @@ # define SD1_TX_PIN A9 #endif -#ifndef SD1_TX_PAL_MODE -# define SD1_TX_PAL_MODE 7 -#endif - #ifndef SD1_RX_PIN # define SD1_RX_PIN A10 #endif -#ifndef SD1_RX_PAL_MODE -# define SD1_RX_PAL_MODE 7 -#endif - #ifndef SD1_CTS_PIN # define SD1_CTS_PIN A11 #endif -#ifndef SD1_CTS_PAL_MODE -# define SD1_CTS_PAL_MODE 7 -#endif - #ifndef SD1_RTS_PIN # define SD1_RTS_PIN A12 #endif -#ifndef SD1_RTS_PAL_MODE -# define SD1_RTS_PAL_MODE 7 +#ifdef USE_GPIOV1 +# ifndef SD1_TX_PAL_MODE +# define SD1_TX_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN +# endif + +# ifndef SD1_RX_PAL_MODE +# define SD1_RX_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN +# endif + +# ifndef SD1_CTS_PAL_MODE +# define SD1_CTS_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN +# endif + +# ifndef SD1_RTS_PAL_MODE +# define SD1_RTS_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN +# endif +#else +# ifndef SD1_TX_PAL_MODE +# define SD1_TX_PAL_MODE 7 +# endif + +# ifndef SD1_RX_PAL_MODE +# define SD1_RX_PAL_MODE 7 +# endif + +# ifndef SD1_CTS_PAL_MODE +# define SD1_CTS_PAL_MODE 7 +# endif + +# ifndef SD1_RTS_PAL_MODE +# define SD1_RTS_PAL_MODE 7 +# endif #endif #ifndef SD1_CR1 -- cgit v1.2.3 From 11551406317578085bcac124d6857c0aca4133e0 Mon Sep 17 00:00:00 2001 From: Joel Challis Date: Sun, 18 Sep 2022 20:30:27 +0100 Subject: Add Elite-C to converters (#18309) --- .../converters/elite_c_to_elite_pi/_pin_defs.h | 39 ++++++++++++++++ .../converters/elite_c_to_elite_pi/converter.mk | 9 ++++ .../converters/elite_c_to_stemcell/_pin_defs.h | 54 ++++++++++++++++++++++ .../converters/elite_c_to_stemcell/converter.mk | 18 ++++++++ 4 files changed, 120 insertions(+) create mode 100644 platforms/chibios/converters/elite_c_to_elite_pi/_pin_defs.h create mode 100644 platforms/chibios/converters/elite_c_to_elite_pi/converter.mk create mode 100644 platforms/chibios/converters/elite_c_to_stemcell/_pin_defs.h create mode 100644 platforms/chibios/converters/elite_c_to_stemcell/converter.mk (limited to 'platforms') diff --git a/platforms/chibios/converters/elite_c_to_elite_pi/_pin_defs.h b/platforms/chibios/converters/elite_c_to_elite_pi/_pin_defs.h new file mode 100644 index 0000000000..98dd37e279 --- /dev/null +++ b/platforms/chibios/converters/elite_c_to_elite_pi/_pin_defs.h @@ -0,0 +1,39 @@ +// Copyright 2022 QMK +// SPDX-License-Identifier: GPL-2.0-or-later + +#pragma once + +// Left side (front) +#define D3 0U +#define D2 1U +// GND +// GND +#define D1 2U +#define D0 3U +#define D4 4U +#define C6 5U +#define D7 6U +#define E6 7U +#define B4 8U +#define B5 9U + +// Right side (front) +// RAW +// GND +// RESET +// VCC +#define F4 29U +#define F5 28U +#define F6 27U +#define F7 26U +#define B1 22U +#define B3 20U +#define B2 23U +#define B6 21U + +// Bottom row +#define B7 12U +#define D5 13U +#define C7 14U +#define F1 15U +#define F0 16U diff --git a/platforms/chibios/converters/elite_c_to_elite_pi/converter.mk b/platforms/chibios/converters/elite_c_to_elite_pi/converter.mk new file mode 100644 index 0000000000..590a004189 --- /dev/null +++ b/platforms/chibios/converters/elite_c_to_elite_pi/converter.mk @@ -0,0 +1,9 @@ +# Elite-Pi MCU settings for converting AVR projects +MCU := RP2040 +BOARD := QMK_PM2040 +BOOTLOADER := rp2040 + +# These are defaults based on what has been implemented for RP2040 boards +SERIAL_DRIVER ?= vendor +WS2812_DRIVER ?= vendor +BACKLIGHT_DRIVER ?= software diff --git a/platforms/chibios/converters/elite_c_to_stemcell/_pin_defs.h b/platforms/chibios/converters/elite_c_to_stemcell/_pin_defs.h new file mode 100644 index 0000000000..4458abfa1c --- /dev/null +++ b/platforms/chibios/converters/elite_c_to_stemcell/_pin_defs.h @@ -0,0 +1,54 @@ +// Copyright 2022 Mega Mind (@megamind4089) +// SPDX-License-Identifier: GPL-2.0-or-later + +#pragma once + +// Pindefs for v2.0.0 +// https://megamind4089.github.io/STeMCell/pinout/ + +// Left side (front) +#ifdef STEMCELL_UART_SWAP +# define D3 PAL_LINE(GPIOA, 3) +# define D2 PAL_LINE(GPIOA, 2) +#else +# define D3 PAL_LINE(GPIOA, 2) +# define D2 PAL_LINE(GPIOA, 3) +#endif +// GND +// GND +#ifdef STEMCELL_I2C_SWAP +# define D1 PAL_LINE(GPIOB, 6) +# define D0 PAL_LINE(GPIOB, 7) +#else +# define D1 PAL_LINE(GPIOB, 7) +# define D0 PAL_LINE(GPIOB, 6) +#endif + +#define D4 PAL_LINE(GPIOA, 15) +#define C6 PAL_LINE(GPIOB, 3) +#define D7 PAL_LINE(GPIOB, 4) +#define E6 PAL_LINE(GPIOB, 5) +#define B4 PAL_LINE(GPIOB, 8) +#define B5 PAL_LINE(GPIOB, 9) + +// Right side (front) +// RAW +// GND +// RESET +// VCC +#define F4 PAL_LINE(GPIOB, 10) +#define F5 PAL_LINE(GPIOB, 2) +#define F6 PAL_LINE(GPIOB, 1) +#define F7 PAL_LINE(GPIOB, 0) + +#define B1 PAL_LINE(GPIOA, 5) +#define B3 PAL_LINE(GPIOA, 6) +#define B2 PAL_LINE(GPIOA, 7) +#define B6 PAL_LINE(GPIOA, 4) + +// Bottom row +#define B7 PAL_LINE(GPIOC, 13) +#define D5 PAL_LINE(GPIOC, 14) +#define C7 PAL_LINE(GPIOC, 15) +#define F1 PAL_LINE(GPIOA, 0) +#define F0 PAL_LINE(GPIOA, 1) diff --git a/platforms/chibios/converters/elite_c_to_stemcell/converter.mk b/platforms/chibios/converters/elite_c_to_stemcell/converter.mk new file mode 100644 index 0000000000..1bbe9bf09e --- /dev/null +++ b/platforms/chibios/converters/elite_c_to_stemcell/converter.mk @@ -0,0 +1,18 @@ +# Copyright 2022 Mega Mind (@megamind4089) +# SPDX-License-Identifier: GPL-2.0-or-later + +MCU := STM32F411 +BOARD := STEMCELL +BOOTLOADER := tinyuf2 + +SERIAL_DRIVER ?= usart +WS2812_DRIVER ?= bitbang + +ifeq ($(strip $(STMC_US)), yes) + OPT_DEFS += -DSTEMCELL_UART_SWAP +endif + +ifeq ($(strip $(STMC_IS)), yes) + OPT_DEFS += -DSTEMCELL_I2C_SWAP +endif + -- cgit v1.2.3 From 881aab9e76d4cab5b1c58548cb47ff4a2c8868cb Mon Sep 17 00:00:00 2001 From: Stefan Kerkmann Date: Tue, 20 Sep 2022 08:54:43 +0200 Subject: Stabilize Half-duplex PIO split comms take 2 (#18421) ...by moving the actually timing critical `enter_rx_state()` and `leave_rx_state()` functions to RAM in order to not be affected by XIP cache spikes. This commit also reverts the hacky USB interrupt disabling that was done in 293c53d774 --- .../chibios/drivers/vendor/RP/RP2040/serial_vendor.c | 17 ++--------------- 1 file changed, 2 insertions(+), 15 deletions(-) (limited to 'platforms') diff --git a/platforms/chibios/drivers/vendor/RP/RP2040/serial_vendor.c b/platforms/chibios/drivers/vendor/RP/RP2040/serial_vendor.c index 764764b3f9..afd7e65ad8 100644 --- a/platforms/chibios/drivers/vendor/RP/RP2040/serial_vendor.c +++ b/platforms/chibios/drivers/vendor/RP/RP2040/serial_vendor.c @@ -140,9 +140,8 @@ void pio_serve_interrupt(void) { // strength is chosen because the transmitting side must still be able to drive // the signal low. With this configuration the rise times are fast enough and // the generated low level with 360mV will generate a logical zero. -static inline void enter_rx_state(void) { +static void __no_inline_not_in_flash_func(enter_rx_state)(void) { osalSysLock(); - nvicEnableVector(RP_USBCTRL_IRQ_NUMBER, RP_IRQ_USB0_PRIORITY); // Wait for the transmitting state machines FIFO to run empty. At this point // the last byte has been pulled from the transmitting state machines FIFO // into the output shift register. We have to wait a tiny bit more until @@ -162,11 +161,8 @@ static inline void enter_rx_state(void) { osalSysUnlock(); } -static inline void leave_rx_state(void) { +static void __no_inline_not_in_flash_func(leave_rx_state)(void) { osalSysLock(); - // We don't want to be interrupted by frequent (1KHz) USB interrupts while - // doing our timing critical sending operation. - nvicDisableVector(RP_USBCTRL_IRQ_NUMBER); // In Half-duplex operation the tx pin dual-functions as sender and // receiver. To not receive the data we will send, we disable the receiving // state machine. @@ -198,11 +194,6 @@ static inline msg_t sync_tx(sysinterval_t timeout) { msg_t msg = MSG_OK; osalSysLock(); while (pio_sm_is_tx_fifo_full(pio, tx_state_machine)) { -#if !defined(SERIAL_USART_FULL_DUPLEX) - // Enable USB interrupts again, because we might sleep for a long time - // here and don't want to be disconnected from the host. - nvicEnableVector(RP_USBCTRL_IRQ_NUMBER, RP_IRQ_USB0_PRIORITY); -#endif pio_set_irq0_source_enabled(pio, pis_sm0_tx_fifo_not_full + tx_state_machine, true); msg = osalThreadSuspendTimeoutS(&tx_thread, timeout); if (msg < MSG_OK) { @@ -210,10 +201,6 @@ static inline msg_t sync_tx(sysinterval_t timeout) { break; } } -#if !defined(SERIAL_USART_FULL_DUPLEX) - // Entering timing critical territory again. - nvicDisableVector(RP_USBCTRL_IRQ_NUMBER); -#endif osalSysUnlock(); return msg; } -- cgit v1.2.3 From b8ffaa63310ec7cc29de0aaa562457d87e50f837 Mon Sep 17 00:00:00 2001 From: Stefan Kerkmann Date: Thu, 22 Sep 2022 23:48:20 +0200 Subject: Copy RP2040 vector table to RAM on startup (#18424) ...this reduces possible latency when invoking interrupt handlers by mitigating XIP cache misses which are not existent when running code from RAM. --- platforms/chibios/vendors/RP/RP2040.mk | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'platforms') diff --git a/platforms/chibios/vendors/RP/RP2040.mk b/platforms/chibios/vendors/RP/RP2040.mk index de426c9c40..efa3fef13f 100644 --- a/platforms/chibios/vendors/RP/RP2040.mk +++ b/platforms/chibios/vendors/RP/RP2040.mk @@ -11,7 +11,8 @@ endif # Raspberry Pi Pico SDK Support ############################################################################## ADEFS += -DCRT0_VTOR_INIT=1 \ - -DCRT0_EXTRA_CORES_NUMBER=0 + -DCRT0_EXTRA_CORES_NUMBER=0 \ + -DCRT0_INIT_VECTORS=1 CFLAGS += -DPICO_NO_FPGA_CHECK \ -DNDEBUG -- cgit v1.2.3 From 6bbcabe0ccf7087c9754ebc17e4bded4d322eaa3 Mon Sep 17 00:00:00 2001 From: Stefan Kerkmann Date: Mon, 3 Oct 2022 18:23:45 +0200 Subject: [Core] Serial-protocol: always clear receive queue on main half of split keyboard (#18419) --- platforms/chibios/drivers/serial_protocol.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) (limited to 'platforms') diff --git a/platforms/chibios/drivers/serial_protocol.c b/platforms/chibios/drivers/serial_protocol.c index c95aed9885..ccaf73282d 100644 --- a/platforms/chibios/drivers/serial_protocol.c +++ b/platforms/chibios/drivers/serial_protocol.c @@ -102,15 +102,11 @@ static inline bool react_to_transaction(void) { * @return bool Indicates success of transaction. */ bool soft_serial_transaction(int index) { - bool result = initiate_transaction((uint8_t)index); + /* Clear the receive queue, to start with a clean slate. + * Parts of failed transactions or spurious bytes could still be in it. */ + serial_transport_driver_clear(); - if (unlikely(!result)) { - /* Clear the receive queue, to start with a clean slate. - * Parts of failed transactions or spurious bytes could still be in it. */ - serial_transport_driver_clear(); - } - - return result; + return initiate_transaction((uint8_t)index); } /** -- cgit v1.2.3 From b6ea8837e4c81f364d30bdc74bf2cdccb2a1a185 Mon Sep 17 00:00:00 2001 From: Stefan Kerkmann Date: Tue, 4 Oct 2022 20:56:40 +0200 Subject: [Bug] RP2040: only clear RX FIFO for serial pio driver clear (#18581) --- platforms/chibios/drivers/vendor/RP/RP2040/serial_vendor.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'platforms') diff --git a/platforms/chibios/drivers/vendor/RP/RP2040/serial_vendor.c b/platforms/chibios/drivers/vendor/RP/RP2040/serial_vendor.c index afd7e65ad8..dd4723a086 100644 --- a/platforms/chibios/drivers/vendor/RP/RP2040/serial_vendor.c +++ b/platforms/chibios/drivers/vendor/RP/RP2040/serial_vendor.c @@ -181,12 +181,13 @@ static inline void leave_rx_state(void) {} #endif /** - * @brief Clear the RX and TX hardware FIFOs of the state machines. + * @brief Clear the FIFO of the RX state machine. */ inline void serial_transport_driver_clear(void) { osalSysLock(); - pio_sm_clear_fifos(pio, rx_state_machine); - pio_sm_clear_fifos(pio, tx_state_machine); + while (!pio_sm_is_rx_fifo_empty(pio, rx_state_machine)) { + pio_sm_clear_fifos(pio, rx_state_machine); + } osalSysUnlock(); } -- cgit v1.2.3 From 996a9006d3f101dc5c48b58339e2e7323040fd59 Mon Sep 17 00:00:00 2001 From: Stefan Kerkmann Date: Tue, 4 Oct 2022 23:10:24 +0200 Subject: [Core] PWM Backlight for RP2040 (#17706) --- .../boards/GENERIC_PROMICRO_RP2040/configs/mcuconf.h | 13 +++++++++++++ .../chibios/boards/GENERIC_RP_RP2040/configs/mcuconf.h | 13 +++++++++++++ platforms/chibios/boards/QMK_PM2040/configs/mcuconf.h | 13 +++++++++++++ platforms/chibios/chibios_config.h | 4 ++++ platforms/chibios/vendors/RP/_pin_defs.h | 5 +++++ 5 files changed, 48 insertions(+) (limited to 'platforms') diff --git a/platforms/chibios/boards/GENERIC_PROMICRO_RP2040/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_PROMICRO_RP2040/configs/mcuconf.h index 8348e5312f..5c0859901e 100644 --- a/platforms/chibios/boards/GENERIC_PROMICRO_RP2040/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_PROMICRO_RP2040/configs/mcuconf.h @@ -78,6 +78,19 @@ #define RP_SPI_SPI1_DMA_PRIORITY 1 #define RP_SPI_DMA_ERROR_HOOK(spip) +/* + * PWM driver system settings. + */ +#define RP_PWM_USE_PWM0 FALSE +#define RP_PWM_USE_PWM1 FALSE +#define RP_PWM_USE_PWM2 FALSE +#define RP_PWM_USE_PWM3 FALSE +#define RP_PWM_USE_PWM4 FALSE +#define RP_PWM_USE_PWM5 FALSE +#define RP_PWM_USE_PWM6 FALSE +#define RP_PWM_USE_PWM7 FALSE +#define RP_PWM_IRQ_WRAP_NUMBER_PRIORITY 3 + /* * I2C driver system settings. */ diff --git a/platforms/chibios/boards/GENERIC_RP_RP2040/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_RP_RP2040/configs/mcuconf.h index 9d8dc61aac..f7a66c6ab9 100644 --- a/platforms/chibios/boards/GENERIC_RP_RP2040/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_RP_RP2040/configs/mcuconf.h @@ -78,6 +78,19 @@ #define RP_SPI_SPI1_DMA_PRIORITY 1 #define RP_SPI_DMA_ERROR_HOOK(spip) +/* + * PWM driver system settings. + */ +#define RP_PWM_USE_PWM0 FALSE +#define RP_PWM_USE_PWM1 FALSE +#define RP_PWM_USE_PWM2 FALSE +#define RP_PWM_USE_PWM3 FALSE +#define RP_PWM_USE_PWM4 FALSE +#define RP_PWM_USE_PWM5 FALSE +#define RP_PWM_USE_PWM6 FALSE +#define RP_PWM_USE_PWM7 FALSE +#define RP_PWM_IRQ_WRAP_NUMBER_PRIORITY 3 + /* * I2C driver system settings. */ diff --git a/platforms/chibios/boards/QMK_PM2040/configs/mcuconf.h b/platforms/chibios/boards/QMK_PM2040/configs/mcuconf.h index a737b36c1c..e33d6d785f 100644 --- a/platforms/chibios/boards/QMK_PM2040/configs/mcuconf.h +++ b/platforms/chibios/boards/QMK_PM2040/configs/mcuconf.h @@ -78,6 +78,19 @@ #define RP_SPI_SPI1_DMA_PRIORITY 1 #define RP_SPI_DMA_ERROR_HOOK(spip) +/* + * PWM driver system settings. + */ +#define RP_PWM_USE_PWM0 FALSE +#define RP_PWM_USE_PWM1 FALSE +#define RP_PWM_USE_PWM2 FALSE +#define RP_PWM_USE_PWM3 FALSE +#define RP_PWM_USE_PWM4 FALSE +#define RP_PWM_USE_PWM5 FALSE +#define RP_PWM_USE_PWM6 FALSE +#define RP_PWM_USE_PWM7 FALSE +#define RP_PWM_IRQ_WRAP_NUMBER_PRIORITY 3 + /* * I2C driver system settings. */ diff --git a/platforms/chibios/chibios_config.h b/platforms/chibios/chibios_config.h index 8dcc23727f..38d3a40f6b 100644 --- a/platforms/chibios/chibios_config.h +++ b/platforms/chibios/chibios_config.h @@ -28,6 +28,10 @@ # define USE_GPIOV1 # define PAL_OUTPUT_TYPE_OPENDRAIN _Static_assert(0, "RP2040 has no Open Drain GPIO configuration, setting this is not possible"); +# define BACKLIGHT_PAL_MODE (PAL_MODE_ALTERNATE_PWM | PAL_RP_PAD_DRIVE12 | PAL_RP_GPIO_OE) +# define BACKLIGHT_PWM_COUNTER_FREQUENCY 1000000 +# define BACKLIGHT_PWM_PERIOD BACKLIGHT_PWM_COUNTER_FREQUENCY / 2048 + # define usb_lld_endpoint_fields # define I2C1_SCL_PAL_MODE (PAL_MODE_ALTERNATE_I2C | PAL_RP_PAD_SLEWFAST | PAL_RP_PAD_PUE | PAL_RP_PAD_DRIVE4) diff --git a/platforms/chibios/vendors/RP/_pin_defs.h b/platforms/chibios/vendors/RP/_pin_defs.h index 4241845369..b56ab31406 100644 --- a/platforms/chibios/vendors/RP/_pin_defs.h +++ b/platforms/chibios/vendors/RP/_pin_defs.h @@ -35,3 +35,8 @@ #define GP28 28U #define GP29 29U #define GP30 30U + +/* Aliases for GPIO PWM channels - every pin has at least one PWM channel + * assigned */ +#define RP2040_PWM_CHANNEL_A 1U +#define RP2040_PWM_CHANNEL_B 2U -- cgit v1.2.3 From 7e844a4d55ee2e7e0b14a1c3a2aca3eebe259e8b Mon Sep 17 00:00:00 2001 From: Stefan Kerkmann Date: Tue, 4 Oct 2022 23:43:38 +0200 Subject: [Core] RP2040: use built-in integer hardware divider and optimized i64 multiplication (#18464) --- platforms/chibios/vendors/RP/RP2040.mk | 251 ++++----------------------------- 1 file changed, 31 insertions(+), 220 deletions(-) (limited to 'platforms') diff --git a/platforms/chibios/vendors/RP/RP2040.mk b/platforms/chibios/vendors/RP/RP2040.mk index efa3fef13f..4360512c05 100644 --- a/platforms/chibios/vendors/RP/RP2040.mk +++ b/platforms/chibios/vendors/RP/RP2040.mk @@ -66,223 +66,34 @@ EXTRAINCDIRS += $(PLATFORM_RP2040_PATH) # RP2040 optimized compiler intrinsics ############################################################################## -# Enables optimized Compiler intrinsics which are located in the RP2040 -# bootrom. This needs startup code and linker script support from ChibiOS, -# which is WIP. Therefore disabled by default for now. -RP2040_INTRINSICS_ENABLED ?= no -ifeq ($(strip $(RP2040_INTRINSICS_ENABLED)), yes) - PICOSDKINTRINSICSSRC = $(PICOSDKROOT)/src/rp2_common/pico_float/float_aeabi.S \ - $(PICOSDKROOT)/src/rp2_common/pico_float/float_math.c \ - $(PICOSDKROOT)/src/rp2_common/pico_float/float_init_rom.c \ - $(PICOSDKROOT)/src/rp2_common/pico_float/float_v1_rom_shim.S \ - $(PICOSDKROOT)/src/rp2_common/pico_double/double_aeabi.S \ - $(PICOSDKROOT)/src/rp2_common/pico_double/double_math.c \ - $(PICOSDKROOT)/src/rp2_common/pico_double/double_init_rom.c \ - $(PICOSDKROOT)/src/rp2_common/pico_double/double_v1_rom_shim.S \ - $(PICOSDKROOT)/src/rp2_common/pico_divider/divider.S \ - $(PICOSDKROOT)/src/rp2_common/pico_int64_ops/pico_int64_ops_aeabi.S \ - $(PICOSDKROOT)/src/rp2_common/pico_mem_ops/mem_ops_aeabi.S \ - $(PICOSDKROOT)/src/rp2_common/pico_malloc/pico_malloc.c \ - $(PICOSDKROOT)/src/rp2_common/pico_bit_ops/bit_ops_aeabi.S - - PICOSDKINTRINSICSINC = $(PICOSDKROOT)/src/common/pico_base/include \ - $(PICOSDKROOT)/src/rp2_common/pico_platfrom/include \ - $(PICOSDKROOT)/src/rp2_common/pico_bootrom/include \ - $(PICOSDKROOT)/src/rp2_common/hardware_divider/include \ - $(PICOSDKROOT)/src/rp2_common/pico_float/include \ - $(PICOSDKROOT)/src/rp2_common/pico_double/include \ - $(PICOSDKROOT)/src/rp2_common/pico_malloc/include - - OPT_DEFS += -DPICO_FLOAT_SUPPORT_ROM_V1=0 -DPICO_DOUBLE_SUPPORT_ROM_V1=0 - - CFLAGS += -Wl,--defsym=__StackLimit=__heap_end__ - CFLAGS += -Wl,--defsym=__unhandled_user_irq=_unhandled_exception - CFLAGS += -Wl,--build-id=none - - # single precision floating point intrinsics - OPT_DEFS += -DPICO_FLOAT_IN_RAM=1 - OPT_DEFS += -DPICO_FLOAT_PROPAGATE_NANS=0 - - CFLAGS += -Wl,--wrap=__aeabi_fdiv - CFLAGS += -Wl,--wrap=__aeabi_fmul - CFLAGS += -Wl,--wrap=__aeabi_frsub - CFLAGS += -Wl,--wrap=__aeabi_fsub - CFLAGS += -Wl,--wrap=__aeabi_cfcmpeq - CFLAGS += -Wl,--wrap=__aeabi_cfrcmple - CFLAGS += -Wl,--wrap=__aeabi_cfcmple - CFLAGS += -Wl,--wrap=__aeabi_fcmpeq - CFLAGS += -Wl,--wrap=__aeabi_fcmplt - CFLAGS += -Wl,--wrap=__aeabi_fcmple - CFLAGS += -Wl,--wrap=__aeabi_fcmpge - CFLAGS += -Wl,--wrap=__aeabi_fcmpgt - CFLAGS += -Wl,--wrap=__aeabi_fcmpun - CFLAGS += -Wl,--wrap=__aeabi_i2f - CFLAGS += -Wl,--wrap=__aeabi_l2f - CFLAGS += -Wl,--wrap=__aeabi_ui2f - CFLAGS += -Wl,--wrap=__aeabi_ul2f - CFLAGS += -Wl,--wrap=__aeabi_i2f - CFLAGS += -Wl,--wrap=__aeabi_f2iz - CFLAGS += -Wl,--wrap=__aeabi_f2lz - CFLAGS += -Wl,--wrap=__aeabi_f2uiz - CFLAGS += -Wl,--wrap=__aeabi_f2ulz - CFLAGS += -Wl,--wrap=__aeabi_f2d - CFLAGS += -Wl,--wrap=sqrtf - CFLAGS += -Wl,--wrap=cosf - CFLAGS += -Wl,--wrap=sinf - CFLAGS += -Wl,--wrap=tanf - CFLAGS += -Wl,--wrap=atan2f - CFLAGS += -Wl,--wrap=expf - CFLAGS += -Wl,--wrap=logf - CFLAGS += -Wl,--wrap=ldexpf - CFLAGS += -Wl,--wrap=copysignf - CFLAGS += -Wl,--wrap=truncf - CFLAGS += -Wl,--wrap=floorf - CFLAGS += -Wl,--wrap=ceilf - CFLAGS += -Wl,--wrap=roundf - CFLAGS += -Wl,--wrap=sincosf - CFLAGS += -Wl,--wrap=asinf - CFLAGS += -Wl,--wrap=acosf - CFLAGS += -Wl,--wrap=atanf - CFLAGS += -Wl,--wrap=sinhf - CFLAGS += -Wl,--wrap=coshf - CFLAGS += -Wl,--wrap=tanhf - CFLAGS += -Wl,--wrap=asinhf - CFLAGS += -Wl,--wrap=acoshf - CFLAGS += -Wl,--wrap=atanhf - CFLAGS += -Wl,--wrap=exp2f - CFLAGS += -Wl,--wrap=log2f - CFLAGS += -Wl,--wrap=exp10f - CFLAGS += -Wl,--wrap=log10f - CFLAGS += -Wl,--wrap=powf - CFLAGS += -Wl,--wrap=powintf - CFLAGS += -Wl,--wrap=hypotf - CFLAGS += -Wl,--wrap=cbrtf - CFLAGS += -Wl,--wrap=fmodf - CFLAGS += -Wl,--wrap=dremf - CFLAGS += -Wl,--wrap=remainderf - CFLAGS += -Wl,--wrap=remquof - CFLAGS += -Wl,--wrap=expm1f - CFLAGS += -Wl,--wrap=log1pf - CFLAGS += -Wl,--wrap=fmaf - - # double precision floating point intrinsics - OPT_DEFS += -DPICO_DOUBLE_IN_RAM=1 - OPT_DEFS += -DPICO_DOUBLE_PROPAGATE_NANS=0 - - CFLAGS += -Wl,--wrap=__aeabi_dadd - CFLAGS += -Wl,--wrap=__aeabi_ddiv - CFLAGS += -Wl,--wrap=__aeabi_dmul - CFLAGS += -Wl,--wrap=__aeabi_drsub - CFLAGS += -Wl,--wrap=__aeabi_dsub - CFLAGS += -Wl,--wrap=__aeabi_cdcmpeq - CFLAGS += -Wl,--wrap=__aeabi_cdrcmple - CFLAGS += -Wl,--wrap=__aeabi_cdcmple - CFLAGS += -Wl,--wrap=__aeabi_dcmpeq - CFLAGS += -Wl,--wrap=__aeabi_dcmplt - CFLAGS += -Wl,--wrap=__aeabi_dcmple - CFLAGS += -Wl,--wrap=__aeabi_dcmpge - CFLAGS += -Wl,--wrap=__aeabi_dcmpgt - CFLAGS += -Wl,--wrap=__aeabi_dcmpun - CFLAGS += -Wl,--wrap=__aeabi_i2d - CFLAGS += -Wl,--wrap=__aeabi_l2d - CFLAGS += -Wl,--wrap=__aeabi_ui2d - CFLAGS += -Wl,--wrap=__aeabi_ul2d - CFLAGS += -Wl,--wrap=__aeabi_d2iz - CFLAGS += -Wl,--wrap=__aeabi_d2lz - CFLAGS += -Wl,--wrap=__aeabi_d2uiz - CFLAGS += -Wl,--wrap=__aeabi_d2ulz - CFLAGS += -Wl,--wrap=__aeabi_d2f - CFLAGS += -Wl,--wrap=sqrt - CFLAGS += -Wl,--wrap=cos - CFLAGS += -Wl,--wrap=sin - CFLAGS += -Wl,--wrap=tan - CFLAGS += -Wl,--wrap=atan2 - CFLAGS += -Wl,--wrap=exp - CFLAGS += -Wl,--wrap=log - CFLAGS += -Wl,--wrap=ldexp - CFLAGS += -Wl,--wrap=copysign - CFLAGS += -Wl,--wrap=trunc - CFLAGS += -Wl,--wrap=floor - CFLAGS += -Wl,--wrap=ceil - CFLAGS += -Wl,--wrap=round - CFLAGS += -Wl,--wrap=sincos - CFLAGS += -Wl,--wrap=asin - CFLAGS += -Wl,--wrap=acos - CFLAGS += -Wl,--wrap=atan - CFLAGS += -Wl,--wrap=sinh - CFLAGS += -Wl,--wrap=cosh - CFLAGS += -Wl,--wrap=tanh - CFLAGS += -Wl,--wrap=asinh - CFLAGS += -Wl,--wrap=acosh - CFLAGS += -Wl,--wrap=atanh - CFLAGS += -Wl,--wrap=exp2 - CFLAGS += -Wl,--wrap=log2 - CFLAGS += -Wl,--wrap=exp10 - CFLAGS += -Wl,--wrap=log10 - CFLAGS += -Wl,--wrap=pow - CFLAGS += -Wl,--wrap=powint - CFLAGS += -Wl,--wrap=hypot - CFLAGS += -Wl,--wrap=cbrt - CFLAGS += -Wl,--wrap=fmod - CFLAGS += -Wl,--wrap=drem - CFLAGS += -Wl,--wrap=remainder - CFLAGS += -Wl,--wrap=remquo - CFLAGS += -Wl,--wrap=expm1 - CFLAGS += -Wl,--wrap=log1p - CFLAGS += -Wl,--wrap=fma - - # bit operation intrinsics - OPT_DEFS += -DPICO_BITS_IN_RAM=1 - - CFLAGS += -Wl,--wrap=__clzsi2 - CFLAGS += -Wl,--wrap=__clzsi2 - CFLAGS += -Wl,--wrap=__clzdi2 - CFLAGS += -Wl,--wrap=__ctzsi2 - CFLAGS += -Wl,--wrap=__ctzdi2 - CFLAGS += -Wl,--wrap=__popcountsi2 - CFLAGS += -Wl,--wrap=__popcountdi2 - CFLAGS += -Wl,--wrap=__clz - CFLAGS += -Wl,--wrap=__clzl - CFLAGS += -Wl,--wrap=__clzsi2 - CFLAGS += -Wl,--wrap=__clzll - - # integer division intrinsics - OPT_DEFS += -DPICO_DIVIDER_IN_RAM=1 - OPT_DEFS += -DPICO_DIVIDER_DISABLE_INTERRUPTS=1 - - CFLAGS += -Wl,--wrap=__aeabi_idiv - CFLAGS += -Wl,--wrap=__aeabi_idivmod - CFLAGS += -Wl,--wrap=__aeabi_ldivmod - CFLAGS += -Wl,--wrap=__aeabi_uidiv - CFLAGS += -Wl,--wrap=__aeabi_uidivmod - CFLAGS += -Wl,--wrap=__aeabi_uldivmod - - # 64bit integer intrinsics - OPT_DEFS += -DPICO_INT64_OPS_IN_RAM=1 - - CFLAGS += -Wl,--wrap=__aeabi_lmul - - # malloc and friends functions - OPT_DEFS += -DPICO_USE_MALLOC_MUTEX=0 - OPT_DEFS += -DPICO_DEBUG_MALLOC=0 - OPT_DEFS ?= -DPICO_MALLOC_PANIC=0 - - CFLAGS += -Wl,--wrap=malloc - CFLAGS += -Wl,--wrap=calloc - CFLAGS += -Wl,--wrap=free - - # memory operation intrinsics - OPT_DEFS += -DPICO_MEM_IN_RAM=1 - - CFLAGS += -Wl,--wrap=memcpy - CFLAGS += -Wl,--wrap=memset - CFLAGS += -Wl,--wrap=__aeabi_memcpy - CFLAGS += -Wl,--wrap=__aeabi_memset - CFLAGS += -Wl,--wrap=__aeabi_memcpy4 - CFLAGS += -Wl,--wrap=__aeabi_memset4 - CFLAGS += -Wl,--wrap=__aeabi_memcpy8 - CFLAGS += -Wl,--wrap=__aeabi_memset8 - - PLATFORM_SRC += $(PICOSDKINTRINSICSSRC) - EXTRAINCDIRS += $(PICOSDKINTRINSICSINC) -endif +# The RP2040 sdk provides optimized compiler intrinsics which override the GCC +# built-ins. Some of these functions are located in the bootrom of the RP2040. +# Execution of these functions is realized via a vtable that is populated on +# bootup. This mechanism needs startup code and linker script support from +# ChibiOS, which is currently not implemented thus these functions are disabled +# ATM. +PICOSDKINTRINSICSSRC = $(PICOSDKROOT)/src/rp2_common/pico_divider/divider.S \ + $(PICOSDKROOT)/src/rp2_common/pico_int64_ops/pico_int64_ops_aeabi.S + +PICOSDKINTRINSICSINC = $(PICOSDKROOT)/src/common/pico_base/include \ + $(PICOSDKROOT)/src/rp2_common/pico_platfrom/include \ + $(PICOSDKROOT)/src/rp2_common/hardware_divider/include + +# integer division intrinsics utilizing the RP2040 hardware divider +OPT_DEFS += -DPICO_DIVIDER_IN_RAM=1 +OPT_DEFS += -DPICO_DIVIDER_DISABLE_INTERRUPTS=1 + +CFLAGS += -Wl,--wrap=__aeabi_idiv +CFLAGS += -Wl,--wrap=__aeabi_idivmod +CFLAGS += -Wl,--wrap=__aeabi_ldivmod +CFLAGS += -Wl,--wrap=__aeabi_uidiv +CFLAGS += -Wl,--wrap=__aeabi_uidivmod +CFLAGS += -Wl,--wrap=__aeabi_uldivmod + +# 64bit integer intrinsics +OPT_DEFS += -DPICO_INT64_OPS_IN_RAM=1 + +CFLAGS += -Wl,--wrap=__aeabi_lmul + +PLATFORM_SRC += $(PICOSDKINTRINSICSSRC) +EXTRAINCDIRS += $(PICOSDKINTRINSICSINC) -- cgit v1.2.3 From 4d6fab1cfa4c16831cbd9727efddec654ca0460e Mon Sep 17 00:00:00 2001 From: Ryan Date: Wed, 5 Oct 2022 11:36:20 +1100 Subject: onekey: Enable ADC for STM32F072 Discovery (#18592) --- platforms/chibios/boards/GENERIC_STM32_F072XB/configs/mcuconf.h | 1 + 1 file changed, 1 insertion(+) (limited to 'platforms') diff --git a/platforms/chibios/boards/GENERIC_STM32_F072XB/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_F072XB/configs/mcuconf.h index 32b2777a81..9d26849dff 100644 --- a/platforms/chibios/boards/GENERIC_STM32_F072XB/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_F072XB/configs/mcuconf.h @@ -80,6 +80,7 @@ #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_IRQ_PRIORITY 2 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) /* * GPT driver system settings. -- cgit v1.2.3 From f120b39fb0b0f46122cdfeed2cb61fbae34debe2 Mon Sep 17 00:00:00 2001 From: Joel Challis Date: Wed, 5 Oct 2022 21:20:09 +0100 Subject: Update ChibiOS hardware ID (#18613) --- platforms/chibios/hardware_id.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'platforms') diff --git a/platforms/chibios/hardware_id.c b/platforms/chibios/hardware_id.c index 888a275465..7705bc7fd6 100644 --- a/platforms/chibios/hardware_id.c +++ b/platforms/chibios/hardware_id.c @@ -6,10 +6,12 @@ hardware_id_t get_hardware_id(void) { hardware_id_t id = {0}; -#ifdef UID_BASE +#if defined(RP2040) + flash_get_unique_id((uint8_t *)&id); +#elif defined(UID_BASE) id.data[0] = (uint32_t)(*((uint32_t *)UID_BASE)); id.data[1] = (uint32_t)(*((uint32_t *)(UID_BASE + 4))); - id.data[1] = (uint32_t)(*((uint32_t *)(UID_BASE + 8))); + id.data[2] = (uint32_t)(*((uint32_t *)(UID_BASE + 8))); #endif return id; } -- cgit v1.2.3 From c59df9a54cb7ea680cbae9a57f3a665802c9c739 Mon Sep 17 00:00:00 2001 From: Joel Challis Date: Thu, 6 Oct 2022 00:36:48 +0100 Subject: Fix some rp2040 hardware ID errors (#18617) --- platforms/chibios/hardware_id.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'platforms') diff --git a/platforms/chibios/hardware_id.c b/platforms/chibios/hardware_id.c index 7705bc7fd6..1097db5966 100644 --- a/platforms/chibios/hardware_id.c +++ b/platforms/chibios/hardware_id.c @@ -7,6 +7,9 @@ hardware_id_t get_hardware_id(void) { hardware_id_t id = {0}; #if defined(RP2040) + // Forward declare as including "hardware/flash.h" here causes more issues... + void flash_get_unique_id(uint8_t *); + flash_get_unique_id((uint8_t *)&id); #elif defined(UID_BASE) id.data[0] = (uint32_t)(*((uint32_t *)UID_BASE)); -- cgit v1.2.3 From c4f99f06ab4f260ad9ee8c4281073c5d82431e57 Mon Sep 17 00:00:00 2001 From: Thomas Kriechbaumer Date: Thu, 20 Oct 2022 23:17:51 +0200 Subject: ws2812: replace RGBLED_NUM with driver-owned constant to decouple driver from RGBLEDs/RGBMATRIX defines (#18036) --- .../drivers/vendor/RP/RP2040/ws2812_vendor.c | 12 +++++------ platforms/chibios/drivers/ws2812_pwm.c | 24 +++++++++++----------- platforms/chibios/drivers/ws2812_spi.c | 2 +- 3 files changed, 19 insertions(+), 19 deletions(-) (limited to 'platforms') diff --git a/platforms/chibios/drivers/vendor/RP/RP2040/ws2812_vendor.c b/platforms/chibios/drivers/vendor/RP/RP2040/ws2812_vendor.c index bc34eded14..4470e2c826 100644 --- a/platforms/chibios/drivers/vendor/RP/RP2040/ws2812_vendor.c +++ b/platforms/chibios/drivers/vendor/RP/RP2040/ws2812_vendor.c @@ -36,10 +36,10 @@ static int state_machine = -1; // clang-format off static const uint16_t ws2812_program_instructions[] = { // .wrap_target - 0x7221, // 0: out x, 1 side 1 [2] - 0x0123, // 1: jmp !x, 3 side 0 [1] - 0x0400, // 2: jmp 0 side 0 [4] - 0xb442, // 3: nop side 1 [4] + 0x7221, // 0: out x, 1 side 1 [2] + 0x0123, // 1: jmp !x, 3 side 0 [1] + 0x0400, // 2: jmp 0 side 0 [4] + 0xb442, // 3: nop side 1 [4] // .wrap }; @@ -62,7 +62,7 @@ static const pio_program_t ws2812_program = { .origin = -1, }; -static uint32_t WS2812_BUFFER[RGBLED_NUM]; +static uint32_t WS2812_BUFFER[WS2812_LED_COUNT]; static const rp_dma_channel_t* WS2812_DMA_CHANNEL; bool ws2812_init(void) { @@ -154,7 +154,7 @@ static inline void sync_ws2812_transfer(void) { // Abort the synchronization if we have to wait longer than the total // count of LEDs in millisecounds. This is safely much longer than it // would take to push all the data out. - if (unlikely(timer_elapsed_fast(start) > RGBLED_NUM)) { + if (unlikely(timer_elapsed_fast(start) > WS2812_LED_COUNT)) { dprintln("ERROR: WS2812 DMA transfer has stalled, aborting!"); dmaChannelDisableX(WS2812_DMA_CHANNEL); return; diff --git a/platforms/chibios/drivers/ws2812_pwm.c b/platforms/chibios/drivers/ws2812_pwm.c index 792de85ce9..c4a591c10b 100644 --- a/platforms/chibios/drivers/ws2812_pwm.c +++ b/platforms/chibios/drivers/ws2812_pwm.c @@ -88,8 +88,8 @@ */ #define WS2812_COLOR_BITS (WS2812_CHANNELS * 8) #define WS2812_RESET_BIT_N (1000 * WS2812_TRST_US / WS2812_TIMING) -#define WS2812_COLOR_BIT_N (RGBLED_NUM * WS2812_COLOR_BITS) /**< Number of data bits */ -#define WS2812_BIT_N (WS2812_COLOR_BIT_N + WS2812_RESET_BIT_N) /**< Total number of bits in a frame */ +#define WS2812_COLOR_BIT_N (WS2812_LED_COUNT * WS2812_COLOR_BITS) /**< Number of data bits */ +#define WS2812_BIT_N (WS2812_COLOR_BIT_N + WS2812_RESET_BIT_N) /**< Total number of bits in a frame */ /** * @brief High period for a zero, in ticks @@ -133,7 +133,7 @@ /** * @brief Determine the index in @ref ws2812_frame_buffer "the frame buffer" of a given bit * - * @param[in] led: The led index [0, @ref RGBLED_NUM) + * @param[in] led: The led index [0, @ref WS2812_LED_COUNT) * @param[in] byte: The byte number [0, 2] * @param[in] bit: The bit number [0, 7] * @@ -147,7 +147,7 @@ * * @note The red byte is the middle byte in the color packet * - * @param[in] led: The led index [0, @ref RGBLED_NUM) + * @param[in] led: The led index [0, @ref WS2812_LED_COUNT) * @param[in] bit: The bit number [0, 7] * * @return The bit index @@ -159,7 +159,7 @@ * * @note The red byte is the first byte in the color packet * - * @param[in] led: The led index [0, @ref RGBLED_NUM) + * @param[in] led: The led index [0, @ref WS2812_LED_COUNT) * @param[in] bit: The bit number [0, 7] * * @return The bit index @@ -171,7 +171,7 @@ * * @note The red byte is the last byte in the color packet * - * @param[in] led: The led index [0, @ref RGBLED_NUM) + * @param[in] led: The led index [0, @ref WS2812_LED_COUNT) * @param[in] bit: The bit index [0, 7] * * @return The bit index @@ -184,7 +184,7 @@ * * @note The red byte is the middle byte in the color packet * - * @param[in] led: The led index [0, @ref RGBLED_NUM) + * @param[in] led: The led index [0, @ref WS2812_LED_COUNT) * @param[in] bit: The bit number [0, 7] * * @return The bit index @@ -196,7 +196,7 @@ * * @note The red byte is the first byte in the color packet * - * @param[in] led: The led index [0, @ref RGBLED_NUM) + * @param[in] led: The led index [0, @ref WS2812_LED_COUNT) * @param[in] bit: The bit number [0, 7] * * @return The bit index @@ -208,7 +208,7 @@ * * @note The red byte is the last byte in the color packet * - * @param[in] led: The led index [0, @ref RGBLED_NUM) + * @param[in] led: The led index [0, @ref WS2812_LED_COUNT) * @param[in] bit: The bit index [0, 7] * * @return The bit index @@ -221,7 +221,7 @@ * * @note The red byte is the middle byte in the color packet * - * @param[in] led: The led index [0, @ref RGBLED_NUM) + * @param[in] led: The led index [0, @ref WS2812_LED_COUNT) * @param[in] bit: The bit number [0, 7] * * @return The bit index @@ -233,7 +233,7 @@ * * @note The red byte is the first byte in the color packet * - * @param[in] led: The led index [0, @ref RGBLED_NUM) + * @param[in] led: The led index [0, @ref WS2812_LED_COUNT) * @param[in] bit: The bit number [0, 7] * * @return The bit index @@ -245,7 +245,7 @@ * * @note The red byte is the last byte in the color packet * - * @param[in] led: The led index [0, @ref RGBLED_NUM) + * @param[in] led: The led index [0, @ref WS2812_LED_COUNT) * @param[in] bit: The bit index [0, 7] * * @return The bit index diff --git a/platforms/chibios/drivers/ws2812_spi.c b/platforms/chibios/drivers/ws2812_spi.c index 390884a2a4..03ffbd7f82 100644 --- a/platforms/chibios/drivers/ws2812_spi.c +++ b/platforms/chibios/drivers/ws2812_spi.c @@ -80,7 +80,7 @@ # define WS2812_CHANNELS 3 #endif #define BYTES_FOR_LED (BYTES_FOR_LED_BYTE * WS2812_CHANNELS) -#define DATA_SIZE (BYTES_FOR_LED * RGBLED_NUM) +#define DATA_SIZE (BYTES_FOR_LED * WS2812_LED_COUNT) #define RESET_SIZE (1000 * WS2812_TRST_US / (2 * WS2812_TIMING)) #define PREAMBLE_SIZE 4 -- cgit v1.2.3 From 575db6949abb76d7f75ba69311a9492d7b79108a Mon Sep 17 00:00:00 2001 From: Joel Challis Date: Sat, 22 Oct 2022 20:39:39 +0100 Subject: Generalise CTPC logic from common_features (#18803) --- platforms/chibios/converters/promicro_to_proton_c/post_converter.mk | 1 + 1 file changed, 1 insertion(+) create mode 100644 platforms/chibios/converters/promicro_to_proton_c/post_converter.mk (limited to 'platforms') diff --git a/platforms/chibios/converters/promicro_to_proton_c/post_converter.mk b/platforms/chibios/converters/promicro_to_proton_c/post_converter.mk new file mode 100644 index 0000000000..12651bd87c --- /dev/null +++ b/platforms/chibios/converters/promicro_to_proton_c/post_converter.mk @@ -0,0 +1 @@ +BACKLIGHT_DRIVER ?= software -- cgit v1.2.3 From 19145704e4a7a8a7609d697585a6423b67dc5371 Mon Sep 17 00:00:00 2001 From: Stefan Kerkmann Date: Thu, 27 Oct 2022 19:26:16 +0200 Subject: [Core] Adjust PWM hardware audio driver for RP2040 (#17723) --- platforms/chibios/chibios_config.h | 10 ++ platforms/chibios/drivers/audio_pwm_hardware.c | 152 ++++++++++--------------- platforms/chibios/vendors/RP/_pin_defs.h | 5 - 3 files changed, 70 insertions(+), 97 deletions(-) (limited to 'platforms') diff --git a/platforms/chibios/chibios_config.h b/platforms/chibios/chibios_config.h index 38d3a40f6b..4c8333f07b 100644 --- a/platforms/chibios/chibios_config.h +++ b/platforms/chibios/chibios_config.h @@ -28,10 +28,18 @@ # define USE_GPIOV1 # define PAL_OUTPUT_TYPE_OPENDRAIN _Static_assert(0, "RP2040 has no Open Drain GPIO configuration, setting this is not possible"); +/* Aliases for GPIO PWM channels - every pin has at least one PWM channel + * assigned */ +# define RP2040_PWM_CHANNEL_A 1U +# define RP2040_PWM_CHANNEL_B 2U + # define BACKLIGHT_PAL_MODE (PAL_MODE_ALTERNATE_PWM | PAL_RP_PAD_DRIVE12 | PAL_RP_GPIO_OE) # define BACKLIGHT_PWM_COUNTER_FREQUENCY 1000000 # define BACKLIGHT_PWM_PERIOD BACKLIGHT_PWM_COUNTER_FREQUENCY / 2048 +# define AUDIO_PWM_PAL_MODE (PAL_MODE_ALTERNATE_PWM | PAL_RP_PAD_DRIVE12 | PAL_RP_GPIO_OE) +# define AUDIO_PWM_COUNTER_FREQUENCY 500000 + # define usb_lld_endpoint_fields # define I2C1_SCL_PAL_MODE (PAL_MODE_ALTERNATE_I2C | PAL_RP_PAD_SLEWFAST | PAL_RP_PAD_PUE | PAL_RP_PAD_DRIVE4) @@ -55,6 +63,7 @@ # define USE_GPIOV1 # define PAL_MODE_ALTERNATE_OPENDRAIN PAL_MODE_STM32_ALTERNATE_OPENDRAIN # define PAL_MODE_ALTERNATE_PUSHPULL PAL_MODE_STM32_ALTERNATE_PUSHPULL +# define AUDIO_PWM_PAL_MODE PAL_MODE_ALTERNATE_PUSHPULL # else # define PAL_OUTPUT_TYPE_OPENDRAIN PAL_STM32_OTYPE_OPENDRAIN # define PAL_OUTPUT_TYPE_PUSHPULL PAL_STM32_OTYPE_PUSHPULL @@ -76,6 +85,7 @@ # define USE_I2CV1 # define PAL_MODE_ALTERNATE_OPENDRAIN PAL_MODE_GD32_ALTERNATE_OPENDRAIN # define PAL_MODE_ALTERNATE_PUSHPULL PAL_MODE_GD32_ALTERNATE_PUSHPULL +# define AUDIO_PWM_PAL_MODE PAL_MODE_GD32_ALTERNATE_PUSHPULL # endif #endif diff --git a/platforms/chibios/drivers/audio_pwm_hardware.c b/platforms/chibios/drivers/audio_pwm_hardware.c index 710f397609..54dac46605 100644 --- a/platforms/chibios/drivers/audio_pwm_hardware.c +++ b/platforms/chibios/drivers/audio_pwm_hardware.c @@ -1,29 +1,15 @@ -/* Copyright 2020 Jack Humbert - * Copyright 2020 JohSchneider - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -/* -Audio Driver: PWM - -the duty-cycle is always kept at 50%, and the pwm-period is adjusted to match the frequency of a note to be played back. - -this driver uses the chibios-PWM system to produce a square-wave on specific output pins that are connected to the PWM hardware. -The hardware directly toggles the pin via its alternate function. see your MCUs data-sheet for which pin can be driven by what timer - looking for TIMx_CHy and the corresponding alternate function. - - */ +// Copyright 2022 Stefan Kerkmann +// Copyright 2020 Jack Humbert +// Copyright 2020 JohSchneider +// SPDX-License-Identifier: GPL-2.0-or-later + +// Audio Driver: PWM the duty-cycle is always kept at 50%, and the pwm-period is +// adjusted to match the frequency of a note to be played back. This driver uses +// the chibios-PWM system to produce a square-wave on specific output pins that +// are connected to the PWM hardware. The hardware directly toggles the pin via +// its alternate function. see your MCUs data-sheet for which pin can be driven +// by what timer - looking for TIMx_CHy and the corresponding alternate +// function. #include "audio.h" #include "ch.h" @@ -33,53 +19,36 @@ The hardware directly toggles the pin via its alternate function. see your MCUs # error "Audio feature enabled, but no pin selected - see docs/feature_audio under the ARM PWM settings" #endif +#if !defined(AUDIO_PWM_COUNTER_FREQUENCY) +# define AUDIO_PWM_COUNTER_FREQUENCY 100000 +#endif + extern bool playing_note; extern bool playing_melody; extern uint8_t note_timbre; -static PWMConfig pwmCFG = { - .frequency = 100000, /* PWM clock frequency */ - // CHIBIOS-BUG? can't set the initial period to <2, or the pwm (hard or software) takes ~130ms with .frequency=500000 for a pwmChangePeriod to take effect; with no output=silence in the meantime - .period = 2, /* initial PWM period (in ticks) 1S (1/10kHz=0.1mS 0.1ms*10000 ticks=1S) */ - .callback = NULL, /* no callback, the hardware directly toggles the pin */ - .channels = - { -#if AUDIO_PWM_CHANNEL == 4 - {PWM_OUTPUT_DISABLED, NULL}, /* channel 0 -> TIMx_CH1 */ - {PWM_OUTPUT_DISABLED, NULL}, /* channel 1 -> TIMx_CH2 */ - {PWM_OUTPUT_DISABLED, NULL}, /* channel 2 -> TIMx_CH3 */ - {PWM_OUTPUT_ACTIVE_HIGH, NULL} /* channel 3 -> TIMx_CH4 */ -#elif AUDIO_PWM_CHANNEL == 3 - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_ACTIVE_HIGH, NULL}, /* TIMx_CH3 */ - {PWM_OUTPUT_DISABLED, NULL} -#elif AUDIO_PWM_CHANNEL == 2 - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_ACTIVE_HIGH, NULL}, /* TIMx_CH2 */ - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_DISABLED, NULL} -#else /*fallback to CH1 */ - {PWM_OUTPUT_ACTIVE_HIGH, NULL}, /* TIMx_CH1 */ - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_DISABLED, NULL} -#endif - }, -}; +static PWMConfig pwmCFG = {.frequency = AUDIO_PWM_COUNTER_FREQUENCY, /* PWM clock frequency */ + .period = 2, + .callback = NULL, + .channels = {[(AUDIO_PWM_CHANNEL - 1)] = {.mode = PWM_OUTPUT_ACTIVE_HIGH, .callback = NULL}}}; static float channel_1_frequency = 0.0f; -void channel_1_set_frequency(float freq) { + +void channel_1_set_frequency(float freq) { channel_1_frequency = freq; - if (freq <= 0.0) // a pause/rest has freq=0 + if (freq <= 0.0) { + // a pause/rest has freq=0 return; + } pwmcnt_t period = (pwmCFG.frequency / freq); - pwmChangePeriod(&AUDIO_PWM_DRIVER, period); - pwmEnableChannel(&AUDIO_PWM_DRIVER, AUDIO_PWM_CHANNEL - 1, - // adjust the duty-cycle so that the output is for 'note_timbre' duration HIGH - PWM_PERCENTAGE_TO_WIDTH(&AUDIO_PWM_DRIVER, (100 - note_timbre) * 100)); + chSysLockFromISR(); + pwmChangePeriodI(&AUDIO_PWM_DRIVER, period); + pwmEnableChannelI(&AUDIO_PWM_DRIVER, AUDIO_PWM_CHANNEL - 1, + // adjust the duty-cycle so that the output is for 'note_timbre' duration HIGH + PWM_PERCENTAGE_TO_WIDTH(&AUDIO_PWM_DRIVER, (100 - note_timbre) * 100)); + chSysUnlockFromISR(); } float channel_1_get_frequency(void) { @@ -95,54 +64,53 @@ void channel_1_stop(void) { pwmStop(&AUDIO_PWM_DRIVER); } -static void gpt_callback(GPTDriver *gptp); -GPTConfig gptCFG = { - /* a whole note is one beat, which is - per definition in musical_notes.h - set to 64 - the longest note is BREAVE_DOT=128+64=192, the shortest SIXTEENTH=4 - the tempo (which might vary!) is in bpm (beats per minute) - therefore: if the timer ticks away at .frequency = (60*64)Hz, - and the .interval counts from 64 downwards - audio_update_state is - called just often enough to not miss any notes - */ - .frequency = 60 * 64, - .callback = gpt_callback, -}; +static virtual_timer_t audio_vt; +static void audio_callback(virtual_timer_t *vtp, void *p); + +// a regular timer task, that checks the note to be currently played and updates +// the pwm to output that frequency. +static void audio_callback(virtual_timer_t *vtp, void *p) { + float freq; // TODO: freq_alt + + if (audio_update_state()) { + freq = audio_get_processed_frequency(0); // freq_alt would be index=1 + channel_1_set_frequency(freq); + } + + chSysLockFromISR(); + chVTSetI(&audio_vt, TIME_MS2I(16), audio_callback, NULL); + chSysUnlockFromISR(); +} void audio_driver_initialize(void) { pwmStart(&AUDIO_PWM_DRIVER, &pwmCFG); // connect the AUDIO_PIN to the PWM hardware -#if defined(USE_GPIOV1) // STM32F103C8 - palSetLineMode(AUDIO_PIN, PAL_MODE_ALTERNATE_PUSHPULL); +#if defined(USE_GPIOV1) // STM32F103C8, RP2040 + palSetLineMode(AUDIO_PIN, AUDIO_PWM_PAL_MODE); #else // GPIOv2 (or GPIOv3 for f4xx, which is the same/compatible at this command) palSetLineMode(AUDIO_PIN, PAL_MODE_ALTERNATE(AUDIO_PWM_PAL_MODE)); #endif - gptStart(&AUDIO_STATE_TIMER, &gptCFG); + chVTObjectInit(&audio_vt); } void audio_driver_start(void) { channel_1_stop(); channel_1_start(); - if (playing_note || playing_melody) { - gptStartContinuous(&AUDIO_STATE_TIMER, 64); + if ((playing_note || playing_melody) && !chVTIsArmed(&audio_vt)) { + // a whole note is one beat, which is - per definition in + // musical_notes.h - set to 64 the longest note is + // BREAVE_DOT=128+64=192, the shortest SIXTEENTH=4 the tempo (which + // might vary!) is in bpm (beats per minute) therefore: if the timer + // ticks away at 64Hz (~16.6ms) audio_update_state is called just often + // enough to not miss any notes + chVTSet(&audio_vt, TIME_MS2I(16), audio_callback, NULL); } } void audio_driver_stop(void) { channel_1_stop(); - gptStopTimer(&AUDIO_STATE_TIMER); -} - -/* a regular timer task, that checks the note to be currently played - * and updates the pwm to output that frequency - */ -static void gpt_callback(GPTDriver *gptp) { - float freq; // TODO: freq_alt - - if (audio_update_state()) { - freq = audio_get_processed_frequency(0); // freq_alt would be index=1 - channel_1_set_frequency(freq); - } + chVTReset(&audio_vt); } diff --git a/platforms/chibios/vendors/RP/_pin_defs.h b/platforms/chibios/vendors/RP/_pin_defs.h index b56ab31406..4241845369 100644 --- a/platforms/chibios/vendors/RP/_pin_defs.h +++ b/platforms/chibios/vendors/RP/_pin_defs.h @@ -35,8 +35,3 @@ #define GP28 28U #define GP29 29U #define GP30 30U - -/* Aliases for GPIO PWM channels - every pin has at least one PWM channel - * assigned */ -#define RP2040_PWM_CHANNEL_A 1U -#define RP2040_PWM_CHANNEL_B 2U -- cgit v1.2.3 From 9435ad19eedba9e56fa6a33989bc5c788f080e54 Mon Sep 17 00:00:00 2001 From: Joy Lee Date: Tue, 1 Nov 2022 12:04:15 +0800 Subject: Added analog support for WB32 MCU. (#18289) Co-authored-by: Joy --- platforms/chibios/drivers/analog.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'platforms') diff --git a/platforms/chibios/drivers/analog.c b/platforms/chibios/drivers/analog.c index a7b7ec76d7..8b03e73849 100644 --- a/platforms/chibios/drivers/analog.c +++ b/platforms/chibios/drivers/analog.c @@ -22,7 +22,7 @@ # error "You need to set HAL_USE_ADC to TRUE in your halconf.h to use the ADC." #endif -#if !STM32_ADC_USE_ADC1 && !STM32_ADC_USE_ADC2 && !STM32_ADC_USE_ADC3 && !STM32_ADC_USE_ADC4 +#if !STM32_ADC_USE_ADC1 && !STM32_ADC_USE_ADC2 && !STM32_ADC_USE_ADC3 && !STM32_ADC_USE_ADC4 && !WB32_ADC_USE_ADC1 # error "You need to set one of the 'STM32_ADC_USE_ADCx' settings to TRUE in your mcuconf.h to use the ADC." #endif @@ -37,7 +37,7 @@ // Otherwise assume V3 #if defined(STM32F0XX) || defined(STM32L0XX) # define USE_ADCV1 -#elif defined(STM32F1XX) || defined(STM32F2XX) || defined(STM32F4XX) || defined(GD32VF103) +#elif defined(STM32F1XX) || defined(STM32F2XX) || defined(STM32F4XX) || defined(GD32VF103) || defined(WB32F3G71xx) || defined(WB32FQ95xx) # define USE_ADCV2 #endif @@ -74,7 +74,7 @@ /* User configurable ADC options */ #ifndef ADC_COUNT -# if defined(STM32F0XX) || defined(STM32F1XX) || defined(STM32F4XX) || defined(GD32VF103) +# if defined(STM32F0XX) || defined(STM32F1XX) || defined(STM32F4XX) || defined(GD32VF103) || defined(WB32F3G71xx) || defined(WB32FQ95xx) # define ADC_COUNT 1 # elif defined(STM32F3XX) # define ADC_COUNT 4 @@ -121,7 +121,7 @@ static ADCConversionGroup adcConversionGroup = { .cfgr1 = ADC_CFGR1_CONT | ADC_RESOLUTION, .smpr = ADC_SAMPLING_RATE, #elif defined(USE_ADCV2) -# if !defined(STM32F1XX) && !defined(GD32VF103) +# if !defined(STM32F1XX) && !defined(GD32VF103) && !defined(WB32F3G71xx) && !defined(WB32FQ95xx) .cr2 = ADC_CR2_SWSTART, // F103 seem very unhappy with, F401 seems very unhappy without... # endif .smpr2 = ADC_SMPR2_SMP_AN0(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN1(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN2(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN3(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN4(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN5(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN6(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN7(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN8(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN9(ADC_SAMPLING_RATE), @@ -219,7 +219,7 @@ __attribute__((weak)) adc_mux pinToMux(pin_t pin) { case F9: return TO_MUX( ADC_CHANNEL_IN7, 2 ); case F10: return TO_MUX( ADC_CHANNEL_IN8, 2 ); # endif -#elif defined(STM32F1XX) || defined(GD32VF103) +#elif defined(STM32F1XX) || defined(GD32VF103) || defined(WB32F3G71xx) || defined(WB32FQ95xx) case A0: return TO_MUX( ADC_CHANNEL_IN0, 0 ); case A1: return TO_MUX( ADC_CHANNEL_IN1, 0 ); case A2: return TO_MUX( ADC_CHANNEL_IN2, 0 ); @@ -248,7 +248,7 @@ __attribute__((weak)) adc_mux pinToMux(pin_t pin) { static inline ADCDriver* intToADCDriver(uint8_t adcInt) { switch (adcInt) { -#if STM32_ADC_USE_ADC1 +#if STM32_ADC_USE_ADC1 || WB32_ADC_USE_ADC1 case 0: return &ADCD1; #endif -- cgit v1.2.3 From 27dec8d16d8e47da246ce68827c8ce5a433dcb91 Mon Sep 17 00:00:00 2001 From: Stefan Kerkmann Date: Wed, 9 Nov 2022 21:58:15 +0100 Subject: [Core] Allow custom timings for WS2812 PIO driver (#18006) --- .../drivers/vendor/RP/RP2040/ws2812_vendor.c | 236 ++++++++++++++------- 1 file changed, 165 insertions(+), 71 deletions(-) (limited to 'platforms') diff --git a/platforms/chibios/drivers/vendor/RP/RP2040/ws2812_vendor.c b/platforms/chibios/drivers/vendor/RP/RP2040/ws2812_vendor.c index 4470e2c826..ca130e39f5 100644 --- a/platforms/chibios/drivers/vendor/RP/RP2040/ws2812_vendor.c +++ b/platforms/chibios/drivers/vendor/RP/RP2040/ws2812_vendor.c @@ -1,4 +1,4 @@ -// Copyright 2022 Stefan Kerkmann +// Copyright 2022 Stefan Kerkmann (@KarlK90) // SPDX-License-Identifier: GPL-2.0-or-later #include "quantum.h" @@ -17,53 +17,156 @@ static const PIO pio = pio0; #endif #if !defined(RP_DMA_PRIORITY_WS2812) -# define RP_DMA_PRIORITY_WS2812 12 +# define RP_DMA_PRIORITY_WS2812 3 #endif -static int state_machine = -1; +#if defined(WS2812_EXTERNAL_PULLUP) +# pragma message "The GPIOs of the RP2040 are NOT 5V tolerant! Make sure to NOT apply any voltage over 3.3V to the RGB data pin." +#endif -#define WS2812_WRAP_TARGET 0 -#define WS2812_WRAP 3 +/*================== WS2812 PIO TIMINGS =================*/ -#define WS2812_T1 2 -#define WS2812_T2 5 -#define WS2812_T3 3 +// WS2812_T1L rounded to 50ns intervals and split into two wait timings +#define PIO_T1L (WS2812_T1L / 50) +#define PIO_T1L_A (MAX(CEILING(PIO_T1L, 2) - 1, 0)) +#define PIO_T1L_B (MAX(PIO_T1L / 2 - 1, 0)) -#if defined(WS2812_EXTERNAL_PULLUP) +// WS2812_T0L rounded to 50ns intervals +#define PIO_T0L (MAX(WS2812_T0L / 50 - PIO_T1L, 0)) +#define PIO_T0L_A (MAX(PIO_T0L - 1, 0)) -# pragma message "The GPIOs of the RP2040 are NOT 5V tolerant! Make sure to NOT apply any voltage over 3.3V to the RGB data pin." +// WS2812_T0H rounded to 50ns intervals +#define PIO_T0H (WS2812_T0H / 50) +#define PIO_T0H_A MAX(PIO_T0H - 1, 0) -// clang-format off -static const uint16_t ws2812_program_instructions[] = { - // .wrap_target - 0x7221, // 0: out x, 1 side 1 [2] - 0x0123, // 1: jmp !x, 3 side 0 [1] - 0x0400, // 2: jmp 0 side 0 [4] - 0xb442, // 3: nop side 1 [4] - // .wrap -}; +// WS2812_T1H rounded to 50ns intervals and split into two wait timings +#define PIO_T1H (MAX(WS2812_T1H / 50 - PIO_T0H, 0)) +#define PIO_T1H_A (MAX((CEILING(PIO_T1H, 2) - 1), 0)) +#define PIO_T1H_B (MAX((PIO_T1H / 2) - 1, 0)) -#else +#if (WS2812_T0L % 50) != 0 +# pragma message "WS2812_T0L is not given in an 50ns interval, it will be rounded to the next 50ns" +#endif + +#if (WS2812_T0H % 50) != 0 +# pragma message "WS2812_T0H is not given in an 50ns interval, it will be rounded to the next 50ns" +#endif + +#if (WS2812_T1L % 50) != 0 +# pragma message "WS2812_T0L is not given in an 50ns interval, it will be rounded to the next 50ns" +#endif + +#if (WS2812_T1H % 50) != 0 +# pragma message "WS2812_T0H is not given in an 50ns interval, it will be rounded to the next 50ns" +#endif + +#if WS2812_T0L < WS2812_T1L +# error WS2812_T0L is shorter than WS2812_T1L, this is impossible to express in the RP2040 PIO driver. Please correct your timings. +#endif + +#if WS2812_T1H < WS2812_T0H +# error WS2812_T1H is shorter than WS2812_T0H, this is impossible to express in the RP2040 PIO driver. Please correct your timings. +#endif + +#if WS2812_T0L > (850 + WS2812_T1L) +# error WS2812_T0L is longer than 850ns + WS2812_T1L, this is impossible to express in the RP2040 PIO driver. Please correct your timings. +#endif + +#if WS2812_T0H > 850 +# error WS2812_T0H is longer than 850ns, this is impossible to express in the RP2040 PIO driver. Please correct your timings. +#endif + +#if WS2812_T1H > (1700 + WS2812_T0H) +# error WS2812_T1H is longer than 1700ns + WS2812_T0H, this is impossible to express in the RP2040 PIO driver. Please correct your timings. +#endif + +#if WS2812_T1L > 1700 +# error WS2812_T1L is longer than 1700ns, this is impossible to express in the RP2040 PIO driver. Please correct your timings. +#endif + +#if WS2812_T0L < (50 + WS2812_T1L) +# error WS2812_T0L is shorter than 50ns + WS2812_T1L, this is impossible to express in the RP2040 PIO driver. Please correct your timings. +#endif + +#if WS2812_T0H < 50 +# error WS2812_T0H is shorter than 50ns, this is impossible to express in the RP2040 PIO driver. Please correct your timings. +#endif + +#if WS2812_T1H < (100 + WS2812_T0H) +# error WS2812_T1H is longer than 100ns + WS2812_T0H, this is impossible to express in the RP2040 PIO driver. Please correct your timings. +#endif + +#if WS2812_T1L < 100 +# error WS2812_T1L is longer than 1700ns, this is impossible to express in the RP2040 PIO driver. Please correct your timings. +#endif + +/** + * @brief Helper macro to binary patch the delay part of an per-compiled PIO + * opcode. + */ +#define PIO_DELAY(delay, opcode) (((delay & 0xF) << 8U) | opcode) + +#define WS2812_WRAP_TARGET 0 +#define WS2812_WRAP 5 static const uint16_t ws2812_program_instructions[] = { - // .wrap_target - 0x6221, // 0: out x, 1 side 0 [2] - 0x1123, // 1: jmp !x, 3 side 1 [1] - 0x1400, // 2: jmp 0 side 1 [4] - 0xa442, // 3: nop side 0 [4] - // .wrap + // .wrap_target + PIO_DELAY(PIO_T1L_A, 0x6021), // 0: out x, 1 side 0 // T1L (max. 1700ns) + PIO_DELAY(PIO_T1L_B, 0xa042), // 1: nop side 0 // T1L + PIO_DELAY(PIO_T0H_A, 0x1025), // 2: jmp !x, 5 side 1 // T0H (max. 850ns) + PIO_DELAY(PIO_T1H_A, 0xb042), // 3: nop side 1 // T1H (max. 1700ns + T0H) + PIO_DELAY(PIO_T1H_B, 0x1000), // 4: jmp 0 side 1 // T1H + PIO_DELAY(PIO_T0L_A, 0xa042), // 5: nop side 0 // T0L (max. 850ns + T1L) + // .wrap }; -// clang-format on -#endif static const pio_program_t ws2812_program = { .instructions = ws2812_program_instructions, - .length = 4, + .length = ARRAY_SIZE(ws2812_program_instructions), .origin = -1, }; static uint32_t WS2812_BUFFER[WS2812_LED_COUNT]; static const rp_dma_channel_t* WS2812_DMA_CHANNEL; +static uint32_t RP_DMA_MODE_WS2812; +static int STATE_MACHINE = -1; + +static SEMAPHORE_DECL(TRANSFER_COUNTER, 1); +static rtcnt_t LAST_TRANSFER; + +/** + * @brief Convert RGBW value into WS2812 compatible 32-bit data word. + */ +__always_inline static uint32_t rgbw8888_to_u32(uint8_t red, uint8_t green, uint8_t blue, uint8_t white) { +#if (WS2812_BYTE_ORDER == WS2812_BYTE_ORDER_GRB) + return ((uint32_t)green << 24) | ((uint32_t)red << 16) | ((uint32_t)blue << 8) | ((uint32_t)white); +#elif (WS2812_BYTE_ORDER == WS2812_BYTE_ORDER_RGB) + return ((uint32_t)red << 24) | ((uint32_t)green << 16) | ((uint32_t)blue << 8) | ((uint32_t)white); +#elif (WS2812_BYTE_ORDER == WS2812_BYTE_ORDER_BGR) + return ((uint32_t)blue << 24) | ((uint32_t)green << 16) | ((uint32_t)red << 8) | ((uint32_t)white); +#endif +} + +static void ws2812_dma_callback(void* p, uint32_t ct) { + // We assume that there is at least one frame left in the OSR even if the TX + // FIFO is already empty. + rtcnt_t time_to_completion = (pio_sm_get_tx_fifo_level(pio, STATE_MACHINE) + 1) * MAX(WS2812_T1H + WS2812_T1L, WS2812_T0H + WS2812_T0L); + +#if defined(RGBW) + time_to_completion *= 32; +#else + time_to_completion *= 24; +#endif + + // Convert from ns to us + time_to_completion /= 1000; + + LAST_TRANSFER = chSysGetRealtimeCounterX() + time_to_completion + WS2812_TRST_US; + + osalSysLockFromISR(); + chSemSignalI(&TRANSFER_COUNTER); + osalSysUnlockFromISR(); +} bool ws2812_init(void) { uint pio_idx = pio_get_index(pio); @@ -73,20 +176,23 @@ bool ws2812_init(void) { // clang-format off iomode_t rgb_pin_mode = PAL_RP_PAD_SLEWFAST | PAL_RP_GPIO_OE | +#if defined(WS2812_EXTERNAL_PULLUP) + PAL_RP_IOCTRL_OEOVER_DRVINVPERI | +#endif (pio_idx == 0 ? PAL_MODE_ALTERNATE_PIO0 : PAL_MODE_ALTERNATE_PIO1); // clang-format on palSetLineMode(RGB_DI_PIN, rgb_pin_mode); - state_machine = pio_claim_unused_sm(pio, true); - if (state_machine < 0) { + STATE_MACHINE = pio_claim_unused_sm(pio, true); + if (STATE_MACHINE < 0) { dprintln("ERROR: Failed to acquire state machine for WS2812 output!"); return false; } uint offset = pio_add_program(pio, &ws2812_program); - pio_sm_set_consecutive_pindirs(pio, state_machine, RGB_DI_PIN, 1, true); + pio_sm_set_consecutive_pindirs(pio, STATE_MACHINE, RGB_DI_PIN, 1, true); pio_sm_config config = pio_get_default_sm_config(); sm_config_set_wrap(&config, offset + WS2812_WRAP_TARGET, offset + WS2812_WRAP); @@ -113,57 +219,44 @@ bool ws2812_init(void) { sm_config_set_out_shift(&config, false, true, 24); #endif - int cycles_per_bit = WS2812_T1 + WS2812_T2 + WS2812_T3; - float div = clock_get_hz(clk_sys) / (800.0f * KHZ * cycles_per_bit); + // Every instruction takes 50ns to execute with a clock speed of 20 MHz, + // giving the WS2812 PIO driver its time resolution + float div = clock_get_hz(clk_sys) / (20.0f * MHZ); sm_config_set_clkdiv(&config, div); - pio_sm_init(pio, state_machine, offset, &config); - pio_sm_set_enabled(pio, state_machine, true); + pio_sm_init(pio, STATE_MACHINE, offset, &config); + pio_sm_set_enabled(pio, STATE_MACHINE, true); - WS2812_DMA_CHANNEL = dmaChannelAlloc(RP_DMA_CHANNEL_ID_ANY, RP_DMA_PRIORITY_WS2812, NULL, NULL); + WS2812_DMA_CHANNEL = dmaChannelAlloc(RP_DMA_CHANNEL_ID_ANY, RP_DMA_PRIORITY_WS2812, (rp_dmaisr_t)ws2812_dma_callback, NULL); + dmaChannelEnableInterruptX(WS2812_DMA_CHANNEL); + dmaChannelSetDestinationX(WS2812_DMA_CHANNEL, (uint32_t)&pio->txf[STATE_MACHINE]); // clang-format off - uint32_t mode = DMA_CTRL_TRIG_INCR_READ | - DMA_CTRL_TRIG_DATA_SIZE_WORD | - DMA_CTRL_TRIG_IRQ_QUIET | - DMA_CTRL_TRIG_TREQ_SEL(pio_idx == 0 ? state_machine : state_machine + 8); + RP_DMA_MODE_WS2812 = DMA_CTRL_TRIG_INCR_READ | + DMA_CTRL_TRIG_DATA_SIZE_WORD | + DMA_CTRL_TRIG_TREQ_SEL(pio == pio0 ? STATE_MACHINE : STATE_MACHINE + 8) | + DMA_CTRL_TRIG_PRIORITY(RP_DMA_PRIORITY_WS2812); // clang-format on - dmaChannelSetModeX(WS2812_DMA_CHANNEL, mode); - dmaChannelSetDestinationX(WS2812_DMA_CHANNEL, (uint32_t)&pio->txf[state_machine]); return true; } -/** - * @brief Convert RGBW value into WS2812 compatible 32-bit data word. - */ -__always_inline static uint32_t rgbw8888_to_u32(uint8_t red, uint8_t green, uint8_t blue, uint8_t white) { -#if (WS2812_BYTE_ORDER == WS2812_BYTE_ORDER_GRB) - return ((uint32_t)green << 24) | ((uint32_t)red << 16) | ((uint32_t)blue << 8) | ((uint32_t)white); -#elif (WS2812_BYTE_ORDER == WS2812_BYTE_ORDER_RGB) - return ((uint32_t)red << 24) | ((uint32_t)green << 16) | ((uint32_t)blue << 8) | ((uint32_t)white); -#elif (WS2812_BYTE_ORDER == WS2812_BYTE_ORDER_BGR) - return ((uint32_t)blue << 24) | ((uint32_t)green << 16) | ((uint32_t)red << 8) | ((uint32_t)white); -#endif -} - static inline void sync_ws2812_transfer(void) { - if (unlikely(dmaChannelIsBusyX(WS2812_DMA_CHANNEL) || !pio_sm_is_tx_fifo_empty(pio, state_machine))) { - fast_timer_t start = timer_read_fast(); - do { - // Abort the synchronization if we have to wait longer than the total - // count of LEDs in millisecounds. This is safely much longer than it - // would take to push all the data out. - if (unlikely(timer_elapsed_fast(start) > WS2812_LED_COUNT)) { - dprintln("ERROR: WS2812 DMA transfer has stalled, aborting!"); - dmaChannelDisableX(WS2812_DMA_CHANNEL); - return; - } - - } while (dmaChannelIsBusyX(WS2812_DMA_CHANNEL) || !pio_sm_is_tx_fifo_empty(pio, state_machine)); - // We wait for the WS2812 chain to reset after all data has been pushed - // out. + if (chSemWaitTimeout(&TRANSFER_COUNTER, TIME_MS2I(RGBLED_NUM)) == MSG_TIMEOUT) { + // Abort the synchronization if we have to wait longer than the total + // count of LEDs in milliseconds. This is safely much longer than it + // would take to push all the data out. + dprintln("ERROR: WS2812 DMA transfer has stalled, aborting!"); + dmaChannelDisableX(WS2812_DMA_CHANNEL); + pio_sm_clear_fifos(pio, STATE_MACHINE); + pio_sm_restart(pio, STATE_MACHINE); + chSemReset(&TRANSFER_COUNTER, 0); wait_us(WS2812_TRST_US); + return; + } + + // Busy wait until last transfer has finished + while (unlikely(!timer_expired32(chSysGetRealtimeCounterX(), LAST_TRANSFER))) { } } @@ -185,5 +278,6 @@ void ws2812_setleds(LED_TYPE* ledarray, uint16_t leds) { dmaChannelSetSourceX(WS2812_DMA_CHANNEL, (uint32_t)WS2812_BUFFER); dmaChannelSetCounterX(WS2812_DMA_CHANNEL, leds); + dmaChannelSetModeX(WS2812_DMA_CHANNEL, RP_DMA_MODE_WS2812); dmaChannelEnableX(WS2812_DMA_CHANNEL); } -- cgit v1.2.3 From dad5262425c311b3e14cf886a29c312e3edf7dd4 Mon Sep 17 00:00:00 2001 From: jack <0x6A73@pm.me> Date: Thu, 10 Nov 2022 15:38:13 -0700 Subject: Fixup WS2812 vendor driver (#19028) --- platforms/chibios/drivers/vendor/RP/RP2040/ws2812_vendor.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'platforms') diff --git a/platforms/chibios/drivers/vendor/RP/RP2040/ws2812_vendor.c b/platforms/chibios/drivers/vendor/RP/RP2040/ws2812_vendor.c index ca130e39f5..bc03213f3b 100644 --- a/platforms/chibios/drivers/vendor/RP/RP2040/ws2812_vendor.c +++ b/platforms/chibios/drivers/vendor/RP/RP2040/ws2812_vendor.c @@ -242,7 +242,7 @@ bool ws2812_init(void) { } static inline void sync_ws2812_transfer(void) { - if (chSemWaitTimeout(&TRANSFER_COUNTER, TIME_MS2I(RGBLED_NUM)) == MSG_TIMEOUT) { + if (chSemWaitTimeout(&TRANSFER_COUNTER, TIME_MS2I(WS2812_LED_COUNT)) == MSG_TIMEOUT) { // Abort the synchronization if we have to wait longer than the total // count of LEDs in milliseconds. This is safely much longer than it // would take to push all the data out. -- cgit v1.2.3 From 092228571c40a31d88940055b4d2fa749f135314 Mon Sep 17 00:00:00 2001 From: Nick Brassel Date: Sat, 12 Nov 2022 10:57:44 +1100 Subject: Move EFL wear-leveling driver to be default for F1, F3, F4, L4, G4, WB32, GD32V. (#19020) --- platforms/chibios/drivers/wear_leveling/wear_leveling_efl_config.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'platforms') diff --git a/platforms/chibios/drivers/wear_leveling/wear_leveling_efl_config.h b/platforms/chibios/drivers/wear_leveling/wear_leveling_efl_config.h index 244c87cb7f..e74cf85efd 100644 --- a/platforms/chibios/drivers/wear_leveling/wear_leveling_efl_config.h +++ b/platforms/chibios/drivers/wear_leveling/wear_leveling_efl_config.h @@ -20,7 +20,9 @@ # if defined(STM32_FLASH_LINE_SIZE) // from some family's stm32_registry.h file # define BACKING_STORE_WRITE_SIZE (STM32_FLASH_LINE_SIZE) # else -# if defined(QMK_MCU_SERIES_STM32F1XX) +# if defined(QMK_MCU_SERIES_STM32F0XX) +# define BACKING_STORE_WRITE_SIZE 2 // from hal_efl_lld.c +# elif defined(QMK_MCU_SERIES_STM32F1XX) # define BACKING_STORE_WRITE_SIZE 2 // from hal_efl_lld.c # elif defined(QMK_MCU_SERIES_STM32F3XX) # define BACKING_STORE_WRITE_SIZE 2 // from hal_efl_lld.c -- cgit v1.2.3 From a42ab90220ce01c2aebdebb09aa458f383d26892 Mon Sep 17 00:00:00 2001 From: David Hoelscher Date: Sun, 13 Nov 2022 17:59:01 -0600 Subject: Add Bonsai C4 as a platform board file (#18901) * Set up Bonsai C4 as a platform board file * corrections and improvements based on testing and feedback * Added VBUS sensing as default capability for improved split support using Bonsai C4 * Update clock divisor for SPI flash Co-authored-by: Nick Brassel Co-authored-by: Nick Brassel --- platforms/chibios/boards/BONSAI_C4/board/board.mk | 9 + platforms/chibios/boards/BONSAI_C4/configs/board.h | 20 ++ .../chibios/boards/BONSAI_C4/configs/config.h | 92 ++++++++ .../chibios/boards/BONSAI_C4/configs/halconf.h | 49 ++++ .../chibios/boards/BONSAI_C4/configs/mcuconf.h | 249 +++++++++++++++++++++ .../converters/promicro_to_bonsai_c4/converter.mk | 4 +- .../promicro_to_bonsai_c4/post_converter.mk | 5 + 7 files changed, 426 insertions(+), 2 deletions(-) create mode 100644 platforms/chibios/boards/BONSAI_C4/board/board.mk create mode 100644 platforms/chibios/boards/BONSAI_C4/configs/board.h create mode 100644 platforms/chibios/boards/BONSAI_C4/configs/config.h create mode 100644 platforms/chibios/boards/BONSAI_C4/configs/halconf.h create mode 100644 platforms/chibios/boards/BONSAI_C4/configs/mcuconf.h create mode 100644 platforms/chibios/converters/promicro_to_bonsai_c4/post_converter.mk (limited to 'platforms') diff --git a/platforms/chibios/boards/BONSAI_C4/board/board.mk b/platforms/chibios/boards/BONSAI_C4/board/board.mk new file mode 100644 index 0000000000..bb00b1a2b0 --- /dev/null +++ b/platforms/chibios/boards/BONSAI_C4/board/board.mk @@ -0,0 +1,9 @@ +# List of all the board related files. +BOARDSRC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO64_F411RE/board.c + +# Required include directories +BOARDINC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO64_F411RE + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/platforms/chibios/boards/BONSAI_C4/configs/board.h b/platforms/chibios/boards/BONSAI_C4/configs/board.h new file mode 100644 index 0000000000..f1ee51c91f --- /dev/null +++ b/platforms/chibios/boards/BONSAI_C4/configs/board.h @@ -0,0 +1,20 @@ +/* Copyright 2020 Nick Brassel (tzarc) + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#pragma once + +#include_next "board.h" + +#undef STM32_HSE_BYPASS \ No newline at end of file diff --git a/platforms/chibios/boards/BONSAI_C4/configs/config.h b/platforms/chibios/boards/BONSAI_C4/configs/config.h new file mode 100644 index 0000000000..e412f73d3d --- /dev/null +++ b/platforms/chibios/boards/BONSAI_C4/configs/config.h @@ -0,0 +1,92 @@ +/* Copyright 2022 David Hoelscher, customMK + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#pragma once + +// Bonsai C4 includes Vbus sensing; derived designs that use PA9 for other purposes +// may disable Vbus sensing with #define BOARD_OTG_NOVBUSSENS 1 + +#ifndef EARLY_INIT_PERFORM_BOOTLOADER_JUMP +# define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE +#endif + +// FRAM configuration +#ifndef EXTERNAL_EEPROM_SPI_SLAVE_SELECT_PIN +# define EXTERNAL_EEPROM_SPI_SLAVE_SELECT_PIN PAL_LINE(GPIOA, 0) +# define EXTERNAL_EEPROM_SPI_CLOCK_DIVISOR 8 // 96MHz / 8 = 12MHz; max supported by MB85R64 is 20MHz +# define EXTERNAL_EEPROM_BYTE_COUNT 8192 +# define EXTERNAL_EEPROM_PAGE_SIZE 64 // does not matter for FRAM, just sets the RAM buffer size in STM32F chip +# define DYNAMIC_KEYMAP_EEPROM_MAX_ADDR 8191 +#endif + +// External flash configuration +#ifndef EXTERNAL_FLASH_SPI_SLAVE_SELECT_PIN +# define EXTERNAL_FLASH_SPI_SLAVE_SELECT_PIN PAL_LINE(GPIOB, 12) +# define EXTERNAL_FLASH_SPI_CLOCK_DIVISOR 2 // 48MHz; max supported by W25Q128JV is 133MHz +# define EXTERNAL_FLASH_BYTE_COUNT (16 * 1024 * 1024) //128Mbit or 16MByte +# define EXTERNAL_FLASH_PAGE_SIZE 256 +# define EXTERNAL_FLASH_SPI_TIMEOUT 200000 //datasheet max is 200 seconds for flash chip erase +#endif + +// SPI Configuration (needed for FRAM and FLASH) +#ifndef SPI_DRIVER +# define SPI_DRIVER SPID1 +#endif +#ifndef SPI_SCK_PIN +# define SPI_SCK_PIN PAL_LINE(GPIOB, 3) +#endif +#ifndef SPI_MOSI_PIN +# define SPI_MOSI_PIN PAL_LINE(GPIOB, 5) +#endif +#ifndef SPI_MISO_PIN +# define SPI_MISO_PIN PAL_LINE(GPIOB, 4) +#endif + + +// I2C Configuration +#ifdef CONVERT_TO_BONSAI_C4 +# ifndef I2C1_SCL_PIN +# define I2C1_SCL_PIN PAL_LINE(GPIOB, 6) +# endif +# ifndef I2C1_SDA_PIN +# define I2C1_SDA_PIN PAL_LINE(GPIOB, 9) +# endif +#endif + +// WS2812-style LED control on pin A10 +#ifdef WS2812_DRIVER_PWM +# ifndef RGB_DI_PIN +# define RGB_DI_PIN PAL_LINE(GPIOA, 10) +# endif +# ifndef WS2812_PWM_DRIVER +# define WS2812_PWM_DRIVER PWMD1 +# endif +# ifndef WS2812_PWM_CHANNEL +# define WS2812_PWM_CHANNEL 3 +# endif +# ifndef WS2812_PWM_PAL_MODE +# define WS2812_PWM_PAL_MODE 1 +# endif +# ifndef WS2812_DMA_STREAM +# define WS2812_DMA_STREAM STM32_DMA2_STREAM5 +# endif +# ifndef WS2812_DMA_CHANNEL +# define WS2812_DMA_CHANNEL 6 +# endif +#endif + +#ifndef USB_VBUS_PIN +# define USB_VBUS_PIN PAL_LINE(GPIOA, 9) +#endif \ No newline at end of file diff --git a/platforms/chibios/boards/BONSAI_C4/configs/halconf.h b/platforms/chibios/boards/BONSAI_C4/configs/halconf.h new file mode 100644 index 0000000000..7887e7c9ba --- /dev/null +++ b/platforms/chibios/boards/BONSAI_C4/configs/halconf.h @@ -0,0 +1,49 @@ +/* Copyright 2022 David Hoelscher, customMK + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#pragma once + +#ifndef HAL_USE_SPI +# define HAL_USE_SPI TRUE +#endif + +#ifndef HAL_USE_I2C +# define HAL_USE_I2C TRUE +#endif + +#ifdef SPLIT_KEYBOARD +# ifndef HAL_USE_SERIAL +# define HAL_USE_SERIAL TRUE +# endif +# ifndef SERIAL_BUFFERS_SIZE +# define SERIAL_BUFFERS_SIZE 256 +# endif +#endif + +#ifdef WS2812_DRIVER_PWM +# ifndef HAL_USE_PWM +# define HAL_USE_PWM TRUE +# endif +#endif + +#ifndef SPI_SELECT_MODE +# define SPI_SELECT_MODE SPI_SELECT_MODE_PAD +#endif + +#ifndef SPI_USE_WAIT +# define SPI_USE_WAIT TRUE +#endif + +#include_next \ No newline at end of file diff --git a/platforms/chibios/boards/BONSAI_C4/configs/mcuconf.h b/platforms/chibios/boards/BONSAI_C4/configs/mcuconf.h new file mode 100644 index 0000000000..2f9e627c7e --- /dev/null +++ b/platforms/chibios/boards/BONSAI_C4/configs/mcuconf.h @@ -0,0 +1,249 @@ +/* + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef MCUCONF_H +#define MCUCONF_H + +/* + * STM32F4xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F4xx_MCUCONF +#define STM32F411_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_BKPRAM_ENABLE FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_CLOCK48_REQUIRED TRUE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLM_VALUE 4 +#define STM32_PLLN_VALUE 96 +#define STM32_PLLP_VALUE 2 +#define STM32_PLLQ_VALUE 4 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV1 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_RTCPRE_VALUE 8 +#define STM32_MCO1SEL STM32_MCO1SEL_HSI +#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 +#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK +#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 +#define STM32_I2SSRC STM32_I2SSRC_CKIN +#define STM32_PLLI2SN_VALUE 192 +#define STM32_PLLI2SR_VALUE 5 + +/* + * IRQ system settings. + */ +#define STM32_IRQ_EXTI0_PRIORITY 6 +#define STM32_IRQ_EXTI1_PRIORITY 6 +#define STM32_IRQ_EXTI2_PRIORITY 6 +#define STM32_IRQ_EXTI3_PRIORITY 6 +#define STM32_IRQ_EXTI4_PRIORITY 6 +#define STM32_IRQ_EXTI5_9_PRIORITY 6 +#define STM32_IRQ_EXTI10_15_PRIORITY 6 +#define STM32_IRQ_EXTI16_PRIORITY 6 +#define STM32_IRQ_EXTI17_PRIORITY 15 +#define STM32_IRQ_EXTI18_PRIORITY 6 +#define STM32_IRQ_EXTI19_PRIORITY 6 +#define STM32_IRQ_EXTI20_PRIORITY 6 +#define STM32_IRQ_EXTI21_PRIORITY 15 +#define STM32_IRQ_EXTI22_PRIORITY 15 + +#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7 +#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7 +#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7 +#define STM32_IRQ_TIM1_CC_PRIORITY 7 +#define STM32_IRQ_TIM2_PRIORITY 7 +#define STM32_IRQ_TIM3_PRIORITY 7 +#define STM32_IRQ_TIM4_PRIORITY 7 +#define STM32_IRQ_TIM5_PRIORITY 7 + +#define STM32_IRQ_USART1_PRIORITY 12 +#define STM32_IRQ_USART2_PRIORITY 12 +#define STM32_IRQ_USART6_PRIORITY 12 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM10 FALSE +#define STM32_GPT_USE_TIM11 FALSE + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 TRUE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_BUSY_TIMEOUT 50 +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") + +/* + * I2S driver system settings. + */ +#define STM32_I2S_USE_SPI2 FALSE +#define STM32_I2S_USE_SPI3 FALSE +#define STM32_I2S_SPI2_IRQ_PRIORITY 10 +#define STM32_I2S_SPI3_IRQ_PRIORITY 10 +#define STM32_I2S_SPI2_DMA_PRIORITY 1 +#define STM32_I2S_SPI3_DMA_PRIORITY 1 +#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2S_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2S_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure") + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM9 FALSE +#define STM32_ICU_USE_TIM10 FALSE +#define STM32_ICU_USE_TIM11 FALSE + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 TRUE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM9 FALSE +#define STM32_PWM_USE_TIM10 FALSE +#define STM32_PWM_USE_TIM11 FALSE + +/* + * RTC driver system settings. + */ +#define STM32_RTC_PRESA_VALUE 32 +#define STM32_RTC_PRESS_VALUE 1024 +#define STM32_RTC_CR_INIT 0 +#define STM32_RTC_TAMPCR_INIT 0 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART6 FALSE + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") + +/* + * ST driver system settings. + */ +#define STM32_ST_IRQ_PRIORITY 8 +#define STM32_ST_USE_TIMER 2 + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART6 FALSE +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART6_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_OTG1 TRUE +#define STM32_USB_OTG1_IRQ_PRIORITY 14 +#define STM32_USB_OTG1_RX_FIFO_SIZE 512 +#define STM32_USB_HOST_WAKEUP_DURATION 2 + +/* + * WDG driver system settings. + */ +#define STM32_WDG_USE_IWDG FALSE + +#endif /* MCUCONF_H */ \ No newline at end of file diff --git a/platforms/chibios/converters/promicro_to_bonsai_c4/converter.mk b/platforms/chibios/converters/promicro_to_bonsai_c4/converter.mk index 7410209b67..005b7a8160 100644 --- a/platforms/chibios/converters/promicro_to_bonsai_c4/converter.mk +++ b/platforms/chibios/converters/promicro_to_bonsai_c4/converter.mk @@ -1,4 +1,4 @@ # Proton C MCU settings for converting AVR projects MCU := STM32F411 -BOARD := GENERIC_STM32_F411XE -BOOTLOADER := stm32-dfu \ No newline at end of file +BOARD := BONSAI_C4 +BOOTLOADER := stm32-dfu diff --git a/platforms/chibios/converters/promicro_to_bonsai_c4/post_converter.mk b/platforms/chibios/converters/promicro_to_bonsai_c4/post_converter.mk new file mode 100644 index 0000000000..5f49b17f8a --- /dev/null +++ b/platforms/chibios/converters/promicro_to_bonsai_c4/post_converter.mk @@ -0,0 +1,5 @@ +BACKLIGHT_DRIVER ?= pwm +WS2812_DRIVER ?= pwm +SERIAL_DRIVER ?= usart +FLASH_DRIVER ?= spi +EEPROM_DRIVER ?= spi \ No newline at end of file -- cgit v1.2.3 From bebfdad795add9fbc8c6c1393d1b817d542474ed Mon Sep 17 00:00:00 2001 From: Nick Brassel Date: Wed, 23 Nov 2022 19:50:19 +1100 Subject: NVRAM refactor, phase 1. (#18969) * Rename `eeprom_stm32` to `eeprom_legacy_emulated_flash`. * Rename `flash_stm32` to `legacy_flash_ops`. * Rename `eeprom_teensy` to `eeprom_kinetis_flexram`. --- .../drivers/eeprom/eeprom_kinetis_flexram.c | 546 ++++++++++++++++++ .../drivers/eeprom/eeprom_kinetis_flexram.h | 25 + .../drivers/eeprom/eeprom_legacy_emulated_flash.c | 629 +++++++++++++++++++++ .../drivers/eeprom/eeprom_legacy_emulated_flash.h | 33 ++ .../eeprom/eeprom_legacy_emulated_flash_defs.h | 136 +++++ platforms/chibios/drivers/eeprom/eeprom_stm32.c | 629 --------------------- platforms/chibios/drivers/eeprom/eeprom_stm32.h | 33 -- .../chibios/drivers/eeprom/eeprom_stm32_defs.h | 136 ----- platforms/chibios/drivers/eeprom/eeprom_teensy.c | 546 ------------------ platforms/chibios/drivers/eeprom/eeprom_teensy.h | 25 - platforms/chibios/drivers/flash/flash_stm32.c | 208 ------- platforms/chibios/drivers/flash/flash_stm32.h | 44 -- platforms/chibios/drivers/flash/legacy_flash_ops.c | 208 +++++++ platforms/chibios/drivers/flash/legacy_flash_ops.h | 44 ++ .../drivers/wear_leveling/wear_leveling_legacy.c | 2 +- platforms/eeprom.h | 12 +- .../test/eeprom_legacy_emulated_flash_tests.cpp | 437 ++++++++++++++ .../test/eeprom_legacy_emulated_flash_tests.h | 8 + platforms/test/eeprom_stm32_tests.cpp | 437 -------------- platforms/test/eeprom_stm32_tests.h | 8 - platforms/test/flash_stm32_mock.c | 55 -- platforms/test/legacy_flash_ops_mock.c | 55 ++ platforms/test/rules.mk | 24 +- platforms/test/testlist.mk | 2 +- 24 files changed, 2141 insertions(+), 2141 deletions(-) create mode 100644 platforms/chibios/drivers/eeprom/eeprom_kinetis_flexram.c create mode 100755 platforms/chibios/drivers/eeprom/eeprom_kinetis_flexram.h create mode 100644 platforms/chibios/drivers/eeprom/eeprom_legacy_emulated_flash.c create mode 100644 platforms/chibios/drivers/eeprom/eeprom_legacy_emulated_flash.h create mode 100644 platforms/chibios/drivers/eeprom/eeprom_legacy_emulated_flash_defs.h delete mode 100644 platforms/chibios/drivers/eeprom/eeprom_stm32.c delete mode 100644 platforms/chibios/drivers/eeprom/eeprom_stm32.h delete mode 100644 platforms/chibios/drivers/eeprom/eeprom_stm32_defs.h delete mode 100644 platforms/chibios/drivers/eeprom/eeprom_teensy.c delete mode 100755 platforms/chibios/drivers/eeprom/eeprom_teensy.h delete mode 100644 platforms/chibios/drivers/flash/flash_stm32.c delete mode 100644 platforms/chibios/drivers/flash/flash_stm32.h create mode 100644 platforms/chibios/drivers/flash/legacy_flash_ops.c create mode 100644 platforms/chibios/drivers/flash/legacy_flash_ops.h create mode 100644 platforms/test/eeprom_legacy_emulated_flash_tests.cpp create mode 100644 platforms/test/eeprom_legacy_emulated_flash_tests.h delete mode 100644 platforms/test/eeprom_stm32_tests.cpp delete mode 100644 platforms/test/eeprom_stm32_tests.h delete mode 100644 platforms/test/flash_stm32_mock.c create mode 100644 platforms/test/legacy_flash_ops_mock.c (limited to 'platforms') diff --git a/platforms/chibios/drivers/eeprom/eeprom_kinetis_flexram.c b/platforms/chibios/drivers/eeprom/eeprom_kinetis_flexram.c new file mode 100644 index 0000000000..6468cbf3fa --- /dev/null +++ b/platforms/chibios/drivers/eeprom/eeprom_kinetis_flexram.c @@ -0,0 +1,546 @@ +#include +#include + +#include "eeprom_kinetis_flexram.h" +#include "eeconfig.h" + +/*************************************/ +/* Hardware backend */ +/* */ +/* Code from PJRC/Teensyduino */ +/*************************************/ + +/* Teensyduino Core Library + * http://www.pjrc.com/teensy/ + * Copyright (c) 2013 PJRC.COM, LLC. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * 1. The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * 2. If the Software is incorporated into a build system that allows + * selection among a list of target devices, then similar target + * devices manufactured by PJRC.COM must be included in the list of + * target devices and selectable in the same manner. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#if defined(K20x) /* chip selection */ +/* Teensy 3.0, 3.1, 3.2; mchck; infinity keyboard */ + +/* + ^^^ Here be dragons: + NXP AppNote AN4282 section 3.1 states that partitioning must only be done once. + Once EEPROM partitioning is done, the size is locked to this initial configuration. + Attempts to modify the EEPROM_SIZE setting may brick your board. +*/ + +// Writing unaligned 16 or 32 bit data is handled automatically when +// this is defined, but at a cost of extra code size. Without this, +// any unaligned write will cause a hard fault exception! If you're +// absolutely sure all 16 and 32 bit writes will be aligned, you can +// remove the extra unnecessary code. +// +# define HANDLE_UNALIGNED_WRITES + +// Minimum EEPROM Endurance +// ------------------------ +# if (EEPROM_SIZE == 2048) // 35000 writes/byte or 70000 writes/word +# define EEESIZE 0x33 +# elif (EEPROM_SIZE == 1024) // 75000 writes/byte or 150000 writes/word +# define EEESIZE 0x34 +# elif (EEPROM_SIZE == 512) // 155000 writes/byte or 310000 writes/word +# define EEESIZE 0x35 +# elif (EEPROM_SIZE == 256) // 315000 writes/byte or 630000 writes/word +# define EEESIZE 0x36 +# elif (EEPROM_SIZE == 128) // 635000 writes/byte or 1270000 writes/word +# define EEESIZE 0x37 +# elif (EEPROM_SIZE == 64) // 1275000 writes/byte or 2550000 writes/word +# define EEESIZE 0x38 +# elif (EEPROM_SIZE == 32) // 2555000 writes/byte or 5110000 writes/word +# define EEESIZE 0x39 +# endif + +/** \brief eeprom initialization + * + * FIXME: needs doc + */ +void eeprom_initialize(void) { + uint32_t count = 0; + uint16_t do_flash_cmd[] = {0xf06f, 0x037f, 0x7003, 0x7803, 0xf013, 0x0f80, 0xd0fb, 0x4770}; + uint8_t status; + + if (FTFL->FCNFG & FTFL_FCNFG_RAMRDY) { + // FlexRAM is configured as traditional RAM + // We need to reconfigure for EEPROM usage + FTFL->FCCOB0 = 0x80; // PGMPART = Program Partition Command + FTFL->FCCOB4 = EEESIZE; // EEPROM Size + FTFL->FCCOB5 = 0x03; // 0K for Dataflash, 32K for EEPROM backup + __disable_irq(); + // do_flash_cmd() must execute from RAM. Luckily the C syntax is simple... + (*((void (*)(volatile uint8_t *))((uint32_t)do_flash_cmd | 1)))(&(FTFL->FSTAT)); + __enable_irq(); + status = FTFL->FSTAT; + if (status & (FTFL_FSTAT_RDCOLERR | FTFL_FSTAT_ACCERR | FTFL_FSTAT_FPVIOL)) { + FTFL->FSTAT = (status & (FTFL_FSTAT_RDCOLERR | FTFL_FSTAT_ACCERR | FTFL_FSTAT_FPVIOL)); + return; // error + } + } + // wait for eeprom to become ready (is this really necessary?) + while (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) { + if (++count > 20000) break; + } +} + +# define FlexRAM ((uint8_t *)0x14000000) + +/** \brief eeprom read byte + * + * FIXME: needs doc + */ +uint8_t eeprom_read_byte(const uint8_t *addr) { + uint32_t offset = (uint32_t)addr; + if (offset >= EEPROM_SIZE) return 0; + if (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize(); + return FlexRAM[offset]; +} + +/** \brief eeprom read word + * + * FIXME: needs doc + */ +uint16_t eeprom_read_word(const uint16_t *addr) { + uint32_t offset = (uint32_t)addr; + if (offset >= EEPROM_SIZE - 1) return 0; + if (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize(); + return *(uint16_t *)(&FlexRAM[offset]); +} + +/** \brief eeprom read dword + * + * FIXME: needs doc + */ +uint32_t eeprom_read_dword(const uint32_t *addr) { + uint32_t offset = (uint32_t)addr; + if (offset >= EEPROM_SIZE - 3) return 0; + if (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize(); + return *(uint32_t *)(&FlexRAM[offset]); +} + +/** \brief eeprom read block + * + * FIXME: needs doc + */ +void eeprom_read_block(void *buf, const void *addr, uint32_t len) { + uint32_t offset = (uint32_t)addr; + uint8_t *dest = (uint8_t *)buf; + uint32_t end = offset + len; + + if (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize(); + if (end > EEPROM_SIZE) end = EEPROM_SIZE; + while (offset < end) { + *dest++ = FlexRAM[offset++]; + } +} + +/** \brief eeprom is ready + * + * FIXME: needs doc + */ +int eeprom_is_ready(void) { + return (FTFL->FCNFG & FTFL_FCNFG_EEERDY) ? 1 : 0; +} + +/** \brief flexram wait + * + * FIXME: needs doc + */ +static void flexram_wait(void) { + while (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) { + // TODO: timeout + } +} + +/** \brief eeprom_write_byte + * + * FIXME: needs doc + */ +void eeprom_write_byte(uint8_t *addr, uint8_t value) { + uint32_t offset = (uint32_t)addr; + + if (offset >= EEPROM_SIZE) return; + if (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize(); + if (FlexRAM[offset] != value) { + FlexRAM[offset] = value; + flexram_wait(); + } +} + +/** \brief eeprom write word + * + * FIXME: needs doc + */ +void eeprom_write_word(uint16_t *addr, uint16_t value) { + uint32_t offset = (uint32_t)addr; + + if (offset >= EEPROM_SIZE - 1) return; + if (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize(); +# ifdef HANDLE_UNALIGNED_WRITES + if ((offset & 1) == 0) { +# endif + if (*(uint16_t *)(&FlexRAM[offset]) != value) { + *(uint16_t *)(&FlexRAM[offset]) = value; + flexram_wait(); + } +# ifdef HANDLE_UNALIGNED_WRITES + } else { + if (FlexRAM[offset] != value) { + FlexRAM[offset] = value; + flexram_wait(); + } + if (FlexRAM[offset + 1] != (value >> 8)) { + FlexRAM[offset + 1] = value >> 8; + flexram_wait(); + } + } +# endif +} + +/** \brief eeprom write dword + * + * FIXME: needs doc + */ +void eeprom_write_dword(uint32_t *addr, uint32_t value) { + uint32_t offset = (uint32_t)addr; + + if (offset >= EEPROM_SIZE - 3) return; + if (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize(); +# ifdef HANDLE_UNALIGNED_WRITES + switch (offset & 3) { + case 0: +# endif + if (*(uint32_t *)(&FlexRAM[offset]) != value) { + *(uint32_t *)(&FlexRAM[offset]) = value; + flexram_wait(); + } + return; +# ifdef HANDLE_UNALIGNED_WRITES + case 2: + if (*(uint16_t *)(&FlexRAM[offset]) != value) { + *(uint16_t *)(&FlexRAM[offset]) = value; + flexram_wait(); + } + if (*(uint16_t *)(&FlexRAM[offset + 2]) != (value >> 16)) { + *(uint16_t *)(&FlexRAM[offset + 2]) = value >> 16; + flexram_wait(); + } + return; + default: + if (FlexRAM[offset] != value) { + FlexRAM[offset] = value; + flexram_wait(); + } + if (*(uint16_t *)(&FlexRAM[offset + 1]) != (value >> 8)) { + *(uint16_t *)(&FlexRAM[offset + 1]) = value >> 8; + flexram_wait(); + } + if (FlexRAM[offset + 3] != (value >> 24)) { + FlexRAM[offset + 3] = value >> 24; + flexram_wait(); + } + } +# endif +} + +/** \brief eeprom write block + * + * FIXME: needs doc + */ +void eeprom_write_block(const void *buf, void *addr, uint32_t len) { + uint32_t offset = (uint32_t)addr; + const uint8_t *src = (const uint8_t *)buf; + + if (offset >= EEPROM_SIZE) return; + if (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize(); + if (len >= EEPROM_SIZE) len = EEPROM_SIZE; + if (offset + len >= EEPROM_SIZE) len = EEPROM_SIZE - offset; + while (len > 0) { + uint32_t lsb = offset & 3; + if (lsb == 0 && len >= 4) { + // write aligned 32 bits + uint32_t val32; + val32 = *src++; + val32 |= (*src++ << 8); + val32 |= (*src++ << 16); + val32 |= (*src++ << 24); + if (*(uint32_t *)(&FlexRAM[offset]) != val32) { + *(uint32_t *)(&FlexRAM[offset]) = val32; + flexram_wait(); + } + offset += 4; + len -= 4; + } else if ((lsb == 0 || lsb == 2) && len >= 2) { + // write aligned 16 bits + uint16_t val16; + val16 = *src++; + val16 |= (*src++ << 8); + if (*(uint16_t *)(&FlexRAM[offset]) != val16) { + *(uint16_t *)(&FlexRAM[offset]) = val16; + flexram_wait(); + } + offset += 2; + len -= 2; + } else { + // write 8 bits + uint8_t val8 = *src++; + if (FlexRAM[offset] != val8) { + FlexRAM[offset] = val8; + flexram_wait(); + } + offset++; + len--; + } + } +} + +/* +void do_flash_cmd(volatile uint8_t *fstat) +{ + *fstat = 0x80; + while ((*fstat & 0x80) == 0) ; // wait +} +00000000 : + 0: f06f 037f mvn.w r3, #127 ; 0x7f + 4: 7003 strb r3, [r0, #0] + 6: 7803 ldrb r3, [r0, #0] + 8: f013 0f80 tst.w r3, #128 ; 0x80 + c: d0fb beq.n 6 + e: 4770 bx lr +*/ + +#elif defined(KL2x) /* chip selection */ +/* Teensy LC (emulated) */ + +# define SYMVAL(sym) (uint32_t)(((uint8_t *)&(sym)) - ((uint8_t *)0)) + +extern uint32_t __eeprom_workarea_start__; +extern uint32_t __eeprom_workarea_end__; + +static uint32_t flashend = 0; + +void eeprom_initialize(void) { + const uint16_t *p = (uint16_t *)SYMVAL(__eeprom_workarea_start__); + + do { + if (*p++ == 0xFFFF) { + flashend = (uint32_t)(p - 2); + return; + } + } while (p < (uint16_t *)SYMVAL(__eeprom_workarea_end__)); + flashend = (uint32_t)(p - 1); +} + +uint8_t eeprom_read_byte(const uint8_t *addr) { + uint32_t offset = (uint32_t)addr; + const uint16_t *p = (uint16_t *)SYMVAL(__eeprom_workarea_start__); + const uint16_t *end = (const uint16_t *)((uint32_t)flashend); + uint16_t val; + uint8_t data = 0xFF; + + if (!end) { + eeprom_initialize(); + end = (const uint16_t *)((uint32_t)flashend); + } + if (offset < EEPROM_SIZE) { + while (p <= end) { + val = *p++; + if ((val & 255) == offset) data = val >> 8; + } + } + return data; +} + +static void flash_write(const uint16_t *code, uint32_t addr, uint32_t data) { + // with great power comes great responsibility.... + uint32_t stat; + *(uint32_t *)&(FTFA->FCCOB3) = 0x06000000 | (addr & 0x00FFFFFC); + *(uint32_t *)&(FTFA->FCCOB7) = data; + __disable_irq(); + (*((void (*)(volatile uint8_t *))((uint32_t)code | 1)))(&(FTFA->FSTAT)); + __enable_irq(); + stat = FTFA->FSTAT & (FTFA_FSTAT_RDCOLERR | FTFA_FSTAT_ACCERR | FTFA_FSTAT_FPVIOL); + if (stat) { + FTFA->FSTAT = stat; + } + MCM->PLACR |= MCM_PLACR_CFCC; +} + +void eeprom_write_byte(uint8_t *addr, uint8_t data) { + uint32_t offset = (uint32_t)addr; + const uint16_t *p, *end = (const uint16_t *)((uint32_t)flashend); + uint32_t i, val, flashaddr; + uint16_t do_flash_cmd[] = {0x2380, 0x7003, 0x7803, 0xb25b, 0x2b00, 0xdafb, 0x4770}; + uint8_t buf[EEPROM_SIZE]; + + if (offset >= EEPROM_SIZE) return; + if (!end) { + eeprom_initialize(); + end = (const uint16_t *)((uint32_t)flashend); + } + if (++end < (uint16_t *)SYMVAL(__eeprom_workarea_end__)) { + val = (data << 8) | offset; + flashaddr = (uint32_t)end; + flashend = flashaddr; + if ((flashaddr & 2) == 0) { + val |= 0xFFFF0000; + } else { + val <<= 16; + val |= 0x0000FFFF; + } + flash_write(do_flash_cmd, flashaddr, val); + } else { + for (i = 0; i < EEPROM_SIZE; i++) { + buf[i] = 0xFF; + } + val = 0; + for (p = (uint16_t *)SYMVAL(__eeprom_workarea_start__); p < (uint16_t *)SYMVAL(__eeprom_workarea_end__); p++) { + val = *p; + if ((val & 255) < EEPROM_SIZE) { + buf[val & 255] = val >> 8; + } + } + buf[offset] = data; + for (flashaddr = (uint32_t)(uint16_t *)SYMVAL(__eeprom_workarea_start__); flashaddr < (uint32_t)(uint16_t *)SYMVAL(__eeprom_workarea_end__); flashaddr += 1024) { + *(uint32_t *)&(FTFA->FCCOB3) = 0x09000000 | flashaddr; + __disable_irq(); + (*((void (*)(volatile uint8_t *))((uint32_t)do_flash_cmd | 1)))(&(FTFA->FSTAT)); + __enable_irq(); + val = FTFA->FSTAT & (FTFA_FSTAT_RDCOLERR | FTFA_FSTAT_ACCERR | FTFA_FSTAT_FPVIOL); + ; + if (val) FTFA->FSTAT = val; + MCM->PLACR |= MCM_PLACR_CFCC; + } + flashaddr = (uint32_t)(uint16_t *)SYMVAL(__eeprom_workarea_start__); + for (i = 0; i < EEPROM_SIZE; i++) { + if (buf[i] == 0xFF) continue; + if ((flashaddr & 2) == 0) { + val = (buf[i] << 8) | i; + } else { + val = val | (buf[i] << 24) | (i << 16); + flash_write(do_flash_cmd, flashaddr, val); + } + flashaddr += 2; + } + flashend = flashaddr; + if ((flashaddr & 2)) { + val |= 0xFFFF0000; + flash_write(do_flash_cmd, flashaddr, val); + } + } +} + +/* +void do_flash_cmd(volatile uint8_t *fstat) +{ + *fstat = 0x80; + while ((*fstat & 0x80) == 0) ; // wait +} +00000000 : + 0: 2380 movs r3, #128 ; 0x80 + 2: 7003 strb r3, [r0, #0] + 4: 7803 ldrb r3, [r0, #0] + 6: b25b sxtb r3, r3 + 8: 2b00 cmp r3, #0 + a: dafb bge.n 4 + c: 4770 bx lr +*/ + +uint16_t eeprom_read_word(const uint16_t *addr) { + const uint8_t *p = (const uint8_t *)addr; + return eeprom_read_byte(p) | (eeprom_read_byte(p + 1) << 8); +} + +uint32_t eeprom_read_dword(const uint32_t *addr) { + const uint8_t *p = (const uint8_t *)addr; + return eeprom_read_byte(p) | (eeprom_read_byte(p + 1) << 8) | (eeprom_read_byte(p + 2) << 16) | (eeprom_read_byte(p + 3) << 24); +} + +void eeprom_read_block(void *buf, const void *addr, uint32_t len) { + const uint8_t *p = (const uint8_t *)addr; + uint8_t * dest = (uint8_t *)buf; + while (len--) { + *dest++ = eeprom_read_byte(p++); + } +} + +int eeprom_is_ready(void) { + return 1; +} + +void eeprom_write_word(uint16_t *addr, uint16_t value) { + uint8_t *p = (uint8_t *)addr; + eeprom_write_byte(p++, value); + eeprom_write_byte(p, value >> 8); +} + +void eeprom_write_dword(uint32_t *addr, uint32_t value) { + uint8_t *p = (uint8_t *)addr; + eeprom_write_byte(p++, value); + eeprom_write_byte(p++, value >> 8); + eeprom_write_byte(p++, value >> 16); + eeprom_write_byte(p, value >> 24); +} + +void eeprom_write_block(const void *buf, void *addr, uint32_t len) { + uint8_t * p = (uint8_t *)addr; + const uint8_t *src = (const uint8_t *)buf; + while (len--) { + eeprom_write_byte(p++, *src++); + } +} + +#else +# error Unsupported Teensy EEPROM. +#endif /* chip selection */ +// The update functions just calls write for now, but could probably be optimized + +void eeprom_update_byte(uint8_t *addr, uint8_t value) { + eeprom_write_byte(addr, value); +} + +void eeprom_update_word(uint16_t *addr, uint16_t value) { + uint8_t *p = (uint8_t *)addr; + eeprom_write_byte(p++, value); + eeprom_write_byte(p, value >> 8); +} + +void eeprom_update_dword(uint32_t *addr, uint32_t value) { + uint8_t *p = (uint8_t *)addr; + eeprom_write_byte(p++, value); + eeprom_write_byte(p++, value >> 8); + eeprom_write_byte(p++, value >> 16); + eeprom_write_byte(p, value >> 24); +} + +void eeprom_update_block(const void *buf, void *addr, size_t len) { + uint8_t * p = (uint8_t *)addr; + const uint8_t *src = (const uint8_t *)buf; + while (len--) { + eeprom_write_byte(p++, *src++); + } +} diff --git a/platforms/chibios/drivers/eeprom/eeprom_kinetis_flexram.h b/platforms/chibios/drivers/eeprom/eeprom_kinetis_flexram.h new file mode 100755 index 0000000000..9a14a1fa79 --- /dev/null +++ b/platforms/chibios/drivers/eeprom/eeprom_kinetis_flexram.h @@ -0,0 +1,25 @@ +// Copyright 2022 Nick Brassel (@tzarc) +// SPDX-License-Identifier: GPL-2.0-or-later +#pragma once + +#include +#include + +#if defined(K20x) +/* Teensy 3.0, 3.1, 3.2; mchck; infinity keyboard */ +// The EEPROM is really RAM with a hardware-based backup system to +// flash memory. Selecting a smaller size EEPROM allows more wear +// leveling, for higher write endurance. If you edit this file, +// set this to the smallest size your application can use. Also, +// due to Freescale's implementation, writing 16 or 32 bit words +// (aligned to 2 or 4 byte boundaries) has twice the endurance +// compared to writing 8 bit bytes. +// +# ifndef EEPROM_SIZE +# define EEPROM_SIZE 32 +# endif +#elif defined(KL2x) /* Teensy LC (emulated) */ +# define EEPROM_SIZE 128 +#else +# error Unsupported Teensy EEPROM. +#endif diff --git a/platforms/chibios/drivers/eeprom/eeprom_legacy_emulated_flash.c b/platforms/chibios/drivers/eeprom/eeprom_legacy_emulated_flash.c new file mode 100644 index 0000000000..a81fe3353c --- /dev/null +++ b/platforms/chibios/drivers/eeprom/eeprom_legacy_emulated_flash.c @@ -0,0 +1,629 @@ +/* + * This software is experimental and a work in progress. + * Under no circumstances should these files be used in relation to any critical system(s). + * Use of these files is at your own risk. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, + * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR + * PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * This files are free to use from http://engsta.com/stm32-flash-memory-eeprom-emulator/ by + * Artur F. + * + * Modifications for QMK and STM32F303 by Yiancar + * Modifications to add flash wear leveling by Ilya Zhuravlev + * Modifications to increase flash density by Don Kjer + */ + +#include +#include +#include "util.h" +#include "debug.h" +#include "eeprom_legacy_emulated_flash.h" +#include "legacy_flash_ops.h" + +/* + * We emulate eeprom by writing a snapshot compacted view of eeprom contents, + * followed by a write log of any change since that snapshot: + * + * === SIMULATED EEPROM CONTENTS === + * + * ┌─ Compacted ┬ Write Log ─┐ + * │............│[BYTE][BYTE]│ + * │FFFF....FFFF│[WRD0][WRD1]│ + * │FFFFFFFFFFFF│[WORD][NEXT]│ + * │....FFFFFFFF│[BYTE][WRD0]│ + * ├────────────┼────────────┤ + * └──PAGE_BASE │ │ + * PAGE_LAST─┴─WRITE_BASE │ + * WRITE_LAST ┘ + * + * Compacted contents are the 1's complement of the actual EEPROM contents. + * e.g. An 'FFFF' represents a '0000' value. + * + * The size of the 'compacted' area is equal to the size of the 'emulated' eeprom. + * The size of the compacted-area and write log are configurable, and the combined + * size of Compacted + WriteLog is a multiple FEE_PAGE_SIZE, which is MCU dependent. + * Simulated Eeprom contents are located at the end of available flash space. + * + * The following configuration defines can be set: + * + * FEE_PAGE_COUNT # Total number of pages to use for eeprom simulation (Compact + Write log) + * FEE_DENSITY_BYTES # Size of simulated eeprom. (Defaults to half the space allocated by FEE_PAGE_COUNT) + * NOTE: The current implementation does not include page swapping, + * and FEE_DENSITY_BYTES will consume that amount of RAM as a cached view of actual EEPROM contents. + * + * The maximum size of FEE_DENSITY_BYTES is currently 16384. The write log size equals + * FEE_PAGE_COUNT * FEE_PAGE_SIZE - FEE_DENSITY_BYTES. + * The larger the write log, the less frequently the compacted area needs to be rewritten. + * + * + * *** General Algorithm *** + * + * During initialization: + * The contents of the Compacted-flash area are loaded and the 1's complement value + * is cached into memory (e.g. 0xFFFF in Flash represents 0x0000 in cache). + * Write log entries are processed until a 0xFFFF is reached. + * Each log entry updates a byte or word in the cache. + * + * During reads: + * EEPROM contents are given back directly from the cache in memory. + * + * During writes: + * The contents of the cache is updated first. + * If the Compacted-flash area corresponding to the write address is unprogrammed, the 1's complement of the value is written directly into Compacted-flash + * Otherwise: + * If the write log is full, erase both the Compacted-flash area and the Write log, then write cached contents to the Compacted-flash area. + * Otherwise a Write log entry is constructed and appended to the next free position in the Write log. + * + * + * *** Write Log Structure *** + * + * Write log entries allow for optimized byte writes to addresses below 128. Writing 0 or 1 words are also optimized when word-aligned. + * + * === WRITE LOG ENTRY FORMATS === + * + * ╔═══ Byte-Entry ══╗ + * ║0XXXXXXX║YYYYYYYY║ + * ║ └──┬──┘║└──┬───┘║ + * ║ Address║ Value ║ + * ╚════════╩════════╝ + * 0 <= Address < 0x80 (128) + * + * ╔ Word-Encoded 0 ╗ + * ║100XXXXXXXXXXXXX║ + * ║ │└─────┬─────┘║ + * ║ │Address >> 1 ║ + * ║ └── Value: 0 ║ + * ╚════════════════╝ + * 0 <= Address <= 0x3FFE (16382) + * + * ╔ Word-Encoded 1 ╗ + * ║101XXXXXXXXXXXXX║ + * ║ │└─────┬─────┘║ + * ║ │Address >> 1 ║ + * ║ └── Value: 1 ║ + * ╚════════════════╝ + * 0 <= Address <= 0x3FFE (16382) + * + * ╔═══ Reserved ═══╗ + * ║110XXXXXXXXXXXXX║ + * ╚════════════════╝ + * + * ╔═══════════ Word-Next ═══════════╗ + * ║111XXXXXXXXXXXXX║YYYYYYYYYYYYYYYY║ + * ║ └─────┬─────┘║└───────┬──────┘║ + * ║(Address-128)>>1║ ~Value ║ + * ╚════════════════╩════════════════╝ + * ( 0 <= Address < 0x0080 (128): Reserved) + * 0x80 <= Address <= 0x3FFE (16382) + * + * Write Log entry ranges: + * 0x0000 ... 0x7FFF - Byte-Entry; address is (Entry & 0x7F00) >> 4; value is (Entry & 0xFF) + * 0x8000 ... 0x9FFF - Word-Encoded 0; address is (Entry & 0x1FFF) << 1; value is 0 + * 0xA000 ... 0xBFFF - Word-Encoded 1; address is (Entry & 0x1FFF) << 1; value is 1 + * 0xC000 ... 0xDFFF - Reserved + * 0xE000 ... 0xFFBF - Word-Next; address is (Entry & 0x1FFF) << 1 + 0x80; value is ~(Next_Entry) + * 0xFFC0 ... 0xFFFE - Reserved + * 0xFFFF - Unprogrammed + * + */ + +#include "eeprom_legacy_emulated_flash_defs.h" +/* These bits are used for optimizing encoding of bytes, 0 and 1 */ +#define FEE_WORD_ENCODING 0x8000 +#define FEE_VALUE_NEXT 0x6000 +#define FEE_VALUE_RESERVED 0x4000 +#define FEE_VALUE_ENCODED 0x2000 +#define FEE_BYTE_RANGE 0x80 + +/* Flash word value after erase */ +#define FEE_EMPTY_WORD ((uint16_t)0xFFFF) + +#if !defined(FEE_PAGE_SIZE) || !defined(FEE_PAGE_COUNT) || !defined(FEE_MCU_FLASH_SIZE) || !defined(FEE_PAGE_BASE_ADDRESS) +# error "not implemented." +#endif + +/* In-memory contents of emulated eeprom for faster access */ +/* *TODO: Implement page swapping */ +static uint16_t WordBuf[FEE_DENSITY_BYTES / 2]; +static uint8_t *DataBuf = (uint8_t *)WordBuf; + +/* Pointer to the first available slot within the write log */ +static uint16_t *empty_slot; + +// #define DEBUG_EEPROM_OUTPUT + +/* + * Debug print utils + */ + +#if defined(DEBUG_EEPROM_OUTPUT) + +# define debug_eeprom debug_enable +# define eeprom_println(s) println(s) +# define eeprom_printf(fmt, ...) xprintf(fmt, ##__VA_ARGS__); + +#else /* NO_DEBUG */ + +# define debug_eeprom false +# define eeprom_println(s) +# define eeprom_printf(fmt, ...) + +#endif /* NO_DEBUG */ + +void print_eeprom(void) { +#ifndef NO_DEBUG + int empty_rows = 0; + for (uint16_t i = 0; i < FEE_DENSITY_BYTES; i++) { + if (i % 16 == 0) { + if (i >= FEE_DENSITY_BYTES - 16) { + /* Make sure we display the last row */ + empty_rows = 0; + } + /* Check if this row is uninitialized */ + ++empty_rows; + for (uint16_t j = 0; j < 16; j++) { + if (DataBuf[i + j]) { + empty_rows = 0; + break; + } + } + if (empty_rows > 1) { + /* Repeat empty row */ + if (empty_rows == 2) { + /* Only display the first repeat empty row */ + println("*"); + } + i += 15; + continue; + } + xprintf("%04x", i); + } + if (i % 8 == 0) print(" "); + + xprintf(" %02x", DataBuf[i]); + if ((i + 1) % 16 == 0) { + println(""); + } + } +#endif +} + +uint16_t EEPROM_Init(void) { + /* Load emulated eeprom contents from compacted flash into memory */ + uint16_t *src = (uint16_t *)FEE_COMPACTED_BASE_ADDRESS; + uint16_t *dest = (uint16_t *)DataBuf; + for (; src < (uint16_t *)FEE_COMPACTED_LAST_ADDRESS; ++src, ++dest) { + *dest = ~*src; + } + + if (debug_eeprom) { + println("EEPROM_Init Compacted Pages:"); + print_eeprom(); + println("EEPROM_Init Write Log:"); + } + + /* Replay write log */ + uint16_t *log_addr; + for (log_addr = (uint16_t *)FEE_WRITE_LOG_BASE_ADDRESS; log_addr < (uint16_t *)FEE_WRITE_LOG_LAST_ADDRESS; ++log_addr) { + uint16_t address = *log_addr; + if (address == FEE_EMPTY_WORD) { + break; + } + /* Check for lowest 128-bytes optimization */ + if (!(address & FEE_WORD_ENCODING)) { + uint8_t bvalue = (uint8_t)address; + address >>= 8; + DataBuf[address] = bvalue; + eeprom_printf("DataBuf[0x%02x] = 0x%02x;\n", address, bvalue); + } else { + uint16_t wvalue; + /* Check if value is in next word */ + if ((address & FEE_VALUE_NEXT) == FEE_VALUE_NEXT) { + /* Read value from next word */ + if (++log_addr >= (uint16_t *)FEE_WRITE_LOG_LAST_ADDRESS) { + break; + } + wvalue = ~*log_addr; + if (!wvalue) { + eeprom_printf("Incomplete write at log_addr: 0x%04lx;\n", (uint32_t)log_addr); + /* Possibly incomplete write. Ignore and continue */ + continue; + } + address &= 0x1FFF; + address <<= 1; + /* Writes to addresses less than 128 are byte log entries */ + address += FEE_BYTE_RANGE; + } else { + /* Reserved for future use */ + if (address & FEE_VALUE_RESERVED) { + eeprom_printf("Reserved encoded value at log_addr: 0x%04lx;\n", (uint32_t)log_addr); + continue; + } + /* Optimization for 0 or 1 values. */ + wvalue = (address & FEE_VALUE_ENCODED) >> 13; + address &= 0x1FFF; + address <<= 1; + } + if (address < FEE_DENSITY_BYTES) { + eeprom_printf("DataBuf[0x%04x] = 0x%04x;\n", address, wvalue); + *(uint16_t *)(&DataBuf[address]) = wvalue; + } else { + eeprom_printf("DataBuf[0x%04x] cannot be set to 0x%04x [BAD ADDRESS]\n", address, wvalue); + } + } + } + + empty_slot = log_addr; + + if (debug_eeprom) { + println("EEPROM_Init Final DataBuf:"); + print_eeprom(); + } + + return FEE_DENSITY_BYTES; +} + +/* Clear flash contents (doesn't touch in-memory DataBuf) */ +static void eeprom_clear(void) { + FLASH_Unlock(); + + for (uint16_t page_num = 0; page_num < FEE_PAGE_COUNT; ++page_num) { + eeprom_printf("FLASH_ErasePage(0x%04lx)\n", (uint32_t)(FEE_PAGE_BASE_ADDRESS + (page_num * FEE_PAGE_SIZE))); + FLASH_ErasePage(FEE_PAGE_BASE_ADDRESS + (page_num * FEE_PAGE_SIZE)); + } + + FLASH_Lock(); + + empty_slot = (uint16_t *)FEE_WRITE_LOG_BASE_ADDRESS; + eeprom_printf("eeprom_clear empty_slot: 0x%08lx\n", (uint32_t)empty_slot); +} + +/* Erase emulated eeprom */ +void EEPROM_Erase(void) { + eeprom_println("EEPROM_Erase"); + /* Erase compacted pages and write log */ + eeprom_clear(); + /* re-initialize to reset DataBuf */ + EEPROM_Init(); +} + +/* Compact write log */ +static uint8_t eeprom_compact(void) { + /* Erase compacted pages and write log */ + eeprom_clear(); + + FLASH_Unlock(); + + FLASH_Status final_status = FLASH_COMPLETE; + + /* Write emulated eeprom contents from memory to compacted flash */ + uint16_t *src = (uint16_t *)DataBuf; + uintptr_t dest = FEE_COMPACTED_BASE_ADDRESS; + uint16_t value; + for (; dest < FEE_COMPACTED_LAST_ADDRESS; ++src, dest += 2) { + value = *src; + if (value) { + eeprom_printf("FLASH_ProgramHalfWord(0x%04lx, 0x%04x)\n", (uint32_t)dest, ~value); + FLASH_Status status = FLASH_ProgramHalfWord(dest, ~value); + if (status != FLASH_COMPLETE) final_status = status; + } + } + + FLASH_Lock(); + + if (debug_eeprom) { + println("eeprom_compacted:"); + print_eeprom(); + } + + return final_status; +} + +static uint8_t eeprom_write_direct_entry(uint16_t Address) { + /* Check if we can just write this directly to the compacted flash area */ + uintptr_t directAddress = FEE_COMPACTED_BASE_ADDRESS + (Address & 0xFFFE); + if (*(uint16_t *)directAddress == FEE_EMPTY_WORD) { + /* Write the value directly to the compacted area without a log entry */ + uint16_t value = ~*(uint16_t *)(&DataBuf[Address & 0xFFFE]); + /* Early exit if a write isn't needed */ + if (value == FEE_EMPTY_WORD) return FLASH_COMPLETE; + + FLASH_Unlock(); + + eeprom_printf("FLASH_ProgramHalfWord(0x%08lx, 0x%04x) [DIRECT]\n", (uint32_t)directAddress, value); + FLASH_Status status = FLASH_ProgramHalfWord(directAddress, value); + + FLASH_Lock(); + return status; + } + return 0; +} + +static uint8_t eeprom_write_log_word_entry(uint16_t Address) { + FLASH_Status final_status = FLASH_COMPLETE; + + uint16_t value = *(uint16_t *)(&DataBuf[Address]); + eeprom_printf("eeprom_write_log_word_entry(0x%04x): 0x%04x\n", Address, value); + + /* MSB signifies the lowest 128-byte optimization is not in effect */ + uint16_t encoding = FEE_WORD_ENCODING; + uint8_t entry_size; + if (value <= 1) { + encoding |= value << 13; + entry_size = 2; + } else { + encoding |= FEE_VALUE_NEXT; + entry_size = 4; + /* Writes to addresses less than 128 are byte log entries */ + Address -= FEE_BYTE_RANGE; + } + + /* if we can't find an empty spot, we must compact emulated eeprom */ + if (empty_slot > (uint16_t *)(FEE_WRITE_LOG_LAST_ADDRESS - entry_size)) { + /* compact the write log into the compacted flash area */ + return eeprom_compact(); + } + + /* Word log writes should be word-aligned. Take back a bit */ + Address >>= 1; + Address |= encoding; + + /* ok we found a place let's write our data */ + FLASH_Unlock(); + + /* address */ + eeprom_printf("FLASH_ProgramHalfWord(0x%08lx, 0x%04x)\n", (uint32_t)empty_slot, Address); + final_status = FLASH_ProgramHalfWord((uintptr_t)empty_slot++, Address); + + /* value */ + if (encoding == (FEE_WORD_ENCODING | FEE_VALUE_NEXT)) { + eeprom_printf("FLASH_ProgramHalfWord(0x%08lx, 0x%04x)\n", (uint32_t)empty_slot, ~value); + FLASH_Status status = FLASH_ProgramHalfWord((uintptr_t)empty_slot++, ~value); + if (status != FLASH_COMPLETE) final_status = status; + } + + FLASH_Lock(); + + return final_status; +} + +static uint8_t eeprom_write_log_byte_entry(uint16_t Address) { + eeprom_printf("eeprom_write_log_byte_entry(0x%04x): 0x%02x\n", Address, DataBuf[Address]); + + /* if couldn't find an empty spot, we must compact emulated eeprom */ + if (empty_slot >= (uint16_t *)FEE_WRITE_LOG_LAST_ADDRESS) { + /* compact the write log into the compacted flash area */ + return eeprom_compact(); + } + + /* ok we found a place let's write our data */ + FLASH_Unlock(); + + /* Pack address and value into the same word */ + uint16_t value = (Address << 8) | DataBuf[Address]; + + /* write to flash */ + eeprom_printf("FLASH_ProgramHalfWord(0x%08lx, 0x%04x)\n", (uint32_t)empty_slot, value); + FLASH_Status status = FLASH_ProgramHalfWord((uintptr_t)empty_slot++, value); + + FLASH_Lock(); + + return status; +} + +uint8_t EEPROM_WriteDataByte(uint16_t Address, uint8_t DataByte) { + /* if the address is out-of-bounds, do nothing */ + if (Address >= FEE_DENSITY_BYTES) { + eeprom_printf("EEPROM_WriteDataByte(0x%04x, 0x%02x) [BAD ADDRESS]\n", Address, DataByte); + return FLASH_BAD_ADDRESS; + } + + /* if the value is the same, don't bother writing it */ + if (DataBuf[Address] == DataByte) { + eeprom_printf("EEPROM_WriteDataByte(0x%04x, 0x%02x) [SKIP SAME]\n", Address, DataByte); + return 0; + } + + /* keep DataBuf cache in sync */ + DataBuf[Address] = DataByte; + eeprom_printf("EEPROM_WriteDataByte DataBuf[0x%04x] = 0x%02x\n", Address, DataBuf[Address]); + + /* perform the write into flash memory */ + /* First, attempt to write directly into the compacted flash area */ + FLASH_Status status = eeprom_write_direct_entry(Address); + if (!status) { + /* Otherwise append to the write log */ + if (Address < FEE_BYTE_RANGE) { + status = eeprom_write_log_byte_entry(Address); + } else { + status = eeprom_write_log_word_entry(Address & 0xFFFE); + } + } + if (status != 0 && status != FLASH_COMPLETE) { + eeprom_printf("EEPROM_WriteDataByte [STATUS == %d]\n", status); + } + return status; +} + +uint8_t EEPROM_WriteDataWord(uint16_t Address, uint16_t DataWord) { + /* if the address is out-of-bounds, do nothing */ + if (Address >= FEE_DENSITY_BYTES) { + eeprom_printf("EEPROM_WriteDataWord(0x%04x, 0x%04x) [BAD ADDRESS]\n", Address, DataWord); + return FLASH_BAD_ADDRESS; + } + + /* Check for word alignment */ + FLASH_Status final_status = FLASH_COMPLETE; + if (Address % 2) { + final_status = EEPROM_WriteDataByte(Address, DataWord); + FLASH_Status status = EEPROM_WriteDataByte(Address + 1, DataWord >> 8); + if (status != FLASH_COMPLETE) final_status = status; + if (final_status != 0 && final_status != FLASH_COMPLETE) { + eeprom_printf("EEPROM_WriteDataWord [STATUS == %d]\n", final_status); + } + return final_status; + } + + /* if the value is the same, don't bother writing it */ + uint16_t oldValue = *(uint16_t *)(&DataBuf[Address]); + if (oldValue == DataWord) { + eeprom_printf("EEPROM_WriteDataWord(0x%04x, 0x%04x) [SKIP SAME]\n", Address, DataWord); + return 0; + } + + /* keep DataBuf cache in sync */ + *(uint16_t *)(&DataBuf[Address]) = DataWord; + eeprom_printf("EEPROM_WriteDataWord DataBuf[0x%04x] = 0x%04x\n", Address, *(uint16_t *)(&DataBuf[Address])); + + /* perform the write into flash memory */ + /* First, attempt to write directly into the compacted flash area */ + final_status = eeprom_write_direct_entry(Address); + if (!final_status) { + /* Otherwise append to the write log */ + /* Check if we need to fall back to byte write */ + if (Address < FEE_BYTE_RANGE) { + final_status = FLASH_COMPLETE; + /* Only write a byte if it has changed */ + if ((uint8_t)oldValue != (uint8_t)DataWord) { + final_status = eeprom_write_log_byte_entry(Address); + } + FLASH_Status status = FLASH_COMPLETE; + /* Only write a byte if it has changed */ + if ((oldValue >> 8) != (DataWord >> 8)) { + status = eeprom_write_log_byte_entry(Address + 1); + } + if (status != FLASH_COMPLETE) final_status = status; + } else { + final_status = eeprom_write_log_word_entry(Address); + } + } + if (final_status != 0 && final_status != FLASH_COMPLETE) { + eeprom_printf("EEPROM_WriteDataWord [STATUS == %d]\n", final_status); + } + return final_status; +} + +uint8_t EEPROM_ReadDataByte(uint16_t Address) { + uint8_t DataByte = 0xFF; + + if (Address < FEE_DENSITY_BYTES) { + DataByte = DataBuf[Address]; + } + + eeprom_printf("EEPROM_ReadDataByte(0x%04x): 0x%02x\n", Address, DataByte); + + return DataByte; +} + +uint16_t EEPROM_ReadDataWord(uint16_t Address) { + uint16_t DataWord = 0xFFFF; + + if (Address < FEE_DENSITY_BYTES - 1) { + /* Check word alignment */ + if (Address % 2) { + DataWord = DataBuf[Address] | (DataBuf[Address + 1] << 8); + } else { + DataWord = *(uint16_t *)(&DataBuf[Address]); + } + } + + eeprom_printf("EEPROM_ReadDataWord(0x%04x): 0x%04x\n", Address, DataWord); + + return DataWord; +} + +/***************************************************************************** + * Bind to eeprom_driver.c + *******************************************************************************/ +void eeprom_driver_init(void) { + EEPROM_Init(); +} + +void eeprom_driver_erase(void) { + EEPROM_Erase(); +} + +void eeprom_read_block(void *buf, const void *addr, size_t len) { + const uint8_t *src = (const uint8_t *)addr; + uint8_t * dest = (uint8_t *)buf; + + /* Check word alignment */ + if (len && (uintptr_t)src % 2) { + /* Read the unaligned first byte */ + *dest++ = EEPROM_ReadDataByte((const uintptr_t)src++); + --len; + } + + uint16_t value; + bool aligned = ((uintptr_t)dest % 2 == 0); + while (len > 1) { + value = EEPROM_ReadDataWord((const uintptr_t)((uint16_t *)src)); + if (aligned) { + *(uint16_t *)dest = value; + dest += 2; + } else { + *dest++ = value; + *dest++ = value >> 8; + } + src += 2; + len -= 2; + } + if (len) { + *dest = EEPROM_ReadDataByte((const uintptr_t)src); + } +} + +void eeprom_write_block(const void *buf, void *addr, size_t len) { + uint8_t * dest = (uint8_t *)addr; + const uint8_t *src = (const uint8_t *)buf; + + /* Check word alignment */ + if (len && (uintptr_t)dest % 2) { + /* Write the unaligned first byte */ + EEPROM_WriteDataByte((uintptr_t)dest++, *src++); + --len; + } + + uint16_t value; + bool aligned = ((uintptr_t)src % 2 == 0); + while (len > 1) { + if (aligned) { + value = *(uint16_t *)src; + } else { + value = *(uint8_t *)src | (*(uint8_t *)(src + 1) << 8); + } + EEPROM_WriteDataWord((uintptr_t)((uint16_t *)dest), value); + dest += 2; + src += 2; + len -= 2; + } + + if (len) { + EEPROM_WriteDataByte((uintptr_t)dest, *src); + } +} diff --git a/platforms/chibios/drivers/eeprom/eeprom_legacy_emulated_flash.h b/platforms/chibios/drivers/eeprom/eeprom_legacy_emulated_flash.h new file mode 100644 index 0000000000..8fcfb556b8 --- /dev/null +++ b/platforms/chibios/drivers/eeprom/eeprom_legacy_emulated_flash.h @@ -0,0 +1,33 @@ +/* + * This software is experimental and a work in progress. + * Under no circumstances should these files be used in relation to any critical system(s). + * Use of these files is at your own risk. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, + * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR + * PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * This files are free to use from http://engsta.com/stm32-flash-memory-eeprom-emulator/ by + * Artur F. + * + * Modifications for QMK and STM32F303 by Yiancar + * + * This library assumes 8-bit data locations. To add a new MCU, please provide the flash + * page size and the total flash size in Kb. The number of available pages must be a multiple + * of 2. Only half of the pages account for the total EEPROM size. + * This library also assumes that the pages are not used by the firmware. + */ + +#pragma once + +uint16_t EEPROM_Init(void); +void EEPROM_Erase(void); +uint8_t EEPROM_WriteDataByte(uint16_t Address, uint8_t DataByte); +uint8_t EEPROM_WriteDataWord(uint16_t Address, uint16_t DataWord); +uint8_t EEPROM_ReadDataByte(uint16_t Address); +uint16_t EEPROM_ReadDataWord(uint16_t Address); + +void print_eeprom(void); diff --git a/platforms/chibios/drivers/eeprom/eeprom_legacy_emulated_flash_defs.h b/platforms/chibios/drivers/eeprom/eeprom_legacy_emulated_flash_defs.h new file mode 100644 index 0000000000..57d0440330 --- /dev/null +++ b/platforms/chibios/drivers/eeprom/eeprom_legacy_emulated_flash_defs.h @@ -0,0 +1,136 @@ +/* Copyright 2021 QMK + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#pragma once + +#include + +#if !defined(FEE_PAGE_SIZE) || !defined(FEE_PAGE_COUNT) +# if defined(STM32F103xB) || defined(STM32F042x6) || defined(GD32VF103C8) || defined(GD32VF103CB) +# ifndef FEE_PAGE_SIZE +# define FEE_PAGE_SIZE 0x400 // Page size = 1KByte +# endif +# ifndef FEE_PAGE_COUNT +# define FEE_PAGE_COUNT 2 // How many pages are used +# endif +# elif defined(STM32F103xE) || defined(STM32F303xC) || defined(STM32F303xE) || defined(STM32F072xB) || defined(STM32F070xB) +# ifndef FEE_PAGE_SIZE +# define FEE_PAGE_SIZE 0x800 // Page size = 2KByte +# endif +# ifndef FEE_PAGE_COUNT +# define FEE_PAGE_COUNT 4 // How many pages are used +# endif +# elif defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F405xG) || defined(STM32F411xE) +# ifndef FEE_PAGE_SIZE +# define FEE_PAGE_SIZE 0x4000 // Page size = 16KByte +# endif +# ifndef FEE_PAGE_COUNT +# define FEE_PAGE_COUNT 1 // How many pages are used +# endif +# endif +#endif + +#if !defined(FEE_MCU_FLASH_SIZE) +# if defined(STM32F042x6) +# define FEE_MCU_FLASH_SIZE 32 // Size in Kb +# elif defined(GD32VF103C8) +# define FEE_MCU_FLASH_SIZE 64 // Size in Kb +# elif defined(STM32F103xB) || defined(STM32F072xB) || defined(STM32F070xB) || defined(GD32VF103CB) +# define FEE_MCU_FLASH_SIZE 128 // Size in Kb +# elif defined(STM32F303xC) || defined(STM32F401xC) +# define FEE_MCU_FLASH_SIZE 256 // Size in Kb +# elif defined(STM32F103xE) || defined(STM32F303xE) || defined(STM32F401xE) || defined(STM32F411xE) +# define FEE_MCU_FLASH_SIZE 512 // Size in Kb +# elif defined(STM32F405xG) +# define FEE_MCU_FLASH_SIZE 1024 // Size in Kb +# endif +#endif + +/* Start of the emulated eeprom */ +#if !defined(FEE_PAGE_BASE_ADDRESS) +# if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F405xG) || defined(STM32F411xE) +# ifndef FEE_PAGE_BASE_ADDRESS +# define FEE_PAGE_BASE_ADDRESS 0x08004000 // bodge to force 2nd 16k page +# endif +# else +# ifndef FEE_FLASH_BASE +# define FEE_FLASH_BASE 0x8000000 +# endif +/* Default to end of flash */ +# define FEE_PAGE_BASE_ADDRESS ((uintptr_t)(FEE_FLASH_BASE) + FEE_MCU_FLASH_SIZE * 1024 - (FEE_PAGE_COUNT * FEE_PAGE_SIZE)) +# endif +#endif + +/* Addressable range 16KByte: 0 <-> (0x1FFF << 1) */ +#define FEE_ADDRESS_MAX_SIZE 0x4000 + +/* Size of combined compacted eeprom and write log pages */ +#define FEE_DENSITY_MAX_SIZE (FEE_PAGE_COUNT * FEE_PAGE_SIZE) + +#ifndef FEE_MCU_FLASH_SIZE_IGNORE_CHECK /* *TODO: Get rid of this check */ +# if FEE_DENSITY_MAX_SIZE > (FEE_MCU_FLASH_SIZE * 1024) +# pragma message STR(FEE_DENSITY_MAX_SIZE) " > " STR(FEE_MCU_FLASH_SIZE * 1024) +# error emulated eeprom: FEE_DENSITY_MAX_SIZE is greater than available flash size +# endif +#endif + +/* Size of emulated eeprom */ +#ifdef FEE_DENSITY_BYTES +# if (FEE_DENSITY_BYTES > FEE_DENSITY_MAX_SIZE) +# pragma message STR(FEE_DENSITY_BYTES) " > " STR(FEE_DENSITY_MAX_SIZE) +# error emulated eeprom: FEE_DENSITY_BYTES exceeds FEE_DENSITY_MAX_SIZE +# endif +# if (FEE_DENSITY_BYTES == FEE_DENSITY_MAX_SIZE) +# pragma message STR(FEE_DENSITY_BYTES) " == " STR(FEE_DENSITY_MAX_SIZE) +# warning emulated eeprom: FEE_DENSITY_BYTES leaves no room for a write log. This will greatly increase the flash wear rate! +# endif +# if FEE_DENSITY_BYTES > FEE_ADDRESS_MAX_SIZE +# pragma message STR(FEE_DENSITY_BYTES) " > " STR(FEE_ADDRESS_MAX_SIZE) +# error emulated eeprom: FEE_DENSITY_BYTES is greater than FEE_ADDRESS_MAX_SIZE allows +# endif +# if ((FEE_DENSITY_BYTES) % 2) == 1 +# error emulated eeprom: FEE_DENSITY_BYTES must be even +# endif +#else +/* Default to half of allocated space used for emulated eeprom, half for write log */ +# define FEE_DENSITY_BYTES (FEE_PAGE_COUNT * FEE_PAGE_SIZE / 2) +#endif + +/* Size of write log */ +#ifdef FEE_WRITE_LOG_BYTES +# if ((FEE_DENSITY_BYTES + FEE_WRITE_LOG_BYTES) > FEE_DENSITY_MAX_SIZE) +# pragma message STR(FEE_DENSITY_BYTES) " + " STR(FEE_WRITE_LOG_BYTES) " > " STR(FEE_DENSITY_MAX_SIZE) +# error emulated eeprom: FEE_WRITE_LOG_BYTES exceeds remaining FEE_DENSITY_MAX_SIZE +# endif +# if ((FEE_WRITE_LOG_BYTES) % 2) == 1 +# error emulated eeprom: FEE_WRITE_LOG_BYTES must be even +# endif +#else +/* Default to use all remaining space */ +# define FEE_WRITE_LOG_BYTES (FEE_PAGE_COUNT * FEE_PAGE_SIZE - FEE_DENSITY_BYTES) +#endif + +/* Start of the emulated eeprom compacted flash area */ +#define FEE_COMPACTED_BASE_ADDRESS FEE_PAGE_BASE_ADDRESS +/* End of the emulated eeprom compacted flash area */ +#define FEE_COMPACTED_LAST_ADDRESS (FEE_COMPACTED_BASE_ADDRESS + FEE_DENSITY_BYTES) +/* Start of the emulated eeprom write log */ +#define FEE_WRITE_LOG_BASE_ADDRESS FEE_COMPACTED_LAST_ADDRESS +/* End of the emulated eeprom write log */ +#define FEE_WRITE_LOG_LAST_ADDRESS (FEE_WRITE_LOG_BASE_ADDRESS + FEE_WRITE_LOG_BYTES) + +#if defined(DYNAMIC_KEYMAP_EEPROM_MAX_ADDR) && (DYNAMIC_KEYMAP_EEPROM_MAX_ADDR >= FEE_DENSITY_BYTES) +# error emulated eeprom: DYNAMIC_KEYMAP_EEPROM_MAX_ADDR is greater than the FEE_DENSITY_BYTES available +#endif diff --git a/platforms/chibios/drivers/eeprom/eeprom_stm32.c b/platforms/chibios/drivers/eeprom/eeprom_stm32.c deleted file mode 100644 index 1a354dc213..0000000000 --- a/platforms/chibios/drivers/eeprom/eeprom_stm32.c +++ /dev/null @@ -1,629 +0,0 @@ -/* - * This software is experimental and a work in progress. - * Under no circumstances should these files be used in relation to any critical system(s). - * Use of these files is at your own risk. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, - * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR - * PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE - * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * This files are free to use from http://engsta.com/stm32-flash-memory-eeprom-emulator/ by - * Artur F. - * - * Modifications for QMK and STM32F303 by Yiancar - * Modifications to add flash wear leveling by Ilya Zhuravlev - * Modifications to increase flash density by Don Kjer - */ - -#include -#include -#include "util.h" -#include "debug.h" -#include "eeprom_stm32.h" -#include "flash_stm32.h" - -/* - * We emulate eeprom by writing a snapshot compacted view of eeprom contents, - * followed by a write log of any change since that snapshot: - * - * === SIMULATED EEPROM CONTENTS === - * - * ┌─ Compacted ┬ Write Log ─┐ - * │............│[BYTE][BYTE]│ - * │FFFF....FFFF│[WRD0][WRD1]│ - * │FFFFFFFFFFFF│[WORD][NEXT]│ - * │....FFFFFFFF│[BYTE][WRD0]│ - * ├────────────┼────────────┤ - * └──PAGE_BASE │ │ - * PAGE_LAST─┴─WRITE_BASE │ - * WRITE_LAST ┘ - * - * Compacted contents are the 1's complement of the actual EEPROM contents. - * e.g. An 'FFFF' represents a '0000' value. - * - * The size of the 'compacted' area is equal to the size of the 'emulated' eeprom. - * The size of the compacted-area and write log are configurable, and the combined - * size of Compacted + WriteLog is a multiple FEE_PAGE_SIZE, which is MCU dependent. - * Simulated Eeprom contents are located at the end of available flash space. - * - * The following configuration defines can be set: - * - * FEE_PAGE_COUNT # Total number of pages to use for eeprom simulation (Compact + Write log) - * FEE_DENSITY_BYTES # Size of simulated eeprom. (Defaults to half the space allocated by FEE_PAGE_COUNT) - * NOTE: The current implementation does not include page swapping, - * and FEE_DENSITY_BYTES will consume that amount of RAM as a cached view of actual EEPROM contents. - * - * The maximum size of FEE_DENSITY_BYTES is currently 16384. The write log size equals - * FEE_PAGE_COUNT * FEE_PAGE_SIZE - FEE_DENSITY_BYTES. - * The larger the write log, the less frequently the compacted area needs to be rewritten. - * - * - * *** General Algorithm *** - * - * During initialization: - * The contents of the Compacted-flash area are loaded and the 1's complement value - * is cached into memory (e.g. 0xFFFF in Flash represents 0x0000 in cache). - * Write log entries are processed until a 0xFFFF is reached. - * Each log entry updates a byte or word in the cache. - * - * During reads: - * EEPROM contents are given back directly from the cache in memory. - * - * During writes: - * The contents of the cache is updated first. - * If the Compacted-flash area corresponding to the write address is unprogrammed, the 1's complement of the value is written directly into Compacted-flash - * Otherwise: - * If the write log is full, erase both the Compacted-flash area and the Write log, then write cached contents to the Compacted-flash area. - * Otherwise a Write log entry is constructed and appended to the next free position in the Write log. - * - * - * *** Write Log Structure *** - * - * Write log entries allow for optimized byte writes to addresses below 128. Writing 0 or 1 words are also optimized when word-aligned. - * - * === WRITE LOG ENTRY FORMATS === - * - * ╔═══ Byte-Entry ══╗ - * ║0XXXXXXX║YYYYYYYY║ - * ║ └──┬──┘║└──┬───┘║ - * ║ Address║ Value ║ - * ╚════════╩════════╝ - * 0 <= Address < 0x80 (128) - * - * ╔ Word-Encoded 0 ╗ - * ║100XXXXXXXXXXXXX║ - * ║ │└─────┬─────┘║ - * ║ │Address >> 1 ║ - * ║ └── Value: 0 ║ - * ╚════════════════╝ - * 0 <= Address <= 0x3FFE (16382) - * - * ╔ Word-Encoded 1 ╗ - * ║101XXXXXXXXXXXXX║ - * ║ │└─────┬─────┘║ - * ║ │Address >> 1 ║ - * ║ └── Value: 1 ║ - * ╚════════════════╝ - * 0 <= Address <= 0x3FFE (16382) - * - * ╔═══ Reserved ═══╗ - * ║110XXXXXXXXXXXXX║ - * ╚════════════════╝ - * - * ╔═══════════ Word-Next ═══════════╗ - * ║111XXXXXXXXXXXXX║YYYYYYYYYYYYYYYY║ - * ║ └─────┬─────┘║└───────┬──────┘║ - * ║(Address-128)>>1║ ~Value ║ - * ╚════════════════╩════════════════╝ - * ( 0 <= Address < 0x0080 (128): Reserved) - * 0x80 <= Address <= 0x3FFE (16382) - * - * Write Log entry ranges: - * 0x0000 ... 0x7FFF - Byte-Entry; address is (Entry & 0x7F00) >> 4; value is (Entry & 0xFF) - * 0x8000 ... 0x9FFF - Word-Encoded 0; address is (Entry & 0x1FFF) << 1; value is 0 - * 0xA000 ... 0xBFFF - Word-Encoded 1; address is (Entry & 0x1FFF) << 1; value is 1 - * 0xC000 ... 0xDFFF - Reserved - * 0xE000 ... 0xFFBF - Word-Next; address is (Entry & 0x1FFF) << 1 + 0x80; value is ~(Next_Entry) - * 0xFFC0 ... 0xFFFE - Reserved - * 0xFFFF - Unprogrammed - * - */ - -#include "eeprom_stm32_defs.h" -/* These bits are used for optimizing encoding of bytes, 0 and 1 */ -#define FEE_WORD_ENCODING 0x8000 -#define FEE_VALUE_NEXT 0x6000 -#define FEE_VALUE_RESERVED 0x4000 -#define FEE_VALUE_ENCODED 0x2000 -#define FEE_BYTE_RANGE 0x80 - -/* Flash word value after erase */ -#define FEE_EMPTY_WORD ((uint16_t)0xFFFF) - -#if !defined(FEE_PAGE_SIZE) || !defined(FEE_PAGE_COUNT) || !defined(FEE_MCU_FLASH_SIZE) || !defined(FEE_PAGE_BASE_ADDRESS) -# error "not implemented." -#endif - -/* In-memory contents of emulated eeprom for faster access */ -/* *TODO: Implement page swapping */ -static uint16_t WordBuf[FEE_DENSITY_BYTES / 2]; -static uint8_t *DataBuf = (uint8_t *)WordBuf; - -/* Pointer to the first available slot within the write log */ -static uint16_t *empty_slot; - -// #define DEBUG_EEPROM_OUTPUT - -/* - * Debug print utils - */ - -#if defined(DEBUG_EEPROM_OUTPUT) - -# define debug_eeprom debug_enable -# define eeprom_println(s) println(s) -# define eeprom_printf(fmt, ...) xprintf(fmt, ##__VA_ARGS__); - -#else /* NO_DEBUG */ - -# define debug_eeprom false -# define eeprom_println(s) -# define eeprom_printf(fmt, ...) - -#endif /* NO_DEBUG */ - -void print_eeprom(void) { -#ifndef NO_DEBUG - int empty_rows = 0; - for (uint16_t i = 0; i < FEE_DENSITY_BYTES; i++) { - if (i % 16 == 0) { - if (i >= FEE_DENSITY_BYTES - 16) { - /* Make sure we display the last row */ - empty_rows = 0; - } - /* Check if this row is uninitialized */ - ++empty_rows; - for (uint16_t j = 0; j < 16; j++) { - if (DataBuf[i + j]) { - empty_rows = 0; - break; - } - } - if (empty_rows > 1) { - /* Repeat empty row */ - if (empty_rows == 2) { - /* Only display the first repeat empty row */ - println("*"); - } - i += 15; - continue; - } - xprintf("%04x", i); - } - if (i % 8 == 0) print(" "); - - xprintf(" %02x", DataBuf[i]); - if ((i + 1) % 16 == 0) { - println(""); - } - } -#endif -} - -uint16_t EEPROM_Init(void) { - /* Load emulated eeprom contents from compacted flash into memory */ - uint16_t *src = (uint16_t *)FEE_COMPACTED_BASE_ADDRESS; - uint16_t *dest = (uint16_t *)DataBuf; - for (; src < (uint16_t *)FEE_COMPACTED_LAST_ADDRESS; ++src, ++dest) { - *dest = ~*src; - } - - if (debug_eeprom) { - println("EEPROM_Init Compacted Pages:"); - print_eeprom(); - println("EEPROM_Init Write Log:"); - } - - /* Replay write log */ - uint16_t *log_addr; - for (log_addr = (uint16_t *)FEE_WRITE_LOG_BASE_ADDRESS; log_addr < (uint16_t *)FEE_WRITE_LOG_LAST_ADDRESS; ++log_addr) { - uint16_t address = *log_addr; - if (address == FEE_EMPTY_WORD) { - break; - } - /* Check for lowest 128-bytes optimization */ - if (!(address & FEE_WORD_ENCODING)) { - uint8_t bvalue = (uint8_t)address; - address >>= 8; - DataBuf[address] = bvalue; - eeprom_printf("DataBuf[0x%02x] = 0x%02x;\n", address, bvalue); - } else { - uint16_t wvalue; - /* Check if value is in next word */ - if ((address & FEE_VALUE_NEXT) == FEE_VALUE_NEXT) { - /* Read value from next word */ - if (++log_addr >= (uint16_t *)FEE_WRITE_LOG_LAST_ADDRESS) { - break; - } - wvalue = ~*log_addr; - if (!wvalue) { - eeprom_printf("Incomplete write at log_addr: 0x%04lx;\n", (uint32_t)log_addr); - /* Possibly incomplete write. Ignore and continue */ - continue; - } - address &= 0x1FFF; - address <<= 1; - /* Writes to addresses less than 128 are byte log entries */ - address += FEE_BYTE_RANGE; - } else { - /* Reserved for future use */ - if (address & FEE_VALUE_RESERVED) { - eeprom_printf("Reserved encoded value at log_addr: 0x%04lx;\n", (uint32_t)log_addr); - continue; - } - /* Optimization for 0 or 1 values. */ - wvalue = (address & FEE_VALUE_ENCODED) >> 13; - address &= 0x1FFF; - address <<= 1; - } - if (address < FEE_DENSITY_BYTES) { - eeprom_printf("DataBuf[0x%04x] = 0x%04x;\n", address, wvalue); - *(uint16_t *)(&DataBuf[address]) = wvalue; - } else { - eeprom_printf("DataBuf[0x%04x] cannot be set to 0x%04x [BAD ADDRESS]\n", address, wvalue); - } - } - } - - empty_slot = log_addr; - - if (debug_eeprom) { - println("EEPROM_Init Final DataBuf:"); - print_eeprom(); - } - - return FEE_DENSITY_BYTES; -} - -/* Clear flash contents (doesn't touch in-memory DataBuf) */ -static void eeprom_clear(void) { - FLASH_Unlock(); - - for (uint16_t page_num = 0; page_num < FEE_PAGE_COUNT; ++page_num) { - eeprom_printf("FLASH_ErasePage(0x%04lx)\n", (uint32_t)(FEE_PAGE_BASE_ADDRESS + (page_num * FEE_PAGE_SIZE))); - FLASH_ErasePage(FEE_PAGE_BASE_ADDRESS + (page_num * FEE_PAGE_SIZE)); - } - - FLASH_Lock(); - - empty_slot = (uint16_t *)FEE_WRITE_LOG_BASE_ADDRESS; - eeprom_printf("eeprom_clear empty_slot: 0x%08lx\n", (uint32_t)empty_slot); -} - -/* Erase emulated eeprom */ -void EEPROM_Erase(void) { - eeprom_println("EEPROM_Erase"); - /* Erase compacted pages and write log */ - eeprom_clear(); - /* re-initialize to reset DataBuf */ - EEPROM_Init(); -} - -/* Compact write log */ -static uint8_t eeprom_compact(void) { - /* Erase compacted pages and write log */ - eeprom_clear(); - - FLASH_Unlock(); - - FLASH_Status final_status = FLASH_COMPLETE; - - /* Write emulated eeprom contents from memory to compacted flash */ - uint16_t *src = (uint16_t *)DataBuf; - uintptr_t dest = FEE_COMPACTED_BASE_ADDRESS; - uint16_t value; - for (; dest < FEE_COMPACTED_LAST_ADDRESS; ++src, dest += 2) { - value = *src; - if (value) { - eeprom_printf("FLASH_ProgramHalfWord(0x%04lx, 0x%04x)\n", (uint32_t)dest, ~value); - FLASH_Status status = FLASH_ProgramHalfWord(dest, ~value); - if (status != FLASH_COMPLETE) final_status = status; - } - } - - FLASH_Lock(); - - if (debug_eeprom) { - println("eeprom_compacted:"); - print_eeprom(); - } - - return final_status; -} - -static uint8_t eeprom_write_direct_entry(uint16_t Address) { - /* Check if we can just write this directly to the compacted flash area */ - uintptr_t directAddress = FEE_COMPACTED_BASE_ADDRESS + (Address & 0xFFFE); - if (*(uint16_t *)directAddress == FEE_EMPTY_WORD) { - /* Write the value directly to the compacted area without a log entry */ - uint16_t value = ~*(uint16_t *)(&DataBuf[Address & 0xFFFE]); - /* Early exit if a write isn't needed */ - if (value == FEE_EMPTY_WORD) return FLASH_COMPLETE; - - FLASH_Unlock(); - - eeprom_printf("FLASH_ProgramHalfWord(0x%08lx, 0x%04x) [DIRECT]\n", (uint32_t)directAddress, value); - FLASH_Status status = FLASH_ProgramHalfWord(directAddress, value); - - FLASH_Lock(); - return status; - } - return 0; -} - -static uint8_t eeprom_write_log_word_entry(uint16_t Address) { - FLASH_Status final_status = FLASH_COMPLETE; - - uint16_t value = *(uint16_t *)(&DataBuf[Address]); - eeprom_printf("eeprom_write_log_word_entry(0x%04x): 0x%04x\n", Address, value); - - /* MSB signifies the lowest 128-byte optimization is not in effect */ - uint16_t encoding = FEE_WORD_ENCODING; - uint8_t entry_size; - if (value <= 1) { - encoding |= value << 13; - entry_size = 2; - } else { - encoding |= FEE_VALUE_NEXT; - entry_size = 4; - /* Writes to addresses less than 128 are byte log entries */ - Address -= FEE_BYTE_RANGE; - } - - /* if we can't find an empty spot, we must compact emulated eeprom */ - if (empty_slot > (uint16_t *)(FEE_WRITE_LOG_LAST_ADDRESS - entry_size)) { - /* compact the write log into the compacted flash area */ - return eeprom_compact(); - } - - /* Word log writes should be word-aligned. Take back a bit */ - Address >>= 1; - Address |= encoding; - - /* ok we found a place let's write our data */ - FLASH_Unlock(); - - /* address */ - eeprom_printf("FLASH_ProgramHalfWord(0x%08lx, 0x%04x)\n", (uint32_t)empty_slot, Address); - final_status = FLASH_ProgramHalfWord((uintptr_t)empty_slot++, Address); - - /* value */ - if (encoding == (FEE_WORD_ENCODING | FEE_VALUE_NEXT)) { - eeprom_printf("FLASH_ProgramHalfWord(0x%08lx, 0x%04x)\n", (uint32_t)empty_slot, ~value); - FLASH_Status status = FLASH_ProgramHalfWord((uintptr_t)empty_slot++, ~value); - if (status != FLASH_COMPLETE) final_status = status; - } - - FLASH_Lock(); - - return final_status; -} - -static uint8_t eeprom_write_log_byte_entry(uint16_t Address) { - eeprom_printf("eeprom_write_log_byte_entry(0x%04x): 0x%02x\n", Address, DataBuf[Address]); - - /* if couldn't find an empty spot, we must compact emulated eeprom */ - if (empty_slot >= (uint16_t *)FEE_WRITE_LOG_LAST_ADDRESS) { - /* compact the write log into the compacted flash area */ - return eeprom_compact(); - } - - /* ok we found a place let's write our data */ - FLASH_Unlock(); - - /* Pack address and value into the same word */ - uint16_t value = (Address << 8) | DataBuf[Address]; - - /* write to flash */ - eeprom_printf("FLASH_ProgramHalfWord(0x%08lx, 0x%04x)\n", (uint32_t)empty_slot, value); - FLASH_Status status = FLASH_ProgramHalfWord((uintptr_t)empty_slot++, value); - - FLASH_Lock(); - - return status; -} - -uint8_t EEPROM_WriteDataByte(uint16_t Address, uint8_t DataByte) { - /* if the address is out-of-bounds, do nothing */ - if (Address >= FEE_DENSITY_BYTES) { - eeprom_printf("EEPROM_WriteDataByte(0x%04x, 0x%02x) [BAD ADDRESS]\n", Address, DataByte); - return FLASH_BAD_ADDRESS; - } - - /* if the value is the same, don't bother writing it */ - if (DataBuf[Address] == DataByte) { - eeprom_printf("EEPROM_WriteDataByte(0x%04x, 0x%02x) [SKIP SAME]\n", Address, DataByte); - return 0; - } - - /* keep DataBuf cache in sync */ - DataBuf[Address] = DataByte; - eeprom_printf("EEPROM_WriteDataByte DataBuf[0x%04x] = 0x%02x\n", Address, DataBuf[Address]); - - /* perform the write into flash memory */ - /* First, attempt to write directly into the compacted flash area */ - FLASH_Status status = eeprom_write_direct_entry(Address); - if (!status) { - /* Otherwise append to the write log */ - if (Address < FEE_BYTE_RANGE) { - status = eeprom_write_log_byte_entry(Address); - } else { - status = eeprom_write_log_word_entry(Address & 0xFFFE); - } - } - if (status != 0 && status != FLASH_COMPLETE) { - eeprom_printf("EEPROM_WriteDataByte [STATUS == %d]\n", status); - } - return status; -} - -uint8_t EEPROM_WriteDataWord(uint16_t Address, uint16_t DataWord) { - /* if the address is out-of-bounds, do nothing */ - if (Address >= FEE_DENSITY_BYTES) { - eeprom_printf("EEPROM_WriteDataWord(0x%04x, 0x%04x) [BAD ADDRESS]\n", Address, DataWord); - return FLASH_BAD_ADDRESS; - } - - /* Check for word alignment */ - FLASH_Status final_status = FLASH_COMPLETE; - if (Address % 2) { - final_status = EEPROM_WriteDataByte(Address, DataWord); - FLASH_Status status = EEPROM_WriteDataByte(Address + 1, DataWord >> 8); - if (status != FLASH_COMPLETE) final_status = status; - if (final_status != 0 && final_status != FLASH_COMPLETE) { - eeprom_printf("EEPROM_WriteDataWord [STATUS == %d]\n", final_status); - } - return final_status; - } - - /* if the value is the same, don't bother writing it */ - uint16_t oldValue = *(uint16_t *)(&DataBuf[Address]); - if (oldValue == DataWord) { - eeprom_printf("EEPROM_WriteDataWord(0x%04x, 0x%04x) [SKIP SAME]\n", Address, DataWord); - return 0; - } - - /* keep DataBuf cache in sync */ - *(uint16_t *)(&DataBuf[Address]) = DataWord; - eeprom_printf("EEPROM_WriteDataWord DataBuf[0x%04x] = 0x%04x\n", Address, *(uint16_t *)(&DataBuf[Address])); - - /* perform the write into flash memory */ - /* First, attempt to write directly into the compacted flash area */ - final_status = eeprom_write_direct_entry(Address); - if (!final_status) { - /* Otherwise append to the write log */ - /* Check if we need to fall back to byte write */ - if (Address < FEE_BYTE_RANGE) { - final_status = FLASH_COMPLETE; - /* Only write a byte if it has changed */ - if ((uint8_t)oldValue != (uint8_t)DataWord) { - final_status = eeprom_write_log_byte_entry(Address); - } - FLASH_Status status = FLASH_COMPLETE; - /* Only write a byte if it has changed */ - if ((oldValue >> 8) != (DataWord >> 8)) { - status = eeprom_write_log_byte_entry(Address + 1); - } - if (status != FLASH_COMPLETE) final_status = status; - } else { - final_status = eeprom_write_log_word_entry(Address); - } - } - if (final_status != 0 && final_status != FLASH_COMPLETE) { - eeprom_printf("EEPROM_WriteDataWord [STATUS == %d]\n", final_status); - } - return final_status; -} - -uint8_t EEPROM_ReadDataByte(uint16_t Address) { - uint8_t DataByte = 0xFF; - - if (Address < FEE_DENSITY_BYTES) { - DataByte = DataBuf[Address]; - } - - eeprom_printf("EEPROM_ReadDataByte(0x%04x): 0x%02x\n", Address, DataByte); - - return DataByte; -} - -uint16_t EEPROM_ReadDataWord(uint16_t Address) { - uint16_t DataWord = 0xFFFF; - - if (Address < FEE_DENSITY_BYTES - 1) { - /* Check word alignment */ - if (Address % 2) { - DataWord = DataBuf[Address] | (DataBuf[Address + 1] << 8); - } else { - DataWord = *(uint16_t *)(&DataBuf[Address]); - } - } - - eeprom_printf("EEPROM_ReadDataWord(0x%04x): 0x%04x\n", Address, DataWord); - - return DataWord; -} - -/***************************************************************************** - * Bind to eeprom_driver.c - *******************************************************************************/ -void eeprom_driver_init(void) { - EEPROM_Init(); -} - -void eeprom_driver_erase(void) { - EEPROM_Erase(); -} - -void eeprom_read_block(void *buf, const void *addr, size_t len) { - const uint8_t *src = (const uint8_t *)addr; - uint8_t * dest = (uint8_t *)buf; - - /* Check word alignment */ - if (len && (uintptr_t)src % 2) { - /* Read the unaligned first byte */ - *dest++ = EEPROM_ReadDataByte((const uintptr_t)src++); - --len; - } - - uint16_t value; - bool aligned = ((uintptr_t)dest % 2 == 0); - while (len > 1) { - value = EEPROM_ReadDataWord((const uintptr_t)((uint16_t *)src)); - if (aligned) { - *(uint16_t *)dest = value; - dest += 2; - } else { - *dest++ = value; - *dest++ = value >> 8; - } - src += 2; - len -= 2; - } - if (len) { - *dest = EEPROM_ReadDataByte((const uintptr_t)src); - } -} - -void eeprom_write_block(const void *buf, void *addr, size_t len) { - uint8_t * dest = (uint8_t *)addr; - const uint8_t *src = (const uint8_t *)buf; - - /* Check word alignment */ - if (len && (uintptr_t)dest % 2) { - /* Write the unaligned first byte */ - EEPROM_WriteDataByte((uintptr_t)dest++, *src++); - --len; - } - - uint16_t value; - bool aligned = ((uintptr_t)src % 2 == 0); - while (len > 1) { - if (aligned) { - value = *(uint16_t *)src; - } else { - value = *(uint8_t *)src | (*(uint8_t *)(src + 1) << 8); - } - EEPROM_WriteDataWord((uintptr_t)((uint16_t *)dest), value); - dest += 2; - src += 2; - len -= 2; - } - - if (len) { - EEPROM_WriteDataByte((uintptr_t)dest, *src); - } -} diff --git a/platforms/chibios/drivers/eeprom/eeprom_stm32.h b/platforms/chibios/drivers/eeprom/eeprom_stm32.h deleted file mode 100644 index 8fcfb556b8..0000000000 --- a/platforms/chibios/drivers/eeprom/eeprom_stm32.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * This software is experimental and a work in progress. - * Under no circumstances should these files be used in relation to any critical system(s). - * Use of these files is at your own risk. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, - * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR - * PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE - * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * This files are free to use from http://engsta.com/stm32-flash-memory-eeprom-emulator/ by - * Artur F. - * - * Modifications for QMK and STM32F303 by Yiancar - * - * This library assumes 8-bit data locations. To add a new MCU, please provide the flash - * page size and the total flash size in Kb. The number of available pages must be a multiple - * of 2. Only half of the pages account for the total EEPROM size. - * This library also assumes that the pages are not used by the firmware. - */ - -#pragma once - -uint16_t EEPROM_Init(void); -void EEPROM_Erase(void); -uint8_t EEPROM_WriteDataByte(uint16_t Address, uint8_t DataByte); -uint8_t EEPROM_WriteDataWord(uint16_t Address, uint16_t DataWord); -uint8_t EEPROM_ReadDataByte(uint16_t Address); -uint16_t EEPROM_ReadDataWord(uint16_t Address); - -void print_eeprom(void); diff --git a/platforms/chibios/drivers/eeprom/eeprom_stm32_defs.h b/platforms/chibios/drivers/eeprom/eeprom_stm32_defs.h deleted file mode 100644 index 57d0440330..0000000000 --- a/platforms/chibios/drivers/eeprom/eeprom_stm32_defs.h +++ /dev/null @@ -1,136 +0,0 @@ -/* Copyright 2021 QMK - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -#pragma once - -#include - -#if !defined(FEE_PAGE_SIZE) || !defined(FEE_PAGE_COUNT) -# if defined(STM32F103xB) || defined(STM32F042x6) || defined(GD32VF103C8) || defined(GD32VF103CB) -# ifndef FEE_PAGE_SIZE -# define FEE_PAGE_SIZE 0x400 // Page size = 1KByte -# endif -# ifndef FEE_PAGE_COUNT -# define FEE_PAGE_COUNT 2 // How many pages are used -# endif -# elif defined(STM32F103xE) || defined(STM32F303xC) || defined(STM32F303xE) || defined(STM32F072xB) || defined(STM32F070xB) -# ifndef FEE_PAGE_SIZE -# define FEE_PAGE_SIZE 0x800 // Page size = 2KByte -# endif -# ifndef FEE_PAGE_COUNT -# define FEE_PAGE_COUNT 4 // How many pages are used -# endif -# elif defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F405xG) || defined(STM32F411xE) -# ifndef FEE_PAGE_SIZE -# define FEE_PAGE_SIZE 0x4000 // Page size = 16KByte -# endif -# ifndef FEE_PAGE_COUNT -# define FEE_PAGE_COUNT 1 // How many pages are used -# endif -# endif -#endif - -#if !defined(FEE_MCU_FLASH_SIZE) -# if defined(STM32F042x6) -# define FEE_MCU_FLASH_SIZE 32 // Size in Kb -# elif defined(GD32VF103C8) -# define FEE_MCU_FLASH_SIZE 64 // Size in Kb -# elif defined(STM32F103xB) || defined(STM32F072xB) || defined(STM32F070xB) || defined(GD32VF103CB) -# define FEE_MCU_FLASH_SIZE 128 // Size in Kb -# elif defined(STM32F303xC) || defined(STM32F401xC) -# define FEE_MCU_FLASH_SIZE 256 // Size in Kb -# elif defined(STM32F103xE) || defined(STM32F303xE) || defined(STM32F401xE) || defined(STM32F411xE) -# define FEE_MCU_FLASH_SIZE 512 // Size in Kb -# elif defined(STM32F405xG) -# define FEE_MCU_FLASH_SIZE 1024 // Size in Kb -# endif -#endif - -/* Start of the emulated eeprom */ -#if !defined(FEE_PAGE_BASE_ADDRESS) -# if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F405xG) || defined(STM32F411xE) -# ifndef FEE_PAGE_BASE_ADDRESS -# define FEE_PAGE_BASE_ADDRESS 0x08004000 // bodge to force 2nd 16k page -# endif -# else -# ifndef FEE_FLASH_BASE -# define FEE_FLASH_BASE 0x8000000 -# endif -/* Default to end of flash */ -# define FEE_PAGE_BASE_ADDRESS ((uintptr_t)(FEE_FLASH_BASE) + FEE_MCU_FLASH_SIZE * 1024 - (FEE_PAGE_COUNT * FEE_PAGE_SIZE)) -# endif -#endif - -/* Addressable range 16KByte: 0 <-> (0x1FFF << 1) */ -#define FEE_ADDRESS_MAX_SIZE 0x4000 - -/* Size of combined compacted eeprom and write log pages */ -#define FEE_DENSITY_MAX_SIZE (FEE_PAGE_COUNT * FEE_PAGE_SIZE) - -#ifndef FEE_MCU_FLASH_SIZE_IGNORE_CHECK /* *TODO: Get rid of this check */ -# if FEE_DENSITY_MAX_SIZE > (FEE_MCU_FLASH_SIZE * 1024) -# pragma message STR(FEE_DENSITY_MAX_SIZE) " > " STR(FEE_MCU_FLASH_SIZE * 1024) -# error emulated eeprom: FEE_DENSITY_MAX_SIZE is greater than available flash size -# endif -#endif - -/* Size of emulated eeprom */ -#ifdef FEE_DENSITY_BYTES -# if (FEE_DENSITY_BYTES > FEE_DENSITY_MAX_SIZE) -# pragma message STR(FEE_DENSITY_BYTES) " > " STR(FEE_DENSITY_MAX_SIZE) -# error emulated eeprom: FEE_DENSITY_BYTES exceeds FEE_DENSITY_MAX_SIZE -# endif -# if (FEE_DENSITY_BYTES == FEE_DENSITY_MAX_SIZE) -# pragma message STR(FEE_DENSITY_BYTES) " == " STR(FEE_DENSITY_MAX_SIZE) -# warning emulated eeprom: FEE_DENSITY_BYTES leaves no room for a write log. This will greatly increase the flash wear rate! -# endif -# if FEE_DENSITY_BYTES > FEE_ADDRESS_MAX_SIZE -# pragma message STR(FEE_DENSITY_BYTES) " > " STR(FEE_ADDRESS_MAX_SIZE) -# error emulated eeprom: FEE_DENSITY_BYTES is greater than FEE_ADDRESS_MAX_SIZE allows -# endif -# if ((FEE_DENSITY_BYTES) % 2) == 1 -# error emulated eeprom: FEE_DENSITY_BYTES must be even -# endif -#else -/* Default to half of allocated space used for emulated eeprom, half for write log */ -# define FEE_DENSITY_BYTES (FEE_PAGE_COUNT * FEE_PAGE_SIZE / 2) -#endif - -/* Size of write log */ -#ifdef FEE_WRITE_LOG_BYTES -# if ((FEE_DENSITY_BYTES + FEE_WRITE_LOG_BYTES) > FEE_DENSITY_MAX_SIZE) -# pragma message STR(FEE_DENSITY_BYTES) " + " STR(FEE_WRITE_LOG_BYTES) " > " STR(FEE_DENSITY_MAX_SIZE) -# error emulated eeprom: FEE_WRITE_LOG_BYTES exceeds remaining FEE_DENSITY_MAX_SIZE -# endif -# if ((FEE_WRITE_LOG_BYTES) % 2) == 1 -# error emulated eeprom: FEE_WRITE_LOG_BYTES must be even -# endif -#else -/* Default to use all remaining space */ -# define FEE_WRITE_LOG_BYTES (FEE_PAGE_COUNT * FEE_PAGE_SIZE - FEE_DENSITY_BYTES) -#endif - -/* Start of the emulated eeprom compacted flash area */ -#define FEE_COMPACTED_BASE_ADDRESS FEE_PAGE_BASE_ADDRESS -/* End of the emulated eeprom compacted flash area */ -#define FEE_COMPACTED_LAST_ADDRESS (FEE_COMPACTED_BASE_ADDRESS + FEE_DENSITY_BYTES) -/* Start of the emulated eeprom write log */ -#define FEE_WRITE_LOG_BASE_ADDRESS FEE_COMPACTED_LAST_ADDRESS -/* End of the emulated eeprom write log */ -#define FEE_WRITE_LOG_LAST_ADDRESS (FEE_WRITE_LOG_BASE_ADDRESS + FEE_WRITE_LOG_BYTES) - -#if defined(DYNAMIC_KEYMAP_EEPROM_MAX_ADDR) && (DYNAMIC_KEYMAP_EEPROM_MAX_ADDR >= FEE_DENSITY_BYTES) -# error emulated eeprom: DYNAMIC_KEYMAP_EEPROM_MAX_ADDR is greater than the FEE_DENSITY_BYTES available -#endif diff --git a/platforms/chibios/drivers/eeprom/eeprom_teensy.c b/platforms/chibios/drivers/eeprom/eeprom_teensy.c deleted file mode 100644 index c8777febde..0000000000 --- a/platforms/chibios/drivers/eeprom/eeprom_teensy.c +++ /dev/null @@ -1,546 +0,0 @@ -#include -#include - -#include "eeprom_teensy.h" -#include "eeconfig.h" - -/*************************************/ -/* Hardware backend */ -/* */ -/* Code from PJRC/Teensyduino */ -/*************************************/ - -/* Teensyduino Core Library - * http://www.pjrc.com/teensy/ - * Copyright (c) 2013 PJRC.COM, LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * 1. The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * 2. If the Software is incorporated into a build system that allows - * selection among a list of target devices, then similar target - * devices manufactured by PJRC.COM must be included in the list of - * target devices and selectable in the same manner. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#if defined(K20x) /* chip selection */ -/* Teensy 3.0, 3.1, 3.2; mchck; infinity keyboard */ - -/* - ^^^ Here be dragons: - NXP AppNote AN4282 section 3.1 states that partitioning must only be done once. - Once EEPROM partitioning is done, the size is locked to this initial configuration. - Attempts to modify the EEPROM_SIZE setting may brick your board. -*/ - -// Writing unaligned 16 or 32 bit data is handled automatically when -// this is defined, but at a cost of extra code size. Without this, -// any unaligned write will cause a hard fault exception! If you're -// absolutely sure all 16 and 32 bit writes will be aligned, you can -// remove the extra unnecessary code. -// -# define HANDLE_UNALIGNED_WRITES - -// Minimum EEPROM Endurance -// ------------------------ -# if (EEPROM_SIZE == 2048) // 35000 writes/byte or 70000 writes/word -# define EEESIZE 0x33 -# elif (EEPROM_SIZE == 1024) // 75000 writes/byte or 150000 writes/word -# define EEESIZE 0x34 -# elif (EEPROM_SIZE == 512) // 155000 writes/byte or 310000 writes/word -# define EEESIZE 0x35 -# elif (EEPROM_SIZE == 256) // 315000 writes/byte or 630000 writes/word -# define EEESIZE 0x36 -# elif (EEPROM_SIZE == 128) // 635000 writes/byte or 1270000 writes/word -# define EEESIZE 0x37 -# elif (EEPROM_SIZE == 64) // 1275000 writes/byte or 2550000 writes/word -# define EEESIZE 0x38 -# elif (EEPROM_SIZE == 32) // 2555000 writes/byte or 5110000 writes/word -# define EEESIZE 0x39 -# endif - -/** \brief eeprom initialization - * - * FIXME: needs doc - */ -void eeprom_initialize(void) { - uint32_t count = 0; - uint16_t do_flash_cmd[] = {0xf06f, 0x037f, 0x7003, 0x7803, 0xf013, 0x0f80, 0xd0fb, 0x4770}; - uint8_t status; - - if (FTFL->FCNFG & FTFL_FCNFG_RAMRDY) { - // FlexRAM is configured as traditional RAM - // We need to reconfigure for EEPROM usage - FTFL->FCCOB0 = 0x80; // PGMPART = Program Partition Command - FTFL->FCCOB4 = EEESIZE; // EEPROM Size - FTFL->FCCOB5 = 0x03; // 0K for Dataflash, 32K for EEPROM backup - __disable_irq(); - // do_flash_cmd() must execute from RAM. Luckily the C syntax is simple... - (*((void (*)(volatile uint8_t *))((uint32_t)do_flash_cmd | 1)))(&(FTFL->FSTAT)); - __enable_irq(); - status = FTFL->FSTAT; - if (status & (FTFL_FSTAT_RDCOLERR | FTFL_FSTAT_ACCERR | FTFL_FSTAT_FPVIOL)) { - FTFL->FSTAT = (status & (FTFL_FSTAT_RDCOLERR | FTFL_FSTAT_ACCERR | FTFL_FSTAT_FPVIOL)); - return; // error - } - } - // wait for eeprom to become ready (is this really necessary?) - while (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) { - if (++count > 20000) break; - } -} - -# define FlexRAM ((uint8_t *)0x14000000) - -/** \brief eeprom read byte - * - * FIXME: needs doc - */ -uint8_t eeprom_read_byte(const uint8_t *addr) { - uint32_t offset = (uint32_t)addr; - if (offset >= EEPROM_SIZE) return 0; - if (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize(); - return FlexRAM[offset]; -} - -/** \brief eeprom read word - * - * FIXME: needs doc - */ -uint16_t eeprom_read_word(const uint16_t *addr) { - uint32_t offset = (uint32_t)addr; - if (offset >= EEPROM_SIZE - 1) return 0; - if (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize(); - return *(uint16_t *)(&FlexRAM[offset]); -} - -/** \brief eeprom read dword - * - * FIXME: needs doc - */ -uint32_t eeprom_read_dword(const uint32_t *addr) { - uint32_t offset = (uint32_t)addr; - if (offset >= EEPROM_SIZE - 3) return 0; - if (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize(); - return *(uint32_t *)(&FlexRAM[offset]); -} - -/** \brief eeprom read block - * - * FIXME: needs doc - */ -void eeprom_read_block(void *buf, const void *addr, uint32_t len) { - uint32_t offset = (uint32_t)addr; - uint8_t *dest = (uint8_t *)buf; - uint32_t end = offset + len; - - if (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize(); - if (end > EEPROM_SIZE) end = EEPROM_SIZE; - while (offset < end) { - *dest++ = FlexRAM[offset++]; - } -} - -/** \brief eeprom is ready - * - * FIXME: needs doc - */ -int eeprom_is_ready(void) { - return (FTFL->FCNFG & FTFL_FCNFG_EEERDY) ? 1 : 0; -} - -/** \brief flexram wait - * - * FIXME: needs doc - */ -static void flexram_wait(void) { - while (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) { - // TODO: timeout - } -} - -/** \brief eeprom_write_byte - * - * FIXME: needs doc - */ -void eeprom_write_byte(uint8_t *addr, uint8_t value) { - uint32_t offset = (uint32_t)addr; - - if (offset >= EEPROM_SIZE) return; - if (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize(); - if (FlexRAM[offset] != value) { - FlexRAM[offset] = value; - flexram_wait(); - } -} - -/** \brief eeprom write word - * - * FIXME: needs doc - */ -void eeprom_write_word(uint16_t *addr, uint16_t value) { - uint32_t offset = (uint32_t)addr; - - if (offset >= EEPROM_SIZE - 1) return; - if (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize(); -# ifdef HANDLE_UNALIGNED_WRITES - if ((offset & 1) == 0) { -# endif - if (*(uint16_t *)(&FlexRAM[offset]) != value) { - *(uint16_t *)(&FlexRAM[offset]) = value; - flexram_wait(); - } -# ifdef HANDLE_UNALIGNED_WRITES - } else { - if (FlexRAM[offset] != value) { - FlexRAM[offset] = value; - flexram_wait(); - } - if (FlexRAM[offset + 1] != (value >> 8)) { - FlexRAM[offset + 1] = value >> 8; - flexram_wait(); - } - } -# endif -} - -/** \brief eeprom write dword - * - * FIXME: needs doc - */ -void eeprom_write_dword(uint32_t *addr, uint32_t value) { - uint32_t offset = (uint32_t)addr; - - if (offset >= EEPROM_SIZE - 3) return; - if (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize(); -# ifdef HANDLE_UNALIGNED_WRITES - switch (offset & 3) { - case 0: -# endif - if (*(uint32_t *)(&FlexRAM[offset]) != value) { - *(uint32_t *)(&FlexRAM[offset]) = value; - flexram_wait(); - } - return; -# ifdef HANDLE_UNALIGNED_WRITES - case 2: - if (*(uint16_t *)(&FlexRAM[offset]) != value) { - *(uint16_t *)(&FlexRAM[offset]) = value; - flexram_wait(); - } - if (*(uint16_t *)(&FlexRAM[offset + 2]) != (value >> 16)) { - *(uint16_t *)(&FlexRAM[offset + 2]) = value >> 16; - flexram_wait(); - } - return; - default: - if (FlexRAM[offset] != value) { - FlexRAM[offset] = value; - flexram_wait(); - } - if (*(uint16_t *)(&FlexRAM[offset + 1]) != (value >> 8)) { - *(uint16_t *)(&FlexRAM[offset + 1]) = value >> 8; - flexram_wait(); - } - if (FlexRAM[offset + 3] != (value >> 24)) { - FlexRAM[offset + 3] = value >> 24; - flexram_wait(); - } - } -# endif -} - -/** \brief eeprom write block - * - * FIXME: needs doc - */ -void eeprom_write_block(const void *buf, void *addr, uint32_t len) { - uint32_t offset = (uint32_t)addr; - const uint8_t *src = (const uint8_t *)buf; - - if (offset >= EEPROM_SIZE) return; - if (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize(); - if (len >= EEPROM_SIZE) len = EEPROM_SIZE; - if (offset + len >= EEPROM_SIZE) len = EEPROM_SIZE - offset; - while (len > 0) { - uint32_t lsb = offset & 3; - if (lsb == 0 && len >= 4) { - // write aligned 32 bits - uint32_t val32; - val32 = *src++; - val32 |= (*src++ << 8); - val32 |= (*src++ << 16); - val32 |= (*src++ << 24); - if (*(uint32_t *)(&FlexRAM[offset]) != val32) { - *(uint32_t *)(&FlexRAM[offset]) = val32; - flexram_wait(); - } - offset += 4; - len -= 4; - } else if ((lsb == 0 || lsb == 2) && len >= 2) { - // write aligned 16 bits - uint16_t val16; - val16 = *src++; - val16 |= (*src++ << 8); - if (*(uint16_t *)(&FlexRAM[offset]) != val16) { - *(uint16_t *)(&FlexRAM[offset]) = val16; - flexram_wait(); - } - offset += 2; - len -= 2; - } else { - // write 8 bits - uint8_t val8 = *src++; - if (FlexRAM[offset] != val8) { - FlexRAM[offset] = val8; - flexram_wait(); - } - offset++; - len--; - } - } -} - -/* -void do_flash_cmd(volatile uint8_t *fstat) -{ - *fstat = 0x80; - while ((*fstat & 0x80) == 0) ; // wait -} -00000000 : - 0: f06f 037f mvn.w r3, #127 ; 0x7f - 4: 7003 strb r3, [r0, #0] - 6: 7803 ldrb r3, [r0, #0] - 8: f013 0f80 tst.w r3, #128 ; 0x80 - c: d0fb beq.n 6 - e: 4770 bx lr -*/ - -#elif defined(KL2x) /* chip selection */ -/* Teensy LC (emulated) */ - -# define SYMVAL(sym) (uint32_t)(((uint8_t *)&(sym)) - ((uint8_t *)0)) - -extern uint32_t __eeprom_workarea_start__; -extern uint32_t __eeprom_workarea_end__; - -static uint32_t flashend = 0; - -void eeprom_initialize(void) { - const uint16_t *p = (uint16_t *)SYMVAL(__eeprom_workarea_start__); - - do { - if (*p++ == 0xFFFF) { - flashend = (uint32_t)(p - 2); - return; - } - } while (p < (uint16_t *)SYMVAL(__eeprom_workarea_end__)); - flashend = (uint32_t)(p - 1); -} - -uint8_t eeprom_read_byte(const uint8_t *addr) { - uint32_t offset = (uint32_t)addr; - const uint16_t *p = (uint16_t *)SYMVAL(__eeprom_workarea_start__); - const uint16_t *end = (const uint16_t *)((uint32_t)flashend); - uint16_t val; - uint8_t data = 0xFF; - - if (!end) { - eeprom_initialize(); - end = (const uint16_t *)((uint32_t)flashend); - } - if (offset < EEPROM_SIZE) { - while (p <= end) { - val = *p++; - if ((val & 255) == offset) data = val >> 8; - } - } - return data; -} - -static void flash_write(const uint16_t *code, uint32_t addr, uint32_t data) { - // with great power comes great responsibility.... - uint32_t stat; - *(uint32_t *)&(FTFA->FCCOB3) = 0x06000000 | (addr & 0x00FFFFFC); - *(uint32_t *)&(FTFA->FCCOB7) = data; - __disable_irq(); - (*((void (*)(volatile uint8_t *))((uint32_t)code | 1)))(&(FTFA->FSTAT)); - __enable_irq(); - stat = FTFA->FSTAT & (FTFA_FSTAT_RDCOLERR | FTFA_FSTAT_ACCERR | FTFA_FSTAT_FPVIOL); - if (stat) { - FTFA->FSTAT = stat; - } - MCM->PLACR |= MCM_PLACR_CFCC; -} - -void eeprom_write_byte(uint8_t *addr, uint8_t data) { - uint32_t offset = (uint32_t)addr; - const uint16_t *p, *end = (const uint16_t *)((uint32_t)flashend); - uint32_t i, val, flashaddr; - uint16_t do_flash_cmd[] = {0x2380, 0x7003, 0x7803, 0xb25b, 0x2b00, 0xdafb, 0x4770}; - uint8_t buf[EEPROM_SIZE]; - - if (offset >= EEPROM_SIZE) return; - if (!end) { - eeprom_initialize(); - end = (const uint16_t *)((uint32_t)flashend); - } - if (++end < (uint16_t *)SYMVAL(__eeprom_workarea_end__)) { - val = (data << 8) | offset; - flashaddr = (uint32_t)end; - flashend = flashaddr; - if ((flashaddr & 2) == 0) { - val |= 0xFFFF0000; - } else { - val <<= 16; - val |= 0x0000FFFF; - } - flash_write(do_flash_cmd, flashaddr, val); - } else { - for (i = 0; i < EEPROM_SIZE; i++) { - buf[i] = 0xFF; - } - val = 0; - for (p = (uint16_t *)SYMVAL(__eeprom_workarea_start__); p < (uint16_t *)SYMVAL(__eeprom_workarea_end__); p++) { - val = *p; - if ((val & 255) < EEPROM_SIZE) { - buf[val & 255] = val >> 8; - } - } - buf[offset] = data; - for (flashaddr = (uint32_t)(uint16_t *)SYMVAL(__eeprom_workarea_start__); flashaddr < (uint32_t)(uint16_t *)SYMVAL(__eeprom_workarea_end__); flashaddr += 1024) { - *(uint32_t *)&(FTFA->FCCOB3) = 0x09000000 | flashaddr; - __disable_irq(); - (*((void (*)(volatile uint8_t *))((uint32_t)do_flash_cmd | 1)))(&(FTFA->FSTAT)); - __enable_irq(); - val = FTFA->FSTAT & (FTFA_FSTAT_RDCOLERR | FTFA_FSTAT_ACCERR | FTFA_FSTAT_FPVIOL); - ; - if (val) FTFA->FSTAT = val; - MCM->PLACR |= MCM_PLACR_CFCC; - } - flashaddr = (uint32_t)(uint16_t *)SYMVAL(__eeprom_workarea_start__); - for (i = 0; i < EEPROM_SIZE; i++) { - if (buf[i] == 0xFF) continue; - if ((flashaddr & 2) == 0) { - val = (buf[i] << 8) | i; - } else { - val = val | (buf[i] << 24) | (i << 16); - flash_write(do_flash_cmd, flashaddr, val); - } - flashaddr += 2; - } - flashend = flashaddr; - if ((flashaddr & 2)) { - val |= 0xFFFF0000; - flash_write(do_flash_cmd, flashaddr, val); - } - } -} - -/* -void do_flash_cmd(volatile uint8_t *fstat) -{ - *fstat = 0x80; - while ((*fstat & 0x80) == 0) ; // wait -} -00000000 : - 0: 2380 movs r3, #128 ; 0x80 - 2: 7003 strb r3, [r0, #0] - 4: 7803 ldrb r3, [r0, #0] - 6: b25b sxtb r3, r3 - 8: 2b00 cmp r3, #0 - a: dafb bge.n 4 - c: 4770 bx lr -*/ - -uint16_t eeprom_read_word(const uint16_t *addr) { - const uint8_t *p = (const uint8_t *)addr; - return eeprom_read_byte(p) | (eeprom_read_byte(p + 1) << 8); -} - -uint32_t eeprom_read_dword(const uint32_t *addr) { - const uint8_t *p = (const uint8_t *)addr; - return eeprom_read_byte(p) | (eeprom_read_byte(p + 1) << 8) | (eeprom_read_byte(p + 2) << 16) | (eeprom_read_byte(p + 3) << 24); -} - -void eeprom_read_block(void *buf, const void *addr, uint32_t len) { - const uint8_t *p = (const uint8_t *)addr; - uint8_t * dest = (uint8_t *)buf; - while (len--) { - *dest++ = eeprom_read_byte(p++); - } -} - -int eeprom_is_ready(void) { - return 1; -} - -void eeprom_write_word(uint16_t *addr, uint16_t value) { - uint8_t *p = (uint8_t *)addr; - eeprom_write_byte(p++, value); - eeprom_write_byte(p, value >> 8); -} - -void eeprom_write_dword(uint32_t *addr, uint32_t value) { - uint8_t *p = (uint8_t *)addr; - eeprom_write_byte(p++, value); - eeprom_write_byte(p++, value >> 8); - eeprom_write_byte(p++, value >> 16); - eeprom_write_byte(p, value >> 24); -} - -void eeprom_write_block(const void *buf, void *addr, uint32_t len) { - uint8_t * p = (uint8_t *)addr; - const uint8_t *src = (const uint8_t *)buf; - while (len--) { - eeprom_write_byte(p++, *src++); - } -} - -#else -# error Unsupported Teensy EEPROM. -#endif /* chip selection */ -// The update functions just calls write for now, but could probably be optimized - -void eeprom_update_byte(uint8_t *addr, uint8_t value) { - eeprom_write_byte(addr, value); -} - -void eeprom_update_word(uint16_t *addr, uint16_t value) { - uint8_t *p = (uint8_t *)addr; - eeprom_write_byte(p++, value); - eeprom_write_byte(p, value >> 8); -} - -void eeprom_update_dword(uint32_t *addr, uint32_t value) { - uint8_t *p = (uint8_t *)addr; - eeprom_write_byte(p++, value); - eeprom_write_byte(p++, value >> 8); - eeprom_write_byte(p++, value >> 16); - eeprom_write_byte(p, value >> 24); -} - -void eeprom_update_block(const void *buf, void *addr, size_t len) { - uint8_t * p = (uint8_t *)addr; - const uint8_t *src = (const uint8_t *)buf; - while (len--) { - eeprom_write_byte(p++, *src++); - } -} diff --git a/platforms/chibios/drivers/eeprom/eeprom_teensy.h b/platforms/chibios/drivers/eeprom/eeprom_teensy.h deleted file mode 100755 index 9a14a1fa79..0000000000 --- a/platforms/chibios/drivers/eeprom/eeprom_teensy.h +++ /dev/null @@ -1,25 +0,0 @@ -// Copyright 2022 Nick Brassel (@tzarc) -// SPDX-License-Identifier: GPL-2.0-or-later -#pragma once - -#include -#include - -#if defined(K20x) -/* Teensy 3.0, 3.1, 3.2; mchck; infinity keyboard */ -// The EEPROM is really RAM with a hardware-based backup system to -// flash memory. Selecting a smaller size EEPROM allows more wear -// leveling, for higher write endurance. If you edit this file, -// set this to the smallest size your application can use. Also, -// due to Freescale's implementation, writing 16 or 32 bit words -// (aligned to 2 or 4 byte boundaries) has twice the endurance -// compared to writing 8 bit bytes. -// -# ifndef EEPROM_SIZE -# define EEPROM_SIZE 32 -# endif -#elif defined(KL2x) /* Teensy LC (emulated) */ -# define EEPROM_SIZE 128 -#else -# error Unsupported Teensy EEPROM. -#endif diff --git a/platforms/chibios/drivers/flash/flash_stm32.c b/platforms/chibios/drivers/flash/flash_stm32.c deleted file mode 100644 index 72c41b8b78..0000000000 --- a/platforms/chibios/drivers/flash/flash_stm32.c +++ /dev/null @@ -1,208 +0,0 @@ -/* - * This software is experimental and a work in progress. - * Under no circumstances should these files be used in relation to any critical system(s). - * Use of these files is at your own risk. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, - * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR - * PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE - * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * This files are free to use from https://github.com/rogerclarkmelbourne/Arduino_STM32 and - * https://github.com/leaflabs/libmaple - * - * Modifications for QMK and STM32F303 by Yiancar - */ - -#include -#include "flash_stm32.h" - -#if defined(STM32F1XX) -# define FLASH_SR_WRPERR FLASH_SR_WRPRTERR -#endif - -#if defined(MCU_GD32V) -/* GigaDevice GD32VF103 is a STM32F103 clone at heart. */ -# include "gd32v_compatibility.h" -#endif - -#if defined(STM32F4XX) -# define FLASH_SR_PGERR (FLASH_SR_PGSERR | FLASH_SR_PGPERR | FLASH_SR_PGAERR) - -# define FLASH_KEY1 0x45670123U -# define FLASH_KEY2 0xCDEF89ABU - -static uint8_t ADDR2PAGE(uint32_t Page_Address) { - switch (Page_Address) { - case 0x08000000 ... 0x08003FFF: - return 0; - case 0x08004000 ... 0x08007FFF: - return 1; - case 0x08008000 ... 0x0800BFFF: - return 2; - case 0x0800C000 ... 0x0800FFFF: - return 3; - } - - // TODO: bad times... - return 7; -} -#endif - -/* Delay definition */ -#define EraseTimeout ((uint32_t)0x00000FFF) -#define ProgramTimeout ((uint32_t)0x0000001F) - -#define ASSERT(exp) (void)((0)) - -/** - * @brief Inserts a time delay. - * @param None - * @retval None - */ -static void delay(void) { - __IO uint32_t i = 0; - for (i = 0xFF; i != 0; i--) { - } -} - -/** - * @brief Returns the FLASH Status. - * @param None - * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, - * FLASH_ERROR_WRP or FLASH_COMPLETE - */ -FLASH_Status FLASH_GetStatus(void) { - if ((FLASH->SR & FLASH_SR_BSY) == FLASH_SR_BSY) return FLASH_BUSY; - - if ((FLASH->SR & FLASH_SR_PGERR) != 0) return FLASH_ERROR_PG; - - if ((FLASH->SR & FLASH_SR_WRPERR) != 0) return FLASH_ERROR_WRP; - -#if defined(FLASH_OBR_OPTERR) - if ((FLASH->SR & FLASH_OBR_OPTERR) != 0) return FLASH_ERROR_OPT; -#endif - - return FLASH_COMPLETE; -} - -/** - * @brief Waits for a Flash operation to complete or a TIMEOUT to occur. - * @param Timeout: FLASH progamming Timeout - * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, - * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. - */ -FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout) { - FLASH_Status status; - - /* Check for the Flash Status */ - status = FLASH_GetStatus(); - /* Wait for a Flash operation to complete or a TIMEOUT to occur */ - while ((status == FLASH_BUSY) && (Timeout != 0x00)) { - delay(); - status = FLASH_GetStatus(); - Timeout--; - } - if (Timeout == 0) status = FLASH_TIMEOUT; - /* Return the operation status */ - return status; -} - -/** - * @brief Erases a specified FLASH page. - * @param Page_Address: The page address to be erased. - * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, - * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. - */ -FLASH_Status FLASH_ErasePage(uint32_t Page_Address) { - FLASH_Status status = FLASH_COMPLETE; - /* Check the parameters */ - ASSERT(IS_FLASH_ADDRESS(Page_Address)); - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(EraseTimeout); - - if (status == FLASH_COMPLETE) { - /* if the previous operation is completed, proceed to erase the page */ -#if defined(FLASH_CR_SNB) - FLASH->CR &= ~FLASH_CR_SNB; - FLASH->CR |= FLASH_CR_SER | (ADDR2PAGE(Page_Address) << FLASH_CR_SNB_Pos); -#else - FLASH->CR |= FLASH_CR_PER; - FLASH->AR = Page_Address; -#endif - FLASH->CR |= FLASH_CR_STRT; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(EraseTimeout); - if (status != FLASH_TIMEOUT) { - /* if the erase operation is completed, disable the configured Bits */ -#if defined(FLASH_CR_SNB) - FLASH->CR &= ~(FLASH_CR_SER | FLASH_CR_SNB); -#else - FLASH->CR &= ~FLASH_CR_PER; -#endif - } - FLASH->SR = (FLASH_SR_EOP | FLASH_SR_PGERR | FLASH_SR_WRPERR); - } - /* Return the Erase Status */ - return status; -} - -/** - * @brief Programs a half word at a specified address. - * @param Address: specifies the address to be programmed. - * @param Data: specifies the data to be programmed. - * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, - * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. - */ -FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data) { - FLASH_Status status = FLASH_BAD_ADDRESS; - - if (IS_FLASH_ADDRESS(Address)) { - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - if (status == FLASH_COMPLETE) { - /* if the previous operation is completed, proceed to program the new data */ - -#if defined(FLASH_CR_PSIZE) - FLASH->CR &= ~FLASH_CR_PSIZE; - FLASH->CR |= FLASH_CR_PSIZE_0; -#endif - FLASH->CR |= FLASH_CR_PG; - *(__IO uint16_t*)Address = Data; - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - if (status != FLASH_TIMEOUT) { - /* if the program operation is completed, disable the PG Bit */ - FLASH->CR &= ~FLASH_CR_PG; - } - FLASH->SR = (FLASH_SR_EOP | FLASH_SR_PGERR | FLASH_SR_WRPERR); - } - } - return status; -} - -/** - * @brief Unlocks the FLASH Program Erase Controller. - * @param None - * @retval None - */ -void FLASH_Unlock(void) { - if (FLASH->CR & FLASH_CR_LOCK) { - /* Authorize the FPEC Access */ - FLASH->KEYR = FLASH_KEY1; - FLASH->KEYR = FLASH_KEY2; - } -} - -/** - * @brief Locks the FLASH Program Erase Controller. - * @param None - * @retval None - */ -void FLASH_Lock(void) { - /* Set the Lock Bit to lock the FPEC and the FCR */ - FLASH->CR |= FLASH_CR_LOCK; -} diff --git a/platforms/chibios/drivers/flash/flash_stm32.h b/platforms/chibios/drivers/flash/flash_stm32.h deleted file mode 100644 index 6c66642ec5..0000000000 --- a/platforms/chibios/drivers/flash/flash_stm32.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * This software is experimental and a work in progress. - * Under no circumstances should these files be used in relation to any critical system(s). - * Use of these files is at your own risk. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, - * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR - * PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE - * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * This files are free to use from https://github.com/rogerclarkmelbourne/Arduino_STM32 and - * https://github.com/leaflabs/libmaple - * - * Modifications for QMK and STM32F303 by Yiancar - */ - -#pragma once - -#ifdef __cplusplus -extern "C" { -#endif - -#include - -#ifdef FLASH_STM32_MOCKED -extern uint8_t FlashBuf[MOCK_FLASH_SIZE]; -#endif - -typedef enum { FLASH_BUSY = 1, FLASH_ERROR_PG, FLASH_ERROR_WRP, FLASH_ERROR_OPT, FLASH_COMPLETE, FLASH_TIMEOUT, FLASH_BAD_ADDRESS } FLASH_Status; - -#define IS_FLASH_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08000000) && ((ADDRESS) < 0x0807FFFF)) - -FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout); -FLASH_Status FLASH_ErasePage(uint32_t Page_Address); -FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data); - -void FLASH_Unlock(void); -void FLASH_Lock(void); - -#ifdef __cplusplus -} -#endif diff --git a/platforms/chibios/drivers/flash/legacy_flash_ops.c b/platforms/chibios/drivers/flash/legacy_flash_ops.c new file mode 100644 index 0000000000..fe5ad64764 --- /dev/null +++ b/platforms/chibios/drivers/flash/legacy_flash_ops.c @@ -0,0 +1,208 @@ +/* + * This software is experimental and a work in progress. + * Under no circumstances should these files be used in relation to any critical system(s). + * Use of these files is at your own risk. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, + * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR + * PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * This files are free to use from https://github.com/rogerclarkmelbourne/Arduino_STM32 and + * https://github.com/leaflabs/libmaple + * + * Modifications for QMK and STM32F303 by Yiancar + */ + +#include +#include "legacy_flash_ops.h" + +#if defined(STM32F1XX) +# define FLASH_SR_WRPERR FLASH_SR_WRPRTERR +#endif + +#if defined(MCU_GD32V) +/* GigaDevice GD32VF103 is a STM32F103 clone at heart. */ +# include "gd32v_compatibility.h" +#endif + +#if defined(STM32F4XX) +# define FLASH_SR_PGERR (FLASH_SR_PGSERR | FLASH_SR_PGPERR | FLASH_SR_PGAERR) + +# define FLASH_KEY1 0x45670123U +# define FLASH_KEY2 0xCDEF89ABU + +static uint8_t ADDR2PAGE(uint32_t Page_Address) { + switch (Page_Address) { + case 0x08000000 ... 0x08003FFF: + return 0; + case 0x08004000 ... 0x08007FFF: + return 1; + case 0x08008000 ... 0x0800BFFF: + return 2; + case 0x0800C000 ... 0x0800FFFF: + return 3; + } + + // TODO: bad times... + return 7; +} +#endif + +/* Delay definition */ +#define EraseTimeout ((uint32_t)0x00000FFF) +#define ProgramTimeout ((uint32_t)0x0000001F) + +#define ASSERT(exp) (void)((0)) + +/** + * @brief Inserts a time delay. + * @param None + * @retval None + */ +static void delay(void) { + __IO uint32_t i = 0; + for (i = 0xFF; i != 0; i--) { + } +} + +/** + * @brief Returns the FLASH Status. + * @param None + * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, + * FLASH_ERROR_WRP or FLASH_COMPLETE + */ +FLASH_Status FLASH_GetStatus(void) { + if ((FLASH->SR & FLASH_SR_BSY) == FLASH_SR_BSY) return FLASH_BUSY; + + if ((FLASH->SR & FLASH_SR_PGERR) != 0) return FLASH_ERROR_PG; + + if ((FLASH->SR & FLASH_SR_WRPERR) != 0) return FLASH_ERROR_WRP; + +#if defined(FLASH_OBR_OPTERR) + if ((FLASH->SR & FLASH_OBR_OPTERR) != 0) return FLASH_ERROR_OPT; +#endif + + return FLASH_COMPLETE; +} + +/** + * @brief Waits for a Flash operation to complete or a TIMEOUT to occur. + * @param Timeout: FLASH progamming Timeout + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout) { + FLASH_Status status; + + /* Check for the Flash Status */ + status = FLASH_GetStatus(); + /* Wait for a Flash operation to complete or a TIMEOUT to occur */ + while ((status == FLASH_BUSY) && (Timeout != 0x00)) { + delay(); + status = FLASH_GetStatus(); + Timeout--; + } + if (Timeout == 0) status = FLASH_TIMEOUT; + /* Return the operation status */ + return status; +} + +/** + * @brief Erases a specified FLASH page. + * @param Page_Address: The page address to be erased. + * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_ErasePage(uint32_t Page_Address) { + FLASH_Status status = FLASH_COMPLETE; + /* Check the parameters */ + ASSERT(IS_FLASH_ADDRESS(Page_Address)); + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(EraseTimeout); + + if (status == FLASH_COMPLETE) { + /* if the previous operation is completed, proceed to erase the page */ +#if defined(FLASH_CR_SNB) + FLASH->CR &= ~FLASH_CR_SNB; + FLASH->CR |= FLASH_CR_SER | (ADDR2PAGE(Page_Address) << FLASH_CR_SNB_Pos); +#else + FLASH->CR |= FLASH_CR_PER; + FLASH->AR = Page_Address; +#endif + FLASH->CR |= FLASH_CR_STRT; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(EraseTimeout); + if (status != FLASH_TIMEOUT) { + /* if the erase operation is completed, disable the configured Bits */ +#if defined(FLASH_CR_SNB) + FLASH->CR &= ~(FLASH_CR_SER | FLASH_CR_SNB); +#else + FLASH->CR &= ~FLASH_CR_PER; +#endif + } + FLASH->SR = (FLASH_SR_EOP | FLASH_SR_PGERR | FLASH_SR_WRPERR); + } + /* Return the Erase Status */ + return status; +} + +/** + * @brief Programs a half word at a specified address. + * @param Address: specifies the address to be programmed. + * @param Data: specifies the data to be programmed. + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data) { + FLASH_Status status = FLASH_BAD_ADDRESS; + + if (IS_FLASH_ADDRESS(Address)) { + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + if (status == FLASH_COMPLETE) { + /* if the previous operation is completed, proceed to program the new data */ + +#if defined(FLASH_CR_PSIZE) + FLASH->CR &= ~FLASH_CR_PSIZE; + FLASH->CR |= FLASH_CR_PSIZE_0; +#endif + FLASH->CR |= FLASH_CR_PG; + *(__IO uint16_t*)Address = Data; + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + if (status != FLASH_TIMEOUT) { + /* if the program operation is completed, disable the PG Bit */ + FLASH->CR &= ~FLASH_CR_PG; + } + FLASH->SR = (FLASH_SR_EOP | FLASH_SR_PGERR | FLASH_SR_WRPERR); + } + } + return status; +} + +/** + * @brief Unlocks the FLASH Program Erase Controller. + * @param None + * @retval None + */ +void FLASH_Unlock(void) { + if (FLASH->CR & FLASH_CR_LOCK) { + /* Authorize the FPEC Access */ + FLASH->KEYR = FLASH_KEY1; + FLASH->KEYR = FLASH_KEY2; + } +} + +/** + * @brief Locks the FLASH Program Erase Controller. + * @param None + * @retval None + */ +void FLASH_Lock(void) { + /* Set the Lock Bit to lock the FPEC and the FCR */ + FLASH->CR |= FLASH_CR_LOCK; +} diff --git a/platforms/chibios/drivers/flash/legacy_flash_ops.h b/platforms/chibios/drivers/flash/legacy_flash_ops.h new file mode 100644 index 0000000000..ef80764055 --- /dev/null +++ b/platforms/chibios/drivers/flash/legacy_flash_ops.h @@ -0,0 +1,44 @@ +/* + * This software is experimental and a work in progress. + * Under no circumstances should these files be used in relation to any critical system(s). + * Use of these files is at your own risk. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, + * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR + * PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * This files are free to use from https://github.com/rogerclarkmelbourne/Arduino_STM32 and + * https://github.com/leaflabs/libmaple + * + * Modifications for QMK and STM32F303 by Yiancar + */ + +#pragma once + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +#ifdef LEGACY_FLASH_OPS_MOCKED +extern uint8_t FlashBuf[MOCK_FLASH_SIZE]; +#endif + +typedef enum { FLASH_BUSY = 1, FLASH_ERROR_PG, FLASH_ERROR_WRP, FLASH_ERROR_OPT, FLASH_COMPLETE, FLASH_TIMEOUT, FLASH_BAD_ADDRESS } FLASH_Status; + +#define IS_FLASH_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08000000) && ((ADDRESS) < 0x0807FFFF)) + +FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout); +FLASH_Status FLASH_ErasePage(uint32_t Page_Address); +FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data); + +void FLASH_Unlock(void); +void FLASH_Lock(void); + +#ifdef __cplusplus +} +#endif diff --git a/platforms/chibios/drivers/wear_leveling/wear_leveling_legacy.c b/platforms/chibios/drivers/wear_leveling/wear_leveling_legacy.c index 87126c4467..7c6fd2d808 100644 --- a/platforms/chibios/drivers/wear_leveling/wear_leveling_legacy.c +++ b/platforms/chibios/drivers/wear_leveling/wear_leveling_legacy.c @@ -5,7 +5,7 @@ #include "timer.h" #include "wear_leveling.h" #include "wear_leveling_internal.h" -#include "flash_stm32.h" +#include "legacy_flash_ops.h" bool backing_store_init(void) { bs_dprintf("Init\n"); diff --git a/platforms/eeprom.h b/platforms/eeprom.h index 8cb7e342dc..fbfef20334 100644 --- a/platforms/eeprom.h +++ b/platforms/eeprom.h @@ -41,11 +41,11 @@ void eeprom_update_block(const void *__src, void *__dst, size_t __n); #elif defined(EEPROM_STM32_L0_L1) # include "eeprom_stm32_L0_L1.h" # define TOTAL_EEPROM_BYTE_COUNT (STM32_ONBOARD_EEPROM_SIZE) -#elif defined(EEPROM_TEENSY) -# include "eeprom_teensy.h" +#elif defined(EEPROM_KINETIS_FLEXRAM) +# include "eeprom_kinetis_flexram.h" # define TOTAL_EEPROM_BYTE_COUNT (EEPROM_SIZE) -#elif defined(EEPROM_STM32_FLASH_EMULATED) -# include "eeprom_stm32_defs.h" +#elif defined(EEPROM_LEGACY_EMULATED_FLASH) +# include "eeprom_legacy_emulated_flash_defs.h" # define TOTAL_EEPROM_BYTE_COUNT (FEE_DENSITY_BYTES) #elif defined(EEPROM_SAMD) # include "eeprom_samd.h" @@ -59,12 +59,12 @@ void eeprom_update_block(const void *__src, void *__dst, size_t __n); #elif defined(__AVR_AT90USB1286__) || defined(__AVR_AT90USB1287__) # define TOTAL_EEPROM_BYTE_COUNT 4096 #elif defined(EEPROM_TEST_HARNESS) -# ifndef FLASH_STM32_MOCKED +# ifndef LEGACY_FLASH_OPS_MOCKED // Normal tests # define TOTAL_EEPROM_BYTE_COUNT 32 # else // Flash wear-leveling testing -# include "eeprom_stm32_tests.h" +# include "eeprom_legacy_emulated_flash_tests.h" # define TOTAL_EEPROM_BYTE_COUNT (EEPROM_SIZE) # endif #else diff --git a/platforms/test/eeprom_legacy_emulated_flash_tests.cpp b/platforms/test/eeprom_legacy_emulated_flash_tests.cpp new file mode 100644 index 0000000000..d2c41fb77d --- /dev/null +++ b/platforms/test/eeprom_legacy_emulated_flash_tests.cpp @@ -0,0 +1,437 @@ +/* Copyright 2021 by Don Kjer + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include "gtest/gtest.h" + +extern "C" { +#include "eeprom.h" +} + +/* Mock Flash Parameters: + * + * === Large Layout === + * flash size: 65536 + * page size: 2048 + * density pages: 16 + * Simulated EEPROM size: 16384 + * + * FlashBuf Layout: + * [Unused | Compact | Write Log ] + * [0......|32768......|49152......65535] + * + * === Tiny Layout === + * flash size: 1024 + * page size: 512 + * density pages: 1 + * Simulated EEPROM size: 256 + * + * FlashBuf Layout: + * [Unused | Compact | Write Log ] + * [0......|512......|768......1023] + * + */ + +#define LOG_SIZE EEPROM_SIZE +#define LOG_BASE (MOCK_FLASH_SIZE - LOG_SIZE) +#define EEPROM_BASE (LOG_BASE - EEPROM_SIZE) + +/* Log encoding helpers */ +#define BYTE_VALUE(addr, value) (((addr) << 8) | (value)) +#define WORD_ZERO(addr) (0x8000 | ((addr) >> 1)) +#define WORD_ONE(addr) (0xA000 | ((addr) >> 1)) +#define WORD_NEXT(addr) (0xE000 | (((addr)-0x80) >> 1)) + +class EepromStm32Test : public testing::Test { + public: + EepromStm32Test() {} + ~EepromStm32Test() {} + + protected: + void SetUp() override { + EEPROM_Erase(); + } + + void TearDown() override { +#ifdef EEPROM_DEBUG + dumpEepromDataBuf(); +#endif + } +}; + +TEST_F(EepromStm32Test, TestErase) { + EEPROM_WriteDataByte(0, 0x42); + EEPROM_Erase(); + EXPECT_EQ(EEPROM_ReadDataByte(0), 0); + EXPECT_EQ(EEPROM_ReadDataByte(1), 0); +} + +TEST_F(EepromStm32Test, TestReadGarbage) { + uint8_t garbage = 0x3c; + for (int i = 0; i < MOCK_FLASH_SIZE; ++i) { + garbage ^= 0xa3; + garbage += i; + FlashBuf[i] = garbage; + } + EEPROM_Init(); // Just verify we don't crash +} + +TEST_F(EepromStm32Test, TestWriteBadAddress) { + EXPECT_EQ(EEPROM_WriteDataByte(EEPROM_SIZE, 0x42), FLASH_BAD_ADDRESS); + EXPECT_EQ(EEPROM_WriteDataWord(EEPROM_SIZE - 1, 0xbeef), FLASH_BAD_ADDRESS); + EXPECT_EQ(EEPROM_WriteDataWord(EEPROM_SIZE, 0xbeef), FLASH_BAD_ADDRESS); +} + +TEST_F(EepromStm32Test, TestReadBadAddress) { + EXPECT_EQ(EEPROM_ReadDataByte(EEPROM_SIZE), 0xFF); + EXPECT_EQ(EEPROM_ReadDataWord(EEPROM_SIZE - 1), 0xFFFF); + EXPECT_EQ(EEPROM_ReadDataWord(EEPROM_SIZE), 0xFFFF); + EXPECT_EQ(eeprom_read_dword((uint32_t*)(EEPROM_SIZE - 4)), 0); + EXPECT_EQ(eeprom_read_dword((uint32_t*)(EEPROM_SIZE - 3)), 0xFF000000); + EXPECT_EQ(eeprom_read_dword((uint32_t*)EEPROM_SIZE), 0xFFFFFFFF); +} + +TEST_F(EepromStm32Test, TestReadByte) { + /* Direct compacted-area baseline: Address < 0x80 */ + FlashBuf[EEPROM_BASE + 2] = ~0xef; + FlashBuf[EEPROM_BASE + 3] = ~0xbe; + /* Direct compacted-area baseline: Address >= 0x80 */ + FlashBuf[EEPROM_BASE + EEPROM_SIZE - 2] = ~0x78; + FlashBuf[EEPROM_BASE + EEPROM_SIZE - 1] = ~0x56; + /* Check values */ + EEPROM_Init(); + EXPECT_EQ(EEPROM_ReadDataByte(2), 0xef); + EXPECT_EQ(EEPROM_ReadDataByte(3), 0xbe); + EXPECT_EQ(EEPROM_ReadDataByte(EEPROM_SIZE - 2), 0x78); + EXPECT_EQ(EEPROM_ReadDataByte(EEPROM_SIZE - 1), 0x56); + /* Write Log byte value */ + FlashBuf[LOG_BASE] = 0x65; + FlashBuf[LOG_BASE + 1] = 3; + /* Write Log word value */ + *(uint16_t*)&FlashBuf[LOG_BASE + 2] = WORD_NEXT(EEPROM_SIZE - 2); + *(uint16_t*)&FlashBuf[LOG_BASE + 4] = ~0x9abc; + /* Check values */ + EEPROM_Init(); + EXPECT_EQ(EEPROM_ReadDataByte(2), 0xef); + EXPECT_EQ(EEPROM_ReadDataByte(3), 0x65); + EXPECT_EQ(EEPROM_ReadDataByte(EEPROM_SIZE - 2), 0xbc); + EXPECT_EQ(EEPROM_ReadDataByte(EEPROM_SIZE - 1), 0x9a); +} + +TEST_F(EepromStm32Test, TestWriteByte) { + /* Direct compacted-area baseline: Address < 0x80 */ + EEPROM_WriteDataByte(2, 0xef); + EEPROM_WriteDataByte(3, 0xbe); + /* Direct compacted-area baseline: Address >= 0x80 */ + EEPROM_WriteDataByte(EEPROM_SIZE - 2, 0x78); + EEPROM_WriteDataByte(EEPROM_SIZE - 1, 0x56); + /* Check values */ + /* First write in each aligned word should have been direct */ + EXPECT_EQ(FlashBuf[EEPROM_BASE + 2], (uint8_t)~0xef); + EXPECT_EQ(FlashBuf[EEPROM_BASE + EEPROM_SIZE - 2], (uint8_t)~0x78); + + /* Second write per aligned word requires a log entry */ + EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE], BYTE_VALUE(3, 0xbe)); + EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 2], WORD_NEXT(EEPROM_SIZE - 1)); + EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 4], (uint16_t)~0x5678); +} + +TEST_F(EepromStm32Test, TestByteRoundTrip) { + /* Direct compacted-area: Address < 0x80 */ + EEPROM_WriteDataWord(0, 0xdead); + EEPROM_WriteDataByte(2, 0xef); + EEPROM_WriteDataByte(3, 0xbe); + /* Direct compacted-area: Address >= 0x80 */ + EEPROM_WriteDataByte(EEPROM_SIZE - 2, 0x78); + EEPROM_WriteDataByte(EEPROM_SIZE - 1, 0x56); + /* Check values */ + EEPROM_Init(); + EXPECT_EQ(EEPROM_ReadDataByte(0), 0xad); + EXPECT_EQ(EEPROM_ReadDataByte(1), 0xde); + EXPECT_EQ(EEPROM_ReadDataByte(2), 0xef); + EXPECT_EQ(EEPROM_ReadDataByte(3), 0xbe); + EXPECT_EQ(EEPROM_ReadDataByte(EEPROM_SIZE - 2), 0x78); + EXPECT_EQ(EEPROM_ReadDataByte(EEPROM_SIZE - 1), 0x56); + /* Write log entries */ + EEPROM_WriteDataByte(2, 0x80); + EEPROM_WriteDataByte(EEPROM_SIZE - 2, 0x3c); + /* Check values */ + EEPROM_Init(); + EXPECT_EQ(EEPROM_ReadDataByte(2), 0x80); + EXPECT_EQ(EEPROM_ReadDataByte(3), 0xbe); + EXPECT_EQ(EEPROM_ReadDataByte(EEPROM_SIZE - 2), 0x3c); + EXPECT_EQ(EEPROM_ReadDataByte(EEPROM_SIZE - 1), 0x56); +} + +TEST_F(EepromStm32Test, TestReadWord) { + /* Direct compacted-area baseline: Address < 0x80 */ + FlashBuf[EEPROM_BASE + 0] = ~0xad; + FlashBuf[EEPROM_BASE + 1] = ~0xde; + /* Direct compacted-area baseline: Address >= 0x80 */ + FlashBuf[EEPROM_BASE + 200] = ~0xcd; + FlashBuf[EEPROM_BASE + 201] = ~0xab; + FlashBuf[EEPROM_BASE + EEPROM_SIZE - 4] = ~0x34; + FlashBuf[EEPROM_BASE + EEPROM_SIZE - 3] = ~0x12; + FlashBuf[EEPROM_BASE + EEPROM_SIZE - 2] = ~0x78; + FlashBuf[EEPROM_BASE + EEPROM_SIZE - 1] = ~0x56; + /* Check values */ + EEPROM_Init(); + EXPECT_EQ(EEPROM_ReadDataWord(0), 0xdead); + EXPECT_EQ(EEPROM_ReadDataWord(200), 0xabcd); + EXPECT_EQ(EEPROM_ReadDataWord(EEPROM_SIZE - 4), 0x1234); + EXPECT_EQ(EEPROM_ReadDataWord(EEPROM_SIZE - 2), 0x5678); + /* Write Log word zero-encoded */ + *(uint16_t*)&FlashBuf[LOG_BASE] = WORD_ZERO(200); + /* Write Log word one-encoded */ + *(uint16_t*)&FlashBuf[LOG_BASE + 2] = WORD_ONE(EEPROM_SIZE - 4); + /* Write Log word value */ + *(uint16_t*)&FlashBuf[LOG_BASE + 4] = WORD_NEXT(EEPROM_SIZE - 2); + *(uint16_t*)&FlashBuf[LOG_BASE + 6] = ~0x9abc; + /* Check values */ + EEPROM_Init(); + EXPECT_EQ(EEPROM_ReadDataWord(200), 0); + EXPECT_EQ(EEPROM_ReadDataWord(EEPROM_SIZE - 4), 1); + EXPECT_EQ(EEPROM_ReadDataWord(EEPROM_SIZE - 2), 0x9abc); +} + +TEST_F(EepromStm32Test, TestWriteWord) { + /* Direct compacted-area: Address < 0x80 */ + EEPROM_WriteDataWord(0, 0xdead); // Aligned + EEPROM_WriteDataWord(3, 0xbeef); // Unaligned + /* Direct compacted-area: Address >= 0x80 */ + EEPROM_WriteDataWord(200, 0xabcd); // Aligned + EEPROM_WriteDataWord(203, 0x9876); // Unaligned + EEPROM_WriteDataWord(EEPROM_SIZE - 4, 0x1234); + EEPROM_WriteDataWord(EEPROM_SIZE - 2, 0x5678); + /* Write Log word zero-encoded */ + EEPROM_WriteDataWord(EEPROM_SIZE - 4, 0); + /* Write Log word one-encoded */ + EEPROM_WriteDataWord(EEPROM_SIZE - 2, 1); + /* Write Log word value aligned */ + EEPROM_WriteDataWord(200, 0x4321); // Aligned + /* Write Log word value unaligned */ + EEPROM_WriteDataByte(202, 0x3c); // Set neighboring byte + EEPROM_WriteDataWord(203, 0xcdef); // Unaligned + /* Check values */ + /* Direct compacted-area */ + EXPECT_EQ(*(uint16_t*)&FlashBuf[EEPROM_BASE], (uint16_t)~0xdead); + EXPECT_EQ(*(uint16_t*)&FlashBuf[EEPROM_BASE + 3], (uint16_t)~0xbeef); + EXPECT_EQ(*(uint16_t*)&FlashBuf[EEPROM_BASE + 200], (uint16_t)~0xabcd); + EXPECT_EQ(FlashBuf[EEPROM_BASE + 203], (uint8_t)~0x76); + EXPECT_EQ(FlashBuf[EEPROM_BASE + 204], (uint8_t)~0x98); + EXPECT_EQ(*(uint16_t*)&FlashBuf[EEPROM_BASE + EEPROM_SIZE - 4], (uint16_t)~0x1234); + EXPECT_EQ(*(uint16_t*)&FlashBuf[EEPROM_BASE + EEPROM_SIZE - 2], (uint16_t)~0x5678); + /* Write Log word zero-encoded */ + EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE], WORD_ZERO(EEPROM_SIZE - 4)); + /* Write Log word one-encoded */ + EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 2], WORD_ONE(EEPROM_SIZE - 2)); + /* Write Log word value aligned */ + EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 4], WORD_NEXT(200)); + EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 6], (uint16_t)~0x4321); + /* Write Log word value unaligned */ + EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 8], WORD_NEXT(202)); + EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 10], (uint16_t)~0x763c); + EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 12], WORD_NEXT(202)); + EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 14], (uint16_t)~0xef3c); + EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 16], WORD_NEXT(204)); + EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 18], (uint16_t)~0x00cd); +} + +TEST_F(EepromStm32Test, TestWordRoundTrip) { + /* Direct compacted-area: Address < 0x80 */ + EEPROM_WriteDataWord(0, 0xdead); // Aligned + EEPROM_WriteDataWord(3, 0xbeef); // Unaligned + /* Direct compacted-area: Address >= 0x80 */ + EEPROM_WriteDataWord(200, 0xabcd); // Aligned + EEPROM_WriteDataWord(203, 0x9876); // Unaligned + EEPROM_WriteDataWord(EEPROM_SIZE - 4, 0x1234); + EEPROM_WriteDataWord(EEPROM_SIZE - 2, 0x5678); + /* Check values */ + EEPROM_Init(); + EXPECT_EQ(EEPROM_ReadDataWord(0), 0xdead); + EXPECT_EQ(EEPROM_ReadDataWord(3), 0xbeef); + EXPECT_EQ(EEPROM_ReadDataWord(200), 0xabcd); + EXPECT_EQ(EEPROM_ReadDataWord(203), 0x9876); + EXPECT_EQ(EEPROM_ReadDataWord(EEPROM_SIZE - 4), 0x1234); + EXPECT_EQ(EEPROM_ReadDataWord(EEPROM_SIZE - 2), 0x5678); + + /* Write Log word zero-encoded */ + EEPROM_WriteDataWord(EEPROM_SIZE - 4, 0); + /* Write Log word one-encoded */ + EEPROM_WriteDataWord(EEPROM_SIZE - 2, 1); + /* Write Log word value aligned */ + EEPROM_WriteDataWord(200, 0x4321); // Aligned + /* Write Log word value unaligned */ + EEPROM_WriteDataByte(202, 0x3c); // Set neighboring byte + EEPROM_WriteDataWord(203, 0xcdef); // Unaligned + /* Check values */ + EEPROM_Init(); + EXPECT_EQ(EEPROM_ReadDataWord(200), 0x4321); + EXPECT_EQ(EEPROM_ReadDataByte(202), 0x3c); + EXPECT_EQ(EEPROM_ReadDataWord(203), 0xcdef); + EXPECT_EQ(EEPROM_ReadDataWord(EEPROM_SIZE - 4), 0); + EXPECT_EQ(EEPROM_ReadDataWord(EEPROM_SIZE - 2), 1); +} + +TEST_F(EepromStm32Test, TestByteWordBoundary) { + /* Direct compacted-area write */ + EEPROM_WriteDataWord(0x7e, 0xdead); + EEPROM_WriteDataWord(0x80, 0xbeef); + /* Byte log entry */ + EEPROM_WriteDataByte(0x7f, 0x3c); + /* Word log entry */ + EEPROM_WriteDataByte(0x80, 0x18); + /* Check values */ + EEPROM_Init(); + EXPECT_EQ(EEPROM_ReadDataWord(0x7e), 0x3cad); + EXPECT_EQ(EEPROM_ReadDataWord(0x80), 0xbe18); + EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE], BYTE_VALUE(0x7f, 0x3c)); + EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 2], WORD_NEXT(0x80)); + EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 4], (uint16_t)~0xbe18); + /* Byte log entries */ + EEPROM_WriteDataWord(0x7e, 0xcafe); + /* Check values */ + EEPROM_Init(); + EXPECT_EQ(EEPROM_ReadDataWord(0x7e), 0xcafe); + EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 6], BYTE_VALUE(0x7e, 0xfe)); + EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 8], BYTE_VALUE(0x7f, 0xca)); + /* Byte and Word log entries */ + EEPROM_WriteDataWord(0x7f, 0xba5e); + /* Check values */ + EEPROM_Init(); + EXPECT_EQ(EEPROM_ReadDataWord(0x7f), 0xba5e); + EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 10], BYTE_VALUE(0x7f, 0x5e)); + EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 12], WORD_NEXT(0x80)); + EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 14], (uint16_t)~0xbeba); + /* Word log entry */ + EEPROM_WriteDataWord(0x80, 0xf00d); + /* Check values */ + EEPROM_Init(); + EXPECT_EQ(EEPROM_ReadDataWord(0x80), 0xf00d); + EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 16], WORD_NEXT(0x80)); + EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 18], (uint16_t)~0xf00d); +} + +TEST_F(EepromStm32Test, TestDWordRoundTrip) { + /* Direct compacted-area: Address < 0x80 */ + eeprom_write_dword((uint32_t*)0, 0xdeadbeef); // Aligned + eeprom_write_dword((uint32_t*)9, 0x12345678); // Unaligned + /* Direct compacted-area: Address >= 0x80 */ + eeprom_write_dword((uint32_t*)200, 0xfacef00d); + eeprom_write_dword((uint32_t*)(EEPROM_SIZE - 4), 0xba5eba11); // Aligned + eeprom_write_dword((uint32_t*)(EEPROM_SIZE - 9), 0xcafed00d); // Unaligned + /* Check direct values */ + EEPROM_Init(); + EXPECT_EQ(eeprom_read_dword((uint32_t*)0), 0xdeadbeef); + EXPECT_EQ(eeprom_read_dword((uint32_t*)9), 0x12345678); + EXPECT_EQ(eeprom_read_dword((uint32_t*)200), 0xfacef00d); + EXPECT_EQ(eeprom_read_dword((uint32_t*)(EEPROM_SIZE - 4)), 0xba5eba11); // Aligned + EXPECT_EQ(eeprom_read_dword((uint32_t*)(EEPROM_SIZE - 9)), 0xcafed00d); // Unaligned + /* Write Log byte encoded */ + eeprom_write_dword((uint32_t*)0, 0xdecafbad); + eeprom_write_dword((uint32_t*)9, 0x87654321); + /* Write Log word encoded */ + eeprom_write_dword((uint32_t*)200, 1); + /* Write Log word value aligned */ + eeprom_write_dword((uint32_t*)(EEPROM_SIZE - 4), 0xdeadc0de); // Aligned + eeprom_write_dword((uint32_t*)(EEPROM_SIZE - 9), 0x6789abcd); // Unaligned + /* Check log values */ + EEPROM_Init(); + EXPECT_EQ(eeprom_read_dword((uint32_t*)0), 0xdecafbad); + EXPECT_EQ(eeprom_read_dword((uint32_t*)9), 0x87654321); + EXPECT_EQ(eeprom_read_dword((uint32_t*)200), 1); + EXPECT_EQ(eeprom_read_dword((uint32_t*)(EEPROM_SIZE - 4)), 0xdeadc0de); // Aligned + EXPECT_EQ(eeprom_read_dword((uint32_t*)(EEPROM_SIZE - 9)), 0x6789abcd); // Unaligned +} + +TEST_F(EepromStm32Test, TestBlockRoundTrip) { + char src0[] = "0123456789abcdef"; + void* src1 = (void*)&src0[1]; + /* Various alignments of src & dst, Address < 0x80 */ + eeprom_write_block(src0, (void*)0, sizeof(src0)); + eeprom_write_block(src0, (void*)21, sizeof(src0)); + eeprom_write_block(src1, (void*)40, sizeof(src0) - 1); + eeprom_write_block(src1, (void*)61, sizeof(src0) - 1); + /* Various alignments of src & dst, Address >= 0x80 */ + eeprom_write_block(src0, (void*)140, sizeof(src0)); + eeprom_write_block(src0, (void*)161, sizeof(src0)); + eeprom_write_block(src1, (void*)180, sizeof(src0) - 1); + eeprom_write_block(src1, (void*)201, sizeof(src0) - 1); + + /* Check values */ + EEPROM_Init(); + + char dstBuf[256] = {0}; + char* dst0a = (char*)dstBuf; + char* dst0b = (char*)&dstBuf[20]; + char* dst1a = (char*)&dstBuf[41]; + char* dst1b = (char*)&dstBuf[61]; + char* dst0c = (char*)&dstBuf[80]; + char* dst0d = (char*)&dstBuf[100]; + char* dst1c = (char*)&dstBuf[121]; + char* dst1d = (char*)&dstBuf[141]; + eeprom_read_block((void*)dst0a, (void*)0, sizeof(src0)); + eeprom_read_block((void*)dst0b, (void*)21, sizeof(src0)); + eeprom_read_block((void*)dst1a, (void*)40, sizeof(src0) - 1); + eeprom_read_block((void*)dst1b, (void*)61, sizeof(src0) - 1); + eeprom_read_block((void*)dst0c, (void*)140, sizeof(src0)); + eeprom_read_block((void*)dst0d, (void*)161, sizeof(src0)); + eeprom_read_block((void*)dst1c, (void*)180, sizeof(src0) - 1); + eeprom_read_block((void*)dst1d, (void*)201, sizeof(src0) - 1); + EXPECT_EQ(strcmp((char*)src0, dst0a), 0); + EXPECT_EQ(strcmp((char*)src0, dst0b), 0); + EXPECT_EQ(strcmp((char*)src0, dst0c), 0); + EXPECT_EQ(strcmp((char*)src0, dst0d), 0); + EXPECT_EQ(strcmp((char*)src1, dst1a), 0); + EXPECT_EQ(strcmp((char*)src1, dst1b), 0); + EXPECT_EQ(strcmp((char*)src1, dst1c), 0); + EXPECT_EQ(strcmp((char*)src1, dst1d), 0); +} + +TEST_F(EepromStm32Test, TestCompaction) { + /* Direct writes */ + eeprom_write_dword((uint32_t*)0, 0xdeadbeef); + eeprom_write_byte((uint8_t*)4, 0x3c); + eeprom_write_word((uint16_t*)6, 0xd00d); + eeprom_write_dword((uint32_t*)150, 0xcafef00d); + eeprom_write_dword((uint32_t*)200, 0x12345678); + /* Fill write log entries */ + uint32_t i; + uint32_t val = 0xd8453c6b; + for (i = 0; i < (LOG_SIZE / (sizeof(uint32_t) * 2)); i++) { + val ^= 0x593ca5b3; + val += i; + eeprom_write_dword((uint32_t*)200, val); + } + /* Check values pre-compaction */ + EEPROM_Init(); + EXPECT_EQ(eeprom_read_dword((uint32_t*)0), 0xdeadbeef); + EXPECT_EQ(eeprom_read_byte((uint8_t*)4), 0x3c); + EXPECT_EQ(eeprom_read_word((uint16_t*)6), 0xd00d); + EXPECT_EQ(eeprom_read_dword((uint32_t*)150), 0xcafef00d); + EXPECT_EQ(eeprom_read_dword((uint32_t*)200), val); + EXPECT_NE(*(uint16_t*)&FlashBuf[LOG_BASE], 0xFFFF); + EXPECT_NE(*(uint16_t*)&FlashBuf[LOG_BASE + LOG_SIZE - 2], 0xFFFF); + /* Run compaction */ + eeprom_write_byte((uint8_t*)4, 0x1f); + EEPROM_Init(); + EXPECT_EQ(eeprom_read_dword((uint32_t*)0), 0xdeadbeef); + EXPECT_EQ(eeprom_read_byte((uint8_t*)4), 0x1f); + EXPECT_EQ(eeprom_read_word((uint16_t*)6), 0xd00d); + EXPECT_EQ(eeprom_read_dword((uint32_t*)150), 0xcafef00d); + EXPECT_EQ(eeprom_read_dword((uint32_t*)200), val); + EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE], 0xFFFF); + EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + LOG_SIZE - 2], 0xFFFF); +} diff --git a/platforms/test/eeprom_legacy_emulated_flash_tests.h b/platforms/test/eeprom_legacy_emulated_flash_tests.h new file mode 100644 index 0000000000..467ec96d74 --- /dev/null +++ b/platforms/test/eeprom_legacy_emulated_flash_tests.h @@ -0,0 +1,8 @@ +// Copyright 2018-2022 Nick Brassel (@tzarc) +// SPDX-License-Identifier: GPL-2.0-or-later +#pragma once + +#include "legacy_flash_ops.h" +#include "eeprom_legacy_emulated_flash.h" + +#define EEPROM_SIZE (FEE_PAGE_SIZE * FEE_PAGE_COUNT / 2) diff --git a/platforms/test/eeprom_stm32_tests.cpp b/platforms/test/eeprom_stm32_tests.cpp deleted file mode 100644 index d2c41fb77d..0000000000 --- a/platforms/test/eeprom_stm32_tests.cpp +++ /dev/null @@ -1,437 +0,0 @@ -/* Copyright 2021 by Don Kjer - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include "gtest/gtest.h" - -extern "C" { -#include "eeprom.h" -} - -/* Mock Flash Parameters: - * - * === Large Layout === - * flash size: 65536 - * page size: 2048 - * density pages: 16 - * Simulated EEPROM size: 16384 - * - * FlashBuf Layout: - * [Unused | Compact | Write Log ] - * [0......|32768......|49152......65535] - * - * === Tiny Layout === - * flash size: 1024 - * page size: 512 - * density pages: 1 - * Simulated EEPROM size: 256 - * - * FlashBuf Layout: - * [Unused | Compact | Write Log ] - * [0......|512......|768......1023] - * - */ - -#define LOG_SIZE EEPROM_SIZE -#define LOG_BASE (MOCK_FLASH_SIZE - LOG_SIZE) -#define EEPROM_BASE (LOG_BASE - EEPROM_SIZE) - -/* Log encoding helpers */ -#define BYTE_VALUE(addr, value) (((addr) << 8) | (value)) -#define WORD_ZERO(addr) (0x8000 | ((addr) >> 1)) -#define WORD_ONE(addr) (0xA000 | ((addr) >> 1)) -#define WORD_NEXT(addr) (0xE000 | (((addr)-0x80) >> 1)) - -class EepromStm32Test : public testing::Test { - public: - EepromStm32Test() {} - ~EepromStm32Test() {} - - protected: - void SetUp() override { - EEPROM_Erase(); - } - - void TearDown() override { -#ifdef EEPROM_DEBUG - dumpEepromDataBuf(); -#endif - } -}; - -TEST_F(EepromStm32Test, TestErase) { - EEPROM_WriteDataByte(0, 0x42); - EEPROM_Erase(); - EXPECT_EQ(EEPROM_ReadDataByte(0), 0); - EXPECT_EQ(EEPROM_ReadDataByte(1), 0); -} - -TEST_F(EepromStm32Test, TestReadGarbage) { - uint8_t garbage = 0x3c; - for (int i = 0; i < MOCK_FLASH_SIZE; ++i) { - garbage ^= 0xa3; - garbage += i; - FlashBuf[i] = garbage; - } - EEPROM_Init(); // Just verify we don't crash -} - -TEST_F(EepromStm32Test, TestWriteBadAddress) { - EXPECT_EQ(EEPROM_WriteDataByte(EEPROM_SIZE, 0x42), FLASH_BAD_ADDRESS); - EXPECT_EQ(EEPROM_WriteDataWord(EEPROM_SIZE - 1, 0xbeef), FLASH_BAD_ADDRESS); - EXPECT_EQ(EEPROM_WriteDataWord(EEPROM_SIZE, 0xbeef), FLASH_BAD_ADDRESS); -} - -TEST_F(EepromStm32Test, TestReadBadAddress) { - EXPECT_EQ(EEPROM_ReadDataByte(EEPROM_SIZE), 0xFF); - EXPECT_EQ(EEPROM_ReadDataWord(EEPROM_SIZE - 1), 0xFFFF); - EXPECT_EQ(EEPROM_ReadDataWord(EEPROM_SIZE), 0xFFFF); - EXPECT_EQ(eeprom_read_dword((uint32_t*)(EEPROM_SIZE - 4)), 0); - EXPECT_EQ(eeprom_read_dword((uint32_t*)(EEPROM_SIZE - 3)), 0xFF000000); - EXPECT_EQ(eeprom_read_dword((uint32_t*)EEPROM_SIZE), 0xFFFFFFFF); -} - -TEST_F(EepromStm32Test, TestReadByte) { - /* Direct compacted-area baseline: Address < 0x80 */ - FlashBuf[EEPROM_BASE + 2] = ~0xef; - FlashBuf[EEPROM_BASE + 3] = ~0xbe; - /* Direct compacted-area baseline: Address >= 0x80 */ - FlashBuf[EEPROM_BASE + EEPROM_SIZE - 2] = ~0x78; - FlashBuf[EEPROM_BASE + EEPROM_SIZE - 1] = ~0x56; - /* Check values */ - EEPROM_Init(); - EXPECT_EQ(EEPROM_ReadDataByte(2), 0xef); - EXPECT_EQ(EEPROM_ReadDataByte(3), 0xbe); - EXPECT_EQ(EEPROM_ReadDataByte(EEPROM_SIZE - 2), 0x78); - EXPECT_EQ(EEPROM_ReadDataByte(EEPROM_SIZE - 1), 0x56); - /* Write Log byte value */ - FlashBuf[LOG_BASE] = 0x65; - FlashBuf[LOG_BASE + 1] = 3; - /* Write Log word value */ - *(uint16_t*)&FlashBuf[LOG_BASE + 2] = WORD_NEXT(EEPROM_SIZE - 2); - *(uint16_t*)&FlashBuf[LOG_BASE + 4] = ~0x9abc; - /* Check values */ - EEPROM_Init(); - EXPECT_EQ(EEPROM_ReadDataByte(2), 0xef); - EXPECT_EQ(EEPROM_ReadDataByte(3), 0x65); - EXPECT_EQ(EEPROM_ReadDataByte(EEPROM_SIZE - 2), 0xbc); - EXPECT_EQ(EEPROM_ReadDataByte(EEPROM_SIZE - 1), 0x9a); -} - -TEST_F(EepromStm32Test, TestWriteByte) { - /* Direct compacted-area baseline: Address < 0x80 */ - EEPROM_WriteDataByte(2, 0xef); - EEPROM_WriteDataByte(3, 0xbe); - /* Direct compacted-area baseline: Address >= 0x80 */ - EEPROM_WriteDataByte(EEPROM_SIZE - 2, 0x78); - EEPROM_WriteDataByte(EEPROM_SIZE - 1, 0x56); - /* Check values */ - /* First write in each aligned word should have been direct */ - EXPECT_EQ(FlashBuf[EEPROM_BASE + 2], (uint8_t)~0xef); - EXPECT_EQ(FlashBuf[EEPROM_BASE + EEPROM_SIZE - 2], (uint8_t)~0x78); - - /* Second write per aligned word requires a log entry */ - EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE], BYTE_VALUE(3, 0xbe)); - EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 2], WORD_NEXT(EEPROM_SIZE - 1)); - EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 4], (uint16_t)~0x5678); -} - -TEST_F(EepromStm32Test, TestByteRoundTrip) { - /* Direct compacted-area: Address < 0x80 */ - EEPROM_WriteDataWord(0, 0xdead); - EEPROM_WriteDataByte(2, 0xef); - EEPROM_WriteDataByte(3, 0xbe); - /* Direct compacted-area: Address >= 0x80 */ - EEPROM_WriteDataByte(EEPROM_SIZE - 2, 0x78); - EEPROM_WriteDataByte(EEPROM_SIZE - 1, 0x56); - /* Check values */ - EEPROM_Init(); - EXPECT_EQ(EEPROM_ReadDataByte(0), 0xad); - EXPECT_EQ(EEPROM_ReadDataByte(1), 0xde); - EXPECT_EQ(EEPROM_ReadDataByte(2), 0xef); - EXPECT_EQ(EEPROM_ReadDataByte(3), 0xbe); - EXPECT_EQ(EEPROM_ReadDataByte(EEPROM_SIZE - 2), 0x78); - EXPECT_EQ(EEPROM_ReadDataByte(EEPROM_SIZE - 1), 0x56); - /* Write log entries */ - EEPROM_WriteDataByte(2, 0x80); - EEPROM_WriteDataByte(EEPROM_SIZE - 2, 0x3c); - /* Check values */ - EEPROM_Init(); - EXPECT_EQ(EEPROM_ReadDataByte(2), 0x80); - EXPECT_EQ(EEPROM_ReadDataByte(3), 0xbe); - EXPECT_EQ(EEPROM_ReadDataByte(EEPROM_SIZE - 2), 0x3c); - EXPECT_EQ(EEPROM_ReadDataByte(EEPROM_SIZE - 1), 0x56); -} - -TEST_F(EepromStm32Test, TestReadWord) { - /* Direct compacted-area baseline: Address < 0x80 */ - FlashBuf[EEPROM_BASE + 0] = ~0xad; - FlashBuf[EEPROM_BASE + 1] = ~0xde; - /* Direct compacted-area baseline: Address >= 0x80 */ - FlashBuf[EEPROM_BASE + 200] = ~0xcd; - FlashBuf[EEPROM_BASE + 201] = ~0xab; - FlashBuf[EEPROM_BASE + EEPROM_SIZE - 4] = ~0x34; - FlashBuf[EEPROM_BASE + EEPROM_SIZE - 3] = ~0x12; - FlashBuf[EEPROM_BASE + EEPROM_SIZE - 2] = ~0x78; - FlashBuf[EEPROM_BASE + EEPROM_SIZE - 1] = ~0x56; - /* Check values */ - EEPROM_Init(); - EXPECT_EQ(EEPROM_ReadDataWord(0), 0xdead); - EXPECT_EQ(EEPROM_ReadDataWord(200), 0xabcd); - EXPECT_EQ(EEPROM_ReadDataWord(EEPROM_SIZE - 4), 0x1234); - EXPECT_EQ(EEPROM_ReadDataWord(EEPROM_SIZE - 2), 0x5678); - /* Write Log word zero-encoded */ - *(uint16_t*)&FlashBuf[LOG_BASE] = WORD_ZERO(200); - /* Write Log word one-encoded */ - *(uint16_t*)&FlashBuf[LOG_BASE + 2] = WORD_ONE(EEPROM_SIZE - 4); - /* Write Log word value */ - *(uint16_t*)&FlashBuf[LOG_BASE + 4] = WORD_NEXT(EEPROM_SIZE - 2); - *(uint16_t*)&FlashBuf[LOG_BASE + 6] = ~0x9abc; - /* Check values */ - EEPROM_Init(); - EXPECT_EQ(EEPROM_ReadDataWord(200), 0); - EXPECT_EQ(EEPROM_ReadDataWord(EEPROM_SIZE - 4), 1); - EXPECT_EQ(EEPROM_ReadDataWord(EEPROM_SIZE - 2), 0x9abc); -} - -TEST_F(EepromStm32Test, TestWriteWord) { - /* Direct compacted-area: Address < 0x80 */ - EEPROM_WriteDataWord(0, 0xdead); // Aligned - EEPROM_WriteDataWord(3, 0xbeef); // Unaligned - /* Direct compacted-area: Address >= 0x80 */ - EEPROM_WriteDataWord(200, 0xabcd); // Aligned - EEPROM_WriteDataWord(203, 0x9876); // Unaligned - EEPROM_WriteDataWord(EEPROM_SIZE - 4, 0x1234); - EEPROM_WriteDataWord(EEPROM_SIZE - 2, 0x5678); - /* Write Log word zero-encoded */ - EEPROM_WriteDataWord(EEPROM_SIZE - 4, 0); - /* Write Log word one-encoded */ - EEPROM_WriteDataWord(EEPROM_SIZE - 2, 1); - /* Write Log word value aligned */ - EEPROM_WriteDataWord(200, 0x4321); // Aligned - /* Write Log word value unaligned */ - EEPROM_WriteDataByte(202, 0x3c); // Set neighboring byte - EEPROM_WriteDataWord(203, 0xcdef); // Unaligned - /* Check values */ - /* Direct compacted-area */ - EXPECT_EQ(*(uint16_t*)&FlashBuf[EEPROM_BASE], (uint16_t)~0xdead); - EXPECT_EQ(*(uint16_t*)&FlashBuf[EEPROM_BASE + 3], (uint16_t)~0xbeef); - EXPECT_EQ(*(uint16_t*)&FlashBuf[EEPROM_BASE + 200], (uint16_t)~0xabcd); - EXPECT_EQ(FlashBuf[EEPROM_BASE + 203], (uint8_t)~0x76); - EXPECT_EQ(FlashBuf[EEPROM_BASE + 204], (uint8_t)~0x98); - EXPECT_EQ(*(uint16_t*)&FlashBuf[EEPROM_BASE + EEPROM_SIZE - 4], (uint16_t)~0x1234); - EXPECT_EQ(*(uint16_t*)&FlashBuf[EEPROM_BASE + EEPROM_SIZE - 2], (uint16_t)~0x5678); - /* Write Log word zero-encoded */ - EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE], WORD_ZERO(EEPROM_SIZE - 4)); - /* Write Log word one-encoded */ - EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 2], WORD_ONE(EEPROM_SIZE - 2)); - /* Write Log word value aligned */ - EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 4], WORD_NEXT(200)); - EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 6], (uint16_t)~0x4321); - /* Write Log word value unaligned */ - EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 8], WORD_NEXT(202)); - EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 10], (uint16_t)~0x763c); - EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 12], WORD_NEXT(202)); - EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 14], (uint16_t)~0xef3c); - EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 16], WORD_NEXT(204)); - EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 18], (uint16_t)~0x00cd); -} - -TEST_F(EepromStm32Test, TestWordRoundTrip) { - /* Direct compacted-area: Address < 0x80 */ - EEPROM_WriteDataWord(0, 0xdead); // Aligned - EEPROM_WriteDataWord(3, 0xbeef); // Unaligned - /* Direct compacted-area: Address >= 0x80 */ - EEPROM_WriteDataWord(200, 0xabcd); // Aligned - EEPROM_WriteDataWord(203, 0x9876); // Unaligned - EEPROM_WriteDataWord(EEPROM_SIZE - 4, 0x1234); - EEPROM_WriteDataWord(EEPROM_SIZE - 2, 0x5678); - /* Check values */ - EEPROM_Init(); - EXPECT_EQ(EEPROM_ReadDataWord(0), 0xdead); - EXPECT_EQ(EEPROM_ReadDataWord(3), 0xbeef); - EXPECT_EQ(EEPROM_ReadDataWord(200), 0xabcd); - EXPECT_EQ(EEPROM_ReadDataWord(203), 0x9876); - EXPECT_EQ(EEPROM_ReadDataWord(EEPROM_SIZE - 4), 0x1234); - EXPECT_EQ(EEPROM_ReadDataWord(EEPROM_SIZE - 2), 0x5678); - - /* Write Log word zero-encoded */ - EEPROM_WriteDataWord(EEPROM_SIZE - 4, 0); - /* Write Log word one-encoded */ - EEPROM_WriteDataWord(EEPROM_SIZE - 2, 1); - /* Write Log word value aligned */ - EEPROM_WriteDataWord(200, 0x4321); // Aligned - /* Write Log word value unaligned */ - EEPROM_WriteDataByte(202, 0x3c); // Set neighboring byte - EEPROM_WriteDataWord(203, 0xcdef); // Unaligned - /* Check values */ - EEPROM_Init(); - EXPECT_EQ(EEPROM_ReadDataWord(200), 0x4321); - EXPECT_EQ(EEPROM_ReadDataByte(202), 0x3c); - EXPECT_EQ(EEPROM_ReadDataWord(203), 0xcdef); - EXPECT_EQ(EEPROM_ReadDataWord(EEPROM_SIZE - 4), 0); - EXPECT_EQ(EEPROM_ReadDataWord(EEPROM_SIZE - 2), 1); -} - -TEST_F(EepromStm32Test, TestByteWordBoundary) { - /* Direct compacted-area write */ - EEPROM_WriteDataWord(0x7e, 0xdead); - EEPROM_WriteDataWord(0x80, 0xbeef); - /* Byte log entry */ - EEPROM_WriteDataByte(0x7f, 0x3c); - /* Word log entry */ - EEPROM_WriteDataByte(0x80, 0x18); - /* Check values */ - EEPROM_Init(); - EXPECT_EQ(EEPROM_ReadDataWord(0x7e), 0x3cad); - EXPECT_EQ(EEPROM_ReadDataWord(0x80), 0xbe18); - EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE], BYTE_VALUE(0x7f, 0x3c)); - EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 2], WORD_NEXT(0x80)); - EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 4], (uint16_t)~0xbe18); - /* Byte log entries */ - EEPROM_WriteDataWord(0x7e, 0xcafe); - /* Check values */ - EEPROM_Init(); - EXPECT_EQ(EEPROM_ReadDataWord(0x7e), 0xcafe); - EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 6], BYTE_VALUE(0x7e, 0xfe)); - EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 8], BYTE_VALUE(0x7f, 0xca)); - /* Byte and Word log entries */ - EEPROM_WriteDataWord(0x7f, 0xba5e); - /* Check values */ - EEPROM_Init(); - EXPECT_EQ(EEPROM_ReadDataWord(0x7f), 0xba5e); - EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 10], BYTE_VALUE(0x7f, 0x5e)); - EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 12], WORD_NEXT(0x80)); - EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 14], (uint16_t)~0xbeba); - /* Word log entry */ - EEPROM_WriteDataWord(0x80, 0xf00d); - /* Check values */ - EEPROM_Init(); - EXPECT_EQ(EEPROM_ReadDataWord(0x80), 0xf00d); - EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 16], WORD_NEXT(0x80)); - EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + 18], (uint16_t)~0xf00d); -} - -TEST_F(EepromStm32Test, TestDWordRoundTrip) { - /* Direct compacted-area: Address < 0x80 */ - eeprom_write_dword((uint32_t*)0, 0xdeadbeef); // Aligned - eeprom_write_dword((uint32_t*)9, 0x12345678); // Unaligned - /* Direct compacted-area: Address >= 0x80 */ - eeprom_write_dword((uint32_t*)200, 0xfacef00d); - eeprom_write_dword((uint32_t*)(EEPROM_SIZE - 4), 0xba5eba11); // Aligned - eeprom_write_dword((uint32_t*)(EEPROM_SIZE - 9), 0xcafed00d); // Unaligned - /* Check direct values */ - EEPROM_Init(); - EXPECT_EQ(eeprom_read_dword((uint32_t*)0), 0xdeadbeef); - EXPECT_EQ(eeprom_read_dword((uint32_t*)9), 0x12345678); - EXPECT_EQ(eeprom_read_dword((uint32_t*)200), 0xfacef00d); - EXPECT_EQ(eeprom_read_dword((uint32_t*)(EEPROM_SIZE - 4)), 0xba5eba11); // Aligned - EXPECT_EQ(eeprom_read_dword((uint32_t*)(EEPROM_SIZE - 9)), 0xcafed00d); // Unaligned - /* Write Log byte encoded */ - eeprom_write_dword((uint32_t*)0, 0xdecafbad); - eeprom_write_dword((uint32_t*)9, 0x87654321); - /* Write Log word encoded */ - eeprom_write_dword((uint32_t*)200, 1); - /* Write Log word value aligned */ - eeprom_write_dword((uint32_t*)(EEPROM_SIZE - 4), 0xdeadc0de); // Aligned - eeprom_write_dword((uint32_t*)(EEPROM_SIZE - 9), 0x6789abcd); // Unaligned - /* Check log values */ - EEPROM_Init(); - EXPECT_EQ(eeprom_read_dword((uint32_t*)0), 0xdecafbad); - EXPECT_EQ(eeprom_read_dword((uint32_t*)9), 0x87654321); - EXPECT_EQ(eeprom_read_dword((uint32_t*)200), 1); - EXPECT_EQ(eeprom_read_dword((uint32_t*)(EEPROM_SIZE - 4)), 0xdeadc0de); // Aligned - EXPECT_EQ(eeprom_read_dword((uint32_t*)(EEPROM_SIZE - 9)), 0x6789abcd); // Unaligned -} - -TEST_F(EepromStm32Test, TestBlockRoundTrip) { - char src0[] = "0123456789abcdef"; - void* src1 = (void*)&src0[1]; - /* Various alignments of src & dst, Address < 0x80 */ - eeprom_write_block(src0, (void*)0, sizeof(src0)); - eeprom_write_block(src0, (void*)21, sizeof(src0)); - eeprom_write_block(src1, (void*)40, sizeof(src0) - 1); - eeprom_write_block(src1, (void*)61, sizeof(src0) - 1); - /* Various alignments of src & dst, Address >= 0x80 */ - eeprom_write_block(src0, (void*)140, sizeof(src0)); - eeprom_write_block(src0, (void*)161, sizeof(src0)); - eeprom_write_block(src1, (void*)180, sizeof(src0) - 1); - eeprom_write_block(src1, (void*)201, sizeof(src0) - 1); - - /* Check values */ - EEPROM_Init(); - - char dstBuf[256] = {0}; - char* dst0a = (char*)dstBuf; - char* dst0b = (char*)&dstBuf[20]; - char* dst1a = (char*)&dstBuf[41]; - char* dst1b = (char*)&dstBuf[61]; - char* dst0c = (char*)&dstBuf[80]; - char* dst0d = (char*)&dstBuf[100]; - char* dst1c = (char*)&dstBuf[121]; - char* dst1d = (char*)&dstBuf[141]; - eeprom_read_block((void*)dst0a, (void*)0, sizeof(src0)); - eeprom_read_block((void*)dst0b, (void*)21, sizeof(src0)); - eeprom_read_block((void*)dst1a, (void*)40, sizeof(src0) - 1); - eeprom_read_block((void*)dst1b, (void*)61, sizeof(src0) - 1); - eeprom_read_block((void*)dst0c, (void*)140, sizeof(src0)); - eeprom_read_block((void*)dst0d, (void*)161, sizeof(src0)); - eeprom_read_block((void*)dst1c, (void*)180, sizeof(src0) - 1); - eeprom_read_block((void*)dst1d, (void*)201, sizeof(src0) - 1); - EXPECT_EQ(strcmp((char*)src0, dst0a), 0); - EXPECT_EQ(strcmp((char*)src0, dst0b), 0); - EXPECT_EQ(strcmp((char*)src0, dst0c), 0); - EXPECT_EQ(strcmp((char*)src0, dst0d), 0); - EXPECT_EQ(strcmp((char*)src1, dst1a), 0); - EXPECT_EQ(strcmp((char*)src1, dst1b), 0); - EXPECT_EQ(strcmp((char*)src1, dst1c), 0); - EXPECT_EQ(strcmp((char*)src1, dst1d), 0); -} - -TEST_F(EepromStm32Test, TestCompaction) { - /* Direct writes */ - eeprom_write_dword((uint32_t*)0, 0xdeadbeef); - eeprom_write_byte((uint8_t*)4, 0x3c); - eeprom_write_word((uint16_t*)6, 0xd00d); - eeprom_write_dword((uint32_t*)150, 0xcafef00d); - eeprom_write_dword((uint32_t*)200, 0x12345678); - /* Fill write log entries */ - uint32_t i; - uint32_t val = 0xd8453c6b; - for (i = 0; i < (LOG_SIZE / (sizeof(uint32_t) * 2)); i++) { - val ^= 0x593ca5b3; - val += i; - eeprom_write_dword((uint32_t*)200, val); - } - /* Check values pre-compaction */ - EEPROM_Init(); - EXPECT_EQ(eeprom_read_dword((uint32_t*)0), 0xdeadbeef); - EXPECT_EQ(eeprom_read_byte((uint8_t*)4), 0x3c); - EXPECT_EQ(eeprom_read_word((uint16_t*)6), 0xd00d); - EXPECT_EQ(eeprom_read_dword((uint32_t*)150), 0xcafef00d); - EXPECT_EQ(eeprom_read_dword((uint32_t*)200), val); - EXPECT_NE(*(uint16_t*)&FlashBuf[LOG_BASE], 0xFFFF); - EXPECT_NE(*(uint16_t*)&FlashBuf[LOG_BASE + LOG_SIZE - 2], 0xFFFF); - /* Run compaction */ - eeprom_write_byte((uint8_t*)4, 0x1f); - EEPROM_Init(); - EXPECT_EQ(eeprom_read_dword((uint32_t*)0), 0xdeadbeef); - EXPECT_EQ(eeprom_read_byte((uint8_t*)4), 0x1f); - EXPECT_EQ(eeprom_read_word((uint16_t*)6), 0xd00d); - EXPECT_EQ(eeprom_read_dword((uint32_t*)150), 0xcafef00d); - EXPECT_EQ(eeprom_read_dword((uint32_t*)200), val); - EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE], 0xFFFF); - EXPECT_EQ(*(uint16_t*)&FlashBuf[LOG_BASE + LOG_SIZE - 2], 0xFFFF); -} diff --git a/platforms/test/eeprom_stm32_tests.h b/platforms/test/eeprom_stm32_tests.h deleted file mode 100644 index 35ed885e52..0000000000 --- a/platforms/test/eeprom_stm32_tests.h +++ /dev/null @@ -1,8 +0,0 @@ -// Copyright 2018-2022 Nick Brassel (@tzarc) -// SPDX-License-Identifier: GPL-2.0-or-later -#pragma once - -#include "flash_stm32.h" -#include "eeprom_stm32.h" - -#define EEPROM_SIZE (FEE_PAGE_SIZE * FEE_PAGE_COUNT / 2) diff --git a/platforms/test/flash_stm32_mock.c b/platforms/test/flash_stm32_mock.c deleted file mode 100644 index b6ab170f95..0000000000 --- a/platforms/test/flash_stm32_mock.c +++ /dev/null @@ -1,55 +0,0 @@ -/* Copyright 2021 by Don Kjer - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include -#include "flash_stm32.h" - -uint8_t FlashBuf[MOCK_FLASH_SIZE] = {0}; - -static bool flash_locked = true; - -FLASH_Status FLASH_ErasePage(uint32_t Page_Address) { - if (flash_locked) return FLASH_ERROR_WRP; - Page_Address -= (uintptr_t)FlashBuf; - Page_Address -= (Page_Address % FEE_PAGE_SIZE); - if (Page_Address >= MOCK_FLASH_SIZE) return FLASH_BAD_ADDRESS; - memset(&FlashBuf[Page_Address], '\xff', FEE_PAGE_SIZE); - return FLASH_COMPLETE; -} - -FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data) { - if (flash_locked) return FLASH_ERROR_WRP; - Address -= (uintptr_t)FlashBuf; - if (Address >= MOCK_FLASH_SIZE) return FLASH_BAD_ADDRESS; - uint16_t oldData = *(uint16_t*)&FlashBuf[Address]; - if (oldData == 0xFFFF || Data == 0) { - *(uint16_t*)&FlashBuf[Address] = Data; - return FLASH_COMPLETE; - } else { - return FLASH_ERROR_PG; - } -} - -FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout) { - return FLASH_COMPLETE; -} -void FLASH_Unlock(void) { - flash_locked = false; -} -void FLASH_Lock(void) { - flash_locked = true; -} diff --git a/platforms/test/legacy_flash_ops_mock.c b/platforms/test/legacy_flash_ops_mock.c new file mode 100644 index 0000000000..b9d805cb47 --- /dev/null +++ b/platforms/test/legacy_flash_ops_mock.c @@ -0,0 +1,55 @@ +/* Copyright 2021 by Don Kjer + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include +#include +#include "legacy_flash_ops.h" + +uint8_t FlashBuf[MOCK_FLASH_SIZE] = {0}; + +static bool flash_locked = true; + +FLASH_Status FLASH_ErasePage(uint32_t Page_Address) { + if (flash_locked) return FLASH_ERROR_WRP; + Page_Address -= (uintptr_t)FlashBuf; + Page_Address -= (Page_Address % FEE_PAGE_SIZE); + if (Page_Address >= MOCK_FLASH_SIZE) return FLASH_BAD_ADDRESS; + memset(&FlashBuf[Page_Address], '\xff', FEE_PAGE_SIZE); + return FLASH_COMPLETE; +} + +FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data) { + if (flash_locked) return FLASH_ERROR_WRP; + Address -= (uintptr_t)FlashBuf; + if (Address >= MOCK_FLASH_SIZE) return FLASH_BAD_ADDRESS; + uint16_t oldData = *(uint16_t*)&FlashBuf[Address]; + if (oldData == 0xFFFF || Data == 0) { + *(uint16_t*)&FlashBuf[Address] = Data; + return FLASH_COMPLETE; + } else { + return FLASH_ERROR_PG; + } +} + +FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout) { + return FLASH_COMPLETE; +} +void FLASH_Unlock(void) { + flash_locked = false; +} +void FLASH_Lock(void) { + flash_locked = true; +} diff --git a/platforms/test/rules.mk b/platforms/test/rules.mk index a2baa283d0..43898db07e 100644 --- a/platforms/test/rules.mk +++ b/platforms/test/rules.mk @@ -1,25 +1,25 @@ -eeprom_stm32_DEFS := -DEEPROM_TEST_HARNESS -DFLASH_STM32_MOCKED -DNO_PRINT -DFEE_FLASH_BASE=FlashBuf -eeprom_stm32_tiny_DEFS := $(eeprom_stm32_DEFS) \ +eeprom_legacy_emulated_flash_DEFS := -DEEPROM_TEST_HARNESS -DLEGACY_FLASH_OPS_MOCKED -DNO_PRINT -DFEE_FLASH_BASE=FlashBuf +eeprom_legacy_emulated_flash_tiny_DEFS := $(eeprom_legacy_emulated_flash_DEFS) \ -DFEE_MCU_FLASH_SIZE=1 \ -DMOCK_FLASH_SIZE=1024 \ -DFEE_PAGE_SIZE=512 \ -DFEE_PAGE_COUNT=1 -eeprom_stm32_large_DEFS := $(eeprom_stm32_DEFS) \ +eeprom_legacy_emulated_flash_large_DEFS := $(eeprom_legacy_emulated_flash_DEFS) \ -DFEE_MCU_FLASH_SIZE=64 \ -DMOCK_FLASH_SIZE=65536 \ -DFEE_PAGE_SIZE=2048 \ -DFEE_PAGE_COUNT=16 -eeprom_stm32_INC := \ +eeprom_legacy_emulated_flash_INC := \ $(PLATFORM_PATH)/chibios/drivers/eeprom/ \ $(PLATFORM_PATH)/chibios/drivers/flash/ -eeprom_stm32_tiny_INC := $(eeprom_stm32_INC) -eeprom_stm32_large_INC := $(eeprom_stm32_INC) +eeprom_legacy_emulated_flash_tiny_INC := $(eeprom_legacy_emulated_flash_INC) +eeprom_legacy_emulated_flash_large_INC := $(eeprom_legacy_emulated_flash_INC) -eeprom_stm32_SRC := \ +eeprom_legacy_emulated_flash_SRC := \ $(TOP_DIR)/drivers/eeprom/eeprom_driver.c \ - $(PLATFORM_PATH)/$(PLATFORM_KEY)/eeprom_stm32_tests.cpp \ - $(PLATFORM_PATH)/$(PLATFORM_KEY)/flash_stm32_mock.c \ - $(PLATFORM_PATH)/chibios/drivers/eeprom/eeprom_stm32.c -eeprom_stm32_tiny_SRC := $(eeprom_stm32_SRC) -eeprom_stm32_large_SRC := $(eeprom_stm32_SRC) + $(PLATFORM_PATH)/$(PLATFORM_KEY)/eeprom_legacy_emulated_flash_tests.cpp \ + $(PLATFORM_PATH)/$(PLATFORM_KEY)/legacy_flash_ops_mock.c \ + $(PLATFORM_PATH)/chibios/drivers/eeprom/eeprom_legacy_emulated_flash.c +eeprom_legacy_emulated_flash_tiny_SRC := $(eeprom_legacy_emulated_flash_SRC) +eeprom_legacy_emulated_flash_large_SRC := $(eeprom_legacy_emulated_flash_SRC) diff --git a/platforms/test/testlist.mk b/platforms/test/testlist.mk index 51a9638bb9..b8ec68e7d3 100644 --- a/platforms/test/testlist.mk +++ b/platforms/test/testlist.mk @@ -1 +1 @@ -TEST_LIST += eeprom_stm32_tiny eeprom_stm32_large +TEST_LIST += eeprom_legacy_emulated_flash_tiny eeprom_legacy_emulated_flash_large -- cgit v1.2.3