From 5da04fb45b0d5cddc6f49f88ea9c6a4037ef82ce Mon Sep 17 00:00:00 2001 From: Nick Brassel Date: Wed, 3 Nov 2021 08:26:40 +1100 Subject: Update to ChibiOS 20.3.4, support builds against trunk (#14208) * Add support for building against ChibiOS svn/trunk. * Swap to 21.6.x * Update to latest branch revision as released version is broken. * Updated configs. * Conf updates. * Updated ChibiOS * Convert STM32L422 to actual L422 ChibiOS platform. * Downgrade to 20.3.4 as ChibiOS 21.6.x is being aborted. * Rollback L422-based boards. --- .../chibios/boards/GENERIC_STM32_G431XB/configs/mcuconf.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'platforms/chibios/boards/GENERIC_STM32_G431XB/configs/mcuconf.h') diff --git a/platforms/chibios/boards/GENERIC_STM32_G431XB/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_G431XB/configs/mcuconf.h index 182d4885d7..d115028300 100644 --- a/platforms/chibios/boards/GENERIC_STM32_G431XB/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_G431XB/configs/mcuconf.h @@ -40,9 +40,24 @@ */ #define STM32_NO_INIT FALSE #define STM32_VOS STM32_VOS_RANGE1 +#define STM32_PWR_BOOST TRUE #define STM32_PWR_CR2 (PWR_CR2_PLS_LEV0) #define STM32_PWR_CR3 (PWR_CR3_EIWF) #define STM32_PWR_CR4 (0U) +#define STM32_PWR_PUCRA (0U) +#define STM32_PWR_PDCRA (0U) +#define STM32_PWR_PUCRB (0U) +#define STM32_PWR_PDCRB (0U) +#define STM32_PWR_PUCRC (0U) +#define STM32_PWR_PDCRC (0U) +#define STM32_PWR_PUCRD (0U) +#define STM32_PWR_PDCRD (0U) +#define STM32_PWR_PUCRE (0U) +#define STM32_PWR_PDCRE (0U) +#define STM32_PWR_PUCRF (0U) +#define STM32_PWR_PDCRF (0U) +#define STM32_PWR_PUCRG (0U) +#define STM32_PWR_PDCRG (0U) #define STM32_HSI16_ENABLED TRUE #define STM32_HSI48_ENABLED TRUE #define STM32_HSE_ENABLED FALSE -- cgit v1.2.3