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Diffstat (limited to 'tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F302R8/TOOLCHAIN_IAR/stm32f302x8.icf')
-rw-r--r--tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F302R8/TOOLCHAIN_IAR/stm32f302x8.icf31
1 files changed, 31 insertions, 0 deletions
diff --git a/tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F302R8/TOOLCHAIN_IAR/stm32f302x8.icf b/tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F302R8/TOOLCHAIN_IAR/stm32f302x8.icf
new file mode 100644
index 0000000000..d1ac2d8927
--- /dev/null
+++ b/tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F302R8/TOOLCHAIN_IAR/stm32f302x8.icf
@@ -0,0 +1,31 @@
+/* [ROM = 64kb = 0x10000] */
+define symbol __intvec_start__ = 0x08000000;
+define symbol __region_ROM_start__ = 0x08000000;
+define symbol __region_ROM_end__ = 0x0800FFFF;
+
+/* [RAM = 16kb = 0x4000] Vector table dynamic copy: 98 vectors = 392 bytes (0x188) to be reserved in RAM */
+define symbol __NVIC_start__ = 0x20000000;
+define symbol __NVIC_end__ = 0x20000187; /*aligned on 8 bytes */
+define symbol __region_RAM_start__ = 0x20000188;
+define symbol __region_RAM_end__ = 0x20003FFF;
+
+/* Memory regions */
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
+define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
+
+/* Stack and Heap */
+/*Heap 1/4 of ram and stack 1/8*/
+define symbol __size_cstack__ = 0x800;
+define symbol __size_heap__ = 0x1000;
+define block CSTACK with alignment = 8, size = __size_cstack__ { };
+define block HEAP with alignment = 8, size = __size_heap__ { };
+define block STACKHEAP with fixed order { block HEAP, block CSTACK };
+
+initialize by copy with packing = zeros { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite, block STACKHEAP };