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Diffstat (limited to 'tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/TOOLCHAIN_GCC_CR/startup_LPC824_CR.cpp')
| -rw-r--r-- | tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/TOOLCHAIN_GCC_CR/startup_LPC824_CR.cpp | 351 |
1 files changed, 351 insertions, 0 deletions
diff --git a/tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/TOOLCHAIN_GCC_CR/startup_LPC824_CR.cpp b/tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/TOOLCHAIN_GCC_CR/startup_LPC824_CR.cpp new file mode 100644 index 0000000000..e40d1ada21 --- /dev/null +++ b/tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/TOOLCHAIN_GCC_CR/startup_LPC824_CR.cpp @@ -0,0 +1,351 @@ +//***************************************************************************** +// LPC82x Microcontroller Startup code for use with LPCXpresso IDE +// +// Version : 140901 +//***************************************************************************** +// +// Copyright(C) NXP Semiconductors, 2014 +// All rights reserved. +// +// Software that is described herein is for illustrative purposes only +// which provides customers with programming information regarding the +// LPC products. This software is supplied "AS IS" without any warranties of +// any kind, and NXP Semiconductors and its licensor disclaim any and +// all warranties, express or implied, including all implied warranties of +// merchantability, fitness for a particular purpose and non-infringement of +// intellectual property rights. NXP Semiconductors assumes no responsibility +// or liability for the use of the software, conveys no license or rights under any +// patent, copyright, mask work right, or any other intellectual property rights in +// or to any products. NXP Semiconductors reserves the right to make changes +// in the software without notification. NXP Semiconductors also makes no +// representation or warranty that such application will be suitable for the +// specified use without further testing or modification. +// +// Permission to use, copy, modify, and distribute this software and its +// documentation is hereby granted, under NXP Semiconductors' and its +// licensor's relevant copyrights in the software, without fee, provided that it +// is used in conjunction with NXP Semiconductors microcontrollers. This +// copyright, permission, and disclaimer notice must appear in all copies of +// this code. +//***************************************************************************** + +#if defined (__cplusplus) +#ifdef __REDLIB__ +#error Redlib does not support C++ +#else +//***************************************************************************** +// +// The entry point for the C++ library startup +// +//***************************************************************************** +extern "C" { + extern void __libc_init_array(void); +} +#endif +#endif + +#define WEAK __attribute__ ((weak)) +#define ALIAS(f) __attribute__ ((weak, alias (#f))) + +//***************************************************************************** +#if defined (__cplusplus) +extern "C" { +#endif + +//***************************************************************************** +#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN) +// Declaration of external SystemInit function +extern void SystemInit(void); +#endif + +// Patch the AEABI integer divide functions to use MCU's romdivide library +#ifdef __USE_ROMDIVIDE +// Location in memory that holds the address of the ROM Driver table +#define PTR_ROM_DRIVER_TABLE ((unsigned int *)(0x1FFF1FF8)) +// Variables to store addresses of idiv and udiv functions within MCU ROM +unsigned int *pDivRom_idiv; +unsigned int *pDivRom_uidiv; +#endif + +//***************************************************************************** +// +// Forward declaration of the default handlers. These are aliased. +// When the application defines a handler (with the same name), this will +// automatically take precedence over these weak definitions +// +//***************************************************************************** + void ResetISR(void); +WEAK void NMI_Handler(void); +WEAK void HardFault_Handler(void); +WEAK void SVC_Handler(void); +WEAK void PendSV_Handler(void); +WEAK void SysTick_Handler(void); +WEAK void IntDefaultHandler(void); + +//***************************************************************************** +// +// Forward declaration of the specific IRQ handlers. These are aliased +// to the IntDefaultHandler, which is a 'forever' loop. When the application +// defines a handler (with the same name), this will automatically take +// precedence over these weak definitions +// +//***************************************************************************** +void SPI0_IRQHandler(void) ALIAS(IntDefaultHandler); +void SPI1_IRQHandler(void) ALIAS(IntDefaultHandler); +void UART0_IRQHandler(void) ALIAS(IntDefaultHandler); +void UART1_IRQHandler(void) ALIAS(IntDefaultHandler); +void UART2_IRQHandler(void) ALIAS(IntDefaultHandler); +void I2C1_IRQHandler(void) ALIAS(IntDefaultHandler); +void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler); +void SCT_IRQHandler(void) ALIAS(IntDefaultHandler); +void MRT_IRQHandler(void) ALIAS(IntDefaultHandler); +void CMP_IRQHandler(void) ALIAS(IntDefaultHandler); +void WDT_IRQHandler(void) ALIAS(IntDefaultHandler); +void BOD_IRQHandler(void) ALIAS(IntDefaultHandler); +void FLASH_IRQHandler(void) ALIAS(IntDefaultHandler); +void WKT_IRQHandler(void) ALIAS(IntDefaultHandler); +void ADC_SEQA_IRQHandler(void) ALIAS(IntDefaultHandler); +void ADC_SEQB_IRQHandler(void) ALIAS(IntDefaultHandler); +void ADC_THCMP_IRQHandler(void) ALIAS(IntDefaultHandler); +void ADC_OVR_IRQHandler(void) ALIAS(IntDefaultHandler); +void DMA_IRQHandler(void) ALIAS(IntDefaultHandler); +void I2C2_IRQHandler(void) ALIAS(IntDefaultHandler); +void I2C3_IRQHandler(void) ALIAS(IntDefaultHandler); +void PIN_INT0_IRQHandler(void) ALIAS(IntDefaultHandler); +void PIN_INT1_IRQHandler(void) ALIAS(IntDefaultHandler); +void PIN_INT2_IRQHandler(void) ALIAS(IntDefaultHandler); +void PIN_INT3_IRQHandler(void) ALIAS(IntDefaultHandler); +void PIN_INT4_IRQHandler(void) ALIAS(IntDefaultHandler); +void PIN_INT5_IRQHandler(void) ALIAS(IntDefaultHandler); +void PIN_INT6_IRQHandler(void) ALIAS(IntDefaultHandler); +void PIN_INT7_IRQHandler(void) ALIAS(IntDefaultHandler); +//***************************************************************************** +// +// The entry point for the application. +// __main() is the entry point for Redlib based applications +// main() is the entry point for Newlib based applications +// +//***************************************************************************** +#if defined (__REDLIB__) +extern void __main(void); +#else +extern int main(void); +#endif +//***************************************************************************** +// +// External declaration for the pointer to the stack top from the Linker Script +// +//***************************************************************************** +extern void _vStackTop(void); + +//***************************************************************************** +#if defined (__cplusplus) +} // extern "C" +#endif +//***************************************************************************** +// +// The vector table. +// This relies on the linker script to place at correct location in memory. +// +//***************************************************************************** +extern void (* const g_pfnVectors[])(void); +__attribute__ ((section(".isr_vector"))) +void (* const g_pfnVectors[])(void) = { + // Core Level - CM0plus + &_vStackTop, // The initial stack pointer + ResetISR, // The reset handler + NMI_Handler, // The NMI handler + HardFault_Handler, // The hard fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + SVC_Handler, // SVCall handler + 0, // Reserved + 0, // Reserved + PendSV_Handler, // The PendSV handler + SysTick_Handler, // The SysTick handler + + // Chip Level - LPC82x + SPI0_IRQHandler, // SPI0 controller + SPI1_IRQHandler, // SPI1 controller + 0, // Reserved + UART0_IRQHandler, // UART0 + UART1_IRQHandler, // UART1 + UART2_IRQHandler, // UART2 + 0, // Reserved + I2C1_IRQHandler, // I2C1 controller + I2C0_IRQHandler, // I2C0 controller + SCT_IRQHandler, // Smart Counter Timer + MRT_IRQHandler, // Multi-Rate Timer + CMP_IRQHandler, // Comparator + WDT_IRQHandler, // Watchdog + BOD_IRQHandler, // Brown Out Detect + FLASH_IRQHandler, // Flash Interrupt + WKT_IRQHandler, // Wakeup timer + ADC_SEQA_IRQHandler, // ADC sequence A completion + ADC_SEQB_IRQHandler, // ADC sequence B completion + ADC_THCMP_IRQHandler, // ADC threshold compare + ADC_OVR_IRQHandler, // ADC overrun + DMA_IRQHandler, // DMA + I2C2_IRQHandler, // I2C2 controller + I2C3_IRQHandler, // I2C3 controller + 0, // Reserved + PIN_INT0_IRQHandler, // PIO INT0 + PIN_INT1_IRQHandler, // PIO INT1 + PIN_INT2_IRQHandler, // PIO INT2 + PIN_INT3_IRQHandler, // PIO INT3 + PIN_INT4_IRQHandler, // PIO INT4 + PIN_INT5_IRQHandler, // PIO INT5 + PIN_INT6_IRQHandler, // PIO INT6 + PIN_INT7_IRQHandler, // PIO INT7 +}; /* End of g_pfnVectors */ + +//***************************************************************************** +// Functions to carry out the initialization of RW and BSS data sections. These +// are written as separate functions rather than being inlined within the +// ResetISR() function in order to cope with MCUs with multiple banks of +// memory. +//***************************************************************************** +__attribute__ ((section(".after_vectors"))) +void data_init(unsigned int romstart, unsigned int start, unsigned int len) { + unsigned int *pulDest = (unsigned int*) start; + unsigned int *pulSrc = (unsigned int*) romstart; + unsigned int loop; + for (loop = 0; loop < len; loop = loop + 4) + *pulDest++ = *pulSrc++; +} + +__attribute__ ((section(".after_vectors"))) +void bss_init(unsigned int start, unsigned int len) { + unsigned int *pulDest = (unsigned int*) start; + unsigned int loop; + for (loop = 0; loop < len; loop = loop + 4) + *pulDest++ = 0; +} + +//***************************************************************************** +// The following symbols are constructs generated by the linker, indicating +// the location of various points in the "Global Section Table". This table is +// created by the linker via the Code Red managed linker script mechanism. It +// contains the load address, execution address and length of each RW data +// section and the execution and length of each BSS (zero initialized) section. +//***************************************************************************** +extern unsigned int __data_section_table; +extern unsigned int __data_section_table_end; +extern unsigned int __bss_section_table; +extern unsigned int __bss_section_table_end; + + +//***************************************************************************** +// Reset entry point for your code. +// Sets up a simple runtime environment and initializes the C/C++ +// library. +//***************************************************************************** +__attribute__ ((section(".after_vectors"))) +void +ResetISR(void) { + + // + // Copy the data sections from flash to SRAM. + // + unsigned int LoadAddr, ExeAddr, SectionLen; + unsigned int *SectionTableAddr; + + // Load base address of Global Section Table + SectionTableAddr = &__data_section_table; + + // Copy the data sections from flash to SRAM. + while (SectionTableAddr < &__data_section_table_end) { + LoadAddr = *SectionTableAddr++; + ExeAddr = *SectionTableAddr++; + SectionLen = *SectionTableAddr++; + data_init(LoadAddr, ExeAddr, SectionLen); + } + // At this point, SectionTableAddr = &__bss_section_table; + // Zero fill the bss segment + while (SectionTableAddr < &__bss_section_table_end) { + ExeAddr = *SectionTableAddr++; + SectionLen = *SectionTableAddr++; + bss_init(ExeAddr, SectionLen); + } + + // Patch the AEABI integer divide functions to use MCU's romdivide library +#ifdef __USE_ROMDIVIDE + // Get address of Integer division routines function table in ROM + unsigned int *div_ptr = (unsigned int *)((unsigned int *)*(PTR_ROM_DRIVER_TABLE))[4]; + // Get addresses of integer divide routines in ROM + // These address are then used by the code in aeabi_romdiv_patch.s + pDivRom_idiv = (unsigned int *)div_ptr[0]; + pDivRom_uidiv = (unsigned int *)div_ptr[1]; +#endif + +#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN) + SystemInit(); +#endif + +#if defined (__cplusplus) + // + // Call C++ library initialisation + // + __libc_init_array(); +#endif + +#if defined (__REDLIB__) + // Call the Redlib library, which in turn calls main() + __main() ; +#else + main(); +#endif + + // + // main() shouldn't return, but if it does, we'll just enter an infinite loop + // + while (1) { + ; + } +} + +//***************************************************************************** +// Default exception handlers. Override the ones here by defining your own +// handler routines in your application code. +//***************************************************************************** +__attribute__ ((section(".after_vectors"))) +void NMI_Handler(void) +{ while(1) {} +} + +__attribute__ ((section(".after_vectors"))) +void HardFault_Handler(void) +{ while(1) {} +} + +__attribute__ ((section(".after_vectors"))) +void SVC_Handler(void) +{ while(1) {} +} + +__attribute__ ((section(".after_vectors"))) +void PendSV_Handler(void) +{ while(1) {} +} + +__attribute__ ((section(".after_vectors"))) +void SysTick_Handler(void) +{ while(1) {} +} + +//***************************************************************************** +// +// Processor ends up here if an unexpected interrupt occurs or a specific +// handler is not present in the application code. +// +//***************************************************************************** +__attribute__ ((section(".after_vectors"))) +void IntDefaultHandler(void) +{ while(1) {} +} + |