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Diffstat (limited to 'tmk_core/protocol/arm_atsam')
-rw-r--r--tmk_core/protocol/arm_atsam/shift_register.c24
-rw-r--r--tmk_core/protocol/arm_atsam/spi_master.c8
2 files changed, 16 insertions, 16 deletions
diff --git a/tmk_core/protocol/arm_atsam/shift_register.c b/tmk_core/protocol/arm_atsam/shift_register.c
index 3adb682aa8..e81db4a19d 100644
--- a/tmk_core/protocol/arm_atsam/shift_register.c
+++ b/tmk_core/protocol/arm_atsam/shift_register.c
@@ -28,27 +28,27 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
# define CLOCK_DELAY 10
void shift_init_impl(void) {
- setPinOutput(SR_EXP_RCLK_PIN);
- setPinOutput(SPI_DATAOUT_PIN);
- setPinOutput(SPI_SCLK_PIN);
+ gpio_set_pin_output(SR_EXP_RCLK_PIN);
+ gpio_set_pin_output(SPI_DATAOUT_PIN);
+ gpio_set_pin_output(SPI_SCLK_PIN);
}
void shift_out_impl(const uint8_t *data, uint16_t length) {
- writePinLow(SR_EXP_RCLK_PIN);
+ gpio_write_pin_low(SR_EXP_RCLK_PIN);
for (uint16_t i = 0; i < length; i++) {
uint8_t val = data[i];
// shift out lsb first
for (uint8_t bit = 0; bit < 8; bit++) {
- writePin(SPI_DATAOUT_PIN, !!(val & (1 << bit)));
- writePin(SPI_SCLK_PIN, true);
+ gpio_write_pin(SPI_DATAOUT_PIN, !!(val & (1 << bit)));
+ gpio_write_pin(SPI_SCLK_PIN, true);
wait_us(CLOCK_DELAY);
- writePin(SPI_SCLK_PIN, false);
+ gpio_write_pin(SPI_SCLK_PIN, false);
wait_us(CLOCK_DELAY);
}
}
- writePinHigh(SR_EXP_RCLK_PIN);
+ gpio_write_pin_high(SR_EXP_RCLK_PIN);
return SPI_STATUS_SUCCESS;
}
@@ -74,13 +74,13 @@ void shift_out(const uint8_t *data, uint16_t length) {
}
void shift_enable(void) {
- setPinOutput(SR_EXP_OE_PIN);
- writePinLow(SR_EXP_OE_PIN);
+ gpio_set_pin_output(SR_EXP_OE_PIN);
+ gpio_write_pin_low(SR_EXP_OE_PIN);
}
void shift_disable(void) {
- setPinOutput(SR_EXP_OE_PIN);
- writePinHigh(SR_EXP_OE_PIN);
+ gpio_set_pin_output(SR_EXP_OE_PIN);
+ gpio_write_pin_high(SR_EXP_OE_PIN);
}
void shift_init(void) {
diff --git a/tmk_core/protocol/arm_atsam/spi_master.c b/tmk_core/protocol/arm_atsam/spi_master.c
index 3be82fac1d..fedb9654fd 100644
--- a/tmk_core/protocol/arm_atsam/spi_master.c
+++ b/tmk_core/protocol/arm_atsam/spi_master.c
@@ -60,8 +60,8 @@ bool spi_start(pin_t csPin, bool lsbFirst, uint8_t mode, uint16_t divisor) {
}
currentSelectPin = csPin;
- setPinOutput(currentSelectPin);
- writePinLow(currentSelectPin);
+ gpio_set_pin_output(currentSelectPin);
+ gpio_write_pin_low(currentSelectPin);
SPI_SERCOM->SPI.CTRLA.bit.DORD = lsbFirst; // Data Order - LSB is transferred first
SPI_SERCOM->SPI.CTRLA.bit.CPOL = 1; // Clock Polarity - SCK high when idle. Leading edge of cycle is falling. Trailing rising.
@@ -94,8 +94,8 @@ spi_status_t spi_transmit(const uint8_t *data, uint16_t length) {
void spi_stop(void) {
if (currentSelectPin != NO_PIN) {
- setPinOutput(currentSelectPin);
- writePinHigh(currentSelectPin);
+ gpio_set_pin_output(currentSelectPin);
+ gpio_write_pin_high(currentSelectPin);
currentSelectPin = NO_PIN;
}
}