diff options
Diffstat (limited to 'platforms/chibios/drivers')
| -rw-r--r-- | platforms/chibios/drivers/analog.c | 21 | ||||
| -rw-r--r-- | platforms/chibios/drivers/serial_usart.c | 24 |
2 files changed, 22 insertions, 23 deletions
diff --git a/platforms/chibios/drivers/analog.c b/platforms/chibios/drivers/analog.c index 8b03e73849..a8ce21bb6d 100644 --- a/platforms/chibios/drivers/analog.c +++ b/platforms/chibios/drivers/analog.c @@ -22,8 +22,8 @@ # error "You need to set HAL_USE_ADC to TRUE in your halconf.h to use the ADC." #endif -#if !STM32_ADC_USE_ADC1 && !STM32_ADC_USE_ADC2 && !STM32_ADC_USE_ADC3 && !STM32_ADC_USE_ADC4 && !WB32_ADC_USE_ADC1 -# error "You need to set one of the 'STM32_ADC_USE_ADCx' settings to TRUE in your mcuconf.h to use the ADC." +#if !RP_ADC_USE_ADC1 && !STM32_ADC_USE_ADC1 && !STM32_ADC_USE_ADC2 && !STM32_ADC_USE_ADC3 && !STM32_ADC_USE_ADC4 && !WB32_ADC_USE_ADC1 +# error "You need to set one of the 'xxx_ADC_USE_ADCx' settings to TRUE in your mcuconf.h to use the ADC." #endif #if STM32_ADC_DUAL_MODE @@ -42,7 +42,7 @@ #endif // BODGE to make v2 look like v1,3 and 4 -#ifdef USE_ADCV2 +#if defined(USE_ADCV2) || defined(RP2040) # if !defined(ADC_SMPR_SMP_1P5) && defined(ADC_SAMPLE_3) # define ADC_SMPR_SMP_1P5 ADC_SAMPLE_3 # define ADC_SMPR_SMP_7P5 ADC_SAMPLE_15 @@ -74,7 +74,7 @@ /* User configurable ADC options */ #ifndef ADC_COUNT -# if defined(STM32F0XX) || defined(STM32F1XX) || defined(STM32F4XX) || defined(GD32VF103) || defined(WB32F3G71xx) || defined(WB32FQ95xx) +# if defined(RP2040) || defined(STM32F0XX) || defined(STM32F1XX) || defined(STM32F4XX) || defined(GD32VF103) || defined(WB32F3G71xx) || defined(WB32FQ95xx) # define ADC_COUNT 1 # elif defined(STM32F3XX) # define ADC_COUNT 4 @@ -126,6 +126,8 @@ static ADCConversionGroup adcConversionGroup = { # endif .smpr2 = ADC_SMPR2_SMP_AN0(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN1(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN2(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN3(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN4(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN5(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN6(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN7(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN8(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN9(ADC_SAMPLING_RATE), .smpr1 = ADC_SMPR1_SMP_AN10(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN11(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN12(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN13(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN14(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN15(ADC_SAMPLING_RATE), +#elif defined(RP2040) +// RP2040 does not have any extra config here #else .cfgr = ADC_CFGR_CONT | ADC_RESOLUTION, .smpr = {ADC_SMPR1_SMP_AN0(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN1(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN2(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN3(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN4(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN5(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN6(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN7(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN8(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN9(ADC_SAMPLING_RATE), ADC_SMPR2_SMP_AN10(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN11(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN12(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN13(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN14(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN15(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN16(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN17(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN18(ADC_SAMPLING_RATE)}, @@ -238,6 +240,11 @@ __attribute__((weak)) adc_mux pinToMux(pin_t pin) { case C5: return TO_MUX( ADC_CHANNEL_IN15, 0 ); // STM32F103x[C-G] in 144-pin packages also have analog inputs on F6...F10, but they are on ADC3, and the // ChibiOS ADC driver for STM32F1xx currently supports only ADC1, therefore these pins are not usable. +#elif defined(RP2040) + case 26U: return TO_MUX(0, 0); + case 27U: return TO_MUX(1, 0); + case 28U: return TO_MUX(2, 0); + case 29U: return TO_MUX(3, 0); #endif } @@ -248,7 +255,7 @@ __attribute__((weak)) adc_mux pinToMux(pin_t pin) { static inline ADCDriver* intToADCDriver(uint8_t adcInt) { switch (adcInt) { -#if STM32_ADC_USE_ADC1 || WB32_ADC_USE_ADC1 +#if RP_ADC_USE_ADC1 || STM32_ADC_USE_ADC1 || WB32_ADC_USE_ADC1 case 0: return &ADCD1; #endif @@ -296,6 +303,8 @@ int16_t adc_read(adc_mux mux) { adcConversionGroup.chselr = 1 << mux.input; /*no macro to convert N to ADC_CHSELR_CHSEL1*/ #elif defined(USE_ADCV2) adcConversionGroup.sqr3 = ADC_SQR3_SQ1_N(mux.input); +#elif defined(RP2040) + adcConversionGroup.channel_mask = 1 << mux.input; #else adcConversionGroup.sqr[0] = ADC_SQR1_SQ1_N(mux.input); #endif @@ -310,7 +319,7 @@ int16_t adc_read(adc_mux mux) { return 0; } -#ifdef USE_ADCV2 +#if defined(USE_ADCV2) || defined(RP2040) // fake 12-bit -> N-bit scale return (*sampleBuffer) >> (12 - ADC_RESOLUTION); #else diff --git a/platforms/chibios/drivers/serial_usart.c b/platforms/chibios/drivers/serial_usart.c index 6581a5b6e9..6ebbf7c8ca 100644 --- a/platforms/chibios/drivers/serial_usart.c +++ b/platforms/chibios/drivers/serial_usart.c @@ -72,27 +72,17 @@ inline void serial_transport_driver_clear(void) { #elif HAL_USE_SIO -void clear_rx_evt_cb(SIODriver* siop) { - osalSysLockFromISR(); - /* If errors occured during transactions this callback is invoked. We just - * clear the error sources and move on. We rely on the fact that we check - * for the success of the transaction by comparing the received/send bytes - * with the actual received/send bytes in the send/receive functions. */ - sioGetAndClearEventsI(serial_driver); - osalSysUnlockFromISR(); -} - -static const SIOOperation serial_usart_operation = {.rx_cb = NULL, .rx_idle_cb = NULL, .tx_cb = NULL, .tx_end_cb = NULL, .rx_evt_cb = &clear_rx_evt_cb}; - /** * @brief SIO Driver startup routine. */ static inline void usart_driver_start(void) { sioStart(serial_driver, &serial_config); - sioStartOperation(serial_driver, &serial_usart_operation); } inline void serial_transport_driver_clear(void) { + if (sioHasRXErrorsX(serial_driver)) { + sioGetAndClearErrors(serial_driver); + } osalSysLock(); while (!sioIsRXEmptyX(serial_driver)) { (void)sioGetX(serial_driver); @@ -132,10 +122,10 @@ inline bool serial_transport_send(const uint8_t* source, const size_t size) { return serial_transport_receive(dump, bytes_left); # else /* The SIO driver directly accesses the hardware FIFOs of the USART - * peripheral. As these are limited in depth, the RX FIFO might have been - * overflowed by a large that we just send. Therefore we attempt to read - * back all the data we send or until the FIFO runs empty in case it - * overflowed and data was truncated. */ + * peripheral. As these are limited in depth, the RX FIFO might have + * been overflowed by a large transaction that we just send. Therefore + * we attempt to read back all the data we send or until the FIFO runs + * empty in case it overflowed and data was truncated. */ if (unlikely(sioSynchronizeTXEnd(serial_driver, TIME_MS2I(SERIAL_USART_TIMEOUT)) < MSG_OK)) { return false; } |