diff options
Diffstat (limited to 'platforms/chibios/drivers')
| -rw-r--r-- | platforms/chibios/drivers/analog.c | 12 | ||||
| -rw-r--r-- | platforms/chibios/drivers/audio_pwm_hardware.c | 152 | ||||
| -rw-r--r-- | platforms/chibios/drivers/serial_protocol.c | 12 | ||||
| -rw-r--r-- | platforms/chibios/drivers/uart.c | 12 | ||||
| -rw-r--r-- | platforms/chibios/drivers/uart.h | 46 | ||||
| -rw-r--r-- | platforms/chibios/drivers/vendor/RP/RP2040/serial_vendor.c | 24 | ||||
| -rw-r--r-- | platforms/chibios/drivers/vendor/RP/RP2040/ws2812_vendor.c | 12 | ||||
| -rw-r--r-- | platforms/chibios/drivers/ws2812_pwm.c | 24 | ||||
| -rw-r--r-- | platforms/chibios/drivers/ws2812_spi.c | 8 |
9 files changed, 139 insertions, 163 deletions
diff --git a/platforms/chibios/drivers/analog.c b/platforms/chibios/drivers/analog.c index a7b7ec76d7..8b03e73849 100644 --- a/platforms/chibios/drivers/analog.c +++ b/platforms/chibios/drivers/analog.c @@ -22,7 +22,7 @@ # error "You need to set HAL_USE_ADC to TRUE in your halconf.h to use the ADC." #endif -#if !STM32_ADC_USE_ADC1 && !STM32_ADC_USE_ADC2 && !STM32_ADC_USE_ADC3 && !STM32_ADC_USE_ADC4 +#if !STM32_ADC_USE_ADC1 && !STM32_ADC_USE_ADC2 && !STM32_ADC_USE_ADC3 && !STM32_ADC_USE_ADC4 && !WB32_ADC_USE_ADC1 # error "You need to set one of the 'STM32_ADC_USE_ADCx' settings to TRUE in your mcuconf.h to use the ADC." #endif @@ -37,7 +37,7 @@ // Otherwise assume V3 #if defined(STM32F0XX) || defined(STM32L0XX) # define USE_ADCV1 -#elif defined(STM32F1XX) || defined(STM32F2XX) || defined(STM32F4XX) || defined(GD32VF103) +#elif defined(STM32F1XX) || defined(STM32F2XX) || defined(STM32F4XX) || defined(GD32VF103) || defined(WB32F3G71xx) || defined(WB32FQ95xx) # define USE_ADCV2 #endif @@ -74,7 +74,7 @@ /* User configurable ADC options */ #ifndef ADC_COUNT -# if defined(STM32F0XX) || defined(STM32F1XX) || defined(STM32F4XX) || defined(GD32VF103) +# if defined(STM32F0XX) || defined(STM32F1XX) || defined(STM32F4XX) || defined(GD32VF103) || defined(WB32F3G71xx) || defined(WB32FQ95xx) # define ADC_COUNT 1 # elif defined(STM32F3XX) # define ADC_COUNT 4 @@ -121,7 +121,7 @@ static ADCConversionGroup adcConversionGroup = { .cfgr1 = ADC_CFGR1_CONT | ADC_RESOLUTION, .smpr = ADC_SAMPLING_RATE, #elif defined(USE_ADCV2) -# if !defined(STM32F1XX) && !defined(GD32VF103) +# if !defined(STM32F1XX) && !defined(GD32VF103) && !defined(WB32F3G71xx) && !defined(WB32FQ95xx) .cr2 = ADC_CR2_SWSTART, // F103 seem very unhappy with, F401 seems very unhappy without... # endif .smpr2 = ADC_SMPR2_SMP_AN0(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN1(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN2(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN3(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN4(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN5(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN6(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN7(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN8(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN9(ADC_SAMPLING_RATE), @@ -219,7 +219,7 @@ __attribute__((weak)) adc_mux pinToMux(pin_t pin) { case F9: return TO_MUX( ADC_CHANNEL_IN7, 2 ); case F10: return TO_MUX( ADC_CHANNEL_IN8, 2 ); # endif -#elif defined(STM32F1XX) || defined(GD32VF103) +#elif defined(STM32F1XX) || defined(GD32VF103) || defined(WB32F3G71xx) || defined(WB32FQ95xx) case A0: return TO_MUX( ADC_CHANNEL_IN0, 0 ); case A1: return TO_MUX( ADC_CHANNEL_IN1, 0 ); case A2: return TO_MUX( ADC_CHANNEL_IN2, 0 ); @@ -248,7 +248,7 @@ __attribute__((weak)) adc_mux pinToMux(pin_t pin) { static inline ADCDriver* intToADCDriver(uint8_t adcInt) { switch (adcInt) { -#if STM32_ADC_USE_ADC1 +#if STM32_ADC_USE_ADC1 || WB32_ADC_USE_ADC1 case 0: return &ADCD1; #endif diff --git a/platforms/chibios/drivers/audio_pwm_hardware.c b/platforms/chibios/drivers/audio_pwm_hardware.c index 710f397609..54dac46605 100644 --- a/platforms/chibios/drivers/audio_pwm_hardware.c +++ b/platforms/chibios/drivers/audio_pwm_hardware.c @@ -1,29 +1,15 @@ -/* Copyright 2020 Jack Humbert - * Copyright 2020 JohSchneider - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ - -/* -Audio Driver: PWM - -the duty-cycle is always kept at 50%, and the pwm-period is adjusted to match the frequency of a note to be played back. - -this driver uses the chibios-PWM system to produce a square-wave on specific output pins that are connected to the PWM hardware. -The hardware directly toggles the pin via its alternate function. see your MCUs data-sheet for which pin can be driven by what timer - looking for TIMx_CHy and the corresponding alternate function. - - */ +// Copyright 2022 Stefan Kerkmann +// Copyright 2020 Jack Humbert +// Copyright 2020 JohSchneider +// SPDX-License-Identifier: GPL-2.0-or-later + +// Audio Driver: PWM the duty-cycle is always kept at 50%, and the pwm-period is +// adjusted to match the frequency of a note to be played back. This driver uses +// the chibios-PWM system to produce a square-wave on specific output pins that +// are connected to the PWM hardware. The hardware directly toggles the pin via +// its alternate function. see your MCUs data-sheet for which pin can be driven +// by what timer - looking for TIMx_CHy and the corresponding alternate +// function. #include "audio.h" #include "ch.h" @@ -33,53 +19,36 @@ The hardware directly toggles the pin via its alternate function. see your MCUs # error "Audio feature enabled, but no pin selected - see docs/feature_audio under the ARM PWM settings" #endif +#if !defined(AUDIO_PWM_COUNTER_FREQUENCY) +# define AUDIO_PWM_COUNTER_FREQUENCY 100000 +#endif + extern bool playing_note; extern bool playing_melody; extern uint8_t note_timbre; -static PWMConfig pwmCFG = { - .frequency = 100000, /* PWM clock frequency */ - // CHIBIOS-BUG? can't set the initial period to <2, or the pwm (hard or software) takes ~130ms with .frequency=500000 for a pwmChangePeriod to take effect; with no output=silence in the meantime - .period = 2, /* initial PWM period (in ticks) 1S (1/10kHz=0.1mS 0.1ms*10000 ticks=1S) */ - .callback = NULL, /* no callback, the hardware directly toggles the pin */ - .channels = - { -#if AUDIO_PWM_CHANNEL == 4 - {PWM_OUTPUT_DISABLED, NULL}, /* channel 0 -> TIMx_CH1 */ - {PWM_OUTPUT_DISABLED, NULL}, /* channel 1 -> TIMx_CH2 */ - {PWM_OUTPUT_DISABLED, NULL}, /* channel 2 -> TIMx_CH3 */ - {PWM_OUTPUT_ACTIVE_HIGH, NULL} /* channel 3 -> TIMx_CH4 */ -#elif AUDIO_PWM_CHANNEL == 3 - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_ACTIVE_HIGH, NULL}, /* TIMx_CH3 */ - {PWM_OUTPUT_DISABLED, NULL} -#elif AUDIO_PWM_CHANNEL == 2 - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_ACTIVE_HIGH, NULL}, /* TIMx_CH2 */ - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_DISABLED, NULL} -#else /*fallback to CH1 */ - {PWM_OUTPUT_ACTIVE_HIGH, NULL}, /* TIMx_CH1 */ - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_DISABLED, NULL} -#endif - }, -}; +static PWMConfig pwmCFG = {.frequency = AUDIO_PWM_COUNTER_FREQUENCY, /* PWM clock frequency */ + .period = 2, + .callback = NULL, + .channels = {[(AUDIO_PWM_CHANNEL - 1)] = {.mode = PWM_OUTPUT_ACTIVE_HIGH, .callback = NULL}}}; static float channel_1_frequency = 0.0f; -void channel_1_set_frequency(float freq) { + +void channel_1_set_frequency(float freq) { channel_1_frequency = freq; - if (freq <= 0.0) // a pause/rest has freq=0 + if (freq <= 0.0) { + // a pause/rest has freq=0 return; + } pwmcnt_t period = (pwmCFG.frequency / freq); - pwmChangePeriod(&AUDIO_PWM_DRIVER, period); - pwmEnableChannel(&AUDIO_PWM_DRIVER, AUDIO_PWM_CHANNEL - 1, - // adjust the duty-cycle so that the output is for 'note_timbre' duration HIGH - PWM_PERCENTAGE_TO_WIDTH(&AUDIO_PWM_DRIVER, (100 - note_timbre) * 100)); + chSysLockFromISR(); + pwmChangePeriodI(&AUDIO_PWM_DRIVER, period); + pwmEnableChannelI(&AUDIO_PWM_DRIVER, AUDIO_PWM_CHANNEL - 1, + // adjust the duty-cycle so that the output is for 'note_timbre' duration HIGH + PWM_PERCENTAGE_TO_WIDTH(&AUDIO_PWM_DRIVER, (100 - note_timbre) * 100)); + chSysUnlockFromISR(); } float channel_1_get_frequency(void) { @@ -95,54 +64,53 @@ void channel_1_stop(void) { pwmStop(&AUDIO_PWM_DRIVER); } -static void gpt_callback(GPTDriver *gptp); -GPTConfig gptCFG = { - /* a whole note is one beat, which is - per definition in musical_notes.h - set to 64 - the longest note is BREAVE_DOT=128+64=192, the shortest SIXTEENTH=4 - the tempo (which might vary!) is in bpm (beats per minute) - therefore: if the timer ticks away at .frequency = (60*64)Hz, - and the .interval counts from 64 downwards - audio_update_state is - called just often enough to not miss any notes - */ - .frequency = 60 * 64, - .callback = gpt_callback, -}; +static virtual_timer_t audio_vt; +static void audio_callback(virtual_timer_t *vtp, void *p); + +// a regular timer task, that checks the note to be currently played and updates +// the pwm to output that frequency. +static void audio_callback(virtual_timer_t *vtp, void *p) { + float freq; // TODO: freq_alt + + if (audio_update_state()) { + freq = audio_get_processed_frequency(0); // freq_alt would be index=1 + channel_1_set_frequency(freq); + } + + chSysLockFromISR(); + chVTSetI(&audio_vt, TIME_MS2I(16), audio_callback, NULL); + chSysUnlockFromISR(); +} void audio_driver_initialize(void) { pwmStart(&AUDIO_PWM_DRIVER, &pwmCFG); // connect the AUDIO_PIN to the PWM hardware -#if defined(USE_GPIOV1) // STM32F103C8 - palSetLineMode(AUDIO_PIN, PAL_MODE_ALTERNATE_PUSHPULL); +#if defined(USE_GPIOV1) // STM32F103C8, RP2040 + palSetLineMode(AUDIO_PIN, AUDIO_PWM_PAL_MODE); #else // GPIOv2 (or GPIOv3 for f4xx, which is the same/compatible at this command) palSetLineMode(AUDIO_PIN, PAL_MODE_ALTERNATE(AUDIO_PWM_PAL_MODE)); #endif - gptStart(&AUDIO_STATE_TIMER, &gptCFG); + chVTObjectInit(&audio_vt); } void audio_driver_start(void) { channel_1_stop(); channel_1_start(); - if (playing_note || playing_melody) { - gptStartContinuous(&AUDIO_STATE_TIMER, 64); + if ((playing_note || playing_melody) && !chVTIsArmed(&audio_vt)) { + // a whole note is one beat, which is - per definition in + // musical_notes.h - set to 64 the longest note is + // BREAVE_DOT=128+64=192, the shortest SIXTEENTH=4 the tempo (which + // might vary!) is in bpm (beats per minute) therefore: if the timer + // ticks away at 64Hz (~16.6ms) audio_update_state is called just often + // enough to not miss any notes + chVTSet(&audio_vt, TIME_MS2I(16), audio_callback, NULL); } } void audio_driver_stop(void) { channel_1_stop(); - gptStopTimer(&AUDIO_STATE_TIMER); -} - -/* a regular timer task, that checks the note to be currently played - * and updates the pwm to output that frequency - */ -static void gpt_callback(GPTDriver *gptp) { - float freq; // TODO: freq_alt - - if (audio_update_state()) { - freq = audio_get_processed_frequency(0); // freq_alt would be index=1 - channel_1_set_frequency(freq); - } + chVTReset(&audio_vt); } diff --git a/platforms/chibios/drivers/serial_protocol.c b/platforms/chibios/drivers/serial_protocol.c index c95aed9885..ccaf73282d 100644 --- a/platforms/chibios/drivers/serial_protocol.c +++ b/platforms/chibios/drivers/serial_protocol.c @@ -102,15 +102,11 @@ static inline bool react_to_transaction(void) { * @return bool Indicates success of transaction. */ bool soft_serial_transaction(int index) { - bool result = initiate_transaction((uint8_t)index); + /* Clear the receive queue, to start with a clean slate. + * Parts of failed transactions or spurious bytes could still be in it. */ + serial_transport_driver_clear(); - if (unlikely(!result)) { - /* Clear the receive queue, to start with a clean slate. - * Parts of failed transactions or spurious bytes could still be in it. */ - serial_transport_driver_clear(); - } - - return result; + return initiate_transaction((uint8_t)index); } /** diff --git a/platforms/chibios/drivers/uart.c b/platforms/chibios/drivers/uart.c index 396803f33b..b16130d80b 100644 --- a/platforms/chibios/drivers/uart.c +++ b/platforms/chibios/drivers/uart.c @@ -18,7 +18,9 @@ #include "quantum.h" -#if defined(WB32F3G71xx) || defined(WB32FQ95xx) +#if defined(MCU_KINETIS) +static SerialConfig serialConfig = {SERIAL_DEFAULT_BITRATE}; +#elif defined(WB32F3G71xx) || defined(WB32FQ95xx) static SerialConfig serialConfig = {SERIAL_DEFAULT_BITRATE, SD1_WRDLEN, SD1_STPBIT, SD1_PARITY, SD1_ATFLCT}; #else static SerialConfig serialConfig = {SERIAL_DEFAULT_BITRATE, SD1_CR1, SD1_CR2, SD1_CR3}; @@ -30,11 +32,15 @@ void uart_init(uint32_t baud) { if (!is_initialised) { is_initialised = true; +#if defined(MCU_KINETIS) + serialConfig.sc_speed = baud; +#else serialConfig.speed = baud; +#endif #if defined(USE_GPIOV1) - palSetLineMode(SD1_TX_PIN, PAL_MODE_ALTERNATE_OPENDRAIN); - palSetLineMode(SD1_RX_PIN, PAL_MODE_ALTERNATE_OPENDRAIN); + palSetLineMode(SD1_TX_PIN, SD1_TX_PAL_MODE); + palSetLineMode(SD1_RX_PIN, SD1_RX_PAL_MODE); #else palSetLineMode(SD1_TX_PIN, PAL_MODE_ALTERNATE(SD1_TX_PAL_MODE) | PAL_OUTPUT_TYPE_OPENDRAIN); palSetLineMode(SD1_RX_PIN, PAL_MODE_ALTERNATE(SD1_RX_PAL_MODE) | PAL_OUTPUT_TYPE_OPENDRAIN); diff --git a/platforms/chibios/drivers/uart.h b/platforms/chibios/drivers/uart.h index 603d51037b..db97840270 100644 --- a/platforms/chibios/drivers/uart.h +++ b/platforms/chibios/drivers/uart.h @@ -28,32 +28,50 @@ # define SD1_TX_PIN A9 #endif -#ifndef SD1_TX_PAL_MODE -# define SD1_TX_PAL_MODE 7 -#endif - #ifndef SD1_RX_PIN # define SD1_RX_PIN A10 #endif -#ifndef SD1_RX_PAL_MODE -# define SD1_RX_PAL_MODE 7 -#endif - #ifndef SD1_CTS_PIN # define SD1_CTS_PIN A11 #endif -#ifndef SD1_CTS_PAL_MODE -# define SD1_CTS_PAL_MODE 7 -#endif - #ifndef SD1_RTS_PIN # define SD1_RTS_PIN A12 #endif -#ifndef SD1_RTS_PAL_MODE -# define SD1_RTS_PAL_MODE 7 +#ifdef USE_GPIOV1 +# ifndef SD1_TX_PAL_MODE +# define SD1_TX_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN +# endif + +# ifndef SD1_RX_PAL_MODE +# define SD1_RX_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN +# endif + +# ifndef SD1_CTS_PAL_MODE +# define SD1_CTS_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN +# endif + +# ifndef SD1_RTS_PAL_MODE +# define SD1_RTS_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN +# endif +#else +# ifndef SD1_TX_PAL_MODE +# define SD1_TX_PAL_MODE 7 +# endif + +# ifndef SD1_RX_PAL_MODE +# define SD1_RX_PAL_MODE 7 +# endif + +# ifndef SD1_CTS_PAL_MODE +# define SD1_CTS_PAL_MODE 7 +# endif + +# ifndef SD1_RTS_PAL_MODE +# define SD1_RTS_PAL_MODE 7 +# endif #endif #ifndef SD1_CR1 diff --git a/platforms/chibios/drivers/vendor/RP/RP2040/serial_vendor.c b/platforms/chibios/drivers/vendor/RP/RP2040/serial_vendor.c index 764764b3f9..dd4723a086 100644 --- a/platforms/chibios/drivers/vendor/RP/RP2040/serial_vendor.c +++ b/platforms/chibios/drivers/vendor/RP/RP2040/serial_vendor.c @@ -140,9 +140,8 @@ void pio_serve_interrupt(void) { // strength is chosen because the transmitting side must still be able to drive // the signal low. With this configuration the rise times are fast enough and // the generated low level with 360mV will generate a logical zero. -static inline void enter_rx_state(void) { +static void __no_inline_not_in_flash_func(enter_rx_state)(void) { osalSysLock(); - nvicEnableVector(RP_USBCTRL_IRQ_NUMBER, RP_IRQ_USB0_PRIORITY); // Wait for the transmitting state machines FIFO to run empty. At this point // the last byte has been pulled from the transmitting state machines FIFO // into the output shift register. We have to wait a tiny bit more until @@ -162,11 +161,8 @@ static inline void enter_rx_state(void) { osalSysUnlock(); } -static inline void leave_rx_state(void) { +static void __no_inline_not_in_flash_func(leave_rx_state)(void) { osalSysLock(); - // We don't want to be interrupted by frequent (1KHz) USB interrupts while - // doing our timing critical sending operation. - nvicDisableVector(RP_USBCTRL_IRQ_NUMBER); // In Half-duplex operation the tx pin dual-functions as sender and // receiver. To not receive the data we will send, we disable the receiving // state machine. @@ -185,12 +181,13 @@ static inline void leave_rx_state(void) {} #endif /** - * @brief Clear the RX and TX hardware FIFOs of the state machines. + * @brief Clear the FIFO of the RX state machine. */ inline void serial_transport_driver_clear(void) { osalSysLock(); - pio_sm_clear_fifos(pio, rx_state_machine); - pio_sm_clear_fifos(pio, tx_state_machine); + while (!pio_sm_is_rx_fifo_empty(pio, rx_state_machine)) { + pio_sm_clear_fifos(pio, rx_state_machine); + } osalSysUnlock(); } @@ -198,11 +195,6 @@ static inline msg_t sync_tx(sysinterval_t timeout) { msg_t msg = MSG_OK; osalSysLock(); while (pio_sm_is_tx_fifo_full(pio, tx_state_machine)) { -#if !defined(SERIAL_USART_FULL_DUPLEX) - // Enable USB interrupts again, because we might sleep for a long time - // here and don't want to be disconnected from the host. - nvicEnableVector(RP_USBCTRL_IRQ_NUMBER, RP_IRQ_USB0_PRIORITY); -#endif pio_set_irq0_source_enabled(pio, pis_sm0_tx_fifo_not_full + tx_state_machine, true); msg = osalThreadSuspendTimeoutS(&tx_thread, timeout); if (msg < MSG_OK) { @@ -210,10 +202,6 @@ static inline msg_t sync_tx(sysinterval_t timeout) { break; } } -#if !defined(SERIAL_USART_FULL_DUPLEX) - // Entering timing critical territory again. - nvicDisableVector(RP_USBCTRL_IRQ_NUMBER); -#endif osalSysUnlock(); return msg; } diff --git a/platforms/chibios/drivers/vendor/RP/RP2040/ws2812_vendor.c b/platforms/chibios/drivers/vendor/RP/RP2040/ws2812_vendor.c index bc34eded14..4470e2c826 100644 --- a/platforms/chibios/drivers/vendor/RP/RP2040/ws2812_vendor.c +++ b/platforms/chibios/drivers/vendor/RP/RP2040/ws2812_vendor.c @@ -36,10 +36,10 @@ static int state_machine = -1; // clang-format off static const uint16_t ws2812_program_instructions[] = { // .wrap_target - 0x7221, // 0: out x, 1 side 1 [2] - 0x0123, // 1: jmp !x, 3 side 0 [1] - 0x0400, // 2: jmp 0 side 0 [4] - 0xb442, // 3: nop side 1 [4] + 0x7221, // 0: out x, 1 side 1 [2] + 0x0123, // 1: jmp !x, 3 side 0 [1] + 0x0400, // 2: jmp 0 side 0 [4] + 0xb442, // 3: nop side 1 [4] // .wrap }; @@ -62,7 +62,7 @@ static const pio_program_t ws2812_program = { .origin = -1, }; -static uint32_t WS2812_BUFFER[RGBLED_NUM]; +static uint32_t WS2812_BUFFER[WS2812_LED_COUNT]; static const rp_dma_channel_t* WS2812_DMA_CHANNEL; bool ws2812_init(void) { @@ -154,7 +154,7 @@ static inline void sync_ws2812_transfer(void) { // Abort the synchronization if we have to wait longer than the total // count of LEDs in millisecounds. This is safely much longer than it // would take to push all the data out. - if (unlikely(timer_elapsed_fast(start) > RGBLED_NUM)) { + if (unlikely(timer_elapsed_fast(start) > WS2812_LED_COUNT)) { dprintln("ERROR: WS2812 DMA transfer has stalled, aborting!"); dmaChannelDisableX(WS2812_DMA_CHANNEL); return; diff --git a/platforms/chibios/drivers/ws2812_pwm.c b/platforms/chibios/drivers/ws2812_pwm.c index 792de85ce9..c4a591c10b 100644 --- a/platforms/chibios/drivers/ws2812_pwm.c +++ b/platforms/chibios/drivers/ws2812_pwm.c @@ -88,8 +88,8 @@ */ #define WS2812_COLOR_BITS (WS2812_CHANNELS * 8) #define WS2812_RESET_BIT_N (1000 * WS2812_TRST_US / WS2812_TIMING) -#define WS2812_COLOR_BIT_N (RGBLED_NUM * WS2812_COLOR_BITS) /**< Number of data bits */ -#define WS2812_BIT_N (WS2812_COLOR_BIT_N + WS2812_RESET_BIT_N) /**< Total number of bits in a frame */ +#define WS2812_COLOR_BIT_N (WS2812_LED_COUNT * WS2812_COLOR_BITS) /**< Number of data bits */ +#define WS2812_BIT_N (WS2812_COLOR_BIT_N + WS2812_RESET_BIT_N) /**< Total number of bits in a frame */ /** * @brief High period for a zero, in ticks @@ -133,7 +133,7 @@ /** * @brief Determine the index in @ref ws2812_frame_buffer "the frame buffer" of a given bit * - * @param[in] led: The led index [0, @ref RGBLED_NUM) + * @param[in] led: The led index [0, @ref WS2812_LED_COUNT) * @param[in] byte: The byte number [0, 2] * @param[in] bit: The bit number [0, 7] * @@ -147,7 +147,7 @@ * * @note The red byte is the middle byte in the color packet * - * @param[in] led: The led index [0, @ref RGBLED_NUM) + * @param[in] led: The led index [0, @ref WS2812_LED_COUNT) * @param[in] bit: The bit number [0, 7] * * @return The bit index @@ -159,7 +159,7 @@ * * @note The red byte is the first byte in the color packet * - * @param[in] led: The led index [0, @ref RGBLED_NUM) + * @param[in] led: The led index [0, @ref WS2812_LED_COUNT) * @param[in] bit: The bit number [0, 7] * * @return The bit index @@ -171,7 +171,7 @@ * * @note The red byte is the last byte in the color packet * - * @param[in] led: The led index [0, @ref RGBLED_NUM) + * @param[in] led: The led index [0, @ref WS2812_LED_COUNT) * @param[in] bit: The bit index [0, 7] * * @return The bit index @@ -184,7 +184,7 @@ * * @note The red byte is the middle byte in the color packet * - * @param[in] led: The led index [0, @ref RGBLED_NUM) + * @param[in] led: The led index [0, @ref WS2812_LED_COUNT) * @param[in] bit: The bit number [0, 7] * * @return The bit index @@ -196,7 +196,7 @@ * * @note The red byte is the first byte in the color packet * - * @param[in] led: The led index [0, @ref RGBLED_NUM) + * @param[in] led: The led index [0, @ref WS2812_LED_COUNT) * @param[in] bit: The bit number [0, 7] * * @return The bit index @@ -208,7 +208,7 @@ * * @note The red byte is the last byte in the color packet * - * @param[in] led: The led index [0, @ref RGBLED_NUM) + * @param[in] led: The led index [0, @ref WS2812_LED_COUNT) * @param[in] bit: The bit index [0, 7] * * @return The bit index @@ -221,7 +221,7 @@ * * @note The red byte is the middle byte in the color packet * - * @param[in] led: The led index [0, @ref RGBLED_NUM) + * @param[in] led: The led index [0, @ref WS2812_LED_COUNT) * @param[in] bit: The bit number [0, 7] * * @return The bit index @@ -233,7 +233,7 @@ * * @note The red byte is the first byte in the color packet * - * @param[in] led: The led index [0, @ref RGBLED_NUM) + * @param[in] led: The led index [0, @ref WS2812_LED_COUNT) * @param[in] bit: The bit number [0, 7] * * @return The bit index @@ -245,7 +245,7 @@ * * @note The red byte is the last byte in the color packet * - * @param[in] led: The led index [0, @ref RGBLED_NUM) + * @param[in] led: The led index [0, @ref WS2812_LED_COUNT) * @param[in] bit: The bit index [0, 7] * * @return The bit index diff --git a/platforms/chibios/drivers/ws2812_spi.c b/platforms/chibios/drivers/ws2812_spi.c index a73eb69720..03ffbd7f82 100644 --- a/platforms/chibios/drivers/ws2812_spi.c +++ b/platforms/chibios/drivers/ws2812_spi.c @@ -80,7 +80,7 @@ # define WS2812_CHANNELS 3 #endif #define BYTES_FOR_LED (BYTES_FOR_LED_BYTE * WS2812_CHANNELS) -#define DATA_SIZE (BYTES_FOR_LED * RGBLED_NUM) +#define DATA_SIZE (BYTES_FOR_LED * WS2812_LED_COUNT) #define RESET_SIZE (1000 * WS2812_TRST_US / (2 * WS2812_TIMING)) #define PREAMBLE_SIZE 4 @@ -181,7 +181,7 @@ void ws2812_init(void) { spiStart(&WS2812_SPI, &spicfg); /* Setup transfer parameters. */ spiSelect(&WS2812_SPI); /* Slave Select assertion. */ #ifdef WS2812_SPI_USE_CIRCULAR_BUFFER - spiStartSend(&WS2812_SPI, sizeof(txbuf) / sizeof(txbuf[0]), txbuf); + spiStartSend(&WS2812_SPI, ARRAY_SIZE(txbuf), txbuf); #endif } @@ -200,9 +200,9 @@ void ws2812_setleds(LED_TYPE* ledarray, uint16_t leds) { // Instead spiSend can be used to send synchronously (or the thread logic can be added back). #ifndef WS2812_SPI_USE_CIRCULAR_BUFFER # ifdef WS2812_SPI_SYNC - spiSend(&WS2812_SPI, sizeof(txbuf) / sizeof(txbuf[0]), txbuf); + spiSend(&WS2812_SPI, ARRAY_SIZE(txbuf), txbuf); # else - spiStartSend(&WS2812_SPI, sizeof(txbuf) / sizeof(txbuf[0]), txbuf); + spiStartSend(&WS2812_SPI, ARRAY_SIZE(txbuf), txbuf); # endif #endif } |