diff options
Diffstat (limited to 'drivers')
88 files changed, 6744 insertions, 2452 deletions
diff --git a/drivers/eeprom/eeprom_spi.h b/drivers/eeprom/eeprom_spi.h index 282c603565..6a21d5516b 100644 --- a/drivers/eeprom/eeprom_spi.h +++ b/drivers/eeprom/eeprom_spi.h @@ -17,6 +17,18 @@ #pragma once /* + Default device configurations: + + For the Adafruit SPI Non-Volatile FRAM Breakout: https://www.adafruit.com/product/1897 + #define EEPROM_SPI_MB85RS64V +*/ +#if defined(EEPROM_SPI_MB85RS64V) +# define EXTERNAL_EEPROM_BYTE_COUNT 8192 +# define EXTERNAL_EEPROM_PAGE_SIZE 64 // it's FRAM, so it doesn't actually matter, this just sets the RAM buffer +# define EXTERNAL_EEPROM_ADDRESS_SIZE 2 +#endif + +/* The slave select pin of the EEPROM. This needs to be a normal GPIO pin_t value, such as A7. */ diff --git a/drivers/haptic/solenoid.c b/drivers/haptic/solenoid.c index 4e43903255..da4095cda4 100644 --- a/drivers/haptic/solenoid.c +++ b/drivers/haptic/solenoid.c @@ -23,7 +23,6 @@ #include "util.h" #include <stdlib.h> -uint8_t solenoid_dwell = SOLENOID_DEFAULT_DWELL; static pin_t solenoid_pads[] = SOLENOID_PINS; #define NUMBER_OF_SOLENOIDS ARRAY_SIZE(solenoid_pads) bool solenoid_on[NUMBER_OF_SOLENOIDS] = {false}; @@ -53,7 +52,7 @@ void solenoid_set_buzz(uint8_t buzz) { } void solenoid_set_dwell(uint8_t dwell) { - solenoid_dwell = dwell; + haptic_set_dwell(dwell); } /** @@ -119,7 +118,7 @@ void solenoid_check(void) { elapsed[i] = timer_elapsed(solenoid_start[i]); // Check if it's time to finish this solenoid click cycle - if (elapsed[i] > solenoid_dwell) { + if (elapsed[i] > haptic_config.dwell) { solenoid_stop(i); continue; } diff --git a/drivers/led/apa102.c b/drivers/led/apa102.c index 766d8cd2eb..527519eb8a 100644 --- a/drivers/led/apa102.c +++ b/drivers/led/apa102.c @@ -24,7 +24,7 @@ # elif defined(PROTOCOL_CHIBIOS) # include "hal.h" # include "chibios_config.h" -# if defined(STM32F0XX) || defined(STM32F1XX) || defined(STM32F3XX) || defined(STM32F4XX) || defined(STM32L0XX) || defined(GD32VF103) +# if defined(STM32F0XX) || defined(STM32F1XX) || defined(STM32F3XX) || defined(STM32F4XX) || defined(STM32L0XX) || defined(GD32VF103) || defined(MCU_RP) # define APA102_NOPS (100 / (1000000000L / (CPU_CLOCK / 4))) // This calculates how many loops of 4 nops to run to delay 100 ns # else # error APA102_NOPS configuration required @@ -61,18 +61,18 @@ void static apa102_end_frame(uint16_t num_leds); void static apa102_send_frame(uint8_t red, uint8_t green, uint8_t blue, uint8_t brightness); void static apa102_send_byte(uint8_t byte); -void apa102_setleds(LED_TYPE *start_led, uint16_t num_leds) { - LED_TYPE *end = start_led + num_leds; +void apa102_setleds(rgb_led_t *start_led, uint16_t num_leds) { + rgb_led_t *end = start_led + num_leds; apa102_start_frame(); - for (LED_TYPE *led = start_led; led < end; led++) { + for (rgb_led_t *led = start_led; led < end; led++) { apa102_send_frame(led->r, led->g, led->b, apa102_led_brightness); } apa102_end_frame(num_leds); } // Overwrite the default rgblight_call_driver to use apa102 driver -void rgblight_call_driver(LED_TYPE *start_led, uint8_t num_leds) { +void rgblight_call_driver(rgb_led_t *start_led, uint8_t num_leds) { apa102_setleds(start_led, num_leds); } diff --git a/drivers/led/apa102.h b/drivers/led/apa102.h index 58cf020c1e..cd0a19d445 100644 --- a/drivers/led/apa102.h +++ b/drivers/led/apa102.h @@ -37,5 +37,5 @@ extern uint8_t apa102_led_brightness; * - Set the data-out pin as output * - Send out the LED data */ -void apa102_setleds(LED_TYPE *start_led, uint16_t num_leds); +void apa102_setleds(rgb_led_t *start_led, uint16_t num_leds); void apa102_set_brightness(uint8_t brightness); diff --git a/drivers/led/aw20216.c b/drivers/led/aw20216.c deleted file mode 100644 index 479643add4..0000000000 --- a/drivers/led/aw20216.c +++ /dev/null @@ -1,168 +0,0 @@ -/* Copyright 2021 Jasper Chan - * 2023 Huckies <https://github.com/Huckies> - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#include "aw20216.h" -#include "wait.h" -#include "spi_master.h" - -/* The AW20216 appears to be somewhat similar to the IS31FL743, although quite - * a few things are different, such as the command byte format and page ordering. - * The LED addresses start from 0x00 instead of 0x01. - */ -#define AWINIC_ID 0b1010 << 4 - -#define AW_PAGE_FUNCTION 0x00 << 1 // PG0, Function registers -#define AW_PAGE_PWM 0x01 << 1 // PG1, LED PWM control -#define AW_PAGE_SCALING 0x02 << 1 // PG2, LED current scaling control -#define AW_PAGE_PATCHOICE 0x03 << 1 // PG3, Pattern choice? -#define AW_PAGE_PWMSCALING 0x04 << 1 // PG4, LED PWM + Scaling control? - -#define AW_WRITE 0 -#define AW_READ 1 - -#define AW_REG_CONFIGURATION 0x00 // PG0 -#define AW_REG_GLOBALCURRENT 0x01 // PG0 -#define AW_REG_RESET 0x2F // PG0 -#define AW_REG_MIXFUNCTION 0x46 // PG0 - -// Default value of AW_REG_CONFIGURATION -// D7:D4 = 1011, SWSEL (SW1~SW12 active) -// D3 = 0?, reserved (apparently this should be 1 but it doesn't seem to matter) -// D2:D1 = 00, OSDE (open/short detection enable) -// D0 = 0, CHIPEN (write 1 to enable LEDs when hardware enable pulled high) -#define AW_CONFIG_DEFAULT 0b10110000 -#define AW_MIXCR_DEFAULT 0b00000000 -#define AW_RESET_CMD 0xAE -#define AW_CHIPEN 1 -#define AW_LPEN (0x01 << 1) - -#define AW_PWM_REGISTER_COUNT 216 - -#ifndef AW_SCALING_MAX -# define AW_SCALING_MAX 150 -#endif - -#ifndef AW_GLOBAL_CURRENT_MAX -# define AW_GLOBAL_CURRENT_MAX 150 -#endif - -#ifndef AW_SPI_MODE -# define AW_SPI_MODE 0 -#endif - -#ifndef AW_SPI_DIVISOR -# define AW_SPI_DIVISOR 4 -#endif - -uint8_t g_pwm_buffer[DRIVER_COUNT][AW_PWM_REGISTER_COUNT]; -bool g_pwm_buffer_update_required[DRIVER_COUNT] = {false}; - -bool aw20216_write(pin_t cs_pin, uint8_t page, uint8_t reg, uint8_t* data, uint8_t len) { - static uint8_t s_spi_transfer_buffer[2] = {0}; - - if (!spi_start(cs_pin, false, AW_SPI_MODE, AW_SPI_DIVISOR)) { - spi_stop(); - return false; - } - - s_spi_transfer_buffer[0] = (AWINIC_ID | page | AW_WRITE); - s_spi_transfer_buffer[1] = reg; - - if (spi_transmit(s_spi_transfer_buffer, 2) != SPI_STATUS_SUCCESS) { - spi_stop(); - return false; - } - - if (spi_transmit(data, len) != SPI_STATUS_SUCCESS) { - spi_stop(); - return false; - } - - spi_stop(); - return true; -} - -static inline bool aw20216_write_register(pin_t cs_pin, uint8_t page, uint8_t reg, uint8_t value) { - // Little wrapper so callers need not care about sending a buffer - return aw20216_write(cs_pin, page, reg, &value, 1); -} - -void aw20216_soft_reset(pin_t cs_pin) { - aw20216_write_register(cs_pin, AW_PAGE_FUNCTION, AW_REG_RESET, AW_RESET_CMD); -} - -static void aw20216_init_scaling(pin_t cs_pin) { - // Set constant current to the max, control brightness with PWM - for (uint8_t i = 0; i < AW_PWM_REGISTER_COUNT; i++) { - aw20216_write_register(cs_pin, AW_PAGE_SCALING, i, AW_SCALING_MAX); - } -} - -static inline void aw20216_init_current_limit(pin_t cs_pin) { - // Push config - aw20216_write_register(cs_pin, AW_PAGE_FUNCTION, AW_REG_GLOBALCURRENT, AW_GLOBAL_CURRENT_MAX); -} - -static inline void aw20216_soft_enable(pin_t cs_pin) { - // Push config - aw20216_write_register(cs_pin, AW_PAGE_FUNCTION, AW_REG_CONFIGURATION, AW_CONFIG_DEFAULT | AW_CHIPEN); -} - -static inline void aw20216_auto_lowpower(pin_t cs_pin) { - aw20216_write_register(cs_pin, AW_PAGE_FUNCTION, AW_REG_MIXFUNCTION, AW_MIXCR_DEFAULT | AW_LPEN); -} - -void aw20216_init(pin_t cs_pin, pin_t en_pin) { - setPinOutput(en_pin); - writePinHigh(en_pin); - - aw20216_soft_reset(cs_pin); - wait_ms(2); - - // Drivers should start with all scaling and PWM registers as off - aw20216_init_current_limit(cs_pin); - aw20216_init_scaling(cs_pin); - - aw20216_soft_enable(cs_pin); - aw20216_auto_lowpower(cs_pin); -} - -void aw20216_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) { - aw_led led; - memcpy_P(&led, (&g_aw_leds[index]), sizeof(led)); - - if (g_pwm_buffer[led.driver][led.r] == red && g_pwm_buffer[led.driver][led.g] == green && g_pwm_buffer[led.driver][led.b] == blue) { - return; - } - g_pwm_buffer[led.driver][led.r] = red; - g_pwm_buffer[led.driver][led.g] = green; - g_pwm_buffer[led.driver][led.b] = blue; - g_pwm_buffer_update_required[led.driver] = true; -} - -void aw20216_set_color_all(uint8_t red, uint8_t green, uint8_t blue) { - for (uint8_t i = 0; i < RGB_MATRIX_LED_COUNT; i++) { - aw20216_set_color(i, red, green, blue); - } -} - -void aw20216_update_pwm_buffers(pin_t cs_pin, uint8_t index) { - if (g_pwm_buffer_update_required[index]) { - aw20216_write(cs_pin, AW_PAGE_PWM, 0, g_pwm_buffer[index], AW_PWM_REGISTER_COUNT); - } - g_pwm_buffer_update_required[index] = false; -} diff --git a/drivers/led/aw20216s.c b/drivers/led/aw20216s.c new file mode 100644 index 0000000000..8f3ebec510 --- /dev/null +++ b/drivers/led/aw20216s.c @@ -0,0 +1,184 @@ +/* Copyright 2021 Jasper Chan + * 2023 Huckies <https://github.com/Huckies> + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include "aw20216s.h" +#include "wait.h" +#include "spi_master.h" + +/* The AW20216S appears to be somewhat similar to the IS31FL743, although quite + * a few things are different, such as the command byte format and page ordering. + * The LED addresses start from 0x00 instead of 0x01. + */ +#define AW20216S_ID 0b1010 << 4 + +#define AW20216S_PAGE_FUNCTION 0x00 << 1 // PG0, Function registers +#define AW20216S_PAGE_PWM 0x01 << 1 // PG1, LED PWM control +#define AW20216S_PAGE_SCALING 0x02 << 1 // PG2, LED current scaling control +#define AW20216S_PAGE_PATCHOICE 0x03 << 1 // PG3, Pattern choice? +#define AW20216S_PAGE_PWMSCALING 0x04 << 1 // PG4, LED PWM + Scaling control? + +#define AW20216S_WRITE 0 +#define AW20216S_READ 1 + +#define AW20216S_REG_CONFIGURATION 0x00 // PG0 +#define AW20216S_REG_GLOBALCURRENT 0x01 // PG0 +#define AW20216S_REG_RESET 0x2F // PG0 +#define AW20216S_REG_MIXFUNCTION 0x46 // PG0 + +// Default value of AW20216S_REG_CONFIGURATION +// D7:D4 = 1011, SWSEL (SW1~SW12 active) +// D3 = 0?, reserved (apparently this should be 1 but it doesn't seem to matter) +// D2:D1 = 00, OSDE (open/short detection enable) +// D0 = 0, CHIPEN (write 1 to enable LEDs when hardware enable pulled high) +#define AW20216S_CONFIG_DEFAULT 0b10110000 +#define AW20216S_MIXCR_DEFAULT 0b00000000 +#define AW20216S_RESET_CMD 0xAE +#define AW20216S_CHIPEN 1 +#define AW20216S_LPEN (0x01 << 1) + +#define AW20216S_PWM_REGISTER_COUNT 216 + +#ifndef AW20216S_SCALING_MAX +# define AW20216S_SCALING_MAX 150 +#endif + +#ifndef AW20216S_GLOBAL_CURRENT_MAX +# define AW20216S_GLOBAL_CURRENT_MAX 150 +#endif + +#ifndef AW20216S_SPI_MODE +# define AW20216S_SPI_MODE 0 +#endif + +#ifndef AW20216S_SPI_DIVISOR +# define AW20216S_SPI_DIVISOR 4 +#endif + +uint8_t g_pwm_buffer[AW20216S_DRIVER_COUNT][AW20216S_PWM_REGISTER_COUNT]; +bool g_pwm_buffer_update_required[AW20216S_DRIVER_COUNT] = {false}; + +bool aw20216s_write(pin_t cs_pin, uint8_t page, uint8_t reg, uint8_t* data, uint8_t len) { + static uint8_t s_spi_transfer_buffer[2] = {0}; + + if (!spi_start(cs_pin, false, AW20216S_SPI_MODE, AW20216S_SPI_DIVISOR)) { + spi_stop(); + return false; + } + + s_spi_transfer_buffer[0] = (AW20216S_ID | page | AW20216S_WRITE); + s_spi_transfer_buffer[1] = reg; + + if (spi_transmit(s_spi_transfer_buffer, 2) != SPI_STATUS_SUCCESS) { + spi_stop(); + return false; + } + + if (spi_transmit(data, len) != SPI_STATUS_SUCCESS) { + spi_stop(); + return false; + } + + spi_stop(); + return true; +} + +static inline bool aw20216s_write_register(pin_t cs_pin, uint8_t page, uint8_t reg, uint8_t value) { + // Little wrapper so callers need not care about sending a buffer + return aw20216s_write(cs_pin, page, reg, &value, 1); +} + +void aw20216s_soft_reset(pin_t cs_pin) { + aw20216s_write_register(cs_pin, AW20216S_PAGE_FUNCTION, AW20216S_REG_RESET, AW20216S_RESET_CMD); +} + +static void aw20216s_init_scaling(pin_t cs_pin) { + // Set constant current to the max, control brightness with PWM + for (uint8_t i = 0; i < AW20216S_PWM_REGISTER_COUNT; i++) { + aw20216s_write_register(cs_pin, AW20216S_PAGE_SCALING, i, AW20216S_SCALING_MAX); + } +} + +static inline void aw20216s_init_current_limit(pin_t cs_pin) { + // Push config + aw20216s_write_register(cs_pin, AW20216S_PAGE_FUNCTION, AW20216S_REG_GLOBALCURRENT, AW20216S_GLOBAL_CURRENT_MAX); +} + +static inline void aw20216s_soft_enable(pin_t cs_pin) { + // Push config + aw20216s_write_register(cs_pin, AW20216S_PAGE_FUNCTION, AW20216S_REG_CONFIGURATION, AW20216S_CONFIG_DEFAULT | AW20216S_CHIPEN); +} + +static inline void aw20216s_auto_lowpower(pin_t cs_pin) { + aw20216s_write_register(cs_pin, AW20216S_PAGE_FUNCTION, AW20216S_REG_MIXFUNCTION, AW20216S_MIXCR_DEFAULT | AW20216S_LPEN); +} + +void aw20216s_init_drivers(void) { + spi_init(); + + aw20216s_init(AW20216S_CS_PIN_1, AW20216S_EN_PIN_1); +#if defined(AW20216S_CS_PIN_2) + aw20216s_init(AW20216S_CS_PIN_2, AW20216S_EN_PIN_2); +#endif +} + +void aw20216s_init(pin_t cs_pin, pin_t en_pin) { + setPinOutput(en_pin); + writePinHigh(en_pin); + + aw20216s_soft_reset(cs_pin); + wait_ms(2); + + // Drivers should start with all scaling and PWM registers as off + aw20216s_init_current_limit(cs_pin); + aw20216s_init_scaling(cs_pin); + + aw20216s_soft_enable(cs_pin); + aw20216s_auto_lowpower(cs_pin); +} + +void aw20216s_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) { + aw20216s_led_t led; + memcpy_P(&led, (&g_aw20216s_leds[index]), sizeof(led)); + + if (g_pwm_buffer[led.driver][led.r] == red && g_pwm_buffer[led.driver][led.g] == green && g_pwm_buffer[led.driver][led.b] == blue) { + return; + } + g_pwm_buffer[led.driver][led.r] = red; + g_pwm_buffer[led.driver][led.g] = green; + g_pwm_buffer[led.driver][led.b] = blue; + g_pwm_buffer_update_required[led.driver] = true; +} + +void aw20216s_set_color_all(uint8_t red, uint8_t green, uint8_t blue) { + for (uint8_t i = 0; i < AW20216S_LED_COUNT; i++) { + aw20216s_set_color(i, red, green, blue); + } +} + +void aw20216s_update_pwm_buffers(pin_t cs_pin, uint8_t index) { + if (g_pwm_buffer_update_required[index]) { + aw20216s_write(cs_pin, AW20216S_PAGE_PWM, 0, g_pwm_buffer[index], AW20216S_PWM_REGISTER_COUNT); + } + g_pwm_buffer_update_required[index] = false; +} + +void aw20216s_flush(void) { + aw20216s_update_pwm_buffers(AW20216S_CS_PIN_1, 0); +#if defined(AW20216S_CS_PIN_2) + aw20216s_update_pwm_buffers(AW20216S_CS_PIN_2, 1); +#endif +} diff --git a/drivers/led/aw20216.h b/drivers/led/aw20216s.h index e342cb6bac..d79d632084 100644 --- a/drivers/led/aw20216.h +++ b/drivers/led/aw20216s.h @@ -20,20 +20,64 @@ #include <stdbool.h> #include "progmem.h" #include "gpio.h" +#include "util.h" -typedef struct aw_led { +// ======== DEPRECATED DEFINES - DO NOT USE ======== +#ifdef AW_SCALING_MAX +# define AW20216S_SCALING_MAX AW_SCALING_MAX +#endif +#ifdef AW_GLOBAL_CURRENT_MAX +# define AW20216S_GLOBAL_CURRENT_MAX AW_GLOBAL_CURRENT_MAX +#endif +#ifdef AW_SPI_MODE +# define AW20216S_SPI_MODE AW_SPI_MODE +#endif +#ifdef AW_SPI_DIVISOR +# define AW20216S_SPI_DIVISOR AW_SPI_DIVISOR +#endif +#ifdef DRIVER_1_CS +# define AW20216S_CS_PIN_1 DRIVER_1_CS +#endif +#ifdef DRIVER_2_CS +# define AW20216S_CS_PIN_2 DRIVER_2_CS +#endif +#ifdef DRIVER_1_EN +# define AW20216S_EN_PIN_1 DRIVER_1_EN +#endif +#ifdef DRIVER_2_EN +# define AW20216S_EN_PIN_2 DRIVER_2_EN +#endif + +#define aw_led aw20216s_led_t +#define g_aw_leds g_aw20216s_leds +// ======== + +#if defined(RGB_MATRIX_AW20216S) +# define AW20216S_LED_COUNT RGB_MATRIX_LED_COUNT +#endif + +#if defined(AW20216S_CS_PIN_2) +# define AW20216S_DRIVER_COUNT 2 +#elif defined(AW20216S_CS_PIN_1) +# define AW20216S_DRIVER_COUNT 1 +#endif + +typedef struct aw20216s_led_t { uint8_t driver : 2; uint8_t r; uint8_t g; uint8_t b; -} aw_led; +} PACKED aw20216s_led_t; + +extern const aw20216s_led_t PROGMEM g_aw20216s_leds[AW20216S_LED_COUNT]; -extern const aw_led PROGMEM g_aw_leds[RGB_MATRIX_LED_COUNT]; +void aw20216s_init_drivers(void); +void aw20216s_init(pin_t cs_pin, pin_t en_pin); +void aw20216s_set_color(int index, uint8_t red, uint8_t green, uint8_t blue); +void aw20216s_set_color_all(uint8_t red, uint8_t green, uint8_t blue); +void aw20216s_update_pwm_buffers(pin_t cs_pin, uint8_t index); -void aw20216_init(pin_t cs_pin, pin_t en_pin); -void aw20216_set_color(int index, uint8_t red, uint8_t green, uint8_t blue); -void aw20216_set_color_all(uint8_t red, uint8_t green, uint8_t blue); -void aw20216_update_pwm_buffers(pin_t cs_pin, uint8_t index); +void aw20216s_flush(void); #define CS1_SW1 0x00 #define CS2_SW1 0x01 diff --git a/drivers/led/ckled2001-simple.c b/drivers/led/ckled2001-simple.c deleted file mode 100644 index c4d4c0a4cc..0000000000 --- a/drivers/led/ckled2001-simple.c +++ /dev/null @@ -1,221 +0,0 @@ -/* Copyright 2021 @ Keychron (https://www.keychron.com) - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#include "ckled2001-simple.h" -#include "i2c_master.h" -#include "wait.h" - -#ifndef CKLED2001_TIMEOUT -# define CKLED2001_TIMEOUT 100 -#endif - -#ifndef CKLED2001_PERSISTENCE -# define CKLED2001_PERSISTENCE 0 -#endif - -#ifndef PHASE_CHANNEL -# define PHASE_CHANNEL MSKPHASE_12CHANNEL -#endif - -#ifndef CKLED2001_CURRENT_TUNE -# define CKLED2001_CURRENT_TUNE \ - { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF } -#endif - -// Transfer buffer for TWITransmitData() -uint8_t g_twi_transfer_buffer[20]; - -// These buffers match the CKLED2001 PWM registers. -// The control buffers match the PG0 LED On/Off registers. -// Storing them like this is optimal for I2C transfers to the registers. -// We could optimize this and take out the unused registers from these -// buffers and the transfers in ckled2001_write_pwm_buffer() but it's -// probably not worth the extra complexity. -uint8_t g_pwm_buffer[DRIVER_COUNT][192]; -bool g_pwm_buffer_update_required[DRIVER_COUNT] = {false}; - -uint8_t g_led_control_registers[DRIVER_COUNT][24] = {0}; -bool g_led_control_registers_update_required[DRIVER_COUNT] = {false}; - -bool ckled2001_write_register(uint8_t addr, uint8_t reg, uint8_t data) { - // If the transaction fails function returns false. - g_twi_transfer_buffer[0] = reg; - g_twi_transfer_buffer[1] = data; - -#if CKLED2001_PERSISTENCE > 0 - for (uint8_t i = 0; i < CKLED2001_PERSISTENCE; i++) { - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, CKLED2001_TIMEOUT) != 0) { - return false; - } - } -#else - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, CKLED2001_TIMEOUT) != 0) { - return false; - } -#endif - return true; -} - -bool ckled2001_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { - // Assumes PG1 is already selected. - // If any of the transactions fails function returns false. - // Transmit PWM registers in 12 transfers of 16 bytes. - // g_twi_transfer_buffer[] is 20 bytes - - // Iterate over the pwm_buffer contents at 16 byte intervals. - for (int i = 0; i < 192; i += 16) { - g_twi_transfer_buffer[0] = i; - // Copy the data from i to i+15. - // Device will auto-increment register for data after the first byte - // Thus this sets registers 0x00-0x0F, 0x10-0x1F, etc. in one transfer. - for (int j = 0; j < 16; j++) { - g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j]; - } - -#if CKLED2001_PERSISTENCE > 0 - for (uint8_t i = 0; i < CKLED2001_PERSISTENCE; i++) { - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, CKLED2001_TIMEOUT) != 0) { - return false; - } - } -#else - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, CKLED2001_TIMEOUT) != 0) { - return false; - } -#endif - } - return true; -} - -void ckled2001_init(uint8_t addr) { - // Select to function page - ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE); - // Setting LED driver to shutdown mode - ckled2001_write_register(addr, CONFIGURATION_REG, MSKSW_SHUT_DOWN_MODE); - // Setting internal channel pulldown/pullup - ckled2001_write_register(addr, PDU_REG, MSKSET_CA_CB_CHANNEL); - // Select number of scan phase - ckled2001_write_register(addr, SCAN_PHASE_REG, PHASE_CHANNEL); - // Setting PWM Delay Phase - ckled2001_write_register(addr, SLEW_RATE_CONTROL_MODE1_REG, MSKPWM_DELAY_PHASE_ENABLE); - // Setting Driving/Sinking Channel Slew Rate - ckled2001_write_register(addr, SLEW_RATE_CONTROL_MODE2_REG, MSKDRIVING_SINKING_CHHANNEL_SLEWRATE_ENABLE); - // Setting Iref - ckled2001_write_register(addr, SOFTWARE_SLEEP_REG, MSKSLEEP_DISABLE); - // Set LED CONTROL PAGE (Page 0) - ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_CONTROL_PAGE); - for (int i = 0; i < LED_CONTROL_ON_OFF_LENGTH; i++) { - ckled2001_write_register(addr, i, 0x00); - } - - // Set PWM PAGE (Page 1) - ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_PWM_PAGE); - for (int i = 0; i < LED_CURRENT_TUNE_LENGTH; i++) { - ckled2001_write_register(addr, i, 0x00); - } - - // Set CURRENT PAGE (Page 4) - uint8_t current_tuen_reg_list[LED_CURRENT_TUNE_LENGTH] = CKLED2001_CURRENT_TUNE; - ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, CURRENT_TUNE_PAGE); - for (int i = 0; i < LED_CURRENT_TUNE_LENGTH; i++) { - ckled2001_write_register(addr, i, current_tuen_reg_list[i]); - } - - // Enable LEDs ON/OFF - ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_CONTROL_PAGE); - for (int i = 0; i < LED_CONTROL_ON_OFF_LENGTH; i++) { - ckled2001_write_register(addr, i, 0xFF); - } - - // Select to function page - ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE); - // Setting LED driver to normal mode - ckled2001_write_register(addr, CONFIGURATION_REG, MSKSW_NORMAL_MODE); -} - -void ckled2001_set_value(int index, uint8_t value) { - ckled2001_led led; - if (index >= 0 && index < LED_MATRIX_LED_COUNT) { - memcpy_P(&led, (&g_ckled2001_leds[index]), sizeof(led)); - - if (g_pwm_buffer[led.driver][led.v] == value) { - return; - } - g_pwm_buffer[led.driver][led.v] = value; - g_pwm_buffer_update_required[led.driver] = true; - } -} - -void ckled2001_set_value_all(uint8_t value) { - for (int i = 0; i < LED_MATRIX_LED_COUNT; i++) { - ckled2001_set_value(i, value); - } -} - -void ckled2001_set_led_control_register(uint8_t index, bool value) { - ckled2001_led led; - memcpy_P(&led, (&g_ckled2001_leds[index]), sizeof(led)); - - uint8_t control_register = led.v / 8; - uint8_t bit_value = led.v % 8; - - if (value) { - g_led_control_registers[led.driver][control_register] |= (1 << bit_value); - } else { - g_led_control_registers[led.driver][control_register] &= ~(1 << bit_value); - } - - g_led_control_registers_update_required[led.driver] = true; -} - -void ckled2001_update_pwm_buffers(uint8_t addr, uint8_t index) { - if (g_pwm_buffer_update_required[index]) { - ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_PWM_PAGE); - - // If any of the transactions fail we risk writing dirty PG0, - // refresh page 0 just in case. - if (!ckled2001_write_pwm_buffer(addr, g_pwm_buffer[index])) { - g_led_control_registers_update_required[index] = true; - } - } - g_pwm_buffer_update_required[index] = false; -} - -void ckled2001_update_led_control_registers(uint8_t addr, uint8_t index) { - if (g_led_control_registers_update_required[index]) { - ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_CONTROL_PAGE); - for (int i = 0; i < 24; i++) { - ckled2001_write_register(addr, i, g_led_control_registers[index][i]); - } - } - g_led_control_registers_update_required[index] = false; -} - -void ckled2001_sw_return_normal(uint8_t addr) { - // Select to function page - ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE); - // Setting LED driver to normal mode - ckled2001_write_register(addr, CONFIGURATION_REG, MSKSW_NORMAL_MODE); -} - -void ckled2001_sw_shutdown(uint8_t addr) { - // Select to function page - ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE); - // Setting LED driver to shutdown mode - ckled2001_write_register(addr, CONFIGURATION_REG, MSKSW_SHUT_DOWN_MODE); - // Write SW Sleep Register - ckled2001_write_register(addr, SOFTWARE_SLEEP_REG, MSKSLEEP_ENABLE); -} diff --git a/drivers/led/ckled2001-simple.h b/drivers/led/ckled2001-simple.h deleted file mode 100644 index c94df62dd2..0000000000 --- a/drivers/led/ckled2001-simple.h +++ /dev/null @@ -1,337 +0,0 @@ -/* Copyright 2021 @ Keychron (https://www.keychron.com) - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#pragma once - -#include <stdint.h> -#include <stdbool.h> -#include "progmem.h" - -typedef struct ckled2001_led { - uint8_t driver : 2; - uint8_t v; -} __attribute__((packed)) ckled2001_led; - -extern const ckled2001_led PROGMEM g_ckled2001_leds[LED_MATRIX_LED_COUNT]; - -void ckled2001_init(uint8_t addr); -bool ckled2001_write_register(uint8_t addr, uint8_t reg, uint8_t data); -bool ckled2001_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer); - -void ckled2001_set_value(int index, uint8_t value); -void ckled2001_set_value_all(uint8_t value); - -void ckled2001_set_led_control_register(uint8_t index, bool value); - -// This should not be called from an interrupt -// (eg. from a timer interrupt). -// Call this while idle (in between matrix scans). -// If the buffer is dirty, it will update the driver with the buffer. -void ckled2001_update_pwm_buffers(uint8_t addr, uint8_t index); -void ckled2001_update_led_control_registers(uint8_t addr, uint8_t index); - -void ckled2001_sw_return_normal(uint8_t addr); -void ckled2001_sw_shutdown(uint8_t addr); - -// Registers Page Define -#define CONFIGURE_CMD_PAGE 0xFD -#define LED_CONTROL_PAGE 0x00 -#define LED_PWM_PAGE 0x01 -#define FUNCTION_PAGE 0x03 -#define CURRENT_TUNE_PAGE 0x04 - -// Function Register: address 0x00 -#define CONFIGURATION_REG 0x00 -#define MSKSW_SHUT_DOWN_MODE (0x0 << 0) -#define MSKSW_NORMAL_MODE (0x1 << 0) - -#define DRIVER_ID_REG 0x11 -#define CKLED2001_ID 0x8A - -#define PDU_REG 0x13 -#define MSKSET_CA_CB_CHANNEL 0xAA -#define MSKCLR_CA_CB_CHANNEL 0x00 - -#define SCAN_PHASE_REG 0x14 -#define MSKPHASE_12CHANNEL 0x00 -#define MSKPHASE_11CHANNEL 0x01 -#define MSKPHASE_10CHANNEL 0x02 -#define MSKPHASE_9CHANNEL 0x03 -#define MSKPHASE_8CHANNEL 0x04 -#define MSKPHASE_7CHANNEL 0x05 -#define MSKPHASE_6CHANNEL 0x06 -#define MSKPHASE_5CHANNEL 0x07 -#define MSKPHASE_4CHANNEL 0x08 -#define MSKPHASE_3CHANNEL 0x09 -#define MSKPHASE_2CHANNEL 0x0A -#define MSKPHASE_1CHANNEL 0x0B - -#define SLEW_RATE_CONTROL_MODE1_REG 0x15 -#define MSKPWM_DELAY_PHASE_ENABLE 0x04 -#define MSKPWM_DELAY_PHASE_DISABLE 0x00 - -#define SLEW_RATE_CONTROL_MODE2_REG 0x16 -#define MSKDRIVING_SINKING_CHHANNEL_SLEWRATE_ENABLE 0xC0 -#define MSKDRIVING_SINKING_CHHANNEL_SLEWRATE_DISABLE 0x00 - -#define OPEN_SHORT_ENABLE_REG 0x17 -#define MSKOPEN_DETECTION_ENABLE (0x01 << 7) -#define MSKOPEN_DETECTION_DISABLE (0x00) - -#define MSKSHORT_DETECTION_ENABLE (0x01 << 6) -#define MSKSHORT_DETECTION_DISABLE (0x00) - -#define OPEN_SHORT_DUTY_REG 0x18 -#define OPEN_SHORT_FLAG_REG 0x19 - -#define MSKOPEN_DETECTION_INTERRUPT_ENABLE (0x01 << 7) -#define MSKOPEN_DETECTION_INTERRUPT_DISABLE (0x00) - -#define MSKSHORT_DETECTION_INTERRUPT_ENABLE (0x01 << 6) -#define MSKSHORT_DETECTION_INTERRUPT_DISABLE (0x00) - -#define SOFTWARE_SLEEP_REG 0x1A -#define MSKSLEEP_ENABLE 0x02 -#define MSKSLEEP_DISABLE 0x00 - -// LED Control Registers -#define LED_CONTROL_ON_OFF_FIRST_ADDR 0x0 -#define LED_CONTROL_ON_OFF_LAST_ADDR 0x17 -#define LED_CONTROL_ON_OFF_LENGTH ((LED_CONTROL_ON_OFF_LAST_ADDR - LED_CONTROL_ON_OFF_FIRST_ADDR) + 1) - -#define LED_CONTROL_OPEN_FIRST_ADDR 0x18 -#define LED_CONTROL_OPEN_LAST_ADDR 0x2F -#define LED_CONTROL_OPEN_LENGTH ((LED_CONTROL_OPEN_LAST_ADDR - LED_CONTROL_OPEN_FIRST_ADDR) + 1) - -#define LED_CONTROL_SHORT_FIRST_ADDR 0x30 -#define LED_CONTROL_SHORT_LAST_ADDR 0x47 -#define LED_CONTROL_SHORT_LENGTH ((LED_CONTROL_SHORT_LAST_ADDR - LED_CONTROL_SHORT_FIRST_ADDR) + 1) - -#define LED_CONTROL_PAGE_LENGTH 0x48 - -// LED Control Registers -#define LED_PWM_FIRST_ADDR 0x00 -#define LED_PWM_LAST_ADDR 0xBF -#define LED_PWM_LENGTH 0xC0 - -// Current Tune Registers -#define LED_CURRENT_TUNE_FIRST_ADDR 0x00 -#define LED_CURRENT_TUNE_LAST_ADDR 0x0B -#define LED_CURRENT_TUNE_LENGTH 0x0C - -#define A_1 0x00 -#define A_2 0x01 -#define A_3 0x02 -#define A_4 0x03 -#define A_5 0x04 -#define A_6 0x05 -#define A_7 0x06 -#define A_8 0x07 -#define A_9 0x08 -#define A_10 0x09 -#define A_11 0x0A -#define A_12 0x0B -#define A_13 0x0C -#define A_14 0x0D -#define A_15 0x0E -#define A_16 0x0F - -#define B_1 0x10 -#define B_2 0x11 -#define B_3 0x12 -#define B_4 0x13 -#define B_5 0x14 -#define B_6 0x15 -#define B_7 0x16 -#define B_8 0x17 -#define B_9 0x18 -#define B_10 0x19 -#define B_11 0x1A -#define B_12 0x1B -#define B_13 0x1C -#define B_14 0x1D -#define B_15 0x1E -#define B_16 0x1F - -#define C_1 0x20 -#define C_2 0x21 -#define C_3 0x22 -#define C_4 0x23 -#define C_5 0x24 -#define C_6 0x25 -#define C_7 0x26 -#define C_8 0x27 -#define C_9 0x28 -#define C_10 0x29 -#define C_11 0x2A -#define C_12 0x2B -#define C_13 0x2C -#define C_14 0x2D -#define C_15 0x2E -#define C_16 0x2F - -#define D_1 0x30 -#define D_2 0x31 -#define D_3 0x32 -#define D_4 0x33 -#define D_5 0x34 -#define D_6 0x35 -#define D_7 0x36 -#define D_8 0x37 -#define D_9 0x38 -#define D_10 0x39 -#define D_11 0x3A -#define D_12 0x3B -#define D_13 0x3C -#define D_14 0x3D -#define D_15 0x3E -#define D_16 0x3F - -#define E_1 0x40 -#define E_2 0x41 -#define E_3 0x42 -#define E_4 0x43 -#define E_5 0x44 -#define E_6 0x45 -#define E_7 0x46 -#define E_8 0x47 -#define E_9 0x48 -#define E_10 0x49 -#define E_11 0x4A -#define E_12 0x4B -#define E_13 0x4C -#define E_14 0x4D -#define E_15 0x4E -#define E_16 0x4F - -#define F_1 0x50 -#define F_2 0x51 -#define F_3 0x52 -#define F_4 0x53 -#define F_5 0x54 -#define F_6 0x55 -#define F_7 0x56 -#define F_8 0x57 -#define F_9 0x58 -#define F_10 0x59 -#define F_11 0x5A -#define F_12 0x5B -#define F_13 0x5C -#define F_14 0x5D -#define F_15 0x5E -#define F_16 0x5F - -#define G_1 0x60 -#define G_2 0x61 -#define G_3 0x62 -#define G_4 0x63 -#define G_5 0x64 -#define G_6 0x65 -#define G_7 0x66 -#define G_8 0x67 -#define G_9 0x68 -#define G_10 0x69 -#define G_11 0x6A -#define G_12 0x6B -#define G_13 0x6C -#define G_14 0x6D -#define G_15 0x6E -#define G_16 0x6F - -#define H_1 0x70 -#define H_2 0x71 -#define H_3 0x72 -#define H_4 0x73 -#define H_5 0x74 -#define H_6 0x75 -#define H_7 0x76 -#define H_8 0x77 -#define H_9 0x78 -#define H_10 0x79 -#define H_11 0x7A -#define H_12 0x7B -#define H_13 0x7C -#define H_14 0x7D -#define H_15 0x7E -#define H_16 0x7F - -#define I_1 0x80 -#define I_2 0x81 -#define I_3 0x82 -#define I_4 0x83 -#define I_5 0x84 -#define I_6 0x85 -#define I_7 0x86 -#define I_8 0x87 -#define I_9 0x88 -#define I_10 0x89 -#define I_11 0x8A -#define I_12 0x8B -#define I_13 0x8C -#define I_14 0x8D -#define I_15 0x8E -#define I_16 0x8F - -#define J_1 0x90 -#define J_2 0x91 -#define J_3 0x92 -#define J_4 0x93 -#define J_5 0x94 -#define J_6 0x95 -#define J_7 0x96 -#define J_8 0x97 -#define J_9 0x98 -#define J_10 0x99 -#define J_11 0x9A -#define J_12 0x9B -#define J_13 0x9C -#define J_14 0x9D -#define J_15 0x9E -#define J_16 0x9F - -#define K_1 0xA0 -#define K_2 0xA1 -#define K_3 0xA2 -#define K_4 0xA3 -#define K_5 0xA4 -#define K_6 0xA5 -#define K_7 0xA6 -#define K_8 0xA7 -#define K_9 0xA8 -#define K_10 0xA9 -#define K_11 0xAA -#define K_12 0xAB -#define K_13 0xAC -#define K_14 0xAD -#define K_15 0xAE -#define K_16 0xAF - -#define L_1 0xB0 -#define L_2 0xB1 -#define L_3 0xB2 -#define L_4 0xB3 -#define L_5 0xB4 -#define L_6 0xB5 -#define L_7 0xB6 -#define L_8 0xB7 -#define L_9 0xB8 -#define L_10 0xB9 -#define L_11 0xBA -#define L_12 0xBB -#define L_13 0xBC -#define L_14 0xBD -#define L_15 0xBE -#define L_16 0xBF
\ No newline at end of file diff --git a/drivers/led/ckled2001.c b/drivers/led/ckled2001.c deleted file mode 100644 index 6ababf55e9..0000000000 --- a/drivers/led/ckled2001.c +++ /dev/null @@ -1,236 +0,0 @@ -/* Copyright 2021 @ Keychron (https://www.keychron.com) - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#include "ckled2001.h" -#include "i2c_master.h" -#include "wait.h" - -#ifndef CKLED2001_TIMEOUT -# define CKLED2001_TIMEOUT 100 -#endif - -#ifndef CKLED2001_PERSISTENCE -# define CKLED2001_PERSISTENCE 0 -#endif - -#ifndef PHASE_CHANNEL -# define PHASE_CHANNEL MSKPHASE_12CHANNEL -#endif - -#ifndef CKLED2001_CURRENT_TUNE -# define CKLED2001_CURRENT_TUNE \ - { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF } -#endif - -// Transfer buffer for TWITransmitData() -uint8_t g_twi_transfer_buffer[65]; - -// These buffers match the CKLED2001 PWM registers. -// The control buffers match the PG0 LED On/Off registers. -// Storing them like this is optimal for I2C transfers to the registers. -// We could optimize this and take out the unused registers from these -// buffers and the transfers in ckled2001_write_pwm_buffer() but it's -// probably not worth the extra complexity. -uint8_t g_pwm_buffer[DRIVER_COUNT][192]; -bool g_pwm_buffer_update_required[DRIVER_COUNT] = {false}; - -uint8_t g_led_control_registers[DRIVER_COUNT][24] = {0}; -bool g_led_control_registers_update_required[DRIVER_COUNT] = {false}; - -bool ckled2001_write_register(uint8_t addr, uint8_t reg, uint8_t data) { - // If the transaction fails function returns false. - g_twi_transfer_buffer[0] = reg; - g_twi_transfer_buffer[1] = data; - -#if CKLED2001_PERSISTENCE > 0 - for (uint8_t i = 0; i < CKLED2001_PERSISTENCE; i++) { - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, CKLED2001_TIMEOUT) != 0) { - return false; - } - } -#else - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, CKLED2001_TIMEOUT) != 0) { - return false; - } -#endif - return true; -} - -bool ckled2001_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { - // Assumes PG1 is already selected. - // If any of the transactions fails function returns false. - // Transmit PWM registers in 3 transfers of 64 bytes. - - // Iterate over the pwm_buffer contents at 64 byte intervals. - for (uint8_t i = 0; i < 192; i += 64) { - g_twi_transfer_buffer[0] = i; - // Copy the data from i to i+63. - // Device will auto-increment register for data after the first byte - // Thus this sets registers 0x00-0x0F, 0x10-0x1F, etc. in one transfer. - for (uint8_t j = 0; j < 64; j++) { - g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j]; - } - -#if CKLED2001_PERSISTENCE > 0 - for (uint8_t i = 0; i < CKLED2001_PERSISTENCE; i++) { - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 65, CKLED2001_TIMEOUT) != 0) { - return false; - } - } -#else - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 65, CKLED2001_TIMEOUT) != 0) { - return false; - } -#endif - } - return true; -} - -void ckled2001_init(uint8_t addr) { - // Select to function page - ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE); - // Setting LED driver to shutdown mode - ckled2001_write_register(addr, CONFIGURATION_REG, MSKSW_SHUT_DOWN_MODE); - // Setting internal channel pulldown/pullup - ckled2001_write_register(addr, PDU_REG, MSKSET_CA_CB_CHANNEL); - // Select number of scan phase - ckled2001_write_register(addr, SCAN_PHASE_REG, PHASE_CHANNEL); - // Setting PWM Delay Phase - ckled2001_write_register(addr, SLEW_RATE_CONTROL_MODE1_REG, MSKPWM_DELAY_PHASE_ENABLE); - // Setting Driving/Sinking Channel Slew Rate - ckled2001_write_register(addr, SLEW_RATE_CONTROL_MODE2_REG, MSKDRIVING_SINKING_CHHANNEL_SLEWRATE_ENABLE); - // Setting Iref - ckled2001_write_register(addr, SOFTWARE_SLEEP_REG, MSKSLEEP_DISABLE); - // Set LED CONTROL PAGE (Page 0) - ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_CONTROL_PAGE); - for (int i = 0; i < LED_CONTROL_ON_OFF_LENGTH; i++) { - ckled2001_write_register(addr, i, 0x00); - } - - // Set PWM PAGE (Page 1) - ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_PWM_PAGE); - for (int i = 0; i < LED_CURRENT_TUNE_LENGTH; i++) { - ckled2001_write_register(addr, i, 0x00); - } - - // Set CURRENT PAGE (Page 4) - uint8_t current_tuen_reg_list[LED_CURRENT_TUNE_LENGTH] = CKLED2001_CURRENT_TUNE; - ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, CURRENT_TUNE_PAGE); - for (int i = 0; i < LED_CURRENT_TUNE_LENGTH; i++) { - ckled2001_write_register(addr, i, current_tuen_reg_list[i]); - } - - // Enable LEDs ON/OFF - ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_CONTROL_PAGE); - for (int i = 0; i < LED_CONTROL_ON_OFF_LENGTH; i++) { - ckled2001_write_register(addr, i, 0xFF); - } - - // Select to function page - ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE); - // Setting LED driver to normal mode - ckled2001_write_register(addr, CONFIGURATION_REG, MSKSW_NORMAL_MODE); -} - -void ckled2001_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) { - ckled2001_led led; - if (index >= 0 && index < RGB_MATRIX_LED_COUNT) { - memcpy_P(&led, (&g_ckled2001_leds[index]), sizeof(led)); - - if (g_pwm_buffer[led.driver][led.r] == red && g_pwm_buffer[led.driver][led.g] == green && g_pwm_buffer[led.driver][led.b] == blue) { - return; - } - g_pwm_buffer[led.driver][led.r] = red; - g_pwm_buffer[led.driver][led.g] = green; - g_pwm_buffer[led.driver][led.b] = blue; - g_pwm_buffer_update_required[led.driver] = true; - } -} - -void ckled2001_set_color_all(uint8_t red, uint8_t green, uint8_t blue) { - for (int i = 0; i < RGB_MATRIX_LED_COUNT; i++) { - ckled2001_set_color(i, red, green, blue); - } -} - -void ckled2001_set_led_control_register(uint8_t index, bool red, bool green, bool blue) { - ckled2001_led led; - memcpy_P(&led, (&g_ckled2001_leds[index]), sizeof(led)); - - uint8_t control_register_r = led.r / 8; - uint8_t control_register_g = led.g / 8; - uint8_t control_register_b = led.b / 8; - uint8_t bit_r = led.r % 8; - uint8_t bit_g = led.g % 8; - uint8_t bit_b = led.b % 8; - - if (red) { - g_led_control_registers[led.driver][control_register_r] |= (1 << bit_r); - } else { - g_led_control_registers[led.driver][control_register_r] &= ~(1 << bit_r); - } - if (green) { - g_led_control_registers[led.driver][control_register_g] |= (1 << bit_g); - } else { - g_led_control_registers[led.driver][control_register_g] &= ~(1 << bit_g); - } - if (blue) { - g_led_control_registers[led.driver][control_register_b] |= (1 << bit_b); - } else { - g_led_control_registers[led.driver][control_register_b] &= ~(1 << bit_b); - } - - g_led_control_registers_update_required[led.driver] = true; -} - -void ckled2001_update_pwm_buffers(uint8_t addr, uint8_t index) { - if (g_pwm_buffer_update_required[index]) { - ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_PWM_PAGE); - - // If any of the transactions fail we risk writing dirty PG0, - // refresh page 0 just in case. - if (!ckled2001_write_pwm_buffer(addr, g_pwm_buffer[index])) { - g_led_control_registers_update_required[index] = true; - } - } - g_pwm_buffer_update_required[index] = false; -} - -void ckled2001_update_led_control_registers(uint8_t addr, uint8_t index) { - if (g_led_control_registers_update_required[index]) { - ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_CONTROL_PAGE); - for (int i = 0; i < 24; i++) { - ckled2001_write_register(addr, i, g_led_control_registers[index][i]); - } - } - g_led_control_registers_update_required[index] = false; -} - -void ckled2001_sw_return_normal(uint8_t addr) { - // Select to function page - ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE); - // Setting LED driver to normal mode - ckled2001_write_register(addr, CONFIGURATION_REG, MSKSW_NORMAL_MODE); -} - -void ckled2001_sw_shutdown(uint8_t addr) { - // Select to function page - ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE); - // Setting LED driver to shutdown mode - ckled2001_write_register(addr, CONFIGURATION_REG, MSKSW_SHUT_DOWN_MODE); - // Write SW Sleep Register - ckled2001_write_register(addr, SOFTWARE_SLEEP_REG, MSKSLEEP_ENABLE); -} diff --git a/drivers/led/ckled2001.h b/drivers/led/ckled2001.h deleted file mode 100644 index 32da137fb7..0000000000 --- a/drivers/led/ckled2001.h +++ /dev/null @@ -1,339 +0,0 @@ -/* Copyright 2021 @ Keychron (https://www.keychron.com) - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#pragma once - -#include <stdint.h> -#include <stdbool.h> -#include "progmem.h" - -typedef struct ckled2001_led { - uint8_t driver : 2; - uint8_t r; - uint8_t g; - uint8_t b; -} __attribute__((packed)) ckled2001_led; - -extern const ckled2001_led PROGMEM g_ckled2001_leds[RGB_MATRIX_LED_COUNT]; - -void ckled2001_init(uint8_t addr); -bool ckled2001_write_register(uint8_t addr, uint8_t reg, uint8_t data); -bool ckled2001_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer); - -void ckled2001_set_color(int index, uint8_t red, uint8_t green, uint8_t blue); -void ckled2001_set_color_all(uint8_t red, uint8_t green, uint8_t blue); - -void ckled2001_set_led_control_register(uint8_t index, bool red, bool green, bool blue); - -// This should not be called from an interrupt -// (eg. from a timer interrupt). -// Call this while idle (in between matrix scans). -// If the buffer is dirty, it will update the driver with the buffer. -void ckled2001_update_pwm_buffers(uint8_t addr, uint8_t index); -void ckled2001_update_led_control_registers(uint8_t addr, uint8_t index); - -void ckled2001_sw_return_normal(uint8_t addr); -void ckled2001_sw_shutdown(uint8_t addr); - -// Registers Page Define -#define CONFIGURE_CMD_PAGE 0xFD -#define LED_CONTROL_PAGE 0x00 -#define LED_PWM_PAGE 0x01 -#define FUNCTION_PAGE 0x03 -#define CURRENT_TUNE_PAGE 0x04 - -// Function Register: address 0x00 -#define CONFIGURATION_REG 0x00 -#define MSKSW_SHUT_DOWN_MODE (0x0 << 0) -#define MSKSW_NORMAL_MODE (0x1 << 0) - -#define DRIVER_ID_REG 0x11 -#define CKLED2001_ID 0x8A - -#define PDU_REG 0x13 -#define MSKSET_CA_CB_CHANNEL 0xAA -#define MSKCLR_CA_CB_CHANNEL 0x00 - -#define SCAN_PHASE_REG 0x14 -#define MSKPHASE_12CHANNEL 0x00 -#define MSKPHASE_11CHANNEL 0x01 -#define MSKPHASE_10CHANNEL 0x02 -#define MSKPHASE_9CHANNEL 0x03 -#define MSKPHASE_8CHANNEL 0x04 -#define MSKPHASE_7CHANNEL 0x05 -#define MSKPHASE_6CHANNEL 0x06 -#define MSKPHASE_5CHANNEL 0x07 -#define MSKPHASE_4CHANNEL 0x08 -#define MSKPHASE_3CHANNEL 0x09 -#define MSKPHASE_2CHANNEL 0x0A -#define MSKPHASE_1CHANNEL 0x0B - -#define SLEW_RATE_CONTROL_MODE1_REG 0x15 -#define MSKPWM_DELAY_PHASE_ENABLE 0x04 -#define MSKPWM_DELAY_PHASE_DISABLE 0x00 - -#define SLEW_RATE_CONTROL_MODE2_REG 0x16 -#define MSKDRIVING_SINKING_CHHANNEL_SLEWRATE_ENABLE 0xC0 -#define MSKDRIVING_SINKING_CHHANNEL_SLEWRATE_DISABLE 0x00 - -#define OPEN_SHORT_ENABLE_REG 0x17 -#define MSKOPEN_DETECTION_ENABLE (0x01 << 7) -#define MSKOPEN_DETECTION_DISABLE (0x00) - -#define MSKSHORT_DETECTION_ENABLE (0x01 << 6) -#define MSKSHORT_DETECTION_DISABLE (0x00) - -#define OPEN_SHORT_DUTY_REG 0x18 -#define OPEN_SHORT_FLAG_REG 0x19 - -#define MSKOPEN_DETECTION_INTERRUPT_ENABLE (0x01 << 7) -#define MSKOPEN_DETECTION_INTERRUPT_DISABLE (0x00) - -#define MSKSHORT_DETECTION_INTERRUPT_ENABLE (0x01 << 6) -#define MSKSHORT_DETECTION_INTERRUPT_DISABLE (0x00) - -#define SOFTWARE_SLEEP_REG 0x1A -#define MSKSLEEP_ENABLE 0x02 -#define MSKSLEEP_DISABLE 0x00 - -// LED Control Registers -#define LED_CONTROL_ON_OFF_FIRST_ADDR 0x0 -#define LED_CONTROL_ON_OFF_LAST_ADDR 0x17 -#define LED_CONTROL_ON_OFF_LENGTH ((LED_CONTROL_ON_OFF_LAST_ADDR - LED_CONTROL_ON_OFF_FIRST_ADDR) + 1) - -#define LED_CONTROL_OPEN_FIRST_ADDR 0x18 -#define LED_CONTROL_OPEN_LAST_ADDR 0x2F -#define LED_CONTROL_OPEN_LENGTH ((LED_CONTROL_OPEN_LAST_ADDR - LED_CONTROL_OPEN_FIRST_ADDR) + 1) - -#define LED_CONTROL_SHORT_FIRST_ADDR 0x30 -#define LED_CONTROL_SHORT_LAST_ADDR 0x47 -#define LED_CONTROL_SHORT_LENGTH ((LED_CONTROL_SHORT_LAST_ADDR - LED_CONTROL_SHORT_FIRST_ADDR) + 1) - -#define LED_CONTROL_PAGE_LENGTH 0x48 - -// LED Control Registers -#define LED_PWM_FIRST_ADDR 0x00 -#define LED_PWM_LAST_ADDR 0xBF -#define LED_PWM_LENGTH 0xC0 - -// Current Tune Registers -#define LED_CURRENT_TUNE_FIRST_ADDR 0x00 -#define LED_CURRENT_TUNE_LAST_ADDR 0x0B -#define LED_CURRENT_TUNE_LENGTH 0x0C - -#define A_1 0x00 -#define A_2 0x01 -#define A_3 0x02 -#define A_4 0x03 -#define A_5 0x04 -#define A_6 0x05 -#define A_7 0x06 -#define A_8 0x07 -#define A_9 0x08 -#define A_10 0x09 -#define A_11 0x0A -#define A_12 0x0B -#define A_13 0x0C -#define A_14 0x0D -#define A_15 0x0E -#define A_16 0x0F - -#define B_1 0x10 -#define B_2 0x11 -#define B_3 0x12 -#define B_4 0x13 -#define B_5 0x14 -#define B_6 0x15 -#define B_7 0x16 -#define B_8 0x17 -#define B_9 0x18 -#define B_10 0x19 -#define B_11 0x1A -#define B_12 0x1B -#define B_13 0x1C -#define B_14 0x1D -#define B_15 0x1E -#define B_16 0x1F - -#define C_1 0x20 -#define C_2 0x21 -#define C_3 0x22 -#define C_4 0x23 -#define C_5 0x24 -#define C_6 0x25 -#define C_7 0x26 -#define C_8 0x27 -#define C_9 0x28 -#define C_10 0x29 -#define C_11 0x2A -#define C_12 0x2B -#define C_13 0x2C -#define C_14 0x2D -#define C_15 0x2E -#define C_16 0x2F - -#define D_1 0x30 -#define D_2 0x31 -#define D_3 0x32 -#define D_4 0x33 -#define D_5 0x34 -#define D_6 0x35 -#define D_7 0x36 -#define D_8 0x37 -#define D_9 0x38 -#define D_10 0x39 -#define D_11 0x3A -#define D_12 0x3B -#define D_13 0x3C -#define D_14 0x3D -#define D_15 0x3E -#define D_16 0x3F - -#define E_1 0x40 -#define E_2 0x41 -#define E_3 0x42 -#define E_4 0x43 -#define E_5 0x44 -#define E_6 0x45 -#define E_7 0x46 -#define E_8 0x47 -#define E_9 0x48 -#define E_10 0x49 -#define E_11 0x4A -#define E_12 0x4B -#define E_13 0x4C -#define E_14 0x4D -#define E_15 0x4E -#define E_16 0x4F - -#define F_1 0x50 -#define F_2 0x51 -#define F_3 0x52 -#define F_4 0x53 -#define F_5 0x54 -#define F_6 0x55 -#define F_7 0x56 -#define F_8 0x57 -#define F_9 0x58 -#define F_10 0x59 -#define F_11 0x5A -#define F_12 0x5B -#define F_13 0x5C -#define F_14 0x5D -#define F_15 0x5E -#define F_16 0x5F - -#define G_1 0x60 -#define G_2 0x61 -#define G_3 0x62 -#define G_4 0x63 -#define G_5 0x64 -#define G_6 0x65 -#define G_7 0x66 -#define G_8 0x67 -#define G_9 0x68 -#define G_10 0x69 -#define G_11 0x6A -#define G_12 0x6B -#define G_13 0x6C -#define G_14 0x6D -#define G_15 0x6E -#define G_16 0x6F - -#define H_1 0x70 -#define H_2 0x71 -#define H_3 0x72 -#define H_4 0x73 -#define H_5 0x74 -#define H_6 0x75 -#define H_7 0x76 -#define H_8 0x77 -#define H_9 0x78 -#define H_10 0x79 -#define H_11 0x7A -#define H_12 0x7B -#define H_13 0x7C -#define H_14 0x7D -#define H_15 0x7E -#define H_16 0x7F - -#define I_1 0x80 -#define I_2 0x81 -#define I_3 0x82 -#define I_4 0x83 -#define I_5 0x84 -#define I_6 0x85 -#define I_7 0x86 -#define I_8 0x87 -#define I_9 0x88 -#define I_10 0x89 -#define I_11 0x8A -#define I_12 0x8B -#define I_13 0x8C -#define I_14 0x8D -#define I_15 0x8E -#define I_16 0x8F - -#define J_1 0x90 -#define J_2 0x91 -#define J_3 0x92 -#define J_4 0x93 -#define J_5 0x94 -#define J_6 0x95 -#define J_7 0x96 -#define J_8 0x97 -#define J_9 0x98 -#define J_10 0x99 -#define J_11 0x9A -#define J_12 0x9B -#define J_13 0x9C -#define J_14 0x9D -#define J_15 0x9E -#define J_16 0x9F - -#define K_1 0xA0 -#define K_2 0xA1 -#define K_3 0xA2 -#define K_4 0xA3 -#define K_5 0xA4 -#define K_6 0xA5 -#define K_7 0xA6 -#define K_8 0xA7 -#define K_9 0xA8 -#define K_10 0xA9 -#define K_11 0xAA -#define K_12 0xAB -#define K_13 0xAC -#define K_14 0xAD -#define K_15 0xAE -#define K_16 0xAF - -#define L_1 0xB0 -#define L_2 0xB1 -#define L_3 0xB2 -#define L_4 0xB3 -#define L_5 0xB4 -#define L_6 0xB5 -#define L_7 0xB6 -#define L_8 0xB7 -#define L_9 0xB8 -#define L_10 0xB9 -#define L_11 0xBA -#define L_12 0xBB -#define L_13 0xBC -#define L_14 0xBD -#define L_15 0xBE -#define L_16 0xBF
\ No newline at end of file diff --git a/drivers/led/issi/is31fl3218-simple.c b/drivers/led/issi/is31fl3218-simple.c new file mode 100644 index 0000000000..ea9d76ddbb --- /dev/null +++ b/drivers/led/issi/is31fl3218-simple.c @@ -0,0 +1,154 @@ +/* Copyright 2018 Jason Williams (Wilba) + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ +#include "is31fl3218.h" +#include <string.h> +#include "i2c_master.h" + +// These are the register addresses +#define IS31FL3218_REG_SHUTDOWN 0x00 +#define IS31FL3218_REG_PWM 0x01 +#define IS31FL3218_REG_CONTROL 0x13 +#define IS31FL3218_REG_UPDATE 0x16 +#define IS31FL3218_REG_RESET 0x17 + +#define IS31FL3218_PWM_REGISTER_COUNT 18 +#define IS31FL3218_LED_CONTROL_REGISTER_COUNT 3 + +#ifndef IS31FL3218_I2C_TIMEOUT +# define IS31FL3218_I2C_TIMEOUT 100 +#endif + +#ifndef IS31FL3218_I2C_PERSISTENCE +# define IS31FL3218_I2C_PERSISTENCE 0 +#endif + +// Reusable buffer for transfers +uint8_t g_twi_transfer_buffer[20]; + +// IS31FL3218 has 18 PWM outputs and a fixed I2C address, so no chaining. +uint8_t g_pwm_buffer[IS31FL3218_PWM_REGISTER_COUNT]; +bool g_pwm_buffer_update_required = false; + +uint8_t g_led_control_registers[IS31FL3218_LED_CONTROL_REGISTER_COUNT] = {0}; +bool g_led_control_registers_update_required = false; + +void is31fl3218_write_register(uint8_t reg, uint8_t data) { + g_twi_transfer_buffer[0] = reg; + g_twi_transfer_buffer[1] = data; +#if IS31FL3218_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3218_I2C_PERSISTENCE; i++) { + if (i2c_transmit(IS31FL3218_I2C_ADDRESS << 1, g_twi_transfer_buffer, 2, IS31FL3218_I2C_TIMEOUT) == 0) break; + } +#else + i2c_transmit(IS31FL3218_I2C_ADDRESS << 1, g_twi_transfer_buffer, 2, IS31FL3218_I2C_TIMEOUT); +#endif +} + +void is31fl3218_write_pwm_buffer(uint8_t *pwm_buffer) { + g_twi_transfer_buffer[0] = IS31FL3218_REG_PWM; + memcpy(g_twi_transfer_buffer + 1, pwm_buffer, 18); + +#if IS31FL3218_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3218_I2C_PERSISTENCE; i++) { + i2c_transmit(IS31FL3218_I2C_ADDRESS << 1, g_twi_transfer_buffer, 19, IS31FL3218_I2C_TIMEOUT); + } +#else + i2c_transmit(IS31FL3218_I2C_ADDRESS << 1, g_twi_transfer_buffer, 19, IS31FL3218_I2C_TIMEOUT); +#endif +} + +void is31fl3218_init(void) { + i2c_init(); + + // In case we ever want to reinitialize (?) + is31fl3218_write_register(IS31FL3218_REG_RESET, 0x00); + + // Turn off software shutdown + is31fl3218_write_register(IS31FL3218_REG_SHUTDOWN, 0x01); + + // Set all PWM values to zero + for (uint8_t i = 0; i < IS31FL3218_PWM_REGISTER_COUNT; i++) { + is31fl3218_write_register(IS31FL3218_REG_PWM + i, 0x00); + } + + // turn off all LEDs in the LED control register + for (uint8_t i = 0; i < IS31FL3218_LED_CONTROL_REGISTER_COUNT; i++) { + is31fl3218_write_register(IS31FL3218_REG_CONTROL + i, 0x00); + } + + // Load PWM registers and LED Control register data + is31fl3218_write_register(IS31FL3218_REG_UPDATE, 0x01); + + for (int i = 0; i < IS31FL3218_LED_COUNT; i++) { + is31fl3218_set_led_control_register(i, true); + } + + is31fl3218_update_led_control_registers(); +} + +void is31fl3218_set_value(int index, uint8_t value) { + is31fl3218_led_t led; + if (index >= 0 && index < IS31FL3218_LED_COUNT) { + memcpy_P(&led, (&g_is31fl3218_leds[index]), sizeof(led)); + } + if (g_pwm_buffer[led.v - IS31FL3218_REG_PWM] == value) { + return; + } + g_pwm_buffer[led.v - IS31FL3218_REG_PWM] = value; + g_pwm_buffer_update_required = true; +} + +void is31fl3218_set_value_all(uint8_t value) { + for (int i = 0; i < IS31FL3218_LED_COUNT; i++) { + is31fl3218_set_value(i, value); + } +} + +void is31fl3218_set_led_control_register(uint8_t index, bool value) { + is31fl3218_led_t led; + memcpy_P(&led, (&g_is31fl3218_leds[index]), sizeof(led)); + + uint8_t control_register = (led.v - IS31FL3218_REG_PWM) / 6; + uint8_t bit_value = (led.v - IS31FL3218_REG_PWM) % 6; + + if (value) { + g_led_control_registers[control_register] |= (1 << bit_value); + } else { + g_led_control_registers[control_register] &= ~(1 << bit_value); + } + + g_led_control_registers_update_required = true; +} + +void is31fl3218_update_pwm_buffers(void) { + if (g_pwm_buffer_update_required) { + is31fl3218_write_pwm_buffer(g_pwm_buffer); + // Load PWM registers and LED Control register data + is31fl3218_write_register(IS31FL3218_REG_UPDATE, 0x01); + + g_pwm_buffer_update_required = false; + } +} + +void is31fl3218_update_led_control_registers(void) { + if (g_led_control_registers_update_required) { + for (int i = 0; i < IS31FL3218_LED_CONTROL_REGISTER_COUNT; i++) { + is31fl3218_write_register(IS31FL3218_REG_CONTROL + i, g_led_control_registers[i]); + } + + g_led_control_registers_update_required = false; + } +} diff --git a/drivers/led/issi/is31fl3218-simple.h b/drivers/led/issi/is31fl3218-simple.h new file mode 100644 index 0000000000..0b5abca341 --- /dev/null +++ b/drivers/led/issi/is31fl3218-simple.h @@ -0,0 +1,65 @@ +/* Copyright 2018 Jason Williams (Wilba) + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#pragma once + +#include <stdint.h> +#include <stdbool.h> +#include "progmem.h" +#include "util.h" + +#define IS31FL3218_I2C_ADDRESS 0x54 + +#if defined(LED_MATRIX_IS31FL3218) +# define IS31FL3218_LED_COUNT LED_MATRIX_LED_COUNT +#endif + +typedef struct is31fl3218_led_t { + uint8_t v; +} PACKED is31fl3218_led_t; + +extern const is31fl3218_led_t PROGMEM g_is31fl3218_leds[IS31FL3218_LED_COUNT]; + +void is31fl3218_init(void); + +void is31fl3218_set_value(int index, uint8_t value); + +void is31fl3218_set_value_all(uint8_t value); + +void is31fl3218_set_led_control_register(uint8_t index, bool value); + +void is31fl3218_update_pwm_buffers(void); + +void is31fl3218_update_led_control_registers(void); + +#define OUT1 0x01 +#define OUT2 0x02 +#define OUT3 0x03 +#define OUT4 0x04 +#define OUT5 0x05 +#define OUT6 0x06 +#define OUT7 0x07 +#define OUT8 0x08 +#define OUT9 0x09 +#define OUT10 0x0A +#define OUT11 0x0B +#define OUT12 0x0C +#define OUT13 0x0D +#define OUT14 0x0E +#define OUT15 0x0F +#define OUT16 0x10 +#define OUT17 0x11 +#define OUT18 0x12 diff --git a/drivers/led/issi/is31fl3218.c b/drivers/led/issi/is31fl3218.c index 970e9a0be9..357cb1ab55 100644 --- a/drivers/led/issi/is31fl3218.c +++ b/drivers/led/issi/is31fl3218.c @@ -14,84 +14,157 @@ * along with this program. If not, see <http://www.gnu.org/licenses/>. */ #include "is31fl3218.h" +#include <string.h> #include "i2c_master.h" -// This is the full 8-bit address -#define ISSI_ADDRESS 0b10101000 - // These are the register addresses -#define ISSI_REG_SHUTDOWN 0x00 -#define ISSI_REG_PWM 0x01 -#define ISSI_REG_CONTROL 0x13 -#define ISSI_REG_UPDATE 0x16 -#define ISSI_REG_RESET 0x17 +#define IS31FL3218_REG_SHUTDOWN 0x00 +#define IS31FL3218_REG_PWM 0x01 +#define IS31FL3218_REG_CONTROL 0x13 +#define IS31FL3218_REG_UPDATE 0x16 +#define IS31FL3218_REG_RESET 0x17 + +#define IS31FL3218_PWM_REGISTER_COUNT 18 +#define IS31FL3218_LED_CONTROL_REGISTER_COUNT 3 + +#ifndef IS31FL3218_I2C_TIMEOUT +# define IS31FL3218_I2C_TIMEOUT 100 +#endif -// Default timeout if no I2C response -#define ISSI_TIMEOUT 100 +#ifndef IS31FL3218_I2C_PERSISTENCE +# define IS31FL3218_I2C_PERSISTENCE 0 +#endif // Reusable buffer for transfers uint8_t g_twi_transfer_buffer[20]; // IS31FL3218 has 18 PWM outputs and a fixed I2C address, so no chaining. -// If used as RGB LED driver, LEDs are assigned RGB,RGB,RGB,RGB,RGB,RGB -uint8_t g_pwm_buffer[18]; +uint8_t g_pwm_buffer[IS31FL3218_PWM_REGISTER_COUNT]; bool g_pwm_buffer_update_required = false; +uint8_t g_led_control_registers[IS31FL3218_LED_CONTROL_REGISTER_COUNT] = {0}; +bool g_led_control_registers_update_required = false; + void is31fl3218_write_register(uint8_t reg, uint8_t data) { g_twi_transfer_buffer[0] = reg; g_twi_transfer_buffer[1] = data; - i2c_transmit(ISSI_ADDRESS, g_twi_transfer_buffer, 2, ISSI_TIMEOUT); +#if IS31FL3218_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3218_I2C_PERSISTENCE; i++) { + if (i2c_transmit(IS31FL3218_I2C_ADDRESS << 1, g_twi_transfer_buffer, 2, IS31FL3218_I2C_TIMEOUT) == 0) break; + } +#else + i2c_transmit(IS31FL3218_I2C_ADDRESS << 1, g_twi_transfer_buffer, 2, IS31FL3218_I2C_TIMEOUT); +#endif } void is31fl3218_write_pwm_buffer(uint8_t *pwm_buffer) { - g_twi_transfer_buffer[0] = ISSI_REG_PWM; + g_twi_transfer_buffer[0] = IS31FL3218_REG_PWM; memcpy(g_twi_transfer_buffer + 1, pwm_buffer, 18); - i2c_transmit(ISSI_ADDRESS, g_twi_transfer_buffer, 19, ISSI_TIMEOUT); +#if IS31FL3218_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3218_I2C_PERSISTENCE; i++) { + i2c_transmit(IS31FL3218_I2C_ADDRESS << 1, g_twi_transfer_buffer, 19, IS31FL3218_I2C_TIMEOUT); + } +#else + i2c_transmit(IS31FL3218_I2C_ADDRESS << 1, g_twi_transfer_buffer, 19, IS31FL3218_I2C_TIMEOUT); +#endif } void is31fl3218_init(void) { + i2c_init(); + // In case we ever want to reinitialize (?) - is31fl3218_write_register(ISSI_REG_RESET, 0x00); + is31fl3218_write_register(IS31FL3218_REG_RESET, 0x00); // Turn off software shutdown - is31fl3218_write_register(ISSI_REG_SHUTDOWN, 0x01); + is31fl3218_write_register(IS31FL3218_REG_SHUTDOWN, 0x01); // Set all PWM values to zero - for (uint8_t i = 0; i < 18; i++) { - is31fl3218_write_register(ISSI_REG_PWM + i, 0x00); + for (uint8_t i = 0; i < IS31FL3218_PWM_REGISTER_COUNT; i++) { + is31fl3218_write_register(IS31FL3218_REG_PWM + i, 0x00); } - // Enable all channels - for (uint8_t i = 0; i < 3; i++) { - is31fl3218_write_register(ISSI_REG_CONTROL + i, 0b00111111); + // turn off all LEDs in the LED control register + for (uint8_t i = 0; i < IS31FL3218_LED_CONTROL_REGISTER_COUNT; i++) { + is31fl3218_write_register(IS31FL3218_REG_CONTROL + i, 0x00); } // Load PWM registers and LED Control register data - is31fl3218_write_register(ISSI_REG_UPDATE, 0x01); + is31fl3218_write_register(IS31FL3218_REG_UPDATE, 0x01); + + for (int i = 0; i < IS31FL3218_LED_COUNT; i++) { + is31fl3218_set_led_control_register(i, true, true, true); + } + + is31fl3218_update_led_control_registers(); } void is31fl3218_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) { - if (g_pwm_buffer[index * 3 + 0] == red && g_pwm_buffer[index * 3 + 1] == green && g_pwm_buffer[index * 3 + 2] == blue) { + is31fl3218_led_t led; + if (index >= 0 && index < IS31FL3218_LED_COUNT) { + memcpy_P(&led, (&g_is31fl3218_leds[index]), sizeof(led)); + } + if (g_pwm_buffer[led.r - IS31FL3218_REG_PWM] == red && g_pwm_buffer[led.g - IS31FL3218_REG_PWM] == green && g_pwm_buffer[led.b - IS31FL3218_REG_PWM] == blue) { return; } - g_pwm_buffer[index * 3 + 0] = red; - g_pwm_buffer[index * 3 + 1] = green; - g_pwm_buffer[index * 3 + 2] = blue; - g_pwm_buffer_update_required = true; + g_pwm_buffer[led.r - IS31FL3218_REG_PWM] = red; + g_pwm_buffer[led.g - IS31FL3218_REG_PWM] = green; + g_pwm_buffer[led.b - IS31FL3218_REG_PWM] = blue; + g_pwm_buffer_update_required = true; } void is31fl3218_set_color_all(uint8_t red, uint8_t green, uint8_t blue) { - for (int i = 0; i < 6; i++) { + for (int i = 0; i < IS31FL3218_LED_COUNT; i++) { is31fl3218_set_color(i, red, green, blue); } } +void is31fl3218_set_led_control_register(uint8_t index, bool red, bool green, bool blue) { + is31fl3218_led_t led; + memcpy_P(&led, (&g_is31fl3218_leds[index]), sizeof(led)); + + uint8_t control_register_r = (led.r - IS31FL3218_REG_PWM) / 6; + uint8_t control_register_g = (led.g - IS31FL3218_REG_PWM) / 6; + uint8_t control_register_b = (led.b - IS31FL3218_REG_PWM) / 6; + uint8_t bit_r = (led.r - IS31FL3218_REG_PWM) % 6; + uint8_t bit_g = (led.g - IS31FL3218_REG_PWM) % 6; + uint8_t bit_b = (led.b - IS31FL3218_REG_PWM) % 6; + + if (red) { + g_led_control_registers[control_register_r] |= (1 << bit_r); + } else { + g_led_control_registers[control_register_r] &= ~(1 << bit_r); + } + if (green) { + g_led_control_registers[control_register_g] |= (1 << bit_g); + } else { + g_led_control_registers[control_register_g] &= ~(1 << bit_g); + } + if (blue) { + g_led_control_registers[control_register_b] |= (1 << bit_b); + } else { + g_led_control_registers[control_register_b] &= ~(1 << bit_b); + } + + g_led_control_registers_update_required = true; +} + void is31fl3218_update_pwm_buffers(void) { if (g_pwm_buffer_update_required) { is31fl3218_write_pwm_buffer(g_pwm_buffer); // Load PWM registers and LED Control register data - is31fl3218_write_register(ISSI_REG_UPDATE, 0x01); + is31fl3218_write_register(IS31FL3218_REG_UPDATE, 0x01); + + g_pwm_buffer_update_required = false; + } +} + +void is31fl3218_update_led_control_registers(void) { + if (g_led_control_registers_update_required) { + for (int i = 0; i < IS31FL3218_LED_CONTROL_REGISTER_COUNT; i++) { + is31fl3218_write_register(IS31FL3218_REG_CONTROL + i, g_led_control_registers[i]); + } + + g_led_control_registers_update_required = false; } - g_pwm_buffer_update_required = false; } diff --git a/drivers/led/issi/is31fl3218.h b/drivers/led/issi/is31fl3218.h index 2fe3768432..1d4f881e3c 100644 --- a/drivers/led/issi/is31fl3218.h +++ b/drivers/led/issi/is31fl3218.h @@ -18,9 +18,50 @@ #include <stdint.h> #include <stdbool.h> -#include <string.h> +#include "progmem.h" +#include "util.h" + +#define IS31FL3218_I2C_ADDRESS 0x54 + +#if defined(RGB_MATRIX_IS31FL3218) +# define IS31FL3218_LED_COUNT RGB_MATRIX_LED_COUNT +#endif + +typedef struct is31fl3218_led_t { + uint8_t r; + uint8_t g; + uint8_t b; +} PACKED is31fl3218_led_t; + +extern const is31fl3218_led_t PROGMEM g_is31fl3218_leds[IS31FL3218_LED_COUNT]; void is31fl3218_init(void); + void is31fl3218_set_color(int index, uint8_t red, uint8_t green, uint8_t blue); + void is31fl3218_set_color_all(uint8_t red, uint8_t green, uint8_t blue); + +void is31fl3218_set_led_control_register(uint8_t index, bool red, bool green, bool blue); + void is31fl3218_update_pwm_buffers(void); + +void is31fl3218_update_led_control_registers(void); + +#define OUT1 0x01 +#define OUT2 0x02 +#define OUT3 0x03 +#define OUT4 0x04 +#define OUT5 0x05 +#define OUT6 0x06 +#define OUT7 0x07 +#define OUT8 0x08 +#define OUT9 0x09 +#define OUT10 0x0A +#define OUT11 0x0B +#define OUT12 0x0C +#define OUT13 0x0D +#define OUT14 0x0E +#define OUT15 0x0F +#define OUT16 0x10 +#define OUT17 0x11 +#define OUT18 0x12 diff --git a/drivers/led/issi/is31fl3731-simple.c b/drivers/led/issi/is31fl3731-simple.c index f7f6980a3b..c6f1da5789 100644 --- a/drivers/led/issi/is31fl3731-simple.c +++ b/drivers/led/issi/is31fl3731-simple.c @@ -18,44 +18,39 @@ */ #include "is31fl3731-simple.h" +#include <string.h> #include "i2c_master.h" #include "wait.h" -// This is a 7-bit address, that gets left-shifted and bit 0 -// set to 0 for write, 1 for read (as per I2C protocol) -// The address will vary depending on your wiring: -// 0b1110100 AD <-> GND -// 0b1110111 AD <-> VCC -// 0b1110101 AD <-> SCL -// 0b1110110 AD <-> SDA -#define ISSI_ADDR_DEFAULT 0x74 +#define IS31FL3731_REG_CONFIG 0x00 +#define IS31FL3731_REG_CONFIG_PICTUREMODE 0x00 +#define IS31FL3731_REG_CONFIG_AUTOPLAYMODE 0x08 +#define IS31FL3731_REG_CONFIG_AUDIOPLAYMODE 0x18 -#define ISSI_REG_CONFIG 0x00 -#define ISSI_REG_CONFIG_PICTUREMODE 0x00 -#define ISSI_REG_CONFIG_AUTOPLAYMODE 0x08 -#define ISSI_REG_CONFIG_AUDIOPLAYMODE 0x18 +#define IS31FL3731_CONF_PICTUREMODE 0x00 +#define IS31FL3731_CONF_AUTOFRAMEMODE 0x04 +#define IS31FL3731_CONF_AUDIOMODE 0x08 -#define ISSI_CONF_PICTUREMODE 0x00 -#define ISSI_CONF_AUTOFRAMEMODE 0x04 -#define ISSI_CONF_AUDIOMODE 0x08 - -#define ISSI_REG_PICTUREFRAME 0x01 +#define IS31FL3731_REG_PICTUREFRAME 0x01 // Not defined in the datasheet -- See AN for IC -#define ISSI_REG_GHOST_IMAGE_PREVENTION 0xC2 // Set bit 4 to enable de-ghosting +#define IS31FL3731_REG_GHOST_IMAGE_PREVENTION 0xC2 // Set bit 4 to enable de-ghosting + +#define IS31FL3731_REG_SHUTDOWN 0x0A +#define IS31FL3731_REG_AUDIOSYNC 0x06 -#define ISSI_REG_SHUTDOWN 0x0A -#define ISSI_REG_AUDIOSYNC 0x06 +#define IS31FL3731_COMMANDREGISTER 0xFD +#define IS31FL3731_BANK_FUNCTIONREG 0x0B // helpfully called 'page nine' -#define ISSI_COMMANDREGISTER 0xFD -#define ISSI_BANK_FUNCTIONREG 0x0B // helpfully called 'page nine' +#define IS31FL3731_PWM_REGISTER_COUNT 144 +#define IS31FL3731_LED_CONTROL_REGISTER_COUNT 18 -#ifndef ISSI_TIMEOUT -# define ISSI_TIMEOUT 100 +#ifndef IS31FL3731_I2C_TIMEOUT +# define IS31FL3731_I2C_TIMEOUT 100 #endif -#ifndef ISSI_PERSISTENCE -# define ISSI_PERSISTENCE 0 +#ifndef IS31FL3731_I2C_PERSISTENCE +# define IS31FL3731_I2C_PERSISTENCE 0 #endif // Transfer buffer for TWITransmitData() @@ -66,47 +61,24 @@ uint8_t g_twi_transfer_buffer[20]; // We could optimize this and take out the unused registers from these // buffers and the transfers in is31fl3731_write_pwm_buffer() but it's // probably not worth the extra complexity. -uint8_t g_pwm_buffer[LED_DRIVER_COUNT][144]; -bool g_pwm_buffer_update_required[LED_DRIVER_COUNT] = {false}; - -/* There's probably a better way to init this... */ -#if LED_DRIVER_COUNT == 1 -uint8_t g_led_control_registers[LED_DRIVER_COUNT][18] = {{0}}; -#elif LED_DRIVER_COUNT == 2 -uint8_t g_led_control_registers[LED_DRIVER_COUNT][18] = {{0}, {0}}; -#elif LED_DRIVER_COUNT == 3 -uint8_t g_led_control_registers[LED_DRIVER_COUNT][18] = {{0}, {0}, {0}}; -#elif LED_DRIVER_COUNT == 4 -uint8_t g_led_control_registers[LED_DRIVER_COUNT][18] = {{0}, {0}, {0}, {0}}; -#endif -bool g_led_control_registers_update_required[LED_DRIVER_COUNT] = {false}; - -// This is the bit pattern in the LED control registers -// (for matrix A, add one to register for matrix B) -// -// reg - b7 b6 b5 b4 b3 b2 b1 b0 -// 0x00 - R08,R07,R06,R05,R04,R03,R02,R01 -// 0x02 - G08,G07,G06,G05,G04,G03,G02,R00 -// 0x04 - B08,B07,B06,B05,B04,B03,G01,G00 -// 0x06 - - , - , - , - , - ,B02,B01,B00 -// 0x08 - - , - , - , - , - , - , - , - -// 0x0A - B17,B16,B15, - , - , - , - , - -// 0x0C - G17,G16,B14,B13,B12,B11,B10,B09 -// 0x0E - R17,G15,G14,G13,G12,G11,G10,G09 -// 0x10 - R16,R15,R14,R13,R12,R11,R10,R09 +uint8_t g_pwm_buffer[IS31FL3731_DRIVER_COUNT][IS31FL3731_PWM_REGISTER_COUNT]; +bool g_pwm_buffer_update_required[IS31FL3731_DRIVER_COUNT] = {false}; + +uint8_t g_led_control_registers[IS31FL3731_DRIVER_COUNT][IS31FL3731_LED_CONTROL_REGISTER_COUNT] = {0}; +bool g_led_control_registers_update_required[IS31FL3731_DRIVER_COUNT] = {false}; void is31fl3731_write_register(uint8_t addr, uint8_t reg, uint8_t data) { g_twi_transfer_buffer[0] = reg; g_twi_transfer_buffer[1] = data; -#if ISSI_PERSISTENCE > 0 - for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) == 0) { +#if IS31FL3731_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3731_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, IS31FL3731_I2C_TIMEOUT) == 0) { break; } } #else - i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT); + i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, IS31FL3731_I2C_TIMEOUT); #endif } @@ -117,7 +89,7 @@ void is31fl3731_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { // g_twi_transfer_buffer[] is 20 bytes // iterate over the pwm_buffer contents at 16 byte intervals - for (int i = 0; i < 144; i += 16) { + for (int i = 0; i < IS31FL3731_PWM_REGISTER_COUNT; i += 16) { // set the first register, e.g. 0x24, 0x34, 0x44, etc. g_twi_transfer_buffer[0] = 0x24 + i; // copy the data from i to i+15 @@ -125,14 +97,44 @@ void is31fl3731_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { // thus this sets registers 0x24-0x33, 0x34-0x43, etc. in one transfer memcpy(g_twi_transfer_buffer + 1, pwm_buffer + i, 16); -#if ISSI_PERSISTENCE > 0 - for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT) == 0) break; +#if IS31FL3731_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3731_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, IS31FL3731_I2C_TIMEOUT) == 0) break; } #else - i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT); + i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, IS31FL3731_I2C_TIMEOUT); +#endif + } +} + +void is31fl3731_init_drivers(void) { + i2c_init(); + + is31fl3731_init(IS31FL3731_I2C_ADDRESS_1); +#if defined(IS31FL3731_I2C_ADDRESS_2) + is31fl3731_init(IS31FL3731_I2C_ADDRESS_2); +# if defined(IS31FL3731_I2C_ADDRESS_3) + is31fl3731_init(IS31FL3731_I2C_ADDRESS_3); +# if defined(IS31FL3731_I2C_ADDRESS_4) + is31fl3731_init(IS31FL3731_I2C_ADDRESS_4); +# endif +# endif #endif + + for (int i = 0; i < IS31FL3731_LED_COUNT; i++) { + is31fl3731_set_led_control_register(i, true); } + + is31fl3731_update_led_control_registers(IS31FL3731_I2C_ADDRESS_1, 0); +#if defined(IS31FL3731_I2C_ADDRESS_2) + is31fl3731_update_led_control_registers(IS31FL3731_I2C_ADDRESS_2, 1); +# if defined(IS31FL3731_I2C_ADDRESS_3) + is31fl3731_update_led_control_registers(IS31FL3731_I2C_ADDRESS_3, 2); +# if defined(IS31FL3731_I2C_ADDRESS_4) + is31fl3731_update_led_control_registers(IS31FL3731_I2C_ADDRESS_4, 3); +# endif +# endif +#endif } void is31fl3731_init(uint8_t addr) { @@ -142,29 +144,29 @@ void is31fl3731_init(uint8_t addr) { // then disable software shutdown. // select "function register" bank - is31fl3731_write_register(addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG); + is31fl3731_write_register(addr, IS31FL3731_COMMANDREGISTER, IS31FL3731_BANK_FUNCTIONREG); // enable software shutdown - is31fl3731_write_register(addr, ISSI_REG_SHUTDOWN, 0x00); -#ifdef ISSI_3731_DEGHOST // set to enable de-ghosting of the array - is31fl3731_write_register(addr, ISSI_REG_GHOST_IMAGE_PREVENTION, 0x10); + is31fl3731_write_register(addr, IS31FL3731_REG_SHUTDOWN, 0x00); +#ifdef IS31FL3731_DEGHOST // set to enable de-ghosting of the array + is31fl3731_write_register(addr, IS31FL3731_REG_GHOST_IMAGE_PREVENTION, 0x10); #endif // this delay was copied from other drivers, might not be needed wait_ms(10); // picture mode - is31fl3731_write_register(addr, ISSI_REG_CONFIG, ISSI_REG_CONFIG_PICTUREMODE); + is31fl3731_write_register(addr, IS31FL3731_REG_CONFIG, IS31FL3731_REG_CONFIG_PICTUREMODE); // display frame 0 - is31fl3731_write_register(addr, ISSI_REG_PICTUREFRAME, 0x00); + is31fl3731_write_register(addr, IS31FL3731_REG_PICTUREFRAME, 0x00); // audio sync off - is31fl3731_write_register(addr, ISSI_REG_AUDIOSYNC, 0x00); + is31fl3731_write_register(addr, IS31FL3731_REG_AUDIOSYNC, 0x00); // select bank 0 - is31fl3731_write_register(addr, ISSI_COMMANDREGISTER, 0); + is31fl3731_write_register(addr, IS31FL3731_COMMANDREGISTER, 0); // turn off all LEDs in the LED control register - for (int i = 0x00; i <= 0x11; i++) { + for (int i = 0; i < IS31FL3731_LED_CONTROL_REGISTER_COUNT; i++) { is31fl3731_write_register(addr, i, 0x00); } @@ -179,21 +181,21 @@ void is31fl3731_init(uint8_t addr) { } // select "function register" bank - is31fl3731_write_register(addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG); + is31fl3731_write_register(addr, IS31FL3731_COMMANDREGISTER, IS31FL3731_BANK_FUNCTIONREG); // disable software shutdown - is31fl3731_write_register(addr, ISSI_REG_SHUTDOWN, 0x01); + is31fl3731_write_register(addr, IS31FL3731_REG_SHUTDOWN, 0x01); // select bank 0 and leave it selected. // most usage after initialization is just writing PWM buffers in bank 0 // as there's not much point in double-buffering - is31fl3731_write_register(addr, ISSI_COMMANDREGISTER, 0); + is31fl3731_write_register(addr, IS31FL3731_COMMANDREGISTER, 0); } void is31fl3731_set_value(int index, uint8_t value) { - is31_led led; - if (index >= 0 && index < LED_MATRIX_LED_COUNT) { - memcpy_P(&led, (&g_is31_leds[index]), sizeof(led)); + is31fl3731_led_t led; + if (index >= 0 && index < IS31FL3731_LED_COUNT) { + memcpy_P(&led, (&g_is31fl3731_leds[index]), sizeof(led)); // Subtract 0x24 to get the second index of g_pwm_buffer @@ -206,14 +208,14 @@ void is31fl3731_set_value(int index, uint8_t value) { } void is31fl3731_set_value_all(uint8_t value) { - for (int i = 0; i < LED_MATRIX_LED_COUNT; i++) { + for (int i = 0; i < IS31FL3731_LED_COUNT; i++) { is31fl3731_set_value(i, value); } } void is31fl3731_set_led_control_register(uint8_t index, bool value) { - is31_led led; - memcpy_P(&led, (&g_is31_leds[index]), sizeof(led)); + is31fl3731_led_t led; + memcpy_P(&led, (&g_is31fl3731_leds[index]), sizeof(led)); uint8_t control_register = (led.v - 0x24) / 8; uint8_t bit_value = (led.v - 0x24) % 8; @@ -236,9 +238,22 @@ void is31fl3731_update_pwm_buffers(uint8_t addr, uint8_t index) { void is31fl3731_update_led_control_registers(uint8_t addr, uint8_t index) { if (g_led_control_registers_update_required[index]) { - for (int i = 0; i < 18; i++) { + for (int i = 0; i < IS31FL3731_LED_CONTROL_REGISTER_COUNT; i++) { is31fl3731_write_register(addr, i, g_led_control_registers[index][i]); } g_led_control_registers_update_required[index] = false; } } + +void is31fl3731_flush(void) { + is31fl3731_update_pwm_buffers(IS31FL3731_I2C_ADDRESS_1, 0); +#if defined(IS31FL3731_I2C_ADDRESS_2) + is31fl3731_update_pwm_buffers(IS31FL3731_I2C_ADDRESS_2, 1); +# if defined(IS31FL3731_I2C_ADDRESS_3) + is31fl3731_update_pwm_buffers(IS31FL3731_I2C_ADDRESS_3, 2); +# if defined(IS31FL3731_I2C_ADDRESS_4) + is31fl3731_update_pwm_buffers(IS31FL3731_I2C_ADDRESS_4, 3); +# endif +# endif +#endif +} diff --git a/drivers/led/issi/is31fl3731-simple.h b/drivers/led/issi/is31fl3731-simple.h index 69fba14a0b..32b42feab0 100644 --- a/drivers/led/issi/is31fl3731-simple.h +++ b/drivers/led/issi/is31fl3731-simple.h @@ -20,16 +20,63 @@ #include <stdint.h> #include <stdbool.h> -#include <string.h> #include "progmem.h" +#include "util.h" -typedef struct is31_led { +// ======== DEPRECATED DEFINES - DO NOT USE ======== +#ifdef LED_DRIVER_ADDR_1 +# define IS31FL3731_I2C_ADDRESS_1 LED_DRIVER_ADDR_1 +#endif +#ifdef LED_DRIVER_ADDR_2 +# define IS31FL3731_I2C_ADDRESS_2 LED_DRIVER_ADDR_2 +#endif +#ifdef LED_DRIVER_ADDR_3 +# define IS31FL3731_I2C_ADDRESS_3 LED_DRIVER_ADDR_3 +#endif +#ifdef LED_DRIVER_ADDR_4 +# define IS31FL3731_I2C_ADDRESS_4 LED_DRIVER_ADDR_4 +#endif +#ifdef ISSI_TIMEOUT +# define IS31FL3731_I2C_TIMEOUT ISSI_TIMEOUT +#endif +#ifdef ISSI_PERSISTENCE +# define IS31FL3731_I2C_PERSISTENCE ISSI_PERSISTENCE +#endif +#ifdef ISSI_3731_DEGHOST +# define IS31FL3731_DEGHOST ISSI_3731_DEGHOST +#endif + +#define is31_led is31fl3731_led_t +#define g_is31_leds g_is31fl3731_leds +// ======== + +#define IS31FL3731_I2C_ADDRESS_GND 0x74 +#define IS31FL3731_I2C_ADDRESS_SCL 0x75 +#define IS31FL3731_I2C_ADDRESS_SDA 0x76 +#define IS31FL3731_I2C_ADDRESS_VCC 0x77 + +#if defined(LED_MATRIX_IS31FL3731) +# define IS31FL3731_LED_COUNT LED_MATRIX_LED_COUNT +#endif + +#if defined IS31FL3731_I2C_ADDRESS_4 +# define IS31FL3731_DRIVER_COUNT 4 +#elif defined IS31FL3731_I2C_ADDRESS_3 +# define IS31FL3731_DRIVER_COUNT 3 +#elif defined IS31FL3731_I2C_ADDRESS_2 +# define IS31FL3731_DRIVER_COUNT 2 +#elif defined IS31FL3731_I2C_ADDRESS_1 +# define IS31FL3731_DRIVER_COUNT 1 +#endif + +typedef struct is31fl3731_led_t { uint8_t driver : 2; uint8_t v; -} __attribute__((packed)) is31_led; +} PACKED is31fl3731_led_t; -extern const is31_led PROGMEM g_is31_leds[LED_MATRIX_LED_COUNT]; +extern const is31fl3731_led_t PROGMEM g_is31fl3731_leds[IS31FL3731_LED_COUNT]; +void is31fl3731_init_drivers(void); void is31fl3731_init(uint8_t addr); void is31fl3731_write_register(uint8_t addr, uint8_t reg, uint8_t data); void is31fl3731_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer); @@ -46,6 +93,8 @@ void is31fl3731_set_led_control_register(uint8_t index, bool value); void is31fl3731_update_pwm_buffers(uint8_t addr, uint8_t index); void is31fl3731_update_led_control_registers(uint8_t addr, uint8_t index); +void is31fl3731_flush(void); + #define C1_1 0x24 #define C1_2 0x25 #define C1_3 0x26 diff --git a/drivers/led/issi/is31fl3731.c b/drivers/led/issi/is31fl3731.c index 15a01b6d75..6a64d89ecf 100644 --- a/drivers/led/issi/is31fl3731.c +++ b/drivers/led/issi/is31fl3731.c @@ -17,44 +17,39 @@ */ #include "is31fl3731.h" +#include <string.h> #include "i2c_master.h" #include "wait.h" -// This is a 7-bit address, that gets left-shifted and bit 0 -// set to 0 for write, 1 for read (as per I2C protocol) -// The address will vary depending on your wiring: -// 0b1110100 AD <-> GND -// 0b1110111 AD <-> VCC -// 0b1110101 AD <-> SCL -// 0b1110110 AD <-> SDA -#define ISSI_ADDR_DEFAULT 0x74 +#define IS31FL3731_REG_CONFIG 0x00 +#define IS31FL3731_REG_CONFIG_PICTUREMODE 0x00 +#define IS31FL3731_REG_CONFIG_AUTOPLAYMODE 0x08 +#define IS31FL3731_REG_CONFIG_AUDIOPLAYMODE 0x18 -#define ISSI_REG_CONFIG 0x00 -#define ISSI_REG_CONFIG_PICTUREMODE 0x00 -#define ISSI_REG_CONFIG_AUTOPLAYMODE 0x08 -#define ISSI_REG_CONFIG_AUDIOPLAYMODE 0x18 +#define IS31FL3731_CONF_PICTUREMODE 0x00 +#define IS31FL3731_CONF_AUTOFRAMEMODE 0x04 +#define IS31FL3731_CONF_AUDIOMODE 0x08 -#define ISSI_CONF_PICTUREMODE 0x00 -#define ISSI_CONF_AUTOFRAMEMODE 0x04 -#define ISSI_CONF_AUDIOMODE 0x08 - -#define ISSI_REG_PICTUREFRAME 0x01 +#define IS31FL3731_REG_PICTUREFRAME 0x01 // Not defined in the datasheet -- See AN for IC -#define ISSI_REG_GHOST_IMAGE_PREVENTION 0xC2 // Set bit 4 to enable de-ghosting +#define IS31FL3731_REG_GHOST_IMAGE_PREVENTION 0xC2 // Set bit 4 to enable de-ghosting + +#define IS31FL3731_REG_SHUTDOWN 0x0A +#define IS31FL3731_REG_AUDIOSYNC 0x06 -#define ISSI_REG_SHUTDOWN 0x0A -#define ISSI_REG_AUDIOSYNC 0x06 +#define IS31FL3731_COMMANDREGISTER 0xFD +#define IS31FL3731_BANK_FUNCTIONREG 0x0B // helpfully called 'page nine' -#define ISSI_COMMANDREGISTER 0xFD -#define ISSI_BANK_FUNCTIONREG 0x0B // helpfully called 'page nine' +#define IS31FL3731_PWM_REGISTER_COUNT 144 +#define IS31FL3731_LED_CONTROL_REGISTER_COUNT 18 -#ifndef ISSI_TIMEOUT -# define ISSI_TIMEOUT 100 +#ifndef IS31FL3731_I2C_TIMEOUT +# define IS31FL3731_I2C_TIMEOUT 100 #endif -#ifndef ISSI_PERSISTENCE -# define ISSI_PERSISTENCE 0 +#ifndef IS31FL3731_I2C_PERSISTENCE +# define IS31FL3731_I2C_PERSISTENCE 0 #endif // Transfer buffer for TWITransmitData() @@ -65,36 +60,22 @@ uint8_t g_twi_transfer_buffer[20]; // We could optimize this and take out the unused registers from these // buffers and the transfers in is31fl3731_write_pwm_buffer() but it's // probably not worth the extra complexity. -uint8_t g_pwm_buffer[DRIVER_COUNT][144]; -bool g_pwm_buffer_update_required[DRIVER_COUNT] = {false}; - -uint8_t g_led_control_registers[DRIVER_COUNT][18] = {{0}}; -bool g_led_control_registers_update_required[DRIVER_COUNT] = {false}; - -// This is the bit pattern in the LED control registers -// (for matrix A, add one to register for matrix B) -// -// reg - b7 b6 b5 b4 b3 b2 b1 b0 -// 0x00 - R08,R07,R06,R05,R04,R03,R02,R01 -// 0x02 - G08,G07,G06,G05,G04,G03,G02,R00 -// 0x04 - B08,B07,B06,B05,B04,B03,G01,G00 -// 0x06 - - , - , - , - , - ,B02,B01,B00 -// 0x08 - - , - , - , - , - , - , - , - -// 0x0A - B17,B16,B15, - , - , - , - , - -// 0x0C - G17,G16,B14,B13,B12,B11,B10,B09 -// 0x0E - R17,G15,G14,G13,G12,G11,G10,G09 -// 0x10 - R16,R15,R14,R13,R12,R11,R10,R09 +uint8_t g_pwm_buffer[IS31FL3731_DRIVER_COUNT][IS31FL3731_PWM_REGISTER_COUNT]; +bool g_pwm_buffer_update_required[IS31FL3731_DRIVER_COUNT] = {false}; + +uint8_t g_led_control_registers[IS31FL3731_DRIVER_COUNT][IS31FL3731_LED_CONTROL_REGISTER_COUNT] = {0}; +bool g_led_control_registers_update_required[IS31FL3731_DRIVER_COUNT] = {false}; void is31fl3731_write_register(uint8_t addr, uint8_t reg, uint8_t data) { g_twi_transfer_buffer[0] = reg; g_twi_transfer_buffer[1] = data; -#if ISSI_PERSISTENCE > 0 - for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) == 0) break; +#if IS31FL3731_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3731_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, IS31FL3731_I2C_TIMEOUT) == 0) break; } #else - i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT); + i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, IS31FL3731_I2C_TIMEOUT); #endif } @@ -105,7 +86,7 @@ void is31fl3731_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { // g_twi_transfer_buffer[] is 20 bytes // iterate over the pwm_buffer contents at 16 byte intervals - for (int i = 0; i < 144; i += 16) { + for (int i = 0; i < IS31FL3731_PWM_REGISTER_COUNT; i += 16) { // set the first register, e.g. 0x24, 0x34, 0x44, etc. g_twi_transfer_buffer[0] = 0x24 + i; // copy the data from i to i+15 @@ -113,16 +94,46 @@ void is31fl3731_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { // thus this sets registers 0x24-0x33, 0x34-0x43, etc. in one transfer memcpy(g_twi_transfer_buffer + 1, pwm_buffer + i, 16); -#if ISSI_PERSISTENCE > 0 - for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT) == 0) break; +#if IS31FL3731_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3731_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, IS31FL3731_I2C_TIMEOUT) == 0) break; } #else - i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT); + i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, IS31FL3731_I2C_TIMEOUT); #endif } } +void is31fl3731_init_drivers(void) { + i2c_init(); + + is31fl3731_init(IS31FL3731_I2C_ADDRESS_1); +#if defined(IS31FL3731_I2C_ADDRESS_2) + is31fl3731_init(IS31FL3731_I2C_ADDRESS_2); +# if defined(IS31FL3731_I2C_ADDRESS_3) + is31fl3731_init(IS31FL3731_I2C_ADDRESS_3); +# if defined(IS31FL3731_I2C_ADDRESS_4) + is31fl3731_init(IS31FL3731_I2C_ADDRESS_4); +# endif +# endif +#endif + + for (int i = 0; i < IS31FL3731_LED_COUNT; i++) { + is31fl3731_set_led_control_register(i, true, true, true); + } + + is31fl3731_update_led_control_registers(IS31FL3731_I2C_ADDRESS_1, 0); +#if defined(IS31FL3731_I2C_ADDRESS_2) + is31fl3731_update_led_control_registers(IS31FL3731_I2C_ADDRESS_2, 1); +# if defined(IS31FL3731_I2C_ADDRESS_3) + is31fl3731_update_led_control_registers(IS31FL3731_I2C_ADDRESS_3, 2); +# if defined(IS31FL3731_I2C_ADDRESS_4) + is31fl3731_update_led_control_registers(IS31FL3731_I2C_ADDRESS_4, 3); +# endif +# endif +#endif +} + void is31fl3731_init(uint8_t addr) { // In order to avoid the LEDs being driven with garbage data // in the LED driver's PWM registers, first enable software shutdown, @@ -130,29 +141,29 @@ void is31fl3731_init(uint8_t addr) { // then disable software shutdown. // select "function register" bank - is31fl3731_write_register(addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG); + is31fl3731_write_register(addr, IS31FL3731_COMMANDREGISTER, IS31FL3731_BANK_FUNCTIONREG); // enable software shutdown - is31fl3731_write_register(addr, ISSI_REG_SHUTDOWN, 0x00); -#ifdef ISSI_3731_DEGHOST // set to enable de-ghosting of the array - is31fl3731_write_register(addr, ISSI_REG_GHOST_IMAGE_PREVENTION, 0x10); + is31fl3731_write_register(addr, IS31FL3731_REG_SHUTDOWN, 0x00); +#ifdef IS31FL3731_DEGHOST // set to enable de-ghosting of the array + is31fl3731_write_register(addr, IS31FL3731_REG_GHOST_IMAGE_PREVENTION, 0x10); #endif // this delay was copied from other drivers, might not be needed wait_ms(10); // picture mode - is31fl3731_write_register(addr, ISSI_REG_CONFIG, ISSI_REG_CONFIG_PICTUREMODE); + is31fl3731_write_register(addr, IS31FL3731_REG_CONFIG, IS31FL3731_REG_CONFIG_PICTUREMODE); // display frame 0 - is31fl3731_write_register(addr, ISSI_REG_PICTUREFRAME, 0x00); + is31fl3731_write_register(addr, IS31FL3731_REG_PICTUREFRAME, 0x00); // audio sync off - is31fl3731_write_register(addr, ISSI_REG_AUDIOSYNC, 0x00); + is31fl3731_write_register(addr, IS31FL3731_REG_AUDIOSYNC, 0x00); // select bank 0 - is31fl3731_write_register(addr, ISSI_COMMANDREGISTER, 0); + is31fl3731_write_register(addr, IS31FL3731_COMMANDREGISTER, 0); // turn off all LEDs in the LED control register - for (int i = 0x00; i <= 0x11; i++) { + for (int i = 0; i < IS31FL3731_LED_CONTROL_REGISTER_COUNT; i++) { is31fl3731_write_register(addr, i, 0x00); } @@ -167,21 +178,21 @@ void is31fl3731_init(uint8_t addr) { } // select "function register" bank - is31fl3731_write_register(addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG); + is31fl3731_write_register(addr, IS31FL3731_COMMANDREGISTER, IS31FL3731_BANK_FUNCTIONREG); // disable software shutdown - is31fl3731_write_register(addr, ISSI_REG_SHUTDOWN, 0x01); + is31fl3731_write_register(addr, IS31FL3731_REG_SHUTDOWN, 0x01); // select bank 0 and leave it selected. // most usage after initialization is just writing PWM buffers in bank 0 // as there's not much point in double-buffering - is31fl3731_write_register(addr, ISSI_COMMANDREGISTER, 0); + is31fl3731_write_register(addr, IS31FL3731_COMMANDREGISTER, 0); } void is31fl3731_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) { - is31_led led; - if (index >= 0 && index < RGB_MATRIX_LED_COUNT) { - memcpy_P(&led, (&g_is31_leds[index]), sizeof(led)); + is31fl3731_led_t led; + if (index >= 0 && index < IS31FL3731_LED_COUNT) { + memcpy_P(&led, (&g_is31fl3731_leds[index]), sizeof(led)); // Subtract 0x24 to get the second index of g_pwm_buffer if (g_pwm_buffer[led.driver][led.r - 0x24] == red && g_pwm_buffer[led.driver][led.g - 0x24] == green && g_pwm_buffer[led.driver][led.b - 0x24] == blue) { @@ -195,14 +206,14 @@ void is31fl3731_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) { } void is31fl3731_set_color_all(uint8_t red, uint8_t green, uint8_t blue) { - for (int i = 0; i < RGB_MATRIX_LED_COUNT; i++) { + for (int i = 0; i < IS31FL3731_LED_COUNT; i++) { is31fl3731_set_color(i, red, green, blue); } } void is31fl3731_set_led_control_register(uint8_t index, bool red, bool green, bool blue) { - is31_led led; - memcpy_P(&led, (&g_is31_leds[index]), sizeof(led)); + is31fl3731_led_t led; + memcpy_P(&led, (&g_is31fl3731_leds[index]), sizeof(led)); uint8_t control_register_r = (led.r - 0x24) / 8; uint8_t control_register_g = (led.g - 0x24) / 8; @@ -239,9 +250,22 @@ void is31fl3731_update_pwm_buffers(uint8_t addr, uint8_t index) { void is31fl3731_update_led_control_registers(uint8_t addr, uint8_t index) { if (g_led_control_registers_update_required[index]) { - for (int i = 0; i < 18; i++) { + for (int i = 0; i < IS31FL3731_LED_CONTROL_REGISTER_COUNT; i++) { is31fl3731_write_register(addr, i, g_led_control_registers[index][i]); } } g_led_control_registers_update_required[index] = false; } + +void is31fl3731_flush(void) { + is31fl3731_update_pwm_buffers(IS31FL3731_I2C_ADDRESS_1, 0); +#if defined(IS31FL3731_I2C_ADDRESS_2) + is31fl3731_update_pwm_buffers(IS31FL3731_I2C_ADDRESS_2, 1); +# if defined(IS31FL3731_I2C_ADDRESS_3) + is31fl3731_update_pwm_buffers(IS31FL3731_I2C_ADDRESS_3, 2); +# if defined(IS31FL3731_I2C_ADDRESS_4) + is31fl3731_update_pwm_buffers(IS31FL3731_I2C_ADDRESS_4, 3); +# endif +# endif +#endif +} diff --git a/drivers/led/issi/is31fl3731.h b/drivers/led/issi/is31fl3731.h index bdf03de1ee..d7b512e4c4 100644 --- a/drivers/led/issi/is31fl3731.h +++ b/drivers/led/issi/is31fl3731.h @@ -19,18 +19,65 @@ #include <stdint.h> #include <stdbool.h> -#include <string.h> #include "progmem.h" +#include "util.h" -typedef struct is31_led { +// ======== DEPRECATED DEFINES - DO NOT USE ======== +#ifdef DRIVER_ADDR_1 +# define IS31FL3731_I2C_ADDRESS_1 DRIVER_ADDR_1 +#endif +#ifdef DRIVER_ADDR_2 +# define IS31FL3731_I2C_ADDRESS_2 DRIVER_ADDR_2 +#endif +#ifdef DRIVER_ADDR_3 +# define IS31FL3731_I2C_ADDRESS_3 DRIVER_ADDR_3 +#endif +#ifdef DRIVER_ADDR_4 +# define IS31FL3731_I2C_ADDRESS_4 DRIVER_ADDR_4 +#endif +#ifdef ISSI_TIMEOUT +# define IS31FL3731_I2C_TIMEOUT ISSI_TIMEOUT +#endif +#ifdef ISSI_PERSISTENCE +# define IS31FL3731_I2C_PERSISTENCE ISSI_PERSISTENCE +#endif +#ifdef ISSI_3731_DEGHOST +# define IS31FL3731_DEGHOST ISSI_3731_DEGHOST +#endif + +#define is31_led is31fl3731_led_t +#define g_is31_leds g_is31fl3731_leds +// ======== + +#define IS31FL3731_I2C_ADDRESS_GND 0x74 +#define IS31FL3731_I2C_ADDRESS_SCL 0x75 +#define IS31FL3731_I2C_ADDRESS_SDA 0x76 +#define IS31FL3731_I2C_ADDRESS_VCC 0x77 + +#if defined(RGB_MATRIX_IS31FL3731) +# define IS31FL3731_LED_COUNT RGB_MATRIX_LED_COUNT +#endif + +#if defined(IS31FL3731_I2C_ADDRESS_4) +# define IS31FL3731_DRIVER_COUNT 4 +#elif defined(IS31FL3731_I2C_ADDRESS_3) +# define IS31FL3731_DRIVER_COUNT 3 +#elif defined(IS31FL3731_I2C_ADDRESS_2) +# define IS31FL3731_DRIVER_COUNT 2 +#elif defined(IS31FL3731_I2C_ADDRESS_1) +# define IS31FL3731_DRIVER_COUNT 1 +#endif + +typedef struct is31fl3731_led_t { uint8_t driver : 2; uint8_t r; uint8_t g; uint8_t b; -} __attribute__((packed)) is31_led; +} PACKED is31fl3731_led_t; -extern const is31_led PROGMEM g_is31_leds[RGB_MATRIX_LED_COUNT]; +extern const is31fl3731_led_t PROGMEM g_is31fl3731_leds[IS31FL3731_LED_COUNT]; +void is31fl3731_init_drivers(void); void is31fl3731_init(uint8_t addr); void is31fl3731_write_register(uint8_t addr, uint8_t reg, uint8_t data); void is31fl3731_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer); @@ -47,6 +94,8 @@ void is31fl3731_set_led_control_register(uint8_t index, bool red, bool green, bo void is31fl3731_update_pwm_buffers(uint8_t addr, uint8_t index); void is31fl3731_update_led_control_registers(uint8_t addr, uint8_t index); +void is31fl3731_flush(void); + #define C1_1 0x24 #define C1_2 0x25 #define C1_3 0x26 diff --git a/drivers/led/issi/is31fl3733-simple.c b/drivers/led/issi/is31fl3733-simple.c index f9a0a271a8..63e9f533e2 100644 --- a/drivers/led/issi/is31fl3733-simple.c +++ b/drivers/led/issi/is31fl3733-simple.c @@ -19,59 +19,64 @@ */ #include "is31fl3733-simple.h" +#include <string.h> #include "i2c_master.h" #include "wait.h" -// This is a 7-bit address, that gets left-shifted and bit 0 -// set to 0 for write, 1 for read (as per I2C protocol) -// The address will vary depending on your wiring: -// 00 <-> GND -// 01 <-> SCL -// 10 <-> SDA -// 11 <-> VCC -// ADDR1 represents A1:A0 of the 7-bit address. -// ADDR2 represents A3:A2 of the 7-bit address. -// The result is: 0b101(ADDR2)(ADDR1) -#define ISSI_ADDR_DEFAULT 0x50 - -#define ISSI_COMMANDREGISTER 0xFD -#define ISSI_COMMANDREGISTER_WRITELOCK 0xFE -#define ISSI_INTERRUPTMASKREGISTER 0xF0 -#define ISSI_INTERRUPTSTATUSREGISTER 0xF1 - -#define ISSI_PAGE_LEDCONTROL 0x00 // PG0 -#define ISSI_PAGE_PWM 0x01 // PG1 -#define ISSI_PAGE_AUTOBREATH 0x02 // PG2 -#define ISSI_PAGE_FUNCTION 0x03 // PG3 - -#define ISSI_REG_CONFIGURATION 0x00 // PG3 -#define ISSI_REG_GLOBALCURRENT 0x01 // PG3 -#define ISSI_REG_RESET 0x11 // PG3 -#define ISSI_REG_SWPULLUP 0x0F // PG3 -#define ISSI_REG_CSPULLUP 0x10 // PG3 - -#ifndef ISSI_TIMEOUT -# define ISSI_TIMEOUT 100 +#define IS31FL3733_COMMANDREGISTER 0xFD +#define IS31FL3733_COMMANDREGISTER_WRITELOCK 0xFE +#define IS31FL3733_INTERRUPTMASKREGISTER 0xF0 +#define IS31FL3733_INTERRUPTSTATUSREGISTER 0xF1 + +#define IS31FL3733_PAGE_LEDCONTROL 0x00 // PG0 +#define IS31FL3733_PAGE_PWM 0x01 // PG1 +#define IS31FL3733_PAGE_AUTOBREATH 0x02 // PG2 +#define IS31FL3733_PAGE_FUNCTION 0x03 // PG3 + +#define IS31FL3733_REG_CONFIGURATION 0x00 // PG3 +#define IS31FL3733_REG_GLOBALCURRENT 0x01 // PG3 +#define IS31FL3733_REG_RESET 0x11 // PG3 +#define IS31FL3733_REG_SW_PULLUP 0x0F // PG3 +#define IS31FL3733_REG_CS_PULLDOWN 0x10 // PG3 + +#define IS31FL3733_PWM_REGISTER_COUNT 192 +#define IS31FL3733_LED_CONTROL_REGISTER_COUNT 24 + +#ifndef IS31FL3733_I2C_TIMEOUT +# define IS31FL3733_I2C_TIMEOUT 100 #endif -#ifndef ISSI_PERSISTENCE -# define ISSI_PERSISTENCE 0 +#ifndef IS31FL3733_I2C_PERSISTENCE +# define IS31FL3733_I2C_PERSISTENCE 0 #endif -#ifndef ISSI_PWM_FREQUENCY -# define ISSI_PWM_FREQUENCY 0b000 // PFS - IS31FL3733B only +#ifndef IS31FL3733_PWM_FREQUENCY +# define IS31FL3733_PWM_FREQUENCY IS31FL3733_PWM_FREQUENCY_8K4_HZ // PFS - IS31FL3733B only #endif -#ifndef ISSI_SWPULLUP -# define ISSI_SWPULLUP PUR_0R +#ifndef IS31FL3733_SW_PULLUP +# define IS31FL3733_SW_PULLUP IS31FL3733_PUR_0_OHM #endif -#ifndef ISSI_CSPULLUP -# define ISSI_CSPULLUP PUR_0R +#ifndef IS31FL3733_CS_PULLDOWN +# define IS31FL3733_CSPULLDOWN IS31FL3733_PDR_0_OHM #endif -#ifndef ISSI_GLOBALCURRENT -# define ISSI_GLOBALCURRENT 0xFF +#ifndef IS31FL3733_GLOBALCURRENT +# define IS31FL3733_GLOBALCURRENT 0xFF +#endif + +#ifndef IS31FL3733_SYNC_1 +# define IS31FL3733_SYNC_1 IS31FL3733_SYNC_NONE +#endif +#ifndef IS31FL3733_SYNC_2 +# define IS31FL3733_SYNC_2 IS31FL3733_SYNC_NONE +#endif +#ifndef IS31FL3733_SYNC_3 +# define IS31FL3733_SYNC_3 IS31FL3733_SYNC_NONE +#endif +#ifndef IS31FL3733_SYNC_4 +# define IS31FL3733_SYNC_4 IS31FL3733_SYNC_NONE #endif // Transfer buffer for TWITransmitData() @@ -83,34 +88,25 @@ uint8_t g_twi_transfer_buffer[20]; // We could optimize this and take out the unused registers from these // buffers and the transfers in is31fl3733_write_pwm_buffer() but it's // probably not worth the extra complexity. -uint8_t g_pwm_buffer[LED_DRIVER_COUNT][192]; -bool g_pwm_buffer_update_required[LED_DRIVER_COUNT] = {false}; - -/* There's probably a better way to init this... */ -#if LED_DRIVER_COUNT == 1 -uint8_t g_led_control_registers[LED_DRIVER_COUNT][24] = {{0}}; -#elif LED_DRIVER_COUNT == 2 -uint8_t g_led_control_registers[LED_DRIVER_COUNT][24] = {{0}, {0}}; -#elif LED_DRIVER_COUNT == 3 -uint8_t g_led_control_registers[LED_DRIVER_COUNT][24] = {{0}, {0}, {0}}; -#elif LED_DRIVER_COUNT == 4 -uint8_t g_led_control_registers[LED_DRIVER_COUNT][24] = {{0}, {0}, {0}, {0}}; -#endif -bool g_led_control_registers_update_required[LED_DRIVER_COUNT] = {false}; +uint8_t g_pwm_buffer[IS31FL3733_DRIVER_COUNT][IS31FL3733_PWM_REGISTER_COUNT]; +bool g_pwm_buffer_update_required[IS31FL3733_DRIVER_COUNT] = {false}; + +uint8_t g_led_control_registers[IS31FL3733_DRIVER_COUNT][IS31FL3733_LED_CONTROL_REGISTER_COUNT] = {0}; +bool g_led_control_registers_update_required[IS31FL3733_DRIVER_COUNT] = {false}; bool is31fl3733_write_register(uint8_t addr, uint8_t reg, uint8_t data) { // If the transaction fails function returns false. g_twi_transfer_buffer[0] = reg; g_twi_transfer_buffer[1] = data; -#if ISSI_PERSISTENCE > 0 - for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) != 0) { +#if IS31FL3733_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3733_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, IS31FL3733_I2C_TIMEOUT) != 0) { return false; } } #else - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) != 0) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, IS31FL3733_I2C_TIMEOUT) != 0) { return false; } #endif @@ -124,21 +120,21 @@ bool is31fl3733_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { // g_twi_transfer_buffer[] is 20 bytes // Iterate over the pwm_buffer contents at 16 byte intervals. - for (int i = 0; i < 192; i += 16) { + for (int i = 0; i < IS31FL3733_PWM_REGISTER_COUNT; i += 16) { g_twi_transfer_buffer[0] = i; // Copy the data from i to i+15. // Device will auto-increment register for data after the first byte // Thus this sets registers 0x00-0x0F, 0x10-0x1F, etc. in one transfer. memcpy(g_twi_transfer_buffer + 1, pwm_buffer + i, 16); -#if ISSI_PERSISTENCE > 0 - for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT) != 0) { +#if IS31FL3733_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3733_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, IS31FL3733_I2C_TIMEOUT) != 0) { return false; } } #else - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT) != 0) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, IS31FL3733_I2C_TIMEOUT) != 0) { return false; } #endif @@ -146,6 +142,36 @@ bool is31fl3733_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { return true; } +void is31fl3733_init_drivers(void) { + i2c_init(); + + is31fl3733_init(IS31FL3733_I2C_ADDRESS_1, IS31FL3733_SYNC_1); +#if defined(IS31FL3733_I2C_ADDRESS_2) + is31fl3733_init(IS31FL3733_I2C_ADDRESS_2, IS31FL3733_SYNC_2); +# if defined(IS31FL3733_I2C_ADDRESS_3) + is31fl3733_init(IS31FL3733_I2C_ADDRESS_3, IS31FL3733_SYNC_3); +# if defined(IS31FL3733_I2C_ADDRESS_4) + is31fl3733_init(IS31FL3733_I2C_ADDRESS_4, IS31FL3733_SYNC_4); +# endif +# endif +#endif + + for (int i = 0; i < IS31FL3733_LED_COUNT; i++) { + is31fl3733_set_led_control_register(i, true); + } + + is31fl3733_update_led_control_registers(IS31FL3733_I2C_ADDRESS_1, 0); +#if defined(IS31FL3733_I2C_ADDRESS_2) + is31fl3733_update_led_control_registers(IS31FL3733_I2C_ADDRESS_2, 1); +# if defined(IS31FL3733_I2C_ADDRESS_3) + is31fl3733_update_led_control_registers(IS31FL3733_I2C_ADDRESS_3, 2); +# if defined(IS31FL3733_I2C_ADDRESS_4) + is31fl3733_update_led_control_registers(IS31FL3733_I2C_ADDRESS_4, 3); +# endif +# endif +#endif +} + void is31fl3733_init(uint8_t addr, uint8_t sync) { // In order to avoid the LEDs being driven with garbage data // in the LED driver's PWM registers, shutdown is enabled last. @@ -154,48 +180,48 @@ void is31fl3733_init(uint8_t addr, uint8_t sync) { // Sync is passed so set it according to the datasheet. // Unlock the command register. - is31fl3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5); // Select PG0 - is31fl3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL); + is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_LEDCONTROL); // Turn off all LEDs. - for (int i = 0x00; i <= 0x17; i++) { + for (int i = 0; i < IS31FL3733_LED_CONTROL_REGISTER_COUNT; i++) { is31fl3733_write_register(addr, i, 0x00); } // Unlock the command register. - is31fl3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5); // Select PG1 - is31fl3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM); + is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_PWM); // Set PWM on all LEDs to 0 // No need to setup Breath registers to PWM as that is the default. - for (int i = 0x00; i <= 0xBF; i++) { + for (int i = 0; i < IS31FL3733_PWM_REGISTER_COUNT; i++) { is31fl3733_write_register(addr, i, 0x00); } // Unlock the command register. - is31fl3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5); // Select PG3 - is31fl3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_FUNCTION); + is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_FUNCTION); // Set de-ghost pull-up resistors (SWx) - is31fl3733_write_register(addr, ISSI_REG_SWPULLUP, ISSI_SWPULLUP); + is31fl3733_write_register(addr, IS31FL3733_REG_SW_PULLUP, IS31FL3733_SW_PULLUP); // Set de-ghost pull-down resistors (CSx) - is31fl3733_write_register(addr, ISSI_REG_CSPULLUP, ISSI_CSPULLUP); + is31fl3733_write_register(addr, IS31FL3733_REG_CS_PULLDOWN, IS31FL3733_CS_PULLDOWN); // Set global current to maximum. - is31fl3733_write_register(addr, ISSI_REG_GLOBALCURRENT, ISSI_GLOBALCURRENT); + is31fl3733_write_register(addr, IS31FL3733_REG_GLOBALCURRENT, IS31FL3733_GLOBALCURRENT); // Disable software shutdown. - is31fl3733_write_register(addr, ISSI_REG_CONFIGURATION, ((sync & 0b11) << 6) | ((ISSI_PWM_FREQUENCY & 0b111) << 3) | 0x01); + is31fl3733_write_register(addr, IS31FL3733_REG_CONFIGURATION, ((sync & 0b11) << 6) | ((IS31FL3733_PWM_FREQUENCY & 0b111) << 3) | 0x01); // Wait 10ms to ensure the device has woken up. wait_ms(10); } void is31fl3733_set_value(int index, uint8_t value) { - is31_led led; - if (index >= 0 && index < LED_MATRIX_LED_COUNT) { - memcpy_P(&led, (&g_is31_leds[index]), sizeof(led)); + is31fl3733_led_t led; + if (index >= 0 && index < IS31FL3733_LED_COUNT) { + memcpy_P(&led, (&g_is31fl3733_leds[index]), sizeof(led)); if (g_pwm_buffer[led.driver][led.v] == value) { return; @@ -206,14 +232,14 @@ void is31fl3733_set_value(int index, uint8_t value) { } void is31fl3733_set_value_all(uint8_t value) { - for (int i = 0; i < LED_MATRIX_LED_COUNT; i++) { + for (int i = 0; i < IS31FL3733_LED_COUNT; i++) { is31fl3733_set_value(i, value); } } void is31fl3733_set_led_control_register(uint8_t index, bool value) { - is31_led led; - memcpy_P(&led, (&g_is31_leds[index]), sizeof(led)); + is31fl3733_led_t led; + memcpy_P(&led, (&g_is31fl3733_leds[index]), sizeof(led)); uint8_t control_register = led.v / 8; uint8_t bit_value = led.v % 8; @@ -230,8 +256,8 @@ void is31fl3733_set_led_control_register(uint8_t index, bool value) { void is31fl3733_update_pwm_buffers(uint8_t addr, uint8_t index) { if (g_pwm_buffer_update_required[index]) { // Firstly we need to unlock the command register and select PG1. - is31fl3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); - is31fl3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM); + is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_PWM); // If any of the transactions fail we risk writing dirty PG0, // refresh page 0 just in case. @@ -245,11 +271,24 @@ void is31fl3733_update_pwm_buffers(uint8_t addr, uint8_t index) { void is31fl3733_update_led_control_registers(uint8_t addr, uint8_t index) { if (g_led_control_registers_update_required[index]) { // Firstly we need to unlock the command register and select PG0 - is31fl3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); - is31fl3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL); - for (int i = 0; i < 24; i++) { + is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_LEDCONTROL); + for (int i = 0; i < IS31FL3733_LED_CONTROL_REGISTER_COUNT; i++) { is31fl3733_write_register(addr, i, g_led_control_registers[index][i]); } g_led_control_registers_update_required[index] = false; } } + +void is31fl3733_flush(void) { + is31fl3733_update_pwm_buffers(IS31FL3733_I2C_ADDRESS_1, 0); +#if defined(IS31FL3733_I2C_ADDRESS_2) + is31fl3733_update_pwm_buffers(IS31FL3733_I2C_ADDRESS_2, 1); +# if defined(IS31FL3733_I2C_ADDRESS_3) + is31fl3733_update_pwm_buffers(IS31FL3733_I2C_ADDRESS_3, 2); +# if defined(IS31FL3733_I2C_ADDRESS_4) + is31fl3733_update_pwm_buffers(IS31FL3733_I2C_ADDRESS_4, 3); +# endif +# endif +#endif +} diff --git a/drivers/led/issi/is31fl3733-simple.h b/drivers/led/issi/is31fl3733-simple.h index 1458f7ac8d..201d3ff788 100644 --- a/drivers/led/issi/is31fl3733-simple.h +++ b/drivers/led/issi/is31fl3733-simple.h @@ -22,16 +22,80 @@ #include <stdint.h> #include <stdbool.h> -#include <string.h> #include "progmem.h" +#include "util.h" -typedef struct is31_led { +// ======== DEPRECATED DEFINES - DO NOT USE ======== +#ifdef ISSI_TIMEOUT +# define IS31FL3733_I2C_TIMEOUT ISSI_TIMEOUT +#endif +#ifdef ISSI_PERSISTENCE +# define IS31FL3733_I2C_PERSISTENCE ISSI_PERSISTENCE +#endif +#ifdef ISSI_PWM_FREQUENCY +# define IS31FL3733_PWM_FREQUENCY ISSI_PWM_FREQUENCY +#endif +#ifdef ISSI_SWPULLUP +# define IS31FL3733_SW_PULLUP ISSI_SWPULLUP +#endif +#ifdef ISSI_CSPULLUP +# define IS31FL3733_CS_PULLDOWN ISSI_CSPULLUP +#endif +#ifdef ISSI_GLOBALCURRENT +# define IS31FL3733_GLOBALCURRENT ISSI_GLOBALCURRENT +#endif + +#define is31_led is31fl3733_led_t +#define g_is31_leds g_is31fl3733_leds + +#define PUR_0R IS31FL3733_PUR_0_OHM +#define PUR_05KR IS31FL3733_PUR_1K_OHM +#define PUR_3KR IS31FL3733_PUR_2K_OHM +#define PUR_4KR IS31FL3733_PUR_4K_OHM +#define PUR_8KR IS31FL3733_PUR_8K_OHM +#define PUR_16KR IS31FL3733_PUR_16K_OHM +#define PUR_32KR IS31FL3733_PUR_32K_OHM +// ======== + +#define IS31FL3733_I2C_ADDRESS_GND_GND 0x50 +#define IS31FL3733_I2C_ADDRESS_GND_SCL 0x51 +#define IS31FL3733_I2C_ADDRESS_GND_SDA 0x52 +#define IS31FL3733_I2C_ADDRESS_GND_VCC 0x53 +#define IS31FL3733_I2C_ADDRESS_SCL_GND 0x54 +#define IS31FL3733_I2C_ADDRESS_SCL_SCL 0x55 +#define IS31FL3733_I2C_ADDRESS_SCL_SDA 0x56 +#define IS31FL3733_I2C_ADDRESS_SCL_VCC 0x57 +#define IS31FL3733_I2C_ADDRESS_SDA_GND 0x58 +#define IS31FL3733_I2C_ADDRESS_SDA_SCL 0x59 +#define IS31FL3733_I2C_ADDRESS_SDA_SDA 0x5A +#define IS31FL3733_I2C_ADDRESS_SDA_VCC 0x5B +#define IS31FL3733_I2C_ADDRESS_VCC_GND 0x5C +#define IS31FL3733_I2C_ADDRESS_VCC_SCL 0x5D +#define IS31FL3733_I2C_ADDRESS_VCC_SDA 0x5E +#define IS31FL3733_I2C_ADDRESS_VCC_VCC 0x5F + +#if defined(LED_MATRIX_IS31FL3733) +# define IS31FL3733_LED_COUNT LED_MATRIX_LED_COUNT +#endif + +#if defined(IS31FL3733_I2C_ADDRESS_4) +# define IS31FL3733_DRIVER_COUNT 4 +#elif defined(IS31FL3733_I2C_ADDRESS_3) +# define IS31FL3733_DRIVER_COUNT 3 +#elif defined(IS31FL3733_I2C_ADDRESS_2) +# define IS31FL3733_DRIVER_COUNT 2 +#elif defined(IS31FL3733_I2C_ADDRESS_1) +# define IS31FL3733_DRIVER_COUNT 1 +#endif + +typedef struct is31fl3733_led_t { uint8_t driver : 2; uint8_t v; -} __attribute__((packed)) is31_led; +} PACKED is31fl3733_led_t; -extern const is31_led PROGMEM g_is31_leds[LED_MATRIX_LED_COUNT]; +extern const is31fl3733_led_t PROGMEM g_is31fl3733_leds[IS31FL3733_LED_COUNT]; +void is31fl3733_init_drivers(void); void is31fl3733_init(uint8_t addr, uint8_t sync); bool is31fl3733_write_register(uint8_t addr, uint8_t reg, uint8_t data); bool is31fl3733_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer); @@ -48,13 +112,35 @@ void is31fl3733_set_led_control_register(uint8_t index, bool value); void is31fl3733_update_pwm_buffers(uint8_t addr, uint8_t index); void is31fl3733_update_led_control_registers(uint8_t addr, uint8_t index); -#define PUR_0R 0x00 // No PUR resistor -#define PUR_05KR 0x02 // 0.5k Ohm resistor in t_NOL -#define PUR_3KR 0x03 // 3.0k Ohm resistor on all the time -#define PUR_4KR 0x04 // 4.0k Ohm resistor on all the time -#define PUR_8KR 0x05 // 8.0k Ohm resistor on all the time -#define PUR_16KR 0x06 // 16k Ohm resistor on all the time -#define PUR_32KR 0x07 // 32k Ohm resistor in t_NOL +void is31fl3733_flush(void); + +#define IS31FL3733_PDR_0_OHM 0b000 // No pull-down resistor +#define IS31FL3733_PDR_0K5_OHM 0b001 // 0.5 kOhm resistor +#define IS31FL3733_PDR_1K_OHM 0b010 // 1 kOhm resistor +#define IS31FL3733_PDR_2K_OHM 0b011 // 2 kOhm resistor +#define IS31FL3733_PDR_4K_OHM 0b100 // 4 kOhm resistor +#define IS31FL3733_PDR_8K_OHM 0b101 // 8 kOhm resistor +#define IS31FL3733_PDR_16K_OHM 0b110 // 16 kOhm resistor +#define IS31FL3733_PDR_32K_OHM 0b111 // 32 kOhm resistor + +#define IS31FL3733_PUR_0_OHM 0b000 // No pull-up resistor +#define IS31FL3733_PUR_0K5_OHM 0b001 // 0.5 kOhm resistor +#define IS31FL3733_PUR_1K_OHM 0b010 // 1 kOhm resistor +#define IS31FL3733_PUR_2K_OHM 0b011 // 2 kOhm resistor +#define IS31FL3733_PUR_4K_OHM 0b100 // 4 kOhm resistor +#define IS31FL3733_PUR_8K_OHM 0b101 // 8 kOhm resistor +#define IS31FL3733_PUR_16K_OHM 0b110 // 16 kOhm resistor +#define IS31FL3733_PUR_32K_OHM 0b111 // 32 kOhm resistor + +#define IS31FL3733_PWM_FREQUENCY_8K4_HZ 0b000 +#define IS31FL3733_PWM_FREQUENCY_4K2_HZ 0b001 +#define IS31FL3733_PWM_FREQUENCY_26K7_HZ 0b010 +#define IS31FL3733_PWM_FREQUENCY_2K1_HZ 0b011 +#define IS31FL3733_PWM_FREQUENCY_1K05_HZ 0b100 + +#define IS31FL3733_SYNC_NONE 0b00 +#define IS31FL3733_SYNC_MASTER 0b01 +#define IS31FL3733_SYNC_SLAVE 0b10 #define A_1 0x00 #define A_2 0x01 diff --git a/drivers/led/issi/is31fl3733.c b/drivers/led/issi/is31fl3733.c index ca431838ef..5a5f352a6a 100644 --- a/drivers/led/issi/is31fl3733.c +++ b/drivers/led/issi/is31fl3733.c @@ -18,59 +18,64 @@ */ #include "is31fl3733.h" +#include <string.h> #include "i2c_master.h" #include "wait.h" -// This is a 7-bit address, that gets left-shifted and bit 0 -// set to 0 for write, 1 for read (as per I2C protocol) -// The address will vary depending on your wiring: -// 00 <-> GND -// 01 <-> SCL -// 10 <-> SDA -// 11 <-> VCC -// ADDR1 represents A1:A0 of the 7-bit address. -// ADDR2 represents A3:A2 of the 7-bit address. -// The result is: 0b101(ADDR2)(ADDR1) -#define ISSI_ADDR_DEFAULT 0x50 - -#define ISSI_COMMANDREGISTER 0xFD -#define ISSI_COMMANDREGISTER_WRITELOCK 0xFE -#define ISSI_INTERRUPTMASKREGISTER 0xF0 -#define ISSI_INTERRUPTSTATUSREGISTER 0xF1 - -#define ISSI_PAGE_LEDCONTROL 0x00 // PG0 -#define ISSI_PAGE_PWM 0x01 // PG1 -#define ISSI_PAGE_AUTOBREATH 0x02 // PG2 -#define ISSI_PAGE_FUNCTION 0x03 // PG3 - -#define ISSI_REG_CONFIGURATION 0x00 // PG3 -#define ISSI_REG_GLOBALCURRENT 0x01 // PG3 -#define ISSI_REG_RESET 0x11 // PG3 -#define ISSI_REG_SWPULLUP 0x0F // PG3 -#define ISSI_REG_CSPULLUP 0x10 // PG3 - -#ifndef ISSI_TIMEOUT -# define ISSI_TIMEOUT 100 +#define IS31FL3733_COMMANDREGISTER 0xFD +#define IS31FL3733_COMMANDREGISTER_WRITELOCK 0xFE +#define IS31FL3733_INTERRUPTMASKREGISTER 0xF0 +#define IS31FL3733_INTERRUPTSTATUSREGISTER 0xF1 + +#define IS31FL3733_PAGE_LEDCONTROL 0x00 // PG0 +#define IS31FL3733_PAGE_PWM 0x01 // PG1 +#define IS31FL3733_PAGE_AUTOBREATH 0x02 // PG2 +#define IS31FL3733_PAGE_FUNCTION 0x03 // PG3 + +#define IS31FL3733_REG_CONFIGURATION 0x00 // PG3 +#define IS31FL3733_REG_GLOBALCURRENT 0x01 // PG3 +#define IS31FL3733_REG_RESET 0x11 // PG3 +#define IS31FL3733_REG_SW_PULLUP 0x0F // PG3 +#define IS31FL3733_REG_CS_PULLDOWN 0x10 // PG3 + +#define IS31FL3733_PWM_REGISTER_COUNT 192 +#define IS31FL3733_LED_CONTROL_REGISTER_COUNT 24 + +#ifndef IS31FL3733_I2C_TIMEOUT +# define IS31FL3733_I2C_TIMEOUT 100 +#endif + +#ifndef IS31FL3733_I2C_PERSISTENCE +# define IS31FL3733_I2C_PERSISTENCE 0 #endif -#ifndef ISSI_PERSISTENCE -# define ISSI_PERSISTENCE 0 +#ifndef IS31FL3733_PWM_FREQUENCY +# define IS31FL3733_PWM_FREQUENCY IS31FL3733_PWM_FREQUENCY_8K4_HZ // PFS - IS31FL3733B only #endif -#ifndef ISSI_PWM_FREQUENCY -# define ISSI_PWM_FREQUENCY 0b000 // PFS - IS31FL3733B only +#ifndef IS31FL3733_SW_PULLUP +# define IS31FL3733_SW_PULLUP IS31FL3733_PUR_0_OHM #endif -#ifndef ISSI_SWPULLUP -# define ISSI_SWPULLUP PUR_0R +#ifndef IS31FL3733_CS_PULLDOWN +# define IS31FL3733_CS_PULLDOWN IS31FL3733_PDR_0_OHM #endif -#ifndef ISSI_CSPULLUP -# define ISSI_CSPULLUP PUR_0R +#ifndef IS31FL3733_GLOBALCURRENT +# define IS31FL3733_GLOBALCURRENT 0xFF #endif -#ifndef ISSI_GLOBALCURRENT -# define ISSI_GLOBALCURRENT 0xFF +#ifndef IS31FL3733_SYNC_1 +# define IS31FL3733_SYNC_1 IS31FL3733_SYNC_NONE +#endif +#ifndef IS31FL3733_SYNC_2 +# define IS31FL3733_SYNC_2 IS31FL3733_SYNC_NONE +#endif +#ifndef IS31FL3733_SYNC_3 +# define IS31FL3733_SYNC_3 IS31FL3733_SYNC_NONE +#endif +#ifndef IS31FL3733_SYNC_4 +# define IS31FL3733_SYNC_4 IS31FL3733_SYNC_NONE #endif // Transfer buffer for TWITransmitData() @@ -82,25 +87,25 @@ uint8_t g_twi_transfer_buffer[20]; // We could optimize this and take out the unused registers from these // buffers and the transfers in is31fl3733_write_pwm_buffer() but it's // probably not worth the extra complexity. -uint8_t g_pwm_buffer[DRIVER_COUNT][192]; -bool g_pwm_buffer_update_required[DRIVER_COUNT] = {false}; +uint8_t g_pwm_buffer[IS31FL3733_DRIVER_COUNT][IS31FL3733_PWM_REGISTER_COUNT]; +bool g_pwm_buffer_update_required[IS31FL3733_DRIVER_COUNT] = {false}; -uint8_t g_led_control_registers[DRIVER_COUNT][24] = {0}; -bool g_led_control_registers_update_required[DRIVER_COUNT] = {false}; +uint8_t g_led_control_registers[IS31FL3733_DRIVER_COUNT][IS31FL3733_LED_CONTROL_REGISTER_COUNT] = {0}; +bool g_led_control_registers_update_required[IS31FL3733_DRIVER_COUNT] = {false}; bool is31fl3733_write_register(uint8_t addr, uint8_t reg, uint8_t data) { // If the transaction fails function returns false. g_twi_transfer_buffer[0] = reg; g_twi_transfer_buffer[1] = data; -#if ISSI_PERSISTENCE > 0 - for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) != 0) { +#if IS31FL3733_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3733_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, IS31FL3733_I2C_TIMEOUT) != 0) { return false; } } #else - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) != 0) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, IS31FL3733_I2C_TIMEOUT) != 0) { return false; } #endif @@ -114,23 +119,21 @@ bool is31fl3733_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { // g_twi_transfer_buffer[] is 20 bytes // Iterate over the pwm_buffer contents at 16 byte intervals. - for (int i = 0; i < 192; i += 16) { + for (int i = 0; i < IS31FL3733_PWM_REGISTER_COUNT; i += 16) { g_twi_transfer_buffer[0] = i; // Copy the data from i to i+15. // Device will auto-increment register for data after the first byte // Thus this sets registers 0x00-0x0F, 0x10-0x1F, etc. in one transfer. - for (int j = 0; j < 16; j++) { - g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j]; - } + memcpy(g_twi_transfer_buffer + 1, pwm_buffer + i, 16); -#if ISSI_PERSISTENCE > 0 - for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT) != 0) { +#if IS31FL3733_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3733_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, IS31FL3733_I2C_TIMEOUT) != 0) { return false; } } #else - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT) != 0) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, IS31FL3733_I2C_TIMEOUT) != 0) { return false; } #endif @@ -138,6 +141,36 @@ bool is31fl3733_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { return true; } +void is31fl3733_init_drivers(void) { + i2c_init(); + + is31fl3733_init(IS31FL3733_I2C_ADDRESS_1, IS31FL3733_SYNC_1); +#if defined(IS31FL3733_I2C_ADDRESS_2) + is31fl3733_init(IS31FL3733_I2C_ADDRESS_2, IS31FL3733_SYNC_2); +# if defined(IS31FL3733_I2C_ADDRESS_3) + is31fl3733_init(IS31FL3733_I2C_ADDRESS_3, IS31FL3733_SYNC_3); +# if defined(IS31FL3733_I2C_ADDRESS_4) + is31fl3733_init(IS31FL3733_I2C_ADDRESS_4, IS31FL3733_SYNC_4); +# endif +# endif +#endif + + for (int i = 0; i < IS31FL3733_LED_COUNT; i++) { + is31fl3733_set_led_control_register(i, true, true, true); + } + + is31fl3733_update_led_control_registers(IS31FL3733_I2C_ADDRESS_1, 0); +#if defined(IS31FL3733_I2C_ADDRESS_2) + is31fl3733_update_led_control_registers(IS31FL3733_I2C_ADDRESS_2, 1); +# if defined(IS31FL3733_I2C_ADDRESS_3) + is31fl3733_update_led_control_registers(IS31FL3733_I2C_ADDRESS_3, 2); +# if defined(IS31FL3733_I2C_ADDRESS_4) + is31fl3733_update_led_control_registers(IS31FL3733_I2C_ADDRESS_4, 3); +# endif +# endif +#endif +} + void is31fl3733_init(uint8_t addr, uint8_t sync) { // In order to avoid the LEDs being driven with garbage data // in the LED driver's PWM registers, shutdown is enabled last. @@ -146,48 +179,48 @@ void is31fl3733_init(uint8_t addr, uint8_t sync) { // Sync is passed so set it according to the datasheet. // Unlock the command register. - is31fl3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5); // Select PG0 - is31fl3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL); + is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_LEDCONTROL); // Turn off all LEDs. - for (int i = 0x00; i <= 0x17; i++) { + for (int i = 0; i < IS31FL3733_LED_CONTROL_REGISTER_COUNT; i++) { is31fl3733_write_register(addr, i, 0x00); } // Unlock the command register. - is31fl3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5); // Select PG1 - is31fl3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM); + is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_PWM); // Set PWM on all LEDs to 0 // No need to setup Breath registers to PWM as that is the default. - for (int i = 0x00; i <= 0xBF; i++) { + for (int i = 0; i < IS31FL3733_PWM_REGISTER_COUNT; i++) { is31fl3733_write_register(addr, i, 0x00); } // Unlock the command register. - is31fl3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5); // Select PG3 - is31fl3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_FUNCTION); + is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_FUNCTION); // Set de-ghost pull-up resistors (SWx) - is31fl3733_write_register(addr, ISSI_REG_SWPULLUP, ISSI_SWPULLUP); + is31fl3733_write_register(addr, IS31FL3733_REG_SW_PULLUP, IS31FL3733_SW_PULLUP); // Set de-ghost pull-down resistors (CSx) - is31fl3733_write_register(addr, ISSI_REG_CSPULLUP, ISSI_CSPULLUP); + is31fl3733_write_register(addr, IS31FL3733_REG_CS_PULLDOWN, IS31FL3733_CS_PULLDOWN); // Set global current to maximum. - is31fl3733_write_register(addr, ISSI_REG_GLOBALCURRENT, ISSI_GLOBALCURRENT); + is31fl3733_write_register(addr, IS31FL3733_REG_GLOBALCURRENT, IS31FL3733_GLOBALCURRENT); // Disable software shutdown. - is31fl3733_write_register(addr, ISSI_REG_CONFIGURATION, ((sync & 0b11) << 6) | ((ISSI_PWM_FREQUENCY & 0b111) << 3) | 0x01); + is31fl3733_write_register(addr, IS31FL3733_REG_CONFIGURATION, ((sync & 0b11) << 6) | ((IS31FL3733_PWM_FREQUENCY & 0b111) << 3) | 0x01); // Wait 10ms to ensure the device has woken up. wait_ms(10); } void is31fl3733_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) { - is31_led led; - if (index >= 0 && index < RGB_MATRIX_LED_COUNT) { - memcpy_P(&led, (&g_is31_leds[index]), sizeof(led)); + is31fl3733_led_t led; + if (index >= 0 && index < IS31FL3733_LED_COUNT) { + memcpy_P(&led, (&g_is31fl3733_leds[index]), sizeof(led)); if (g_pwm_buffer[led.driver][led.r] == red && g_pwm_buffer[led.driver][led.g] == green && g_pwm_buffer[led.driver][led.b] == blue) { return; @@ -200,14 +233,14 @@ void is31fl3733_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) { } void is31fl3733_set_color_all(uint8_t red, uint8_t green, uint8_t blue) { - for (int i = 0; i < RGB_MATRIX_LED_COUNT; i++) { + for (int i = 0; i < IS31FL3733_LED_COUNT; i++) { is31fl3733_set_color(i, red, green, blue); } } void is31fl3733_set_led_control_register(uint8_t index, bool red, bool green, bool blue) { - is31_led led; - memcpy_P(&led, (&g_is31_leds[index]), sizeof(led)); + is31fl3733_led_t led; + memcpy_P(&led, (&g_is31fl3733_leds[index]), sizeof(led)); uint8_t control_register_r = led.r / 8; uint8_t control_register_g = led.g / 8; @@ -238,26 +271,39 @@ void is31fl3733_set_led_control_register(uint8_t index, bool red, bool green, bo void is31fl3733_update_pwm_buffers(uint8_t addr, uint8_t index) { if (g_pwm_buffer_update_required[index]) { // Firstly we need to unlock the command register and select PG1. - is31fl3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); - is31fl3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM); + is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_PWM); // If any of the transactions fail we risk writing dirty PG0, // refresh page 0 just in case. if (!is31fl3733_write_pwm_buffer(addr, g_pwm_buffer[index])) { g_led_control_registers_update_required[index] = true; } + g_pwm_buffer_update_required[index] = false; } - g_pwm_buffer_update_required[index] = false; } void is31fl3733_update_led_control_registers(uint8_t addr, uint8_t index) { if (g_led_control_registers_update_required[index]) { // Firstly we need to unlock the command register and select PG0 - is31fl3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); - is31fl3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL); - for (int i = 0; i < 24; i++) { + is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3733_write_register(addr, IS31FL3733_COMMANDREGISTER, IS31FL3733_PAGE_LEDCONTROL); + for (int i = 0; i < IS31FL3733_LED_CONTROL_REGISTER_COUNT; i++) { is31fl3733_write_register(addr, i, g_led_control_registers[index][i]); } + g_led_control_registers_update_required[index] = false; } - g_led_control_registers_update_required[index] = false; +} + +void is31fl3733_flush(void) { + is31fl3733_update_pwm_buffers(IS31FL3733_I2C_ADDRESS_1, 0); +#if defined(IS31FL3733_I2C_ADDRESS_2) + is31fl3733_update_pwm_buffers(IS31FL3733_I2C_ADDRESS_2, 1); +# if defined(IS31FL3733_I2C_ADDRESS_3) + is31fl3733_update_pwm_buffers(IS31FL3733_I2C_ADDRESS_3, 2); +# if defined(IS31FL3733_I2C_ADDRESS_4) + is31fl3733_update_pwm_buffers(IS31FL3733_I2C_ADDRESS_4, 3); +# endif +# endif +#endif } diff --git a/drivers/led/issi/is31fl3733.h b/drivers/led/issi/is31fl3733.h index f37a58de0f..c86aa9ee1e 100644 --- a/drivers/led/issi/is31fl3733.h +++ b/drivers/led/issi/is31fl3733.h @@ -22,16 +22,105 @@ #include <stdint.h> #include <stdbool.h> #include "progmem.h" +#include "util.h" -typedef struct is31_led { +// ======== DEPRECATED DEFINES - DO NOT USE ======== +#ifdef DRIVER_ADDR_1 +# define IS31FL3733_I2C_ADDRESS_1 DRIVER_ADDR_1 +#endif +#ifdef DRIVER_ADDR_2 +# define IS31FL3733_I2C_ADDRESS_2 DRIVER_ADDR_2 +#endif +#ifdef DRIVER_ADDR_3 +# define IS31FL3733_I2C_ADDRESS_3 DRIVER_ADDR_3 +#endif +#ifdef DRIVER_ADDR_4 +# define IS31FL3733_I2C_ADDRESS_4 DRIVER_ADDR_4 +#endif +#ifdef DRIVER_SYNC_1 +# define IS31FL3733_SYNC_1 DRIVER_SYNC_1 +#endif +#ifdef DRIVER_ADDR_2 +# define IS31FL3733_SYNC_2 DRIVER_SYNC_2 +#endif +#ifdef DRIVER_ADDR_3 +# define IS31FL3733_SYNC_3 DRIVER_SYNC_3 +#endif +#ifdef DRIVER_ADDR_4 +# define IS31FL3733_SYNC_4 DRIVER_SYNC_4 +#endif +#ifdef ISSI_TIMEOUT +# define IS31FL3733_I2C_TIMEOUT ISSI_TIMEOUT +#endif +#ifdef ISSI_PERSISTENCE +# define IS31FL3733_I2C_PERSISTENCE ISSI_PERSISTENCE +#endif +#ifdef ISSI_PWM_FREQUENCY +# define IS31FL3733_PWM_FREQUENCY ISSI_PWM_FREQUENCY +#endif +#ifdef ISSI_SWPULLUP +# define IS31FL3733_SW_PULLUP ISSI_SWPULLUP +#endif +#ifdef ISSI_CSPULLUP +# define IS31FL3733_CS_PULLDOWN ISSI_CSPULLUP +#endif +#ifdef ISSI_GLOBALCURRENT +# define IS31FL3733_GLOBALCURRENT ISSI_GLOBALCURRENT +#endif + +#define is31_led is31fl3733_led_t +#define g_is31_leds g_is31fl3733_leds + +#define PUR_0R IS31FL3733_PUR_0_OHM +#define PUR_05KR IS31FL3733_PUR_1K_OHM +#define PUR_3KR IS31FL3733_PUR_2K_OHM +#define PUR_4KR IS31FL3733_PUR_4K_OHM +#define PUR_8KR IS31FL3733_PUR_8K_OHM +#define PUR_16KR IS31FL3733_PUR_16K_OHM +#define PUR_32KR IS31FL3733_PUR_32K_OHM +// ======== + +#define IS31FL3733_I2C_ADDRESS_GND_GND 0x50 +#define IS31FL3733_I2C_ADDRESS_GND_SCL 0x51 +#define IS31FL3733_I2C_ADDRESS_GND_SDA 0x52 +#define IS31FL3733_I2C_ADDRESS_GND_VCC 0x53 +#define IS31FL3733_I2C_ADDRESS_SCL_GND 0x54 +#define IS31FL3733_I2C_ADDRESS_SCL_SCL 0x55 +#define IS31FL3733_I2C_ADDRESS_SCL_SDA 0x56 +#define IS31FL3733_I2C_ADDRESS_SCL_VCC 0x57 +#define IS31FL3733_I2C_ADDRESS_SDA_GND 0x58 +#define IS31FL3733_I2C_ADDRESS_SDA_SCL 0x59 +#define IS31FL3733_I2C_ADDRESS_SDA_SDA 0x5A +#define IS31FL3733_I2C_ADDRESS_SDA_VCC 0x5B +#define IS31FL3733_I2C_ADDRESS_VCC_GND 0x5C +#define IS31FL3733_I2C_ADDRESS_VCC_SCL 0x5D +#define IS31FL3733_I2C_ADDRESS_VCC_SDA 0x5E +#define IS31FL3733_I2C_ADDRESS_VCC_VCC 0x5F + +#if defined(RGB_MATRIX_IS31FL3733) +# define IS31FL3733_LED_COUNT RGB_MATRIX_LED_COUNT +#endif + +#if defined(IS31FL3733_I2C_ADDRESS_4) +# define IS31FL3733_DRIVER_COUNT 4 +#elif defined(IS31FL3733_I2C_ADDRESS_3) +# define IS31FL3733_DRIVER_COUNT 3 +#elif defined(IS31FL3733_I2C_ADDRESS_2) +# define IS31FL3733_DRIVER_COUNT 2 +#elif defined(IS31FL3733_I2C_ADDRESS_1) +# define IS31FL3733_DRIVER_COUNT 1 +#endif + +typedef struct is31fl3733_led_t { uint8_t driver : 2; uint8_t r; uint8_t g; uint8_t b; -} __attribute__((packed)) is31_led; +} PACKED is31fl3733_led_t; -extern const is31_led PROGMEM g_is31_leds[RGB_MATRIX_LED_COUNT]; +extern const is31fl3733_led_t PROGMEM g_is31fl3733_leds[IS31FL3733_LED_COUNT]; +void is31fl3733_init_drivers(void); void is31fl3733_init(uint8_t addr, uint8_t sync); bool is31fl3733_write_register(uint8_t addr, uint8_t reg, uint8_t data); bool is31fl3733_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer); @@ -48,13 +137,35 @@ void is31fl3733_set_led_control_register(uint8_t index, bool red, bool green, bo void is31fl3733_update_pwm_buffers(uint8_t addr, uint8_t index); void is31fl3733_update_led_control_registers(uint8_t addr, uint8_t index); -#define PUR_0R 0x00 // No PUR resistor -#define PUR_05KR 0x02 // 0.5k Ohm resistor in t_NOL -#define PUR_3KR 0x03 // 3.0k Ohm resistor on all the time -#define PUR_4KR 0x04 // 4.0k Ohm resistor on all the time -#define PUR_8KR 0x05 // 8.0k Ohm resistor on all the time -#define PUR_16KR 0x06 // 16k Ohm resistor on all the time -#define PUR_32KR 0x07 // 32k Ohm resistor in t_NOL +void is31fl3733_flush(void); + +#define IS31FL3733_PDR_0_OHM 0b000 // No pull-down resistor +#define IS31FL3733_PDR_0K5_OHM 0b001 // 0.5 kOhm resistor +#define IS31FL3733_PDR_1K_OHM 0b010 // 1 kOhm resistor +#define IS31FL3733_PDR_2K_OHM 0b011 // 2 kOhm resistor +#define IS31FL3733_PDR_4K_OHM 0b100 // 4 kOhm resistor +#define IS31FL3733_PDR_8K_OHM 0b101 // 8 kOhm resistor +#define IS31FL3733_PDR_16K_OHM 0b110 // 16 kOhm resistor +#define IS31FL3733_PDR_32K_OHM 0b111 // 32 kOhm resistor + +#define IS31FL3733_PUR_0_OHM 0b000 // No pull-up resistor +#define IS31FL3733_PUR_0K5_OHM 0b001 // 0.5 kOhm resistor +#define IS31FL3733_PUR_1K_OHM 0b010 // 1 kOhm resistor +#define IS31FL3733_PUR_2K_OHM 0b011 // 2 kOhm resistor +#define IS31FL3733_PUR_4K_OHM 0b100 // 4 kOhm resistor +#define IS31FL3733_PUR_8K_OHM 0b101 // 8 kOhm resistor +#define IS31FL3733_PUR_16K_OHM 0b110 // 16 kOhm resistor +#define IS31FL3733_PUR_32K_OHM 0b111 // 32 kOhm resistor + +#define IS31FL3733_PWM_FREQUENCY_8K4_HZ 0b000 +#define IS31FL3733_PWM_FREQUENCY_4K2_HZ 0b001 +#define IS31FL3733_PWM_FREQUENCY_26K7_HZ 0b010 +#define IS31FL3733_PWM_FREQUENCY_2K1_HZ 0b011 +#define IS31FL3733_PWM_FREQUENCY_1K05_HZ 0b100 + +#define IS31FL3733_SYNC_NONE 0b00 +#define IS31FL3733_SYNC_MASTER 0b01 +#define IS31FL3733_SYNC_SLAVE 0b10 #define A_1 0x00 #define A_2 0x01 diff --git a/drivers/led/issi/is31fl3736-simple.c b/drivers/led/issi/is31fl3736-simple.c new file mode 100644 index 0000000000..e0d76d07c6 --- /dev/null +++ b/drivers/led/issi/is31fl3736-simple.c @@ -0,0 +1,268 @@ +/* Copyright 2018 Jason Williams (Wilba) + * Copyright 2021 Doni Crosby + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include "is31fl3736-simple.h" +#include <string.h> +#include "i2c_master.h" +#include "wait.h" + +#define IS31FL3736_COMMANDREGISTER 0xFD +#define IS31FL3736_COMMANDREGISTER_WRITELOCK 0xFE +#define IS31FL3736_INTERRUPTMASKREGISTER 0xF0 +#define IS31FL3736_INTERRUPTSTATUSREGISTER 0xF1 + +#define IS31FL3736_PAGE_LEDCONTROL 0x00 // PG0 +#define IS31FL3736_PAGE_PWM 0x01 // PG1 +#define IS31FL3736_PAGE_AUTOBREATH 0x02 // PG2 +#define IS31FL3736_PAGE_FUNCTION 0x03 // PG3 + +#define IS31FL3736_REG_CONFIGURATION 0x00 // PG3 +#define IS31FL3736_REG_GLOBALCURRENT 0x01 // PG3 +#define IS31FL3736_REG_RESET 0x11 // PG3 +#define IS31FL3736_REG_SW_PULLUP 0x0F // PG3 +#define IS31FL3736_REG_CS_PULLDOWN 0x10 // PG3 + +#define IS31FL3736_PWM_REGISTER_COUNT 192 // actually 96 +#define IS31FL3736_LED_CONTROL_REGISTER_COUNT 24 + +#ifndef IS31FL3736_I2C_TIMEOUT +# define IS31FL3736_I2C_TIMEOUT 100 +#endif + +#ifndef IS31FL3736_I2C_PERSISTENCE +# define IS31FL3736_I2C_PERSISTENCE 0 +#endif + +#ifndef IS31FL3736_PWM_FREQUENCY +# define IS31FL3736_PWM_FREQUENCY IS31FL3736_PWM_FREQUENCY_8K4_HZ // PFS - IS31FL3736B only +#endif + +#ifndef IS31FL3736_SW_PULLUP +# define IS31FL3736_SW_PULLUP IS31FL3736_PUR_0_OHM +#endif + +#ifndef IS31FL3736_CS_PULLDOWN +# define IS31FL3736_CS_PULLDOWN IS31FL3736_PDR_0_OHM +#endif + +#ifndef IS31FL3736_GLOBALCURRENT +# define IS31FL3736_GLOBALCURRENT 0xFF +#endif + +// Transfer buffer for TWITransmitData() +uint8_t g_twi_transfer_buffer[20]; + +// These buffers match the IS31FL3736 PWM registers. +// The control buffers match the PG0 LED On/Off registers. +// Storing them like this is optimal for I2C transfers to the registers. +// We could optimize this and take out the unused registers from these +// buffers and the transfers in is31fl3736_write_pwm_buffer() but it's +// probably not worth the extra complexity. +uint8_t g_pwm_buffer[IS31FL3736_DRIVER_COUNT][IS31FL3736_PWM_REGISTER_COUNT]; +bool g_pwm_buffer_update_required[IS31FL3736_DRIVER_COUNT] = {false}; + +uint8_t g_led_control_registers[IS31FL3736_DRIVER_COUNT][IS31FL3736_LED_CONTROL_REGISTER_COUNT] = {0}; +bool g_led_control_registers_update_required[IS31FL3736_DRIVER_COUNT] = {false}; + +void is31fl3736_write_register(uint8_t addr, uint8_t reg, uint8_t data) { + g_twi_transfer_buffer[0] = reg; + g_twi_transfer_buffer[1] = data; + +#if IS31FL3736_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3736_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, IS31FL3736_I2C_TIMEOUT) == 0) break; + } +#else + i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, IS31FL3736_I2C_TIMEOUT); +#endif +} + +void is31fl3736_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { + // assumes PG1 is already selected + + // transmit PWM registers in 12 transfers of 16 bytes + // g_twi_transfer_buffer[] is 20 bytes + + // iterate over the pwm_buffer contents at 16 byte intervals + for (int i = 0; i < IS31FL3736_PWM_REGISTER_COUNT; i += 16) { + g_twi_transfer_buffer[0] = i; + // copy the data from i to i+15 + // device will auto-increment register for data after the first byte + // thus this sets registers 0x00-0x0F, 0x10-0x1F, etc. in one transfer + memcpy(g_twi_transfer_buffer + 1, pwm_buffer + i, 16); + +#if IS31FL3736_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3736_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, IS31FL3736_I2C_TIMEOUT) == 0) break; + } +#else + i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, IS31FL3736_I2C_TIMEOUT); +#endif + } +} + +void is31fl3736_init_drivers(void) { + i2c_init(); + + is31fl3736_init(IS31FL3736_I2C_ADDRESS_1); +#if defined(IS31FL3736_I2C_ADDRESS_2) + is31fl3736_init(IS31FL3736_I2C_ADDRESS_2); +# if defined(IS31FL3736_I2C_ADDRESS_3) + is31fl3736_init(IS31FL3736_I2C_ADDRESS_3); +# if defined(IS31FL3736_I2C_ADDRESS_4) + is31fl3736_init(IS31FL3736_I2C_ADDRESS_4); +# endif +# endif +#endif + + for (int i = 0; i < IS31FL3736_LED_COUNT; i++) { + is31fl3736_set_led_control_register(i, true); + } + + is31fl3736_update_led_control_registers(IS31FL3736_I2C_ADDRESS_1, 0); +#if defined(IS31FL3736_I2C_ADDRESS_2) + is31fl3736_update_led_control_registers(IS31FL3736_I2C_ADDRESS_2, 1); +# if defined(IS31FL3736_I2C_ADDRESS_3) + is31fl3736_update_led_control_registers(IS31FL3736_I2C_ADDRESS_3, 2); +# if defined(IS31FL3736_I2C_ADDRESS_4) + is31fl3736_update_led_control_registers(IS31FL3736_I2C_ADDRESS_4, 3); +# endif +# endif +#endif +} + +void is31fl3736_init(uint8_t addr) { + // In order to avoid the LEDs being driven with garbage data + // in the LED driver's PWM registers, shutdown is enabled last. + // Set up the mode and other settings, clear the PWM registers, + // then disable software shutdown. + + // Unlock the command register. + is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5); + + // Select PG0 + is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_LEDCONTROL); + // Turn off all LEDs. + for (int i = 0; i < IS31FL3736_LED_CONTROL_REGISTER_COUNT; i++) { + is31fl3736_write_register(addr, i, 0x00); + } + + // Unlock the command register. + is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5); + + // Select PG1 + is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_PWM); + // Set PWM on all LEDs to 0 + // No need to setup Breath registers to PWM as that is the default. + for (int i = 0; i < IS31FL3736_PWM_REGISTER_COUNT; i++) { + is31fl3736_write_register(addr, i, 0x00); + } + + // Unlock the command register. + is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5); + + // Select PG3 + is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_FUNCTION); + // Set de-ghost pull-up resistors (SWx) + is31fl3736_write_register(addr, IS31FL3736_REG_SW_PULLUP, IS31FL3736_SW_PULLUP); + // Set de-ghost pull-down resistors (CSx) + is31fl3736_write_register(addr, IS31FL3736_REG_CS_PULLDOWN, IS31FL3736_CS_PULLDOWN); + // Set global current to maximum. + is31fl3736_write_register(addr, IS31FL3736_REG_GLOBALCURRENT, IS31FL3736_GLOBALCURRENT); + // Disable software shutdown. + is31fl3736_write_register(addr, IS31FL3736_REG_CONFIGURATION, ((IS31FL3736_PWM_FREQUENCY & 0b111) << 3) | 0x01); + + // Wait 10ms to ensure the device has woken up. + wait_ms(10); +} + +void is31fl3736_set_value(int index, uint8_t value) { + is31fl3736_led_t led; + if (index >= 0 && index < IS31FL3736_LED_COUNT) { + memcpy_P(&led, (&g_is31fl3736_leds[index]), sizeof(led)); + + if (g_pwm_buffer[led.driver][led.v] == value) { + return; + } + g_pwm_buffer[led.driver][led.v] = value; + g_pwm_buffer_update_required[led.driver] = true; + } +} + +void is31fl3736_set_value_all(uint8_t value) { + for (int i = 0; i < IS31FL3736_LED_COUNT; i++) { + is31fl3736_set_value(i, value); + } +} + +void is31fl3736_set_led_control_register(uint8_t index, bool value) { + is31fl3736_led_t led; + memcpy_P(&led, (&g_is31fl3736_leds[index]), sizeof(led)); + + // The PWM register for a matrix position (0x00 to 0xBF) is interleaved, so: + // A1=0x00 A2=0x02 A3=0x04 A4=0x06 A5=0x08 A6=0x0A A7=0x0C A8=0x0E + // B1=0x10 B2=0x12 B3=0x14 + // But also, the LED control registers (0x00 to 0x17) are also interleaved, so: + // A1-A4=0x00 A5-A8=0x01 + + uint8_t control_register = led.v / 8; + uint8_t bit_value = led.v % 8; + + if (value) { + g_led_control_registers[led.driver][control_register] |= (1 << bit_value); + } else { + g_led_control_registers[led.driver][control_register] &= ~(1 << bit_value); + } + + g_led_control_registers_update_required[led.driver] = true; +} + +void is31fl3736_update_pwm_buffers(uint8_t addr, uint8_t index) { + if (g_pwm_buffer_update_required[index]) { + // Firstly we need to unlock the command register and select PG1 + is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_PWM); + + is31fl3736_write_pwm_buffer(addr, g_pwm_buffer[index]); + g_pwm_buffer_update_required[index] = false; + } +} + +void is31fl3736_update_led_control_registers(uint8_t addr, uint8_t index) { + if (g_led_control_registers_update_required[index]) { + // Firstly we need to unlock the command register and select PG0 + is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_LEDCONTROL); + for (int i = 0; i < IS31FL3736_LED_CONTROL_REGISTER_COUNT; i++) { + is31fl3736_write_register(addr, i, g_led_control_registers[index][i]); + } + g_led_control_registers_update_required[index] = false; + } +} + +void is31fl3736_flush(void) { + is31fl3736_update_pwm_buffers(IS31FL3736_I2C_ADDRESS_1, 0); +#if defined(IS31FL3736_I2C_ADDRESS_2) + is31fl3736_update_pwm_buffers(IS31FL3736_I2C_ADDRESS_2, 1); +# if defined(IS31FL3736_I2C_ADDRESS_3) + is31fl3736_update_pwm_buffers(IS31FL3736_I2C_ADDRESS_3, 2); +# if defined(IS31FL3736_I2C_ADDRESS_4) + is31fl3736_update_pwm_buffers(IS31FL3736_I2C_ADDRESS_4, 3); +# endif +# endif +#endif +} diff --git a/drivers/led/issi/is31fl3736-simple.h b/drivers/led/issi/is31fl3736-simple.h new file mode 100644 index 0000000000..9ff9c650aa --- /dev/null +++ b/drivers/led/issi/is31fl3736-simple.h @@ -0,0 +1,242 @@ +/* Copyright 2018 Jason Williams (Wilba) + * Copyright 2021 Doni Crosby + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#pragma once + +#include <stdint.h> +#include <stdbool.h> +#include "progmem.h" +#include "util.h" + +// ======== DEPRECATED DEFINES - DO NOT USE ======== +#ifdef ISSI_TIMEOUT +# define IS31FL3736_I2C_TIMEOUT ISSI_TIMEOUT +#endif +#ifdef ISSI_PERSISTENCE +# define IS31FL3736_I2C_PERSISTENCE ISSI_PERSISTENCE +#endif +#ifdef ISSI_SWPULLUP +# define IS31FL3736_SW_PULLUP ISSI_SWPULLUP +#endif +#ifdef ISSI_CSPULLUP +# define IS31FL3736_CS_PULLDOWN ISSI_CSPULLUP +#endif +#ifdef ISSI_GLOBALCURRENT +# define IS31FL3736_GLOBALCURRENT ISSI_GLOBALCURRENT +#endif + +#define is31_led is31fl3736_led_t +#define g_is31_leds g_is31fl3736_leds + +#define PUR_0R IS31FL3736_PUR_0_OHM +#define PUR_05KR IS31FL3736_PUR_05K_OHM +#define PUR_1KR IS31FL3736_PUR_1K_OHM +#define PUR_2KR IS31FL3736_PUR_2K_OHM +#define PUR_4KR IS31FL3736_PUR_4K_OHM +#define PUR_8KR IS31FL3736_PUR_8K_OHM +#define PUR_16KR IS31FL3736_PUR_16K_OHM +#define PUR_32KR IS31FL3736_PUR_32K_OHM +// ======== + +#define IS31FL3736_I2C_ADDRESS_GND_GND 0x50 +#define IS31FL3736_I2C_ADDRESS_GND_SCL 0x51 +#define IS31FL3736_I2C_ADDRESS_GND_SDA 0x52 +#define IS31FL3736_I2C_ADDRESS_GND_VCC 0x53 +#define IS31FL3736_I2C_ADDRESS_SCL_GND 0x54 +#define IS31FL3736_I2C_ADDRESS_SCL_SCL 0x55 +#define IS31FL3736_I2C_ADDRESS_SCL_SDA 0x56 +#define IS31FL3736_I2C_ADDRESS_SCL_VCC 0x57 +#define IS31FL3736_I2C_ADDRESS_SDA_GND 0x58 +#define IS31FL3736_I2C_ADDRESS_SDA_SCL 0x59 +#define IS31FL3736_I2C_ADDRESS_SDA_SDA 0x5A +#define IS31FL3736_I2C_ADDRESS_SDA_VCC 0x5B +#define IS31FL3736_I2C_ADDRESS_VCC_GND 0x5C +#define IS31FL3736_I2C_ADDRESS_VCC_SCL 0x5D +#define IS31FL3736_I2C_ADDRESS_VCC_SDA 0x5E +#define IS31FL3736_I2C_ADDRESS_VCC_VCC 0x5F + +#if defined(LED_MATRIX_IS31FL3736) +# define IS31FL3736_LED_COUNT LED_MATRIX_LED_COUNT +#endif + +#if defined(IS31FL3736_I2C_ADDRESS_4) +# define IS31FL3736_DRIVER_COUNT 4 +#elif defined(IS31FL3736_I2C_ADDRESS_3) +# define IS31FL3736_DRIVER_COUNT 3 +#elif defined(IS31FL3736_I2C_ADDRESS_2) +# define IS31FL3736_DRIVER_COUNT 2 +#elif defined(IS31FL3736_I2C_ADDRESS_1) +# define IS31FL3736_DRIVER_COUNT 1 +#endif + +typedef struct is31fl3736_led_t { + uint8_t driver : 2; + uint8_t v; +} PACKED is31fl3736_led_t; + +extern const is31fl3736_led_t PROGMEM g_is31fl3736_leds[IS31FL3736_LED_COUNT]; + +void is31fl3736_init_drivers(void); +void is31fl3736_init(uint8_t addr); +void is31fl3736_write_register(uint8_t addr, uint8_t reg, uint8_t data); +void is31fl3736_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer); + +void is31fl3736_set_value(int index, uint8_t value); +void is31fl3736_set_value_all(uint8_t value); + +void is31fl3736_set_led_control_register(uint8_t index, bool value); + +// This should not be called from an interrupt +// (eg. from a timer interrupt). +// Call this while idle (in between matrix scans). +// If the buffer is dirty, it will update the driver with the buffer. +void is31fl3736_update_pwm_buffers(uint8_t addr, uint8_t index); +void is31fl3736_update_led_control_registers(uint8_t addr, uint8_t index); + +void is31fl3736_flush(void); + +#define IS31FL3736_PDR_0_OHM 0b000 // No pull-down resistor +#define IS31FL3736_PDR_0K5_OHM 0b001 // 0.5 kOhm resistor +#define IS31FL3736_PDR_1K_OHM 0b010 // 1 kOhm resistor +#define IS31FL3736_PDR_2K_OHM 0b011 // 2 kOhm resistor +#define IS31FL3736_PDR_4K_OHM 0b100 // 4 kOhm resistor +#define IS31FL3736_PDR_8K_OHM 0b101 // 8 kOhm resistor +#define IS31FL3736_PDR_16K_OHM 0b110 // 16 kOhm resistor +#define IS31FL3736_PDR_32K_OHM 0b111 // 32 kOhm resistor + +#define IS31FL3736_PUR_0_OHM 0b000 // No pull-up resistor +#define IS31FL3736_PUR_0K5_OHM 0b001 // 0.5 kOhm resistor +#define IS31FL3736_PUR_1K_OHM 0b010 // 1 kOhm resistor +#define IS31FL3736_PUR_2K_OHM 0b011 // 2 kOhm resistor +#define IS31FL3736_PUR_4K_OHM 0b100 // 4 kOhm resistor +#define IS31FL3736_PUR_8K_OHM 0b101 // 8 kOhm resistor +#define IS31FL3736_PUR_16K_OHM 0b110 // 16 kOhm resistor +#define IS31FL3736_PUR_32K_OHM 0b111 // 32 kOhm resistor + +#define IS31FL3736_PWM_FREQUENCY_8K4_HZ 0b000 +#define IS31FL3736_PWM_FREQUENCY_4K2_HZ 0b001 +#define IS31FL3736_PWM_FREQUENCY_26K7_HZ 0b010 +#define IS31FL3736_PWM_FREQUENCY_2K1_HZ 0b011 +#define IS31FL3736_PWM_FREQUENCY_1K05_HZ 0b100 + +#define A_1 0x00 +#define A_2 0x02 +#define A_3 0x04 +#define A_4 0x06 +#define A_5 0x08 +#define A_6 0x0A +#define A_7 0x0C +#define A_8 0x0E + +#define B_1 0x10 +#define B_2 0x12 +#define B_3 0x14 +#define B_4 0x16 +#define B_5 0x18 +#define B_6 0x1A +#define B_7 0x1C +#define B_8 0x1E + +#define C_1 0x20 +#define C_2 0x22 +#define C_3 0x24 +#define C_4 0x26 +#define C_5 0x28 +#define C_6 0x2A +#define C_7 0x2C +#define C_8 0x2E + +#define D_1 0x30 +#define D_2 0x32 +#define D_3 0x34 +#define D_4 0x36 +#define D_5 0x38 +#define D_6 0x3A +#define D_7 0x3C +#define D_8 0x3E + +#define E_1 0x40 +#define E_2 0x42 +#define E_3 0x44 +#define E_4 0x46 +#define E_5 0x48 +#define E_6 0x4A +#define E_7 0x4C +#define E_8 0x4E + +#define F_1 0x50 +#define F_2 0x52 +#define F_3 0x54 +#define F_4 0x56 +#define F_5 0x58 +#define F_6 0x5A +#define F_7 0x5C +#define F_8 0x5E + +#define G_1 0x60 +#define G_2 0x62 +#define G_3 0x64 +#define G_4 0x66 +#define G_5 0x68 +#define G_6 0x6A +#define G_7 0x6C +#define G_8 0x6E + +#define H_1 0x70 +#define H_2 0x72 +#define H_3 0x74 +#define H_4 0x76 +#define H_5 0x78 +#define H_6 0x7A +#define H_7 0x7C +#define H_8 0x7E + +#define I_1 0x80 +#define I_2 0x82 +#define I_3 0x84 +#define I_4 0x86 +#define I_5 0x88 +#define I_6 0x8A +#define I_7 0x8C +#define I_8 0x8E + +#define J_1 0x90 +#define J_2 0x92 +#define J_3 0x94 +#define J_4 0x96 +#define J_5 0x98 +#define J_6 0x9A +#define J_7 0x9C +#define J_8 0x9E + +#define K_1 0xA0 +#define K_2 0xA2 +#define K_3 0xA4 +#define K_4 0xA6 +#define K_5 0xA8 +#define K_6 0xAA +#define K_7 0xAC +#define K_8 0xAE + +#define L_1 0xB0 +#define L_2 0xB2 +#define L_3 0xB4 +#define L_4 0xB6 +#define L_5 0xB8 +#define L_6 0xBA +#define L_7 0xBC +#define L_8 0xBE diff --git a/drivers/led/issi/is31fl3736.c b/drivers/led/issi/is31fl3736.c index 0de8b3bbae..0e3205f19b 100644 --- a/drivers/led/issi/is31fl3736.c +++ b/drivers/led/issi/is31fl3736.c @@ -16,55 +16,51 @@ */ #include "is31fl3736.h" +#include <string.h> #include "i2c_master.h" #include "wait.h" -// This is a 7-bit address, that gets left-shifted and bit 0 -// set to 0 for write, 1 for read (as per I2C protocol) -// The address will vary depending on your wiring: -// 00 <-> GND -// 01 <-> SCL -// 10 <-> SDA -// 11 <-> VCC -// ADDR1 represents A1:A0 of the 7-bit address. -// ADDR2 represents A3:A2 of the 7-bit address. -// The result is: 0b101(ADDR2)(ADDR1) -#define ISSI_ADDR_DEFAULT 0x50 - -#define ISSI_COMMANDREGISTER 0xFD -#define ISSI_COMMANDREGISTER_WRITELOCK 0xFE -#define ISSI_INTERRUPTMASKREGISTER 0xF0 -#define ISSI_INTERRUPTSTATUSREGISTER 0xF1 - -#define ISSI_PAGE_LEDCONTROL 0x00 // PG0 -#define ISSI_PAGE_PWM 0x01 // PG1 -#define ISSI_PAGE_AUTOBREATH 0x02 // PG2 -#define ISSI_PAGE_FUNCTION 0x03 // PG3 - -#define ISSI_REG_CONFIGURATION 0x00 // PG3 -#define ISSI_REG_GLOBALCURRENT 0x01 // PG3 -#define ISSI_REG_RESET 0x11 // PG3 -#define ISSI_REG_SWPULLUP 0x0F // PG3 -#define ISSI_REG_CSPULLUP 0x10 // PG3 - -#ifndef ISSI_TIMEOUT -# define ISSI_TIMEOUT 100 +#define IS31FL3736_COMMANDREGISTER 0xFD +#define IS31FL3736_COMMANDREGISTER_WRITELOCK 0xFE +#define IS31FL3736_INTERRUPTMASKREGISTER 0xF0 +#define IS31FL3736_INTERRUPTSTATUSREGISTER 0xF1 + +#define IS31FL3736_PAGE_LEDCONTROL 0x00 // PG0 +#define IS31FL3736_PAGE_PWM 0x01 // PG1 +#define IS31FL3736_PAGE_AUTOBREATH 0x02 // PG2 +#define IS31FL3736_PAGE_FUNCTION 0x03 // PG3 + +#define IS31FL3736_REG_CONFIGURATION 0x00 // PG3 +#define IS31FL3736_REG_GLOBALCURRENT 0x01 // PG3 +#define IS31FL3736_REG_RESET 0x11 // PG3 +#define IS31FL3736_REG_SW_PULLUP 0x0F // PG3 +#define IS31FL3736_REG_CS_PULLDOWN 0x10 // PG3 + +#define IS31FL3736_PWM_REGISTER_COUNT 192 // actually 96 +#define IS31FL3736_LED_CONTROL_REGISTER_COUNT 24 + +#ifndef IS31FL3736_I2C_TIMEOUT +# define IS31FL3736_I2C_TIMEOUT 100 #endif -#ifndef ISSI_PERSISTENCE -# define ISSI_PERSISTENCE 0 +#ifndef IS31FL3736_I2C_PERSISTENCE +# define IS31FL3736_I2C_PERSISTENCE 0 #endif -#ifndef ISSI_SWPULLUP -# define ISSI_SWPULLUP PUR_0R +#ifndef IS31FL3736_PWM_FREQUENCY +# define IS31FL3736_PWM_FREQUENCY IS31FL3736_PWM_FREQUENCY_8K4_HZ // PFS - IS31FL3736B only #endif -#ifndef ISSI_CSPULLUP -# define ISSI_CSPULLUP PUR_0R +#ifndef IS31FL3736_SW_PULLUP +# define IS31FL3736_SW_PULLUP IS31FL3736_PUR_0_OHM #endif -#ifndef ISSI_GLOBALCURRENT -# define ISSI_GLOBALCURRENT 0xFF +#ifndef IS31FL3736_CS_PULLDOWN +# define IS31FL3736_CS_PULLDOWN IS31FL3736_PDR_0_OHM +#endif + +#ifndef IS31FL3736_GLOBALCURRENT +# define IS31FL3736_GLOBALCURRENT 0xFF #endif // Transfer buffer for TWITransmitData() @@ -76,22 +72,22 @@ uint8_t g_twi_transfer_buffer[20]; // We could optimize this and take out the unused registers from these // buffers and the transfers in is31fl3736_write_pwm_buffer() but it's // probably not worth the extra complexity. -uint8_t g_pwm_buffer[DRIVER_COUNT][192]; -bool g_pwm_buffer_update_required[DRIVER_COUNT] = {false}; +uint8_t g_pwm_buffer[IS31FL3736_DRIVER_COUNT][IS31FL3736_PWM_REGISTER_COUNT]; +bool g_pwm_buffer_update_required[IS31FL3736_DRIVER_COUNT] = {false}; -uint8_t g_led_control_registers[DRIVER_COUNT][24] = {{0}, {0}}; -bool g_led_control_registers_update_required = false; +uint8_t g_led_control_registers[IS31FL3736_DRIVER_COUNT][IS31FL3736_LED_CONTROL_REGISTER_COUNT] = {0}; +bool g_led_control_registers_update_required[IS31FL3736_DRIVER_COUNT] = {false}; void is31fl3736_write_register(uint8_t addr, uint8_t reg, uint8_t data) { g_twi_transfer_buffer[0] = reg; g_twi_transfer_buffer[1] = data; -#if ISSI_PERSISTENCE > 0 - for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) == 0) break; +#if IS31FL3736_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3736_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, IS31FL3736_I2C_TIMEOUT) == 0) break; } #else - i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT); + i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, IS31FL3736_I2C_TIMEOUT); #endif } @@ -102,23 +98,53 @@ void is31fl3736_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { // g_twi_transfer_buffer[] is 20 bytes // iterate over the pwm_buffer contents at 16 byte intervals - for (int i = 0; i < 192; i += 16) { + for (int i = 0; i < IS31FL3736_PWM_REGISTER_COUNT; i += 16) { g_twi_transfer_buffer[0] = i; // copy the data from i to i+15 // device will auto-increment register for data after the first byte // thus this sets registers 0x00-0x0F, 0x10-0x1F, etc. in one transfer memcpy(g_twi_transfer_buffer + 1, pwm_buffer + i, 16); -#if ISSI_PERSISTENCE > 0 - for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT) == 0) break; +#if IS31FL3736_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3736_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, IS31FL3736_I2C_TIMEOUT) == 0) break; } #else - i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT); + i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, IS31FL3736_I2C_TIMEOUT); #endif } } +void is31fl3736_init_drivers(void) { + i2c_init(); + + is31fl3736_init(IS31FL3736_I2C_ADDRESS_1); +#if defined(IS31FL3736_I2C_ADDRESS_2) + is31fl3736_init(IS31FL3736_I2C_ADDRESS_2); +# if defined(IS31FL3736_I2C_ADDRESS_3) + is31fl3736_init(IS31FL3736_I2C_ADDRESS_3); +# if defined(IS31FL3736_I2C_ADDRESS_4) + is31fl3736_init(IS31FL3736_I2C_ADDRESS_4); +# endif +# endif +#endif + + for (int i = 0; i < IS31FL3736_LED_COUNT; i++) { + is31fl3736_set_led_control_register(i, true, true, true); + } + + is31fl3736_update_led_control_registers(IS31FL3736_I2C_ADDRESS_1, 0); +#if defined(IS31FL3736_I2C_ADDRESS_2) + is31fl3736_update_led_control_registers(IS31FL3736_I2C_ADDRESS_2, 1); +# if defined(IS31FL3736_I2C_ADDRESS_3) + is31fl3736_update_led_control_registers(IS31FL3736_I2C_ADDRESS_3, 2); +# if defined(IS31FL3736_I2C_ADDRESS_4) + is31fl3736_update_led_control_registers(IS31FL3736_I2C_ADDRESS_4, 3); +# endif +# endif +#endif +} + void is31fl3736_init(uint8_t addr) { // In order to avoid the LEDs being driven with garbage data // in the LED driver's PWM registers, shutdown is enabled last. @@ -126,48 +152,48 @@ void is31fl3736_init(uint8_t addr) { // then disable software shutdown. // Unlock the command register. - is31fl3736_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5); // Select PG0 - is31fl3736_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL); + is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_LEDCONTROL); // Turn off all LEDs. - for (int i = 0x00; i <= 0x17; i++) { + for (int i = 0; i < IS31FL3736_LED_CONTROL_REGISTER_COUNT; i++) { is31fl3736_write_register(addr, i, 0x00); } // Unlock the command register. - is31fl3736_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5); // Select PG1 - is31fl3736_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM); + is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_PWM); // Set PWM on all LEDs to 0 // No need to setup Breath registers to PWM as that is the default. - for (int i = 0x00; i <= 0xBF; i++) { + for (int i = 0; i < IS31FL3736_PWM_REGISTER_COUNT; i++) { is31fl3736_write_register(addr, i, 0x00); } // Unlock the command register. - is31fl3736_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5); // Select PG3 - is31fl3736_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_FUNCTION); + is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_FUNCTION); // Set de-ghost pull-up resistors (SWx) - is31fl3736_write_register(addr, ISSI_REG_SWPULLUP, ISSI_SWPULLUP); + is31fl3736_write_register(addr, IS31FL3736_REG_SW_PULLUP, IS31FL3736_SW_PULLUP); // Set de-ghost pull-down resistors (CSx) - is31fl3736_write_register(addr, ISSI_REG_CSPULLUP, ISSI_CSPULLUP); + is31fl3736_write_register(addr, IS31FL3736_REG_CS_PULLDOWN, IS31FL3736_CS_PULLDOWN); // Set global current to maximum. - is31fl3736_write_register(addr, ISSI_REG_GLOBALCURRENT, ISSI_GLOBALCURRENT); + is31fl3736_write_register(addr, IS31FL3736_REG_GLOBALCURRENT, IS31FL3736_GLOBALCURRENT); // Disable software shutdown. - is31fl3736_write_register(addr, ISSI_REG_CONFIGURATION, 0x01); + is31fl3736_write_register(addr, IS31FL3736_REG_CONFIGURATION, ((IS31FL3736_PWM_FREQUENCY & 0b111) << 3) | 0x01); // Wait 10ms to ensure the device has woken up. wait_ms(10); } void is31fl3736_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) { - is31_led led; - if (index >= 0 && index < RGB_MATRIX_LED_COUNT) { - memcpy_P(&led, (&g_is31_leds[index]), sizeof(led)); + is31fl3736_led_t led; + if (index >= 0 && index < IS31FL3736_LED_COUNT) { + memcpy_P(&led, (&g_is31fl3736_leds[index]), sizeof(led)); if (g_pwm_buffer[led.driver][led.r] == red && g_pwm_buffer[led.driver][led.g] == green && g_pwm_buffer[led.driver][led.b] == blue) { return; @@ -180,27 +206,20 @@ void is31fl3736_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) { } void is31fl3736_set_color_all(uint8_t red, uint8_t green, uint8_t blue) { - for (int i = 0; i < RGB_MATRIX_LED_COUNT; i++) { + for (int i = 0; i < IS31FL3736_LED_COUNT; i++) { is31fl3736_set_color(i, red, green, blue); } } void is31fl3736_set_led_control_register(uint8_t index, bool red, bool green, bool blue) { - is31_led led; - memcpy_P(&led, (&g_is31_leds[index]), sizeof(led)); - - // IS31FL3733 - // The PWM register for a matrix position (0x00 to 0xBF) can be - // divided by 8 to get the LED control register (0x00 to 0x17), - // then mod 8 to get the bit position within that register. + is31fl3736_led_t led; + memcpy_P(&led, (&g_is31fl3736_leds[index]), sizeof(led)); - // IS31FL3736 // The PWM register for a matrix position (0x00 to 0xBF) is interleaved, so: // A1=0x00 A2=0x02 A3=0x04 A4=0x06 A5=0x08 A6=0x0A A7=0x0C A8=0x0E // B1=0x10 B2=0x12 B3=0x14 // But also, the LED control registers (0x00 to 0x17) are also interleaved, so: // A1-A4=0x00 A5-A8=0x01 - // So, the same math applies. uint8_t control_register_r = led.r / 8; uint8_t control_register_g = led.g / 8; @@ -226,63 +245,41 @@ void is31fl3736_set_led_control_register(uint8_t index, bool red, bool green, bo g_led_control_registers[led.driver][control_register_b] &= ~(1 << bit_b); } - g_led_control_registers_update_required = true; -} - -void is31fl3736_mono_set_brightness(int index, uint8_t value) { - if (index >= 0 && index < 96) { - // Index in range 0..95 -> A1..A8, B1..B8, etc. - // Map index 0..95 to registers 0x00..0xBE (interleaved) - uint8_t pwm_register = index * 2; - g_pwm_buffer[0][pwm_register] = value; - g_pwm_buffer_update_required[0] = true; - } -} - -void is31fl3736_mono_set_brightness_all(uint8_t value) { - for (int i = 0; i < 96; i++) { - is31fl3736_mono_set_brightness(i, value); - } -} - -void is31fl3736_mono_set_led_control_register(uint8_t index, bool enabled) { - // Index in range 0..95 -> A1..A8, B1..B8, etc. - - // Map index 0..95 to registers 0x00..0xBE (interleaved) - uint8_t pwm_register = index * 2; - // Map register 0x00..0xBE (interleaved) into control register and bit - uint8_t control_register = pwm_register / 8; - uint8_t bit = pwm_register % 8; - - if (enabled) { - g_led_control_registers[0][control_register] |= (1 << bit); - } else { - g_led_control_registers[0][control_register] &= ~(1 << bit); - } - - g_led_control_registers_update_required = true; + g_led_control_registers_update_required[led.driver] = true; } void is31fl3736_update_pwm_buffers(uint8_t addr, uint8_t index) { if (g_pwm_buffer_update_required[index]) { // Firstly we need to unlock the command register and select PG1 - is31fl3736_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); - is31fl3736_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM); + is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_PWM); is31fl3736_write_pwm_buffer(addr, g_pwm_buffer[index]); + g_pwm_buffer_update_required[index] = false; } - g_pwm_buffer_update_required[index] = false; } -void is31fl3736_update_led_control_registers(uint8_t addr1, uint8_t addr2) { - if (g_led_control_registers_update_required) { +void is31fl3736_update_led_control_registers(uint8_t addr, uint8_t index) { + if (g_led_control_registers_update_required[index]) { // Firstly we need to unlock the command register and select PG0 - is31fl3736_write_register(addr1, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); - is31fl3736_write_register(addr1, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL); - for (int i = 0; i < 24; i++) { - is31fl3736_write_register(addr1, i, g_led_control_registers[0][i]); - // is31fl3736_write_register(addr2, i, g_led_control_registers[1][i]); + is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3736_write_register(addr, IS31FL3736_COMMANDREGISTER, IS31FL3736_PAGE_LEDCONTROL); + for (int i = 0; i < IS31FL3736_LED_CONTROL_REGISTER_COUNT; i++) { + is31fl3736_write_register(addr, i, g_led_control_registers[index][i]); } - g_led_control_registers_update_required = false; + g_led_control_registers_update_required[index] = false; } } + +void is31fl3736_flush(void) { + is31fl3736_update_pwm_buffers(IS31FL3736_I2C_ADDRESS_1, 0); +#if defined(IS31FL3736_I2C_ADDRESS_2) + is31fl3736_update_pwm_buffers(IS31FL3736_I2C_ADDRESS_2, 1); +# if defined(IS31FL3736_I2C_ADDRESS_3) + is31fl3736_update_pwm_buffers(IS31FL3736_I2C_ADDRESS_3, 2); +# if defined(IS31FL3736_I2C_ADDRESS_4) + is31fl3736_update_pwm_buffers(IS31FL3736_I2C_ADDRESS_4, 3); +# endif +# endif +#endif +} diff --git a/drivers/led/issi/is31fl3736.h b/drivers/led/issi/is31fl3736.h index 32bdef4a80..c3fa158de7 100644 --- a/drivers/led/issi/is31fl3736.h +++ b/drivers/led/issi/is31fl3736.h @@ -19,29 +19,92 @@ #include <stdint.h> #include <stdbool.h> -#include <string.h> #include "progmem.h" +#include "util.h" -// Simple interface option. -// If these aren't defined, just define them to make it compile +// ======== DEPRECATED DEFINES - DO NOT USE ======== +#ifdef DRIVER_ADDR_1 +# define IS31FL3736_I2C_ADDRESS_1 DRIVER_ADDR_1 +#endif +#ifdef DRIVER_ADDR_2 +# define IS31FL3736_I2C_ADDRESS_2 DRIVER_ADDR_2 +#endif +#ifdef DRIVER_ADDR_3 +# define IS31FL3736_I2C_ADDRESS_3 DRIVER_ADDR_3 +#endif +#ifdef DRIVER_ADDR_4 +# define IS31FL3736_I2C_ADDRESS_4 DRIVER_ADDR_4 +#endif +#ifdef ISSI_TIMEOUT +# define IS31FL3736_I2C_TIMEOUT ISSI_TIMEOUT +#endif +#ifdef ISSI_PERSISTENCE +# define IS31FL3736_I2C_PERSISTENCE ISSI_PERSISTENCE +#endif +#ifdef ISSI_SWPULLUP +# define IS31FL3736_SW_PULLUP ISSI_SWPULLUP +#endif +#ifdef ISSI_CSPULLUP +# define IS31FL3736_CS_PULLDOWN ISSI_CSPULLUP +#endif +#ifdef ISSI_GLOBALCURRENT +# define IS31FL3736_GLOBALCURRENT ISSI_GLOBALCURRENT +#endif + +#define is31_led is31fl3736_led_t +#define g_is31_leds g_is31fl3736_leds + +#define PUR_0R IS31FL3736_PUR_0_OHM +#define PUR_05KR IS31FL3736_PUR_0K5_OHM +#define PUR_1KR IS31FL3736_PUR_1K_OHM +#define PUR_2KR IS31FL3736_PUR_2K_OHM +#define PUR_4KR IS31FL3736_PUR_4K_OHM +#define PUR_8KR IS31FL3736_PUR_8K_OHM +#define PUR_16KR IS31FL3736_PUR_16K_OHM +#define PUR_32KR IS31FL3736_PUR_32K_OHM +// ======== + +#define IS31FL3736_I2C_ADDRESS_GND_GND 0x50 +#define IS31FL3736_I2C_ADDRESS_GND_SCL 0x51 +#define IS31FL3736_I2C_ADDRESS_GND_SDA 0x52 +#define IS31FL3736_I2C_ADDRESS_GND_VCC 0x53 +#define IS31FL3736_I2C_ADDRESS_SCL_GND 0x54 +#define IS31FL3736_I2C_ADDRESS_SCL_SCL 0x55 +#define IS31FL3736_I2C_ADDRESS_SCL_SDA 0x56 +#define IS31FL3736_I2C_ADDRESS_SCL_VCC 0x57 +#define IS31FL3736_I2C_ADDRESS_SDA_GND 0x58 +#define IS31FL3736_I2C_ADDRESS_SDA_SCL 0x59 +#define IS31FL3736_I2C_ADDRESS_SDA_SDA 0x5A +#define IS31FL3736_I2C_ADDRESS_SDA_VCC 0x5B +#define IS31FL3736_I2C_ADDRESS_VCC_GND 0x5C +#define IS31FL3736_I2C_ADDRESS_VCC_SCL 0x5D +#define IS31FL3736_I2C_ADDRESS_VCC_SDA 0x5E +#define IS31FL3736_I2C_ADDRESS_VCC_VCC 0x5F -#ifndef DRIVER_COUNT -# define DRIVER_COUNT 2 +#if defined(RGB_MATRIX_IS31FL3736) +# define IS31FL3736_LED_COUNT RGB_MATRIX_LED_COUNT #endif -#ifndef RGB_MATRIX_LED_COUNT -# define RGB_MATRIX_LED_COUNT 96 +#if defined(IS31FL3736_I2C_ADDRESS_4) +# define IS31FL3736_DRIVER_COUNT 4 +#elif defined(IS31FL3736_I2C_ADDRESS_3) +# define IS31FL3736_DRIVER_COUNT 3 +#elif defined(IS31FL3736_I2C_ADDRESS_2) +# define IS31FL3736_DRIVER_COUNT 2 +#elif defined(IS31FL3736_I2C_ADDRESS_1) +# define IS31FL3736_DRIVER_COUNT 1 #endif -typedef struct is31_led { +typedef struct is31fl3736_led_t { uint8_t driver : 2; uint8_t r; uint8_t g; uint8_t b; -} __attribute__((packed)) is31_led; +} PACKED is31fl3736_led_t; -extern const is31_led PROGMEM g_is31_leds[RGB_MATRIX_LED_COUNT]; +extern const is31fl3736_led_t PROGMEM g_is31fl3736_leds[IS31FL3736_LED_COUNT]; +void is31fl3736_init_drivers(void); void is31fl3736_init(uint8_t addr); void is31fl3736_write_register(uint8_t addr, uint8_t reg, uint8_t data); void is31fl3736_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer); @@ -51,10 +114,6 @@ void is31fl3736_set_color_all(uint8_t red, uint8_t green, uint8_t blue); void is31fl3736_set_led_control_register(uint8_t index, bool red, bool green, bool blue); -void is31fl3736_mono_set_brightness(int index, uint8_t value); -void is31fl3736_mono_set_brightness_all(uint8_t value); -void is31fl3736_mono_set_led_control_register(uint8_t index, bool enabled); - // This should not be called from an interrupt // (eg. from a timer interrupt). // Call this while idle (in between matrix scans). @@ -62,14 +121,31 @@ void is31fl3736_mono_set_led_control_register(uint8_t index, bool enabled); void is31fl3736_update_pwm_buffers(uint8_t addr, uint8_t index); void is31fl3736_update_led_control_registers(uint8_t addr, uint8_t index); -#define PUR_0R 0x00 // No PUR resistor -#define PUR_05KR 0x01 // 0.5k Ohm resistor -#define PUR_1KR 0x02 // 1.0k Ohm resistor -#define PUR_2KR 0x03 // 2.0k Ohm resistor -#define PUR_4KR 0x04 // 4.0k Ohm resistor -#define PUR_8KR 0x05 // 8.0k Ohm resistor -#define PUR_16KR 0x06 // 16k Ohm resistor -#define PUR_32KR 0x07 // 32k Ohm resistor +void is31fl3736_flush(void); + +#define IS31FL3736_PDR_0_OHM 0b000 // No pull-down resistor +#define IS31FL3736_PDR_0K5_OHM 0b001 // 0.5 kOhm resistor +#define IS31FL3736_PDR_1K_OHM 0b010 // 1 kOhm resistor +#define IS31FL3736_PDR_2K_OHM 0b011 // 2 kOhm resistor +#define IS31FL3736_PDR_4K_OHM 0b100 // 4 kOhm resistor +#define IS31FL3736_PDR_8K_OHM 0b101 // 8 kOhm resistor +#define IS31FL3736_PDR_16K_OHM 0b110 // 16 kOhm resistor +#define IS31FL3736_PDR_32K_OHM 0b111 // 32 kOhm resistor + +#define IS31FL3736_PUR_0_OHM 0b000 // No pull-up resistor +#define IS31FL3736_PUR_0K5_OHM 0b001 // 0.5 kOhm resistor +#define IS31FL3736_PUR_1K_OHM 0b010 // 1 kOhm resistor +#define IS31FL3736_PUR_2K_OHM 0b011 // 2 kOhm resistor +#define IS31FL3736_PUR_4K_OHM 0b100 // 4 kOhm resistor +#define IS31FL3736_PUR_8K_OHM 0b101 // 8 kOhm resistor +#define IS31FL3736_PUR_16K_OHM 0b110 // 16 kOhm resistor +#define IS31FL3736_PUR_32K_OHM 0b111 // 32 kOhm resistor + +#define IS31FL3736_PWM_FREQUENCY_8K4_HZ 0b000 +#define IS31FL3736_PWM_FREQUENCY_4K2_HZ 0b001 +#define IS31FL3736_PWM_FREQUENCY_26K7_HZ 0b010 +#define IS31FL3736_PWM_FREQUENCY_2K1_HZ 0b011 +#define IS31FL3736_PWM_FREQUENCY_1K05_HZ 0b100 #define A_1 0x00 #define A_2 0x02 diff --git a/drivers/led/issi/is31fl3737-simple.c b/drivers/led/issi/is31fl3737-simple.c new file mode 100644 index 0000000000..904b7c65bd --- /dev/null +++ b/drivers/led/issi/is31fl3737-simple.c @@ -0,0 +1,265 @@ +/* Copyright 2017 Jason Williams + * Copyright 2018 Jack Humbert + * Copyright 2018 Yiancar + * Copyright 2021 Doni Crosby + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include "is31fl3737-simple.h" +#include <string.h> +#include "i2c_master.h" +#include "wait.h" + +#define IS31FL3737_COMMANDREGISTER 0xFD +#define IS31FL3737_COMMANDREGISTER_WRITELOCK 0xFE +#define IS31FL3737_INTERRUPTMASKREGISTER 0xF0 +#define IS31FL3737_INTERRUPTSTATUSREGISTER 0xF1 + +#define IS31FL3737_PAGE_LEDCONTROL 0x00 // PG0 +#define IS31FL3737_PAGE_PWM 0x01 // PG1 +#define IS31FL3737_PAGE_AUTOBREATH 0x02 // PG2 +#define IS31FL3737_PAGE_FUNCTION 0x03 // PG3 + +#define IS31FL3737_REG_CONFIGURATION 0x00 // PG3 +#define IS31FL3737_REG_GLOBALCURRENT 0x01 // PG3 +#define IS31FL3737_REG_RESET 0x11 // PG3 +#define IS31FL3737_REG_SW_PULLUP 0x0F // PG3 +#define IS31FL3737_REG_CS_PULLDOWN 0x10 // PG3 + +#define IS31FL3737_PWM_REGISTER_COUNT 192 // actually 144 +#define IS31FL3737_LED_CONTROL_REGISTER_COUNT 24 + +#ifndef IS31FL3737_I2C_TIMEOUT +# define IS31FL3737_I2C_TIMEOUT 100 +#endif + +#ifndef IS31FL3737_I2C_PERSISTENCE +# define IS31FL3737_I2C_PERSISTENCE 0 +#endif + +#ifndef IS31FL3737_PWM_FREQUENCY +# define IS31FL3737_PWM_FREQUENCY IS31FL3737_PWM_FREQUENCY_8K4_HZ // PFS - IS31FL3737B only +#endif + +#ifndef IS31FL3737_SW_PULLUP +# define IS31FL3737_SW_PULLUP IS31FL3737_PUR_0_OHM +#endif + +#ifndef IS31FL3737_CS_PULLDOWN +# define IS31FL3737_CS_PULLDOWN IS31FL3737_PDR_0_OHM +#endif + +#ifndef IS31FL3737_GLOBALCURRENT +# define IS31FL3737_GLOBALCURRENT 0xFF +#endif + +// Transfer buffer for TWITransmitData() +uint8_t g_twi_transfer_buffer[20]; + +// These buffers match the IS31FL3737 PWM registers. +// The control buffers match the PG0 LED On/Off registers. +// Storing them like this is optimal for I2C transfers to the registers. +// We could optimize this and take out the unused registers from these +// buffers and the transfers in is31fl3737_write_pwm_buffer() but it's +// probably not worth the extra complexity. + +uint8_t g_pwm_buffer[IS31FL3737_DRIVER_COUNT][IS31FL3737_PWM_REGISTER_COUNT]; +bool g_pwm_buffer_update_required[IS31FL3737_DRIVER_COUNT] = {false}; + +uint8_t g_led_control_registers[IS31FL3737_DRIVER_COUNT][IS31FL3737_LED_CONTROL_REGISTER_COUNT] = {0}; +bool g_led_control_registers_update_required[IS31FL3737_DRIVER_COUNT] = {false}; + +void is31fl3737_write_register(uint8_t addr, uint8_t reg, uint8_t data) { + g_twi_transfer_buffer[0] = reg; + g_twi_transfer_buffer[1] = data; + +#if IS31FL3737_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3737_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, IS31FL3737_I2C_TIMEOUT) == 0) break; + } +#else + i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, IS31FL3737_I2C_TIMEOUT); +#endif +} + +void is31fl3737_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { + // assumes PG1 is already selected + + // transmit PWM registers in 12 transfers of 16 bytes + // g_twi_transfer_buffer[] is 20 bytes + + // iterate over the pwm_buffer contents at 16 byte intervals + for (int i = 0; i < IS31FL3737_PWM_REGISTER_COUNT; i += 16) { + g_twi_transfer_buffer[0] = i; + // copy the data from i to i+15 + // device will auto-increment register for data after the first byte + // thus this sets registers 0x00-0x0F, 0x10-0x1F, etc. in one transfer + memcpy(g_twi_transfer_buffer + 1, pwm_buffer + i, 16); + +#if IS31FL3737_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3737_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, IS31FL3737_I2C_TIMEOUT) == 0) break; + } +#else + i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, IS31FL3737_I2C_TIMEOUT); +#endif + } +} + +void is31fl3737_init_drivers(void) { + i2c_init(); + + is31fl3737_init(IS31FL3737_I2C_ADDRESS_1); +#if defined(IS31FL3737_I2C_ADDRESS_2) + is31fl3737_init(IS31FL3737_I2C_ADDRESS_2); +# if defined(IS31FL3737_I2C_ADDRESS_3) + is31fl3737_init(IS31FL3737_I2C_ADDRESS_3); +# if defined(IS31FL3737_I2C_ADDRESS_4) + is31fl3737_init(IS31FL3737_I2C_ADDRESS_4); +# endif +# endif +#endif + + for (int i = 0; i < IS31FL3737_LED_COUNT; i++) { + is31fl3737_set_led_control_register(i, true); + } + + is31fl3737_update_led_control_registers(IS31FL3737_I2C_ADDRESS_1, 0); +#if defined(IS31FL3737_I2C_ADDRESS_2) + is31fl3737_update_led_control_registers(IS31FL3737_I2C_ADDRESS_2, 1); +# if defined(IS31FL3737_I2C_ADDRESS_3) + is31fl3737_update_led_control_registers(IS31FL3737_I2C_ADDRESS_3, 2); +# if defined(IS31FL3737_I2C_ADDRESS_4) + is31fl3737_update_led_control_registers(IS31FL3737_I2C_ADDRESS_4, 3); +# endif +# endif +#endif +} + +void is31fl3737_init(uint8_t addr) { + // In order to avoid the LEDs being driven with garbage data + // in the LED driver's PWM registers, shutdown is enabled last. + // Set up the mode and other settings, clear the PWM registers, + // then disable software shutdown. + + // Unlock the command register. + is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5); + + // Select PG0 + is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_LEDCONTROL); + // Turn off all LEDs. + for (int i = 0; i < IS31FL3737_LED_CONTROL_REGISTER_COUNT; i++) { + is31fl3737_write_register(addr, i, 0x00); + } + + // Unlock the command register. + is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5); + + // Select PG1 + is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_PWM); + // Set PWM on all LEDs to 0 + // No need to setup Breath registers to PWM as that is the default. + for (int i = 0; i < IS31FL3737_PWM_REGISTER_COUNT; i++) { + is31fl3737_write_register(addr, i, 0x00); + } + + // Unlock the command register. + is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5); + + // Select PG3 + is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_FUNCTION); + // Set de-ghost pull-up resistors (SWx) + is31fl3737_write_register(addr, IS31FL3737_REG_SW_PULLUP, IS31FL3737_SW_PULLUP); + // Set de-ghost pull-down resistors (CSx) + is31fl3737_write_register(addr, IS31FL3737_REG_CS_PULLDOWN, IS31FL3737_CS_PULLDOWN); + // Set global current to maximum. + is31fl3737_write_register(addr, IS31FL3737_REG_GLOBALCURRENT, IS31FL3737_GLOBALCURRENT); + // Disable software shutdown. + is31fl3737_write_register(addr, IS31FL3737_REG_CONFIGURATION, ((IS31FL3737_PWM_FREQUENCY & 0b111) << 3) | 0x01); + + // Wait 10ms to ensure the device has woken up. + wait_ms(10); +} + +void is31fl3737_set_value(int index, uint8_t value) { + is31fl3737_led_t led; + if (index >= 0 && index < IS31FL3737_LED_COUNT) { + memcpy_P(&led, (&g_is31fl3737_leds[index]), sizeof(led)); + + if (g_pwm_buffer[led.driver][led.v] == value) { + return; + } + g_pwm_buffer[led.driver][led.v] = value; + g_pwm_buffer_update_required[led.driver] = true; + } +} + +void is31fl3737_set_value_all(uint8_t value) { + for (int i = 0; i < IS31FL3737_LED_COUNT; i++) { + is31fl3737_set_value(i, value); + } +} + +void is31fl3737_set_led_control_register(uint8_t index, bool value) { + is31fl3737_led_t led; + memcpy_P(&led, (&g_is31fl3737_leds[index]), sizeof(led)); + + uint8_t control_register = led.v / 8; + uint8_t bit_value = led.v % 8; + + if (value) { + g_led_control_registers[led.driver][control_register] |= (1 << bit_value); + } else { + g_led_control_registers[led.driver][control_register] &= ~(1 << bit_value); + } + + g_led_control_registers_update_required[led.driver] = true; +} + +void is31fl3737_update_pwm_buffers(uint8_t addr, uint8_t index) { + if (g_pwm_buffer_update_required[index]) { + // Firstly we need to unlock the command register and select PG1 + is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_PWM); + + is31fl3737_write_pwm_buffer(addr, g_pwm_buffer[index]); + g_pwm_buffer_update_required[index] = false; + } +} + +void is31fl3737_update_led_control_registers(uint8_t addr, uint8_t index) { + if (g_led_control_registers_update_required[index]) { + // Firstly we need to unlock the command register and select PG0 + is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_LEDCONTROL); + for (int i = 0; i < IS31FL3737_LED_CONTROL_REGISTER_COUNT; i++) { + is31fl3737_write_register(addr, i, g_led_control_registers[index][i]); + } + g_led_control_registers_update_required[index] = false; + } +} + +void is31fl3737_flush(void) { + is31fl3737_update_pwm_buffers(IS31FL3737_I2C_ADDRESS_1, 0); +#if defined(IS31FL3737_I2C_ADDRESS_2) + is31fl3737_update_pwm_buffers(IS31FL3737_I2C_ADDRESS_2, 1); +# if defined(IS31FL3737_I2C_ADDRESS_3) + is31fl3737_update_pwm_buffers(IS31FL3737_I2C_ADDRESS_3, 2); +# if defined(IS31FL3737_I2C_ADDRESS_4) + is31fl3737_update_pwm_buffers(IS31FL3737_I2C_ADDRESS_4, 3); +# endif +# endif +#endif +} diff --git a/drivers/led/issi/is31fl3737-simple.h b/drivers/led/issi/is31fl3737-simple.h new file mode 100644 index 0000000000..36125518c6 --- /dev/null +++ b/drivers/led/issi/is31fl3737-simple.h @@ -0,0 +1,280 @@ +/* Copyright 2017 Jason Williams + * Copyright 2018 Jack Humbert + * Copyright 2018 Yiancar + * Copyright 2021 Doni Crosby + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#pragma once + +#include <stdint.h> +#include <stdbool.h> +#include "progmem.h" +#include "util.h" + +// ======== DEPRECATED DEFINES - DO NOT USE ======== +#ifdef ISSI_TIMEOUT +# define IS31FL3737_I2C_TIMEOUT ISSI_TIMEOUT +#endif +#ifdef ISSI_PERSISTENCE +# define IS31FL3737_I2C_PERSISTENCE ISSI_PERSISTENCE +#endif +#ifdef ISSI_PWM_FREQUENCY +# define IS31FL3737_PWM_FREQUENCY ISSI_PWM_FREQUENCY +#endif +#ifdef ISSI_SWPULLUP +# define IS31FL3737_SW_PULLUP ISSI_SWPULLUP +#endif +#ifdef ISSI_CSPULLUP +# define IS31FL3737_CS_PULLDOWN ISSI_CSPULLUP +#endif +#ifdef ISSI_GLOBALCURRENT +# define IS31FL3737_GLOBALCURRENT ISSI_GLOBALCURRENT +#endif + +#define PUR_0R IS31FL3737_PUR_0_OHM +#define PUR_05KR IS31FL3737_PUR_0K5_OHM +#define PUR_1KR IS31FL3737_PUR_1K_OHM +#define PUR_2KR IS31FL3737_PUR_2K_OHM +#define PUR_4KR IS31FL3737_PUR_4K_OHM +#define PUR_8KR IS31FL3737_PUR_8K_OHM +#define PUR_16KR IS31FL3737_PUR_16K_OHM +#define PUR_32KR IS31FL3737_PUR_32K_OHM +// ======== + +#define IS31FL3737_I2C_ADDRESS_GND 0x50 +#define IS31FL3737_I2C_ADDRESS_SCL 0x55 +#define IS31FL3737_I2C_ADDRESS_SDA 0x5A +#define IS31FL3737_I2C_ADDRESS_VCC 0x5F + +#if defined(LED_MATRIX_IS31FL3737) +# define IS31FL3737_LED_COUNT LED_MATRIX_LED_COUNT +#endif + +#if defined(IS31FL3737_I2C_ADDRESS_4) +# define IS31FL3737_DRIVER_COUNT 4 +#elif defined(IS31FL3737_I2C_ADDRESS_3) +# define IS31FL3737_DRIVER_COUNT 3 +#elif defined(IS31FL3737_I2C_ADDRESS_2) +# define IS31FL3737_DRIVER_COUNT 2 +#elif defined(IS31FL3737_I2C_ADDRESS_1) +# define IS31FL3737_DRIVER_COUNT 1 +#endif + +typedef struct is31fl3737_led_t { + uint8_t driver : 2; + uint8_t v; +} PACKED is31fl3737_led_t; + +extern const is31fl3737_led_t PROGMEM g_is31fl3737_leds[IS31FL3737_LED_COUNT]; + +void is31fl3737_init_drivers(void); +void is31fl3737_init(uint8_t addr); +void is31fl3737_write_register(uint8_t addr, uint8_t reg, uint8_t data); +void is31fl3737_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer); + +void is31fl3737_set_value(int index, uint8_t value); +void is31fl3737_set_value_all(uint8_t value); + +void is31fl3737_set_led_control_register(uint8_t index, bool value); + +// This should not be called from an interrupt +// (eg. from a timer interrupt). +// Call this while idle (in between matrix scans). +// If the buffer is dirty, it will update the driver with the buffer. +void is31fl3737_update_pwm_buffers(uint8_t addr, uint8_t index); +void is31fl3737_update_led_control_registers(uint8_t addr, uint8_t index); + +void is31fl3737_flush(void); + +#define IS31FL3737_PDR_0_OHM 0b000 // No pull-down resistor +#define IS31FL3737_PDR_0K5_OHM 0b001 // 0.5 kOhm resistor +#define IS31FL3737_PDR_1K_OHM 0b010 // 1 kOhm resistor +#define IS31FL3737_PDR_2K_OHM 0b011 // 2 kOhm resistor +#define IS31FL3737_PDR_4K_OHM 0b100 // 4 kOhm resistor +#define IS31FL3737_PDR_8K_OHM 0b101 // 8 kOhm resistor +#define IS31FL3737_PDR_16K_OHM 0b110 // 16 kOhm resistor +#define IS31FL3737_PDR_32K_OHM 0b111 // 32 kOhm resistor + +#define IS31FL3737_PUR_0_OHM 0b000 // No pull-up resistor +#define IS31FL3737_PUR_0K5_OHM 0b001 // 0.5 kOhm resistor +#define IS31FL3737_PUR_1K_OHM 0b010 // 1 kOhm resistor +#define IS31FL3737_PUR_2K_OHM 0b011 // 2 kOhm resistor +#define IS31FL3737_PUR_4K_OHM 0b100 // 4 kOhm resistor +#define IS31FL3737_PUR_8K_OHM 0b101 // 8 kOhm resistor +#define IS31FL3737_PUR_16K_OHM 0b110 // 16 kOhm resistor +#define IS31FL3737_PUR_32K_OHM 0b111 // 32 kOhm resistor + +#define IS31FL3737_PWM_FREQUENCY_8K4_HZ 0b000 +#define IS31FL3737_PWM_FREQUENCY_4K2_HZ 0b001 +#define IS31FL3737_PWM_FREQUENCY_26K7_HZ 0b010 +#define IS31FL3737_PWM_FREQUENCY_2K1_HZ 0b011 +#define IS31FL3737_PWM_FREQUENCY_1K05_HZ 0b100 + +#define A_1 0x00 +#define A_2 0x01 +#define A_3 0x02 +#define A_4 0x03 +#define A_5 0x04 +#define A_6 0x05 +#define A_7 0x08 +#define A_8 0x09 +#define A_9 0x0A +#define A_10 0x0B +#define A_11 0x0C +#define A_12 0x0D + +#define B_1 0x10 +#define B_2 0x11 +#define B_3 0x12 +#define B_4 0x13 +#define B_5 0x14 +#define B_6 0x15 +#define B_7 0x18 +#define B_8 0x19 +#define B_9 0x1A +#define B_10 0x1B +#define B_11 0x1C +#define B_12 0x1D + +#define C_1 0x20 +#define C_2 0x21 +#define C_3 0x22 +#define C_4 0x23 +#define C_5 0x24 +#define C_6 0x25 +#define C_7 0x28 +#define C_8 0x29 +#define C_9 0x2A +#define C_10 0x2B +#define C_11 0x2C +#define C_12 0x2D + +#define D_1 0x30 +#define D_2 0x31 +#define D_3 0x32 +#define D_4 0x33 +#define D_5 0x34 +#define D_6 0x35 +#define D_7 0x38 +#define D_8 0x39 +#define D_9 0x3A +#define D_10 0x3B +#define D_11 0x3C +#define D_12 0x3D + +#define E_1 0x40 +#define E_2 0x41 +#define E_3 0x42 +#define E_4 0x43 +#define E_5 0x44 +#define E_6 0x45 +#define E_7 0x48 +#define E_8 0x49 +#define E_9 0x4A +#define E_10 0x4B +#define E_11 0x4C +#define E_12 0x4D + +#define F_1 0x50 +#define F_2 0x51 +#define F_3 0x52 +#define F_4 0x53 +#define F_5 0x54 +#define F_6 0x55 +#define F_7 0x58 +#define F_8 0x59 +#define F_9 0x5A +#define F_10 0x5B +#define F_11 0x5C +#define F_12 0x5D + +#define G_1 0x60 +#define G_2 0x61 +#define G_3 0x62 +#define G_4 0x63 +#define G_5 0x64 +#define G_6 0x65 +#define G_7 0x68 +#define G_8 0x69 +#define G_9 0x6A +#define G_10 0x6B +#define G_11 0x6C +#define G_12 0x6D + +#define H_1 0x70 +#define H_2 0x71 +#define H_3 0x72 +#define H_4 0x73 +#define H_5 0x74 +#define H_6 0x75 +#define H_7 0x78 +#define H_8 0x79 +#define H_9 0x7A +#define H_10 0x7B +#define H_11 0x7C +#define H_12 0x7D + +#define I_1 0x80 +#define I_2 0x81 +#define I_3 0x82 +#define I_4 0x83 +#define I_5 0x84 +#define I_6 0x85 +#define I_7 0x88 +#define I_8 0x89 +#define I_9 0x8A +#define I_10 0x8B +#define I_11 0x8C +#define I_12 0x8D + +#define J_1 0x90 +#define J_2 0x91 +#define J_3 0x92 +#define J_4 0x93 +#define J_5 0x94 +#define J_6 0x95 +#define J_7 0x98 +#define J_8 0x99 +#define J_9 0x9A +#define J_10 0x9B +#define J_11 0x9C +#define J_12 0x9D + +#define K_1 0xA0 +#define K_2 0xA1 +#define K_3 0xA2 +#define K_4 0xA3 +#define K_5 0xA4 +#define K_6 0xA5 +#define K_7 0xA8 +#define K_8 0xA9 +#define K_9 0xAA +#define K_10 0xAB +#define K_11 0xAC +#define K_12 0xAD + +#define L_1 0xB0 +#define L_2 0xB1 +#define L_3 0xB2 +#define L_4 0xB3 +#define L_5 0xB4 +#define L_6 0xB5 +#define L_7 0xB8 +#define L_8 0xB9 +#define L_9 0xBA +#define L_10 0xBB +#define L_11 0xBC +#define L_12 0xBD diff --git a/drivers/led/issi/is31fl3737.c b/drivers/led/issi/is31fl3737.c index 947c0a1d1a..27860558a5 100644 --- a/drivers/led/issi/is31fl3737.c +++ b/drivers/led/issi/is31fl3737.c @@ -18,59 +18,51 @@ */ #include "is31fl3737.h" +#include <string.h> #include "i2c_master.h" #include "wait.h" -// This is a 7-bit address, that gets left-shifted and bit 0 -// set to 0 for write, 1 for read (as per I2C protocol) -// The address will vary depending on your wiring: -// 00 <-> GND -// 01 <-> SCL -// 10 <-> SDA -// 11 <-> VCC -// ADDR1 represents A1:A0 of the 7-bit address. -// ADDR2 represents A3:A2 of the 7-bit address. -// The result is: 0b101(ADDR2)(ADDR1) -#define ISSI_ADDR_DEFAULT 0x50 - -#define ISSI_COMMANDREGISTER 0xFD -#define ISSI_COMMANDREGISTER_WRITELOCK 0xFE -#define ISSI_INTERRUPTMASKREGISTER 0xF0 -#define ISSI_INTERRUPTSTATUSREGISTER 0xF1 - -#define ISSI_PAGE_LEDCONTROL 0x00 // PG0 -#define ISSI_PAGE_PWM 0x01 // PG1 -#define ISSI_PAGE_AUTOBREATH 0x02 // PG2 -#define ISSI_PAGE_FUNCTION 0x03 // PG3 - -#define ISSI_REG_CONFIGURATION 0x00 // PG3 -#define ISSI_REG_GLOBALCURRENT 0x01 // PG3 -#define ISSI_REG_RESET 0x11 // PG3 -#define ISSI_REG_SWPULLUP 0x0F // PG3 -#define ISSI_REG_CSPULLUP 0x10 // PG3 - -#ifndef ISSI_TIMEOUT -# define ISSI_TIMEOUT 100 +#define IS31FL3737_COMMANDREGISTER 0xFD +#define IS31FL3737_COMMANDREGISTER_WRITELOCK 0xFE +#define IS31FL3737_INTERRUPTMASKREGISTER 0xF0 +#define IS31FL3737_INTERRUPTSTATUSREGISTER 0xF1 + +#define IS31FL3737_PAGE_LEDCONTROL 0x00 // PG0 +#define IS31FL3737_PAGE_PWM 0x01 // PG1 +#define IS31FL3737_PAGE_AUTOBREATH 0x02 // PG2 +#define IS31FL3737_PAGE_FUNCTION 0x03 // PG3 + +#define IS31FL3737_REG_CONFIGURATION 0x00 // PG3 +#define IS31FL3737_REG_GLOBALCURRENT 0x01 // PG3 +#define IS31FL3737_REG_RESET 0x11 // PG3 +#define IS31FL3737_REG_SW_PULLUP 0x0F // PG3 +#define IS31FL3737_REG_CS_PULLDOWN 0x10 // PG3 + +#define IS31FL3737_PWM_REGISTER_COUNT 192 // actually 144 +#define IS31FL3737_LED_CONTROL_REGISTER_COUNT 24 + +#ifndef IS31FL3737_I2C_TIMEOUT +# define IS31FL3737_I2C_TIMEOUT 100 #endif -#ifndef ISSI_PERSISTENCE -# define ISSI_PERSISTENCE 0 +#ifndef IS31FL3737_I2C_PERSISTENCE +# define IS31FL3737_I2C_PERSISTENCE 0 #endif -#ifndef ISSI_PWM_FREQUENCY -# define ISSI_PWM_FREQUENCY 0b000 // PFS - IS31FL3737B only +#ifndef IS31FL3737_PWM_FREQUENCY +# define IS31FL3737_PWM_FREQUENCY IS31FL3737_PWM_FREQUENCY_8K4_HZ // PFS - IS31FL3737B only #endif -#ifndef ISSI_SWPULLUP -# define ISSI_SWPULLUP PUR_0R +#ifndef IS31FL3737_SW_PULLUP +# define IS31FL3737_SW_PULLUP IS31FL3737_PUR_0_OHM #endif -#ifndef ISSI_CSPULLUP -# define ISSI_CSPULLUP PUR_0R +#ifndef IS31FL3737_CS_PULLDONW +# define IS31FL3737_CS_PULLDOWN IS31FL3737_PDR_0_OHM #endif -#ifndef ISSI_GLOBALCURRENT -# define ISSI_GLOBALCURRENT 0xFF +#ifndef IS31FL3737_GLOBALCURRENT +# define IS31FL3737_GLOBALCURRENT 0xFF #endif // Transfer buffer for TWITransmitData() @@ -83,22 +75,22 @@ uint8_t g_twi_transfer_buffer[20]; // buffers and the transfers in is31fl3737_write_pwm_buffer() but it's // probably not worth the extra complexity. -uint8_t g_pwm_buffer[DRIVER_COUNT][192]; -bool g_pwm_buffer_update_required[DRIVER_COUNT] = {false}; +uint8_t g_pwm_buffer[IS31FL3737_DRIVER_COUNT][IS31FL3737_PWM_REGISTER_COUNT]; +bool g_pwm_buffer_update_required[IS31FL3737_DRIVER_COUNT] = {false}; -uint8_t g_led_control_registers[DRIVER_COUNT][24] = {0}; -bool g_led_control_registers_update_required[DRIVER_COUNT] = {false}; +uint8_t g_led_control_registers[IS31FL3737_DRIVER_COUNT][IS31FL3737_LED_CONTROL_REGISTER_COUNT] = {0}; +bool g_led_control_registers_update_required[IS31FL3737_DRIVER_COUNT] = {false}; void is31fl3737_write_register(uint8_t addr, uint8_t reg, uint8_t data) { g_twi_transfer_buffer[0] = reg; g_twi_transfer_buffer[1] = data; -#if ISSI_PERSISTENCE > 0 - for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) == 0) break; +#if IS31FL3737_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3737_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, IS31FL3737_I2C_TIMEOUT) == 0) break; } #else - i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT); + i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, IS31FL3737_I2C_TIMEOUT); #endif } @@ -109,21 +101,51 @@ void is31fl3737_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { // g_twi_transfer_buffer[] is 20 bytes // iterate over the pwm_buffer contents at 16 byte intervals - for (int i = 0; i < 192; i += 16) { + for (int i = 0; i < IS31FL3737_PWM_REGISTER_COUNT; i += 16) { g_twi_transfer_buffer[0] = i; // copy the data from i to i+15 // device will auto-increment register for data after the first byte // thus this sets registers 0x00-0x0F, 0x10-0x1F, etc. in one transfer memcpy(g_twi_transfer_buffer + 1, pwm_buffer + i, 16); -#if ISSI_PERSISTENCE > 0 - for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT) == 0) break; +#if IS31FL3737_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3737_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, IS31FL3737_I2C_TIMEOUT) == 0) break; } #else - i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT); + i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, IS31FL3737_I2C_TIMEOUT); +#endif + } +} + +void is31fl3737_init_drivers(void) { + i2c_init(); + + is31fl3737_init(IS31FL3737_I2C_ADDRESS_1); +#if defined(IS31FL3737_I2C_ADDRESS_2) + is31fl3737_init(IS31FL3737_I2C_ADDRESS_2); +# if defined(IS31FL3737_I2C_ADDRESS_3) + is31fl3737_init(IS31FL3737_I2C_ADDRESS_3); +# if defined(IS31FL3737_I2C_ADDRESS_4) + is31fl3737_init(IS31FL3737_I2C_ADDRESS_4); +# endif +# endif #endif + + for (int i = 0; i < IS31FL3737_LED_COUNT; i++) { + is31fl3737_set_led_control_register(i, true, true, true); } + + is31fl3737_update_led_control_registers(IS31FL3737_I2C_ADDRESS_1, 0); +#if defined(IS31FL3737_I2C_ADDRESS_2) + is31fl3737_update_led_control_registers(IS31FL3737_I2C_ADDRESS_2, 1); +# if defined(IS31FL3737_I2C_ADDRESS_3) + is31fl3737_update_led_control_registers(IS31FL3737_I2C_ADDRESS_3, 2); +# if defined(IS31FL3737_I2C_ADDRESS_4) + is31fl3737_update_led_control_registers(IS31FL3737_I2C_ADDRESS_4, 3); +# endif +# endif +#endif } void is31fl3737_init(uint8_t addr) { @@ -133,48 +155,48 @@ void is31fl3737_init(uint8_t addr) { // then disable software shutdown. // Unlock the command register. - is31fl3737_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5); // Select PG0 - is31fl3737_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL); + is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_LEDCONTROL); // Turn off all LEDs. - for (int i = 0x00; i <= 0x17; i++) { + for (int i = 0; i < IS31FL3737_LED_CONTROL_REGISTER_COUNT; i++) { is31fl3737_write_register(addr, i, 0x00); } // Unlock the command register. - is31fl3737_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5); // Select PG1 - is31fl3737_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM); + is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_PWM); // Set PWM on all LEDs to 0 // No need to setup Breath registers to PWM as that is the default. - for (int i = 0x00; i <= 0xBF; i++) { + for (int i = 0; i < IS31FL3737_PWM_REGISTER_COUNT; i++) { is31fl3737_write_register(addr, i, 0x00); } // Unlock the command register. - is31fl3737_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5); // Select PG3 - is31fl3737_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_FUNCTION); + is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_FUNCTION); // Set de-ghost pull-up resistors (SWx) - is31fl3737_write_register(addr, ISSI_REG_SWPULLUP, ISSI_SWPULLUP); + is31fl3737_write_register(addr, IS31FL3737_REG_SW_PULLUP, IS31FL3737_SW_PULLUP); // Set de-ghost pull-down resistors (CSx) - is31fl3737_write_register(addr, ISSI_REG_CSPULLUP, ISSI_CSPULLUP); + is31fl3737_write_register(addr, IS31FL3737_REG_CS_PULLDOWN, IS31FL3737_CS_PULLDOWN); // Set global current to maximum. - is31fl3737_write_register(addr, ISSI_REG_GLOBALCURRENT, ISSI_GLOBALCURRENT); + is31fl3737_write_register(addr, IS31FL3737_REG_GLOBALCURRENT, IS31FL3737_GLOBALCURRENT); // Disable software shutdown. - is31fl3737_write_register(addr, ISSI_REG_CONFIGURATION, ((ISSI_PWM_FREQUENCY & 0b111) << 3) | 0x01); + is31fl3737_write_register(addr, IS31FL3737_REG_CONFIGURATION, ((IS31FL3737_PWM_FREQUENCY & 0b111) << 3) | 0x01); // Wait 10ms to ensure the device has woken up. wait_ms(10); } void is31fl3737_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) { - is31_led led; - if (index >= 0 && index < RGB_MATRIX_LED_COUNT) { - memcpy_P(&led, (&g_is31_leds[index]), sizeof(led)); + is31fl3737_led_t led; + if (index >= 0 && index < IS31FL3737_LED_COUNT) { + memcpy_P(&led, (&g_is31fl3737_leds[index]), sizeof(led)); if (g_pwm_buffer[led.driver][led.r] == red && g_pwm_buffer[led.driver][led.g] == green && g_pwm_buffer[led.driver][led.b] == blue) { return; @@ -187,14 +209,14 @@ void is31fl3737_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) { } void is31fl3737_set_color_all(uint8_t red, uint8_t green, uint8_t blue) { - for (int i = 0; i < RGB_MATRIX_LED_COUNT; i++) { + for (int i = 0; i < IS31FL3737_LED_COUNT; i++) { is31fl3737_set_color(i, red, green, blue); } } void is31fl3737_set_led_control_register(uint8_t index, bool red, bool green, bool blue) { - is31_led led; - memcpy_P(&led, (&g_is31_leds[index]), sizeof(led)); + is31fl3737_led_t led; + memcpy_P(&led, (&g_is31fl3737_leds[index]), sizeof(led)); uint8_t control_register_r = led.r / 8; uint8_t control_register_g = led.g / 8; @@ -225,22 +247,35 @@ void is31fl3737_set_led_control_register(uint8_t index, bool red, bool green, bo void is31fl3737_update_pwm_buffers(uint8_t addr, uint8_t index) { if (g_pwm_buffer_update_required[index]) { // Firstly we need to unlock the command register and select PG1 - is31fl3737_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); - is31fl3737_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM); + is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_PWM); is31fl3737_write_pwm_buffer(addr, g_pwm_buffer[index]); + g_pwm_buffer_update_required[index] = false; } - g_pwm_buffer_update_required[index] = false; } void is31fl3737_update_led_control_registers(uint8_t addr, uint8_t index) { if (g_led_control_registers_update_required[index]) { // Firstly we need to unlock the command register and select PG0 - is31fl3737_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); - is31fl3737_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL); - for (int i = 0; i < 24; i++) { + is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3737_write_register(addr, IS31FL3737_COMMANDREGISTER, IS31FL3737_PAGE_LEDCONTROL); + for (int i = 0; i < IS31FL3737_LED_CONTROL_REGISTER_COUNT; i++) { is31fl3737_write_register(addr, i, g_led_control_registers[index][i]); } + g_led_control_registers_update_required[index] = false; } - g_led_control_registers_update_required[index] = false; +} + +void is31fl3737_flush(void) { + is31fl3737_update_pwm_buffers(IS31FL3737_I2C_ADDRESS_1, 0); +#if defined(IS31FL3737_I2C_ADDRESS_2) + is31fl3737_update_pwm_buffers(IS31FL3737_I2C_ADDRESS_2, 1); +# if defined(IS31FL3737_I2C_ADDRESS_3) + is31fl3737_update_pwm_buffers(IS31FL3737_I2C_ADDRESS_3, 2); +# if defined(IS31FL3737_I2C_ADDRESS_4) + is31fl3737_update_pwm_buffers(IS31FL3737_I2C_ADDRESS_4, 3); +# endif +# endif +#endif } diff --git a/drivers/led/issi/is31fl3737.h b/drivers/led/issi/is31fl3737.h index e7fc97872c..6a2f301052 100644 --- a/drivers/led/issi/is31fl3737.h +++ b/drivers/led/issi/is31fl3737.h @@ -21,18 +21,83 @@ #include <stdint.h> #include <stdbool.h> -#include <string.h> #include "progmem.h" +#include "util.h" -typedef struct is31_led { +// ======== DEPRECATED DEFINES - DO NOT USE ======== +#ifdef DRIVER_ADDR_1 +# define IS31FL3737_I2C_ADDRESS_1 DRIVER_ADDR_1 +#endif +#ifdef DRIVER_ADDR_2 +# define IS31FL3737_I2C_ADDRESS_2 DRIVER_ADDR_2 +#endif +#ifdef DRIVER_ADDR_3 +# define IS31FL3737_I2C_ADDRESS_3 DRIVER_ADDR_3 +#endif +#ifdef DRIVER_ADDR_4 +# define IS31FL3737_I2C_ADDRESS_4 DRIVER_ADDR_4 +#endif +#ifdef ISSI_TIMEOUT +# define IS31FL3737_I2C_TIMEOUT ISSI_TIMEOUT +#endif +#ifdef ISSI_PERSISTENCE +# define IS31FL3737_I2C_PERSISTENCE ISSI_PERSISTENCE +#endif +#ifdef ISSI_PWM_FREQUENCY +# define IS31FL3737_PWM_FREQUENCY ISSI_PWM_FREQUENCY +#endif +#ifdef ISSI_SWPULLUP +# define IS31FL3737_SW_PULLUP ISSI_SWPULLUP +#endif +#ifdef ISSI_CSPULLUP +# define IS31FL3737_CS_PULLDOWN ISSI_CSPULLUP +#endif +#ifdef ISSI_GLOBALCURRENT +# define IS31FL3737_GLOBALCURRENT ISSI_GLOBALCURRENT +#endif + +#define is31_led is31fl3737_led_t +#define g_is31_leds g_is31fl3737_leds + +#define PUR_0R IS31FL3737_PUR_0_OHM +#define PUR_05KR IS31FL3737_PUR_0K5_OHM +#define PUR_1KR IS31FL3737_PUR_1K_OHM +#define PUR_2KR IS31FL3737_PUR_2K_OHM +#define PUR_4KR IS31FL3737_PUR_4K_OHM +#define PUR_8KR IS31FL3737_PUR_8K_OHM +#define PUR_16KR IS31FL3737_PUR_16K_OHM +#define PUR_32KR IS31FL3737_PUR_32K_OHM +// ======== + +#define IS31FL3737_I2C_ADDRESS_GND 0x50 +#define IS31FL3737_I2C_ADDRESS_SCL 0x55 +#define IS31FL3737_I2C_ADDRESS_SDA 0x5A +#define IS31FL3737_I2C_ADDRESS_VCC 0x5F + +#if defined(RGB_MATRIX_IS31FL3737) +# define IS31FL3737_LED_COUNT RGB_MATRIX_LED_COUNT +#endif + +#if defined(IS31FL3737_I2C_ADDRESS_4) +# define IS31FL3737_DRIVER_COUNT 4 +#elif defined(IS31FL3737_I2C_ADDRESS_3) +# define IS31FL3737_DRIVER_COUNT 3 +#elif defined(IS31FL3737_I2C_ADDRESS_2) +# define IS31FL3737_DRIVER_COUNT 2 +#elif defined(IS31FL3737_I2C_ADDRESS_1) +# define IS31FL3737_DRIVER_COUNT 1 +#endif + +typedef struct is31fl3737_led_t { uint8_t driver : 2; uint8_t r; uint8_t g; uint8_t b; -} __attribute__((packed)) is31_led; +} PACKED is31fl3737_led_t; -extern const is31_led PROGMEM g_is31_leds[RGB_MATRIX_LED_COUNT]; +extern const is31fl3737_led_t PROGMEM g_is31fl3737_leds[IS31FL3737_LED_COUNT]; +void is31fl3737_init_drivers(void); void is31fl3737_init(uint8_t addr); void is31fl3737_write_register(uint8_t addr, uint8_t reg, uint8_t data); void is31fl3737_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer); @@ -49,14 +114,31 @@ void is31fl3737_set_led_control_register(uint8_t index, bool red, bool green, bo void is31fl3737_update_pwm_buffers(uint8_t addr, uint8_t index); void is31fl3737_update_led_control_registers(uint8_t addr, uint8_t index); -#define PUR_0R 0x00 // No PUR resistor -#define PUR_05KR 0x01 // 0.5k Ohm resistor in t_NOL -#define PUR_1KR 0x02 // 1.0k Ohm resistor in t_NOL -#define PUR_2KR 0x03 // 2.0k Ohm resistor in t_NOL -#define PUR_4KR 0x04 // 4.0k Ohm resistor in t_NOL -#define PUR_8KR 0x05 // 8.0k Ohm resistor in t_NOL -#define PUR_16KR 0x06 // 16k Ohm resistor in t_NOL -#define PUR_32KR 0x07 // 32k Ohm resistor in t_NOL +void is31fl3737_flush(void); + +#define IS31FL3737_PDR_0_OHM 0b000 // No pull-down resistor +#define IS31FL3737_PDR_0K5_OHM 0b001 // 0.5 kOhm resistor +#define IS31FL3737_PDR_1K_OHM 0b010 // 1 kOhm resistor +#define IS31FL3737_PDR_2K_OHM 0b011 // 2 kOhm resistor +#define IS31FL3737_PDR_4K_OHM 0b100 // 4 kOhm resistor +#define IS31FL3737_PDR_8K_OHM 0b101 // 8 kOhm resistor +#define IS31FL3737_PDR_16K_OHM 0b110 // 16 kOhm resistor +#define IS31FL3737_PDR_32K_OHM 0b111 // 32 kOhm resistor + +#define IS31FL3737_PUR_0_OHM 0b000 // No pull-up resistor +#define IS31FL3737_PUR_0K5_OHM 0b001 // 0.5 kOhm resistor +#define IS31FL3737_PUR_1K_OHM 0b010 // 1 kOhm resistor +#define IS31FL3737_PUR_2K_OHM 0b011 // 2 kOhm resistor +#define IS31FL3737_PUR_4K_OHM 0b100 // 4 kOhm resistor +#define IS31FL3737_PUR_8K_OHM 0b101 // 8 kOhm resistor +#define IS31FL3737_PUR_16K_OHM 0b110 // 16 kOhm resistor +#define IS31FL3737_PUR_32K_OHM 0b111 // 32 kOhm resistor + +#define IS31FL3737_PWM_FREQUENCY_8K4_HZ 0b000 +#define IS31FL3737_PWM_FREQUENCY_4K2_HZ 0b001 +#define IS31FL3737_PWM_FREQUENCY_26K7_HZ 0b010 +#define IS31FL3737_PWM_FREQUENCY_2K1_HZ 0b011 +#define IS31FL3737_PWM_FREQUENCY_1K05_HZ 0b100 #define A_1 0x00 #define A_2 0x01 diff --git a/drivers/led/issi/is31fl3741-simple.c b/drivers/led/issi/is31fl3741-simple.c new file mode 100644 index 0000000000..582551c05e --- /dev/null +++ b/drivers/led/issi/is31fl3741-simple.c @@ -0,0 +1,296 @@ +/* Copyright 2017 Jason Williams + * Copyright 2018 Jack Humbert + * Copyright 2018 Yiancar + * Copyright 2020 MelGeek + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include "is31fl3741-simple.h" +#include <string.h> +#include "i2c_master.h" +#include "wait.h" + +#define IS31FL3741_COMMANDREGISTER 0xFD +#define IS31FL3741_COMMANDREGISTER_WRITELOCK 0xFE +#define IS31FL3741_INTERRUPTMASKREGISTER 0xF0 +#define IS31FL3741_INTERRUPTSTATUSREGISTER 0xF1 +#define IS31FL3741_IDREGISTER 0xFC + +#define IS31FL3741_PAGE_PWM0 0x00 // PG0 +#define IS31FL3741_PAGE_PWM1 0x01 // PG1 +#define IS31FL3741_PAGE_SCALING_0 0x02 // PG2 +#define IS31FL3741_PAGE_SCALING_1 0x03 // PG3 +#define IS31FL3741_PAGE_FUNCTION 0x04 // PG4 + +#define IS31FL3741_REG_CONFIGURATION 0x00 // PG4 +#define IS31FL3741_REG_GLOBALCURRENT 0x01 // PG4 +#define IS31FL3741_REG_PULLDOWNUP 0x02 // PG4 +#define IS31FL3741_REG_PWM_FREQUENCY 0x36 // PG4 +#define IS31FL3741_REG_RESET 0x3F // PG4 + +#define IS31FL3741_PWM_REGISTER_COUNT 351 + +#ifndef IS31FL3741_I2C_TIMEOUT +# define IS31FL3741_I2C_TIMEOUT 100 +#endif + +#ifndef IS31FL3741_I2C_PERSISTENCE +# define IS31FL3741_I2C_PERSISTENCE 0 +#endif + +#ifndef IS31FL3741_CONFIGURATION +# define IS31FL3741_CONFIGURATION 0x01 +#endif + +#ifndef IS31FL3741_PWM_FREQUENCY +# define IS31FL3741_PWM_FREQUENCY IS31FL3741_PWM_FREQUENCY_29K_HZ +#endif + +#ifndef IS31FL3741_SW_PULLUP +# define IS31FL3741_SW_PULLUP IS31FL3741_PUR_32K_OHM +#endif + +#ifndef IS31FL3741_CS_PULLDOWN +# define IS31FL3741_CS_PULLDOWN IS31FL3741_PDR_32K_OHM +#endif + +#ifndef IS31FL3741_GLOBALCURRENT +# define IS31FL3741_GLOBALCURRENT 0xFF +#endif + +// Transfer buffer for TWITransmitData() +uint8_t g_twi_transfer_buffer[20] = {0xFF}; + +// These buffers match the IS31FL3741 and IS31FL3741A PWM registers. +// The scaling buffers match the PG2 and PG3 LED On/Off registers. +// Storing them like this is optimal for I2C transfers to the registers. +// We could optimize this and take out the unused registers from these +// buffers and the transfers in is31fl3741_write_pwm_buffer() but it's +// probably not worth the extra complexity. +uint8_t g_pwm_buffer[IS31FL3741_DRIVER_COUNT][IS31FL3741_PWM_REGISTER_COUNT]; +bool g_pwm_buffer_update_required[IS31FL3741_DRIVER_COUNT] = {false}; +bool g_scaling_registers_update_required[IS31FL3741_DRIVER_COUNT] = {false}; + +uint8_t g_scaling_registers[IS31FL3741_DRIVER_COUNT][IS31FL3741_PWM_REGISTER_COUNT]; + +void is31fl3741_write_register(uint8_t addr, uint8_t reg, uint8_t data) { + g_twi_transfer_buffer[0] = reg; + g_twi_transfer_buffer[1] = data; + +#if IS31FL3741_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3741_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, IS31FL3741_I2C_TIMEOUT) == 0) break; + } +#else + i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, IS31FL3741_I2C_TIMEOUT); +#endif +} + +bool is31fl3741_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { + // Assume PG0 is already selected + + for (int i = 0; i < 342; i += 18) { + if (i == 180) { + // unlock the command register and select PG1 + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_PWM1); + } + + g_twi_transfer_buffer[0] = i % 180; + memcpy(g_twi_transfer_buffer + 1, pwm_buffer + i, 18); + +#if IS31FL3741_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3741_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 19, IS31FL3741_I2C_TIMEOUT) != 0) { + return false; + } + } +#else + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 19, IS31FL3741_I2C_TIMEOUT) != 0) { + return false; + } +#endif + } + + // transfer the left cause the total number is 351 + g_twi_transfer_buffer[0] = 162; + memcpy(g_twi_transfer_buffer + 1, pwm_buffer + 342, 9); + +#if IS31FL3741_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3741_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 10, IS31FL3741_I2C_TIMEOUT) != 0) { + return false; + } + } +#else + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 10, IS31FL3741_I2C_TIMEOUT) != 0) { + return false; + } +#endif + + return true; +} + +void is31fl3741_init_drivers(void) { + i2c_init(); + + is31fl3741_init(IS31FL3741_I2C_ADDRESS_1); +#if defined(IS31FL3741_I2C_ADDRESS_2) + is31fl3741_init(IS31FL3741_I2C_ADDRESS_2); +# if defined(IS31FL3741_I2C_ADDRESS_3) + is31fl3741_init(IS31FL3741_I2C_ADDRESS_3); +# if defined(IS31FL3741_I2C_ADDRESS_4) + is31fl3741_init(IS31FL3741_I2C_ADDRESS_4); +# endif +# endif +#endif + + for (int i = 0; i < IS31FL3741_LED_COUNT; i++) { + is31fl3741_set_led_control_register(i, true); + } + + is31fl3741_update_led_control_registers(IS31FL3741_I2C_ADDRESS_1, 0); +#if defined(IS31FL3741_I2C_ADDRESS_2) + is31fl3741_update_led_control_registers(IS31FL3741_I2C_ADDRESS_2, 1); +# if defined(IS31FL3741_I2C_ADDRESS_3) + is31fl3741_update_led_control_registers(IS31FL3741_I2C_ADDRESS_3, 2); +# if defined(IS31FL3741_I2C_ADDRESS_4) + is31fl3741_update_led_control_registers(IS31FL3741_I2C_ADDRESS_4, 3); +# endif +# endif +#endif +} + +void is31fl3741_init(uint8_t addr) { + // In order to avoid the LEDs being driven with garbage data + // in the LED driver's PWM registers, shutdown is enabled last. + // Set up the mode and other settings, clear the PWM registers, + // then disable software shutdown. + // Unlock the command register. + + // Unlock the command register. + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); + + // Select PG4 + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_FUNCTION); + + // Set to Normal operation + is31fl3741_write_register(addr, IS31FL3741_REG_CONFIGURATION, IS31FL3741_CONFIGURATION); + + // Set Golbal Current Control Register + is31fl3741_write_register(addr, IS31FL3741_REG_GLOBALCURRENT, IS31FL3741_GLOBALCURRENT); + // Set Pull up & Down for SWx CSy + is31fl3741_write_register(addr, IS31FL3741_REG_PULLDOWNUP, ((IS31FL3741_CS_PULLDOWN << 4) | IS31FL3741_SW_PULLUP)); + // Set PWM frequency + is31fl3741_write_register(addr, IS31FL3741_REG_PWM_FREQUENCY, (IS31FL3741_PWM_FREQUENCY & 0b1111)); + + // is31fl3741_update_led_scaling_registers(addr, 0xFF, 0xFF, 0xFF); + + // Wait 10ms to ensure the device has woken up. + wait_ms(10); +} + +void is31fl3741_set_value(int index, uint8_t value) { + is31fl3741_led_t led; + if (index >= 0 && index < IS31FL3741_LED_COUNT) { + memcpy_P(&led, (&g_is31fl3741_leds[index]), sizeof(led)); + + if (g_pwm_buffer[led.driver][led.v] == value) { + return; + } + g_pwm_buffer_update_required[led.driver] = true; + g_pwm_buffer[led.driver][led.v] = value; + } +} + +void is31fl3741_set_value_all(uint8_t value) { + for (int i = 0; i < IS31FL3741_LED_COUNT; i++) { + is31fl3741_set_value(i, value); + } +} + +void is31fl3741_set_led_control_register(uint8_t index, bool value) { + is31fl3741_led_t led; + memcpy_P(&led, (&g_is31fl3741_leds[index]), sizeof(led)); + + if (value) { + g_scaling_registers[led.driver][led.v] = 0xFF; + } else { + g_scaling_registers[led.driver][led.v] = 0x00; + } + + g_scaling_registers_update_required[led.driver] = true; +} + +void is31fl3741_update_pwm_buffers(uint8_t addr, uint8_t index) { + if (g_pwm_buffer_update_required[index]) { + // unlock the command register and select PG2 + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_PWM0); + + is31fl3741_write_pwm_buffer(addr, g_pwm_buffer[index]); + } + + g_pwm_buffer_update_required[index] = false; +} + +void is31fl3741_set_pwm_buffer(const is31fl3741_led_t *pled, uint8_t value) { + g_pwm_buffer[pled->driver][pled->v] = value; + + g_pwm_buffer_update_required[pled->driver] = true; +} + +void is31fl3741_update_led_control_registers(uint8_t addr, uint8_t index) { + if (g_scaling_registers_update_required[index]) { + // unlock the command register and select PG2 + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_SCALING_0); + + // CS1_SW1 to CS30_SW6 are on PG2 + for (int i = CS1_SW1; i <= CS30_SW6; ++i) { + is31fl3741_write_register(addr, i, g_scaling_registers[index][i]); + } + + // unlock the command register and select PG3 + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_SCALING_1); + + // CS1_SW7 to CS39_SW9 are on PG3 + for (int i = CS1_SW7; i <= CS39_SW9; ++i) { + is31fl3741_write_register(addr, i - CS1_SW7, g_scaling_registers[index][i]); + } + + g_scaling_registers_update_required[index] = false; + } +} + +void is31fl3741_set_scaling_registers(const is31fl3741_led_t *pled, uint8_t value) { + g_scaling_registers[pled->driver][pled->v] = value; + + g_scaling_registers_update_required[pled->driver] = true; +} + +void is31fl3741_flush(void) { + is31fl3741_update_pwm_buffers(IS31FL3741_I2C_ADDRESS_1, 0); +#if defined(IS31FL3741_I2C_ADDRESS_2) + is31fl3741_update_pwm_buffers(IS31FL3741_I2C_ADDRESS_2, 1); +# if defined(IS31FL3741_I2C_ADDRESS_3) + is31fl3741_update_pwm_buffers(IS31FL3741_I2C_ADDRESS_3, 2); +# if defined(IS31FL3741_I2C_ADDRESS_4) + is31fl3741_update_pwm_buffers(IS31FL3741_I2C_ADDRESS_4, 3); +# endif +# endif +#endif +} diff --git a/drivers/led/issi/is31fl3741-simple.h b/drivers/led/issi/is31fl3741-simple.h new file mode 100644 index 0000000000..04f0c2793a --- /dev/null +++ b/drivers/led/issi/is31fl3741-simple.h @@ -0,0 +1,495 @@ +/* Copyright 2017 Jason Williams + * Copyright 2018 Jack Humbert + * Copyright 2018 Yiancar + * Copyright 2020 MelGeek + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#pragma once + +#include <stdint.h> +#include <stdbool.h> +#include "progmem.h" +#include "util.h" + +// ======== DEPRECATED DEFINES - DO NOT USE ======== +#ifdef ISSI_TIMEOUT +# define IS31FL3741_I2C_TIMEOUT ISSI_TIMEOUT +#endif +#ifdef ISSI_PERSISTENCE +# define IS31FL3741_I2C_PERSISTENCE ISSI_PERSISTENCE +#endif +#ifdef ISSI_CONFIGURATION +# define IS31FL3741_CONFIGURATION ISSI_CONFIGURATION +#endif +#ifdef ISSI_SWPULLUP +# define IS31FL3741_SW_PULLUP ISSI_SWPULLUP +#endif +#ifdef ISSI_CSPULLUP +# define IS31FL3741_CS_PULLDOWN ISSI_CSPULLUP +#endif +#ifdef ISSI_GLOBALCURRENT +# define IS31FL3741_GLOBALCURRENT ISSI_GLOBALCURRENT +#endif + +#define PUR_0R IS31FL3741_PUR_0_OHM +#define PUR_05KR IS31FL3741_PUR_0K5_OHM +#define PUR_1KR IS31FL3741_PUR_1K_OHM +#define PUR_2KR IS31FL3741_PUR_2K_OHM +#define PUR_4KR IS31FL3741_PUR_4K_OHM +#define PUR_8KR IS31FL3741_PUR_8K_OHM +#define PUR_16KR IS31FL3741_PUR_16K_OHM +#define PUR_32KR IS31FL3741_PUR_32K_OHM +// ======== + +#define IS31FL3741_I2C_ADDRESS_GND 0x30 +#define IS31FL3741_I2C_ADDRESS_SCL 0x31 +#define IS31FL3741_I2C_ADDRESS_SDA 0x32 +#define IS31FL3741_I2C_ADDRESS_VCC 0x33 + +#if defined(LED_MATRIX_IS31FL3741) +# define IS31FL3741_LED_COUNT LED_MATRIX_LED_COUNT +#endif + +#if defined(IS31FL3741_I2C_ADDRESS_4) +# define IS31FL3741_DRIVER_COUNT 4 +#elif defined(IS31FL3741_I2C_ADDRESS_3) +# define IS31FL3741_DRIVER_COUNT 3 +#elif defined(IS31FL3741_I2C_ADDRESS_2) +# define IS31FL3741_DRIVER_COUNT 2 +#elif defined(IS31FL3741_I2C_ADDRESS_1) +# define IS31FL3741_DRIVER_COUNT 1 +#endif + +typedef struct is31fl3741_led_t { + uint8_t driver : 2; + uint16_t v : 9; +} PACKED is31fl3741_led_t; + +extern const is31fl3741_led_t PROGMEM g_is31fl3741_leds[IS31FL3741_LED_COUNT]; + +void is31fl3741_init_drivers(void); +void is31fl3741_init(uint8_t addr); +void is31fl3741_write_register(uint8_t addr, uint8_t reg, uint8_t data); +bool is31fl3741_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer); + +void is31fl3741_set_value(int index, uint8_t value); +void is31fl3741_set_value_all(uint8_t value); + +void is31fl3741_set_led_control_register(uint8_t index, bool value); + +// This should not be called from an interrupt +// (eg. from a timer interrupt). +// Call this while idle (in between matrix scans). +// If the buffer is dirty, it will update the driver with the buffer. +void is31fl3741_update_pwm_buffers(uint8_t addr, uint8_t index); +void is31fl3741_update_led_control_registers(uint8_t addr, uint8_t index); +void is31fl3741_set_scaling_registers(const is31fl3741_led_t *pled, uint8_t value); + +void is31fl3741_set_pwm_buffer(const is31fl3741_led *pled, uint8_t value); + +void is31fl3741_flush(void); + +#define IS31FL3741_PDR_0_OHM 0b000 // No pull-down resistor +#define IS31FL3741_PDR_0K5_OHM 0b001 // 0.5 kOhm resistor +#define IS31FL3741_PDR_1K_OHM 0b010 // 1 kOhm resistor +#define IS31FL3741_PDR_2K_OHM 0b011 // 2 kOhm resistor +#define IS31FL3741_PDR_4K_OHM 0b100 // 4 kOhm resistor +#define IS31FL3741_PDR_8K_OHM 0b101 // 8 kOhm resistor +#define IS31FL3741_PDR_16K_OHM 0b110 // 16 kOhm resistor +#define IS31FL3741_PDR_32K_OHM 0b111 // 32 kOhm resistor + +#define IS31FL3741_PUR_0_OHM 0b000 // No pull-up resistor +#define IS31FL3741_PUR_0K5_OHM 0b001 // 0.5 kOhm resistor +#define IS31FL3741_PUR_1K_OHM 0b010 // 1 kOhm resistor +#define IS31FL3741_PUR_2K_OHM 0b011 // 2 kOhm resistor +#define IS31FL3741_PUR_4K_OHM 0b100 // 4 kOhm resistor +#define IS31FL3741_PUR_8K_OHM 0b101 // 8 kOhm resistor +#define IS31FL3741_PUR_16K_OHM 0b110 // 16 kOhm resistor +#define IS31FL3741_PUR_32K_OHM 0b111 // 32 kOhm resistor + +#define IS31FL3741_PWM_FREQUENCY_29K_HZ 0b0000 +#define IS31FL3741_PWM_FREQUENCY_3K6_HZ 0b0011 +#define IS31FL3741_PWM_FREQUENCY_1K8_HZ 0b0111 +#define IS31FL3741_PWM_FREQUENCY_900_HZ 0b1011 + +#define CS1_SW1 0x00 +#define CS2_SW1 0x01 +#define CS3_SW1 0x02 +#define CS4_SW1 0x03 +#define CS5_SW1 0x04 +#define CS6_SW1 0x05 +#define CS7_SW1 0x06 +#define CS8_SW1 0x07 +#define CS9_SW1 0x08 +#define CS10_SW1 0x09 +#define CS11_SW1 0x0A +#define CS12_SW1 0x0B +#define CS13_SW1 0x0C +#define CS14_SW1 0x0D +#define CS15_SW1 0x0E +#define CS16_SW1 0x0F +#define CS17_SW1 0x10 +#define CS18_SW1 0x11 +#define CS19_SW1 0x12 +#define CS20_SW1 0x13 +#define CS21_SW1 0x14 +#define CS22_SW1 0x15 +#define CS23_SW1 0x16 +#define CS24_SW1 0x17 +#define CS25_SW1 0x18 +#define CS26_SW1 0x19 +#define CS27_SW1 0x1A +#define CS28_SW1 0x1B +#define CS29_SW1 0x1C +#define CS30_SW1 0x1D + +#define CS1_SW2 0x1E +#define CS2_SW2 0x1F +#define CS3_SW2 0x20 +#define CS4_SW2 0x21 +#define CS5_SW2 0x22 +#define CS6_SW2 0x23 +#define CS7_SW2 0x24 +#define CS8_SW2 0x25 +#define CS9_SW2 0x26 +#define CS10_SW2 0x27 +#define CS11_SW2 0x28 +#define CS12_SW2 0x29 +#define CS13_SW2 0x2A +#define CS14_SW2 0x2B +#define CS15_SW2 0x2C +#define CS16_SW2 0x2D +#define CS17_SW2 0x2E +#define CS18_SW2 0x2F +#define CS19_SW2 0x30 +#define CS20_SW2 0x31 +#define CS21_SW2 0x32 +#define CS22_SW2 0x33 +#define CS23_SW2 0x34 +#define CS24_SW2 0x35 +#define CS25_SW2 0x36 +#define CS26_SW2 0x37 +#define CS27_SW2 0x38 +#define CS28_SW2 0x39 +#define CS29_SW2 0x3A +#define CS30_SW2 0x3B + +#define CS1_SW3 0x3C +#define CS2_SW3 0x3D +#define CS3_SW3 0x3E +#define CS4_SW3 0x3F +#define CS5_SW3 0x40 +#define CS6_SW3 0x41 +#define CS7_SW3 0x42 +#define CS8_SW3 0x43 +#define CS9_SW3 0x44 +#define CS10_SW3 0x45 +#define CS11_SW3 0x46 +#define CS12_SW3 0x47 +#define CS13_SW3 0x48 +#define CS14_SW3 0x49 +#define CS15_SW3 0x4A +#define CS16_SW3 0x4B +#define CS17_SW3 0x4C +#define CS18_SW3 0x4D +#define CS19_SW3 0x4E +#define CS20_SW3 0x4F +#define CS21_SW3 0x50 +#define CS22_SW3 0x51 +#define CS23_SW3 0x52 +#define CS24_SW3 0x53 +#define CS25_SW3 0x54 +#define CS26_SW3 0x55 +#define CS27_SW3 0x56 +#define CS28_SW3 0x57 +#define CS29_SW3 0x58 +#define CS30_SW3 0x59 + +#define CS1_SW4 0x5A +#define CS2_SW4 0x5B +#define CS3_SW4 0x5C +#define CS4_SW4 0x5D +#define CS5_SW4 0x5E +#define CS6_SW4 0x5F +#define CS7_SW4 0x60 +#define CS8_SW4 0x61 +#define CS9_SW4 0x62 +#define CS10_SW4 0x63 +#define CS11_SW4 0x64 +#define CS12_SW4 0x65 +#define CS13_SW4 0x66 +#define CS14_SW4 0x67 +#define CS15_SW4 0x68 +#define CS16_SW4 0x69 +#define CS17_SW4 0x6A +#define CS18_SW4 0x6B +#define CS19_SW4 0x6C +#define CS20_SW4 0x6D +#define CS21_SW4 0x6E +#define CS22_SW4 0x6F +#define CS23_SW4 0x70 +#define CS24_SW4 0x71 +#define CS25_SW4 0x72 +#define CS26_SW4 0x73 +#define CS27_SW4 0x74 +#define CS28_SW4 0x75 +#define CS29_SW4 0x76 +#define CS30_SW4 0x77 + +#define CS1_SW5 0x78 +#define CS2_SW5 0x79 +#define CS3_SW5 0x7A +#define CS4_SW5 0x7B +#define CS5_SW5 0x7C +#define CS6_SW5 0x7D +#define CS7_SW5 0x7E +#define CS8_SW5 0x7F +#define CS9_SW5 0x80 +#define CS10_SW5 0x81 +#define CS11_SW5 0x82 +#define CS12_SW5 0x83 +#define CS13_SW5 0x84 +#define CS14_SW5 0x85 +#define CS15_SW5 0x86 +#define CS16_SW5 0x87 +#define CS17_SW5 0x88 +#define CS18_SW5 0x89 +#define CS19_SW5 0x8A +#define CS20_SW5 0x8B +#define CS21_SW5 0x8C +#define CS22_SW5 0x8D +#define CS23_SW5 0x8E +#define CS24_SW5 0x8F +#define CS25_SW5 0x90 +#define CS26_SW5 0x91 +#define CS27_SW5 0x92 +#define CS28_SW5 0x93 +#define CS29_SW5 0x94 +#define CS30_SW5 0x95 + +#define CS1_SW6 0x96 +#define CS2_SW6 0x97 +#define CS3_SW6 0x98 +#define CS4_SW6 0x99 +#define CS5_SW6 0x9A +#define CS6_SW6 0x9B +#define CS7_SW6 0x9C +#define CS8_SW6 0x9D +#define CS9_SW6 0x9E +#define CS10_SW6 0x9F +#define CS11_SW6 0xA0 +#define CS12_SW6 0xA1 +#define CS13_SW6 0xA2 +#define CS14_SW6 0xA3 +#define CS15_SW6 0xA4 +#define CS16_SW6 0xA5 +#define CS17_SW6 0xA6 +#define CS18_SW6 0xA7 +#define CS19_SW6 0xA8 +#define CS20_SW6 0xA9 +#define CS21_SW6 0xAA +#define CS22_SW6 0xAB +#define CS23_SW6 0xAC +#define CS24_SW6 0xAD +#define CS25_SW6 0xAE +#define CS26_SW6 0xAF +#define CS27_SW6 0xB0 +#define CS28_SW6 0xB1 +#define CS29_SW6 0xB2 +#define CS30_SW6 0xB3 + +#define CS1_SW7 0xB4 +#define CS2_SW7 0xB5 +#define CS3_SW7 0xB6 +#define CS4_SW7 0xB7 +#define CS5_SW7 0xB8 +#define CS6_SW7 0xB9 +#define CS7_SW7 0xBA +#define CS8_SW7 0xBB +#define CS9_SW7 0xBC +#define CS10_SW7 0xBD +#define CS11_SW7 0xBE +#define CS12_SW7 0xBF +#define CS13_SW7 0xC0 +#define CS14_SW7 0xC1 +#define CS15_SW7 0xC2 +#define CS16_SW7 0xC3 +#define CS17_SW7 0xC4 +#define CS18_SW7 0xC5 +#define CS19_SW7 0xC6 +#define CS20_SW7 0xC7 +#define CS21_SW7 0xC8 +#define CS22_SW7 0xC9 +#define CS23_SW7 0xCA +#define CS24_SW7 0xCB +#define CS25_SW7 0xCC +#define CS26_SW7 0xCD +#define CS27_SW7 0xCE +#define CS28_SW7 0xCF +#define CS29_SW7 0xD0 +#define CS30_SW7 0xD1 + +#define CS1_SW8 0xD2 +#define CS2_SW8 0xD3 +#define CS3_SW8 0xD4 +#define CS4_SW8 0xD5 +#define CS5_SW8 0xD6 +#define CS6_SW8 0xD7 +#define CS7_SW8 0xD8 +#define CS8_SW8 0xD9 +#define CS9_SW8 0xDA +#define CS10_SW8 0xDB +#define CS11_SW8 0xDC +#define CS12_SW8 0xDD +#define CS13_SW8 0xDE +#define CS14_SW8 0xDF +#define CS15_SW8 0xE0 +#define CS16_SW8 0xE1 +#define CS17_SW8 0xE2 +#define CS18_SW8 0xE3 +#define CS19_SW8 0xE4 +#define CS20_SW8 0xE5 +#define CS21_SW8 0xE6 +#define CS22_SW8 0xE7 +#define CS23_SW8 0xE8 +#define CS24_SW8 0xE9 +#define CS25_SW8 0xEA +#define CS26_SW8 0xEB +#define CS27_SW8 0xEC +#define CS28_SW8 0xED +#define CS29_SW8 0xEE +#define CS30_SW8 0xEF + +#define CS1_SW9 0xF0 +#define CS2_SW9 0xF1 +#define CS3_SW9 0xF2 +#define CS4_SW9 0xF3 +#define CS5_SW9 0xF4 +#define CS6_SW9 0xF5 +#define CS7_SW9 0xF6 +#define CS8_SW9 0xF7 +#define CS9_SW9 0xF8 +#define CS10_SW9 0xF9 +#define CS11_SW9 0xFA +#define CS12_SW9 0xFB +#define CS13_SW9 0xFC +#define CS14_SW9 0xFD +#define CS15_SW9 0xFE +#define CS16_SW9 0xFF +#define CS17_SW9 0x100 +#define CS18_SW9 0x101 +#define CS19_SW9 0x102 +#define CS20_SW9 0x103 +#define CS21_SW9 0x104 +#define CS22_SW9 0x105 +#define CS23_SW9 0x106 +#define CS24_SW9 0x107 +#define CS25_SW9 0x108 +#define CS26_SW9 0x109 +#define CS27_SW9 0x10A +#define CS28_SW9 0x10B +#define CS29_SW9 0x10C +#define CS30_SW9 0x10D + +#define CS31_SW1 0x10E +#define CS32_SW1 0x10F +#define CS33_SW1 0x110 +#define CS34_SW1 0x111 +#define CS35_SW1 0x112 +#define CS36_SW1 0x113 +#define CS37_SW1 0x114 +#define CS38_SW1 0x115 +#define CS39_SW1 0x116 + +#define CS31_SW2 0x117 +#define CS32_SW2 0x118 +#define CS33_SW2 0x119 +#define CS34_SW2 0x11A +#define CS35_SW2 0x11B +#define CS36_SW2 0x11C +#define CS37_SW2 0x11D +#define CS38_SW2 0x11E +#define CS39_SW2 0x11F + +#define CS31_SW3 0x120 +#define CS32_SW3 0x121 +#define CS33_SW3 0x122 +#define CS34_SW3 0x123 +#define CS35_SW3 0x124 +#define CS36_SW3 0x125 +#define CS37_SW3 0x126 +#define CS38_SW3 0x127 +#define CS39_SW3 0x128 + +#define CS31_SW4 0x129 +#define CS32_SW4 0x12A +#define CS33_SW4 0x12B +#define CS34_SW4 0x12C +#define CS35_SW4 0x12D +#define CS36_SW4 0x12E +#define CS37_SW4 0x12F +#define CS38_SW4 0x130 +#define CS39_SW4 0x131 + +#define CS31_SW5 0x132 +#define CS32_SW5 0x133 +#define CS33_SW5 0x134 +#define CS34_SW5 0x135 +#define CS35_SW5 0x136 +#define CS36_SW5 0x137 +#define CS37_SW5 0x138 +#define CS38_SW5 0x139 +#define CS39_SW5 0x13A + +#define CS31_SW6 0x13B +#define CS32_SW6 0x13C +#define CS33_SW6 0x13D +#define CS34_SW6 0x13E +#define CS35_SW6 0x13F +#define CS36_SW6 0x140 +#define CS37_SW6 0x141 +#define CS38_SW6 0x142 +#define CS39_SW6 0x143 + +#define CS31_SW7 0x144 +#define CS32_SW7 0x145 +#define CS33_SW7 0x146 +#define CS34_SW7 0x147 +#define CS35_SW7 0x148 +#define CS36_SW7 0x149 +#define CS37_SW7 0x14A +#define CS38_SW7 0x14B +#define CS39_SW7 0x14C + +#define CS31_SW8 0x14D +#define CS32_SW8 0x14E +#define CS33_SW8 0x14F +#define CS34_SW8 0x150 +#define CS35_SW8 0x151 +#define CS36_SW8 0x152 +#define CS37_SW8 0x153 +#define CS38_SW8 0x154 +#define CS39_SW8 0x155 + +#define CS31_SW9 0x156 +#define CS32_SW9 0x157 +#define CS33_SW9 0x158 +#define CS34_SW9 0x159 +#define CS35_SW9 0x15A +#define CS36_SW9 0x15B +#define CS37_SW9 0x15C +#define CS38_SW9 0x15D +#define CS39_SW9 0x15E diff --git a/drivers/led/issi/is31fl3741.c b/drivers/led/issi/is31fl3741.c index 70671c2a40..9925a169c3 100644 --- a/drivers/led/issi/is31fl3741.c +++ b/drivers/led/issi/is31fl3741.c @@ -17,63 +17,58 @@ * along with this program. If not, see <http://www.gnu.org/licenses/>. */ -#include "wait.h" - #include "is31fl3741.h" #include <string.h> #include "i2c_master.h" -#include "progmem.h" - -// This is a 7-bit address, that gets left-shifted and bit 0 -// set to 0 for write, 1 for read (as per I2C protocol) -// The address will vary depending on your wiring: -// 00 <-> GND -// 01 <-> SCL -// 10 <-> SDA -// 11 <-> VCC -// ADDR1 represents A1:A0 of the 7-bit address. -// ADDR2 represents A3:A2 of the 7-bit address. -// The result is: 0b101(ADDR2)(ADDR1) -#define ISSI_ADDR_DEFAULT 0x60 - -#define ISSI_COMMANDREGISTER 0xFD -#define ISSI_COMMANDREGISTER_WRITELOCK 0xFE -#define ISSI_INTERRUPTMASKREGISTER 0xF0 -#define ISSI_INTERRUPTSTATUSREGISTER 0xF1 -#define ISSI_IDREGISTER 0xFC - -#define ISSI_PAGE_PWM0 0x00 // PG0 -#define ISSI_PAGE_PWM1 0x01 // PG1 -#define ISSI_PAGE_SCALING_0 0x02 // PG2 -#define ISSI_PAGE_SCALING_1 0x03 // PG3 -#define ISSI_PAGE_FUNCTION 0x04 // PG4 - -#define ISSI_REG_CONFIGURATION 0x00 // PG4 -#define ISSI_REG_GLOBALCURRENT 0x01 // PG4 -#define ISSI_REG_PULLDOWNUP 0x02 // PG4 -#define ISSI_REG_RESET 0x3F // PG4 - -#ifndef ISSI_TIMEOUT -# define ISSI_TIMEOUT 100 +#include "wait.h" + +#define IS31FL3741_COMMANDREGISTER 0xFD +#define IS31FL3741_COMMANDREGISTER_WRITELOCK 0xFE +#define IS31FL3741_INTERRUPTMASKREGISTER 0xF0 +#define IS31FL3741_INTERRUPTSTATUSREGISTER 0xF1 +#define IS31FL3741_IDREGISTER 0xFC + +#define IS31FL3741_PAGE_PWM0 0x00 // PG0 +#define IS31FL3741_PAGE_PWM1 0x01 // PG1 +#define IS31FL3741_PAGE_SCALING_0 0x02 // PG2 +#define IS31FL3741_PAGE_SCALING_1 0x03 // PG3 +#define IS31FL3741_PAGE_FUNCTION 0x04 // PG4 + +#define IS31FL3741_REG_CONFIGURATION 0x00 // PG4 +#define IS31FL3741_REG_GLOBALCURRENT 0x01 // PG4 +#define IS31FL3741_REG_PULLDOWNUP 0x02 // PG4 +#define IS31FL3741_REG_PWM_FREQUENCY 0x36 // PG4 +#define IS31FL3741_REG_RESET 0x3F // PG4 + +#define IS31FL3741_PWM_REGISTER_COUNT 351 + +#ifndef IS31FL3741_I2C_TIMEOUT +# define IS31FL3741_I2C_TIMEOUT 100 #endif -#ifndef ISSI_PERSISTENCE -# define ISSI_PERSISTENCE 0 +#ifndef IS31FL3741_I2C_PERSISTENCE +# define IS31FL3741_I2C_PERSISTENCE 0 #endif -#ifndef ISSI_SWPULLUP -# define ISSI_SWPULLUP PUR_32KR +#ifndef IS31FL3741_CONFIGURATION +# define IS31FL3741_CONFIGURATION 0x01 #endif -#ifndef ISSI_CSPULLUP -# define ISSI_CSPULLUP PUR_32KR +#ifndef IS31FL3741_PWM_FREQUENCY +# define IS31FL3741_PWM_FREQUENCY IS31FL3741_PWM_FREQUENCY_29K_HZ #endif -#ifndef ISSI_GLOBALCURRENT -# define ISSI_GLOBALCURRENT 0xFF +#ifndef IS31FL3741_SW_PULLUP +# define IS31FL3741_SW_PULLUP IS31FL3741_PUR_32K_OHM #endif -#define ISSI_MAX_LEDS 351 +#ifndef IS31FL3741_CS_PULLDOWN +# define IS31FL3741_CS_PULLDOWN IS31FL3741_PDR_32K_OHM +#endif + +#ifndef IS31FL3741_GLOBALCURRENT +# define IS31FL3741_GLOBALCURRENT 0xFF +#endif // Transfer buffer for TWITransmitData() uint8_t g_twi_transfer_buffer[20] = {0xFF}; @@ -84,22 +79,22 @@ uint8_t g_twi_transfer_buffer[20] = {0xFF}; // We could optimize this and take out the unused registers from these // buffers and the transfers in is31fl3741_write_pwm_buffer() but it's // probably not worth the extra complexity. -uint8_t g_pwm_buffer[DRIVER_COUNT][ISSI_MAX_LEDS]; -bool g_pwm_buffer_update_required[DRIVER_COUNT] = {false}; -bool g_scaling_registers_update_required[DRIVER_COUNT] = {false}; +uint8_t g_pwm_buffer[IS31FL3741_DRIVER_COUNT][IS31FL3741_PWM_REGISTER_COUNT]; +bool g_pwm_buffer_update_required[IS31FL3741_DRIVER_COUNT] = {false}; +bool g_scaling_registers_update_required[IS31FL3741_DRIVER_COUNT] = {false}; -uint8_t g_scaling_registers[DRIVER_COUNT][ISSI_MAX_LEDS]; +uint8_t g_scaling_registers[IS31FL3741_DRIVER_COUNT][IS31FL3741_PWM_REGISTER_COUNT]; void is31fl3741_write_register(uint8_t addr, uint8_t reg, uint8_t data) { g_twi_transfer_buffer[0] = reg; g_twi_transfer_buffer[1] = data; -#if ISSI_PERSISTENCE > 0 - for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) == 0) break; +#if IS31FL3741_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3741_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, IS31FL3741_I2C_TIMEOUT) == 0) break; } #else - i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT); + i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, IS31FL3741_I2C_TIMEOUT); #endif } @@ -109,21 +104,21 @@ bool is31fl3741_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { for (int i = 0; i < 342; i += 18) { if (i == 180) { // unlock the command register and select PG1 - is31fl3741_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); - is31fl3741_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM1); + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_PWM1); } g_twi_transfer_buffer[0] = i % 180; memcpy(g_twi_transfer_buffer + 1, pwm_buffer + i, 18); -#if ISSI_PERSISTENCE > 0 - for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 19, ISSI_TIMEOUT) != 0) { +#if IS31FL3741_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3741_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 19, IS31FL3741_I2C_TIMEOUT) != 0) { return false; } } #else - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 19, ISSI_TIMEOUT) != 0) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 19, IS31FL3741_I2C_TIMEOUT) != 0) { return false; } #endif @@ -133,14 +128,14 @@ bool is31fl3741_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { g_twi_transfer_buffer[0] = 162; memcpy(g_twi_transfer_buffer + 1, pwm_buffer + 342, 9); -#if ISSI_PERSISTENCE > 0 - for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 10, ISSI_TIMEOUT) != 0) { +#if IS31FL3741_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < IS31FL3741_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 10, IS31FL3741_I2C_TIMEOUT) != 0) { return false; } } #else - if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 10, ISSI_TIMEOUT) != 0) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 10, IS31FL3741_I2C_TIMEOUT) != 0) { return false; } #endif @@ -148,6 +143,36 @@ bool is31fl3741_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { return true; } +void is31fl3741_init_drivers(void) { + i2c_init(); + + is31fl3741_init(IS31FL3741_I2C_ADDRESS_1); +#if defined(IS31FL3741_I2C_ADDRESS_2) + is31fl3741_init(IS31FL3741_I2C_ADDRESS_2); +# if defined(IS31FL3741_I2C_ADDRESS_3) + is31fl3741_init(IS31FL3741_I2C_ADDRESS_3); +# if defined(IS31FL3741_I2C_ADDRESS_4) + is31fl3741_init(IS31FL3741_I2C_ADDRESS_4); +# endif +# endif +#endif + + for (int i = 0; i < IS31FL3741_LED_COUNT; i++) { + is31fl3741_set_led_control_register(i, true, true, true); + } + + is31fl3741_update_led_control_registers(IS31FL3741_I2C_ADDRESS_1, 0); +#if defined(IS31FL3741_I2C_ADDRESS_2) + is31fl3741_update_led_control_registers(IS31FL3741_I2C_ADDRESS_2, 1); +# if defined(IS31FL3741_I2C_ADDRESS_3) + is31fl3741_update_led_control_registers(IS31FL3741_I2C_ADDRESS_3, 2); +# if defined(IS31FL3741_I2C_ADDRESS_4) + is31fl3741_update_led_control_registers(IS31FL3741_I2C_ADDRESS_4, 3); +# endif +# endif +#endif +} + void is31fl3741_init(uint8_t addr) { // In order to avoid the LEDs being driven with garbage data // in the LED driver's PWM registers, shutdown is enabled last. @@ -156,18 +181,20 @@ void is31fl3741_init(uint8_t addr) { // Unlock the command register. // Unlock the command register. - is31fl3741_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); // Select PG4 - is31fl3741_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_FUNCTION); + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_FUNCTION); // Set to Normal operation - is31fl3741_write_register(addr, ISSI_REG_CONFIGURATION, 0x01); + is31fl3741_write_register(addr, IS31FL3741_REG_CONFIGURATION, IS31FL3741_CONFIGURATION); // Set Golbal Current Control Register - is31fl3741_write_register(addr, ISSI_REG_GLOBALCURRENT, ISSI_GLOBALCURRENT); + is31fl3741_write_register(addr, IS31FL3741_REG_GLOBALCURRENT, IS31FL3741_GLOBALCURRENT); // Set Pull up & Down for SWx CSy - is31fl3741_write_register(addr, ISSI_REG_PULLDOWNUP, ((ISSI_CSPULLUP << 4) | ISSI_SWPULLUP)); + is31fl3741_write_register(addr, IS31FL3741_REG_PULLDOWNUP, ((IS31FL3741_CS_PULLDOWN << 4) | IS31FL3741_SW_PULLUP)); + // Set PWM frequency + is31fl3741_write_register(addr, IS31FL3741_REG_PWM_FREQUENCY, (IS31FL3741_PWM_FREQUENCY & 0b1111)); // is31fl3741_update_led_scaling_registers(addr, 0xFF, 0xFF, 0xFF); @@ -176,9 +203,9 @@ void is31fl3741_init(uint8_t addr) { } void is31fl3741_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) { - is31_led led; - if (index >= 0 && index < RGB_MATRIX_LED_COUNT) { - memcpy_P(&led, (&g_is31_leds[index]), sizeof(led)); + is31fl3741_led_t led; + if (index >= 0 && index < IS31FL3741_LED_COUNT) { + memcpy_P(&led, (&g_is31fl3741_leds[index]), sizeof(led)); if (g_pwm_buffer[led.driver][led.r] == red && g_pwm_buffer[led.driver][led.g] == green && g_pwm_buffer[led.driver][led.b] == blue) { return; @@ -191,14 +218,14 @@ void is31fl3741_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) { } void is31fl3741_set_color_all(uint8_t red, uint8_t green, uint8_t blue) { - for (int i = 0; i < RGB_MATRIX_LED_COUNT; i++) { + for (int i = 0; i < IS31FL3741_LED_COUNT; i++) { is31fl3741_set_color(i, red, green, blue); } } void is31fl3741_set_led_control_register(uint8_t index, bool red, bool green, bool blue) { - is31_led led; - memcpy_P(&led, (&g_is31_leds[index]), sizeof(led)); + is31fl3741_led_t led; + memcpy_P(&led, (&g_is31fl3741_leds[index]), sizeof(led)); if (red) { g_scaling_registers[led.driver][led.r] = 0xFF; @@ -224,8 +251,8 @@ void is31fl3741_set_led_control_register(uint8_t index, bool red, bool green, bo void is31fl3741_update_pwm_buffers(uint8_t addr, uint8_t index) { if (g_pwm_buffer_update_required[index]) { // unlock the command register and select PG2 - is31fl3741_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); - is31fl3741_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM0); + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_PWM0); is31fl3741_write_pwm_buffer(addr, g_pwm_buffer[index]); } @@ -233,7 +260,7 @@ void is31fl3741_update_pwm_buffers(uint8_t addr, uint8_t index) { g_pwm_buffer_update_required[index] = false; } -void is31fl3741_set_pwm_buffer(const is31_led *pled, uint8_t red, uint8_t green, uint8_t blue) { +void is31fl3741_set_pwm_buffer(const is31fl3741_led_t *pled, uint8_t red, uint8_t green, uint8_t blue) { g_pwm_buffer[pled->driver][pled->r] = red; g_pwm_buffer[pled->driver][pled->g] = green; g_pwm_buffer[pled->driver][pled->b] = blue; @@ -244,8 +271,8 @@ void is31fl3741_set_pwm_buffer(const is31_led *pled, uint8_t red, uint8_t green, void is31fl3741_update_led_control_registers(uint8_t addr, uint8_t index) { if (g_scaling_registers_update_required[index]) { // unlock the command register and select PG2 - is31fl3741_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); - is31fl3741_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_SCALING_0); + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_SCALING_0); // CS1_SW1 to CS30_SW6 are on PG2 for (int i = CS1_SW1; i <= CS30_SW6; ++i) { @@ -253,8 +280,8 @@ void is31fl3741_update_led_control_registers(uint8_t addr, uint8_t index) { } // unlock the command register and select PG3 - is31fl3741_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); - is31fl3741_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_SCALING_1); + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER_WRITELOCK, 0xC5); + is31fl3741_write_register(addr, IS31FL3741_COMMANDREGISTER, IS31FL3741_PAGE_SCALING_1); // CS1_SW7 to CS39_SW9 are on PG3 for (int i = CS1_SW7; i <= CS39_SW9; ++i) { @@ -265,10 +292,23 @@ void is31fl3741_update_led_control_registers(uint8_t addr, uint8_t index) { } } -void is31fl3741_set_scaling_registers(const is31_led *pled, uint8_t red, uint8_t green, uint8_t blue) { +void is31fl3741_set_scaling_registers(const is31fl3741_led_t *pled, uint8_t red, uint8_t green, uint8_t blue) { g_scaling_registers[pled->driver][pled->r] = red; g_scaling_registers[pled->driver][pled->g] = green; g_scaling_registers[pled->driver][pled->b] = blue; g_scaling_registers_update_required[pled->driver] = true; } + +void is31fl3741_flush(void) { + is31fl3741_update_pwm_buffers(IS31FL3741_I2C_ADDRESS_1, 0); +#if defined(IS31FL3741_I2C_ADDRESS_2) + is31fl3741_update_pwm_buffers(IS31FL3741_I2C_ADDRESS_2, 1); +# if defined(IS31FL3741_I2C_ADDRESS_3) + is31fl3741_update_pwm_buffers(IS31FL3741_I2C_ADDRESS_3, 2); +# if defined(IS31FL3741_I2C_ADDRESS_4) + is31fl3741_update_pwm_buffers(IS31FL3741_I2C_ADDRESS_4, 3); +# endif +# endif +#endif +} diff --git a/drivers/led/issi/is31fl3741.h b/drivers/led/issi/is31fl3741.h index 4ae84dc3c6..0c3f7d3d18 100644 --- a/drivers/led/issi/is31fl3741.h +++ b/drivers/led/issi/is31fl3741.h @@ -22,16 +22,82 @@ #include <stdint.h> #include <stdbool.h> #include "progmem.h" +#include "util.h" -typedef struct is31_led { - uint32_t driver : 2; - uint32_t r : 10; - uint32_t g : 10; - uint32_t b : 10; -} __attribute__((packed)) is31_led; +// ======== DEPRECATED DEFINES - DO NOT USE ======== +#ifdef DRIVER_ADDR_1 +# define IS31FL3741_I2C_ADDRESS_1 DRIVER_ADDR_1 +#endif +#ifdef DRIVER_ADDR_2 +# define IS31FL3741_I2C_ADDRESS_2 DRIVER_ADDR_2 +#endif +#ifdef DRIVER_ADDR_3 +# define IS31FL3741_I2C_ADDRESS_3 DRIVER_ADDR_3 +#endif +#ifdef DRIVER_ADDR_4 +# define IS31FL3741_I2C_ADDRESS_4 DRIVER_ADDR_4 +#endif +#ifdef ISSI_TIMEOUT +# define IS31FL3741_I2C_TIMEOUT ISSI_TIMEOUT +#endif +#ifdef ISSI_PERSISTENCE +# define IS31FL3741_I2C_PERSISTENCE ISSI_PERSISTENCE +#endif +#ifdef ISSI_CONFIGURATION +# define IS31FL3741_CONFIGURATION ISSI_CONFIGURATION +#endif +#ifdef ISSI_SWPULLUP +# define IS31FL3741_SW_PULLUP ISSI_SWPULLUP +#endif +#ifdef ISSI_CSPULLUP +# define IS31FL3741_CS_PULLDOWN ISSI_CSPULLUP +#endif +#ifdef ISSI_GLOBALCURRENT +# define IS31FL3741_GLOBALCURRENT ISSI_GLOBALCURRENT +#endif -extern const is31_led PROGMEM g_is31_leds[RGB_MATRIX_LED_COUNT]; +#define is31_led is31fl3741_led_t +#define g_is31_leds g_is31fl3741_leds +#define PUR_0R IS31FL3741_PUR_0_OHM +#define PUR_05KR IS31FL3741_PUR_0K5_OHM +#define PUR_1KR IS31FL3741_PUR_1K_OHM +#define PUR_2KR IS31FL3741_PUR_2K_OHM +#define PUR_4KR IS31FL3741_PUR_4K_OHM +#define PUR_8KR IS31FL3741_PUR_8K_OHM +#define PUR_16KR IS31FL3741_PUR_16K_OHM +#define PUR_32KR IS31FL3741_PUR_32K_OHM +// ======== + +#define IS31FL3741_I2C_ADDRESS_GND 0x30 +#define IS31FL3741_I2C_ADDRESS_SCL 0x31 +#define IS31FL3741_I2C_ADDRESS_SDA 0x32 +#define IS31FL3741_I2C_ADDRESS_VCC 0x33 + +#if defined(RGB_MATRIX_IS31FL3741) +# define IS31FL3741_LED_COUNT RGB_MATRIX_LED_COUNT +#endif + +#if defined(IS31FL3741_I2C_ADDRESS_4) +# define IS31FL3741_DRIVER_COUNT 4 +#elif defined(IS31FL3741_I2C_ADDRESS_3) +# define IS31FL3741_DRIVER_COUNT 3 +#elif defined(IS31FL3741_I2C_ADDRESS_2) +# define IS31FL3741_DRIVER_COUNT 2 +#elif defined(IS31FL3741_I2C_ADDRESS_1) +# define IS31FL3741_DRIVER_COUNT 1 +#endif + +typedef struct is31fl3741_led_t { + uint8_t driver : 2; + uint16_t r : 9; + uint16_t g : 9; + uint16_t b : 9; +} PACKED is31fl3741_led_t; + +extern const is31fl3741_led_t PROGMEM g_is31fl3741_leds[IS31FL3741_LED_COUNT]; + +void is31fl3741_init_drivers(void); void is31fl3741_init(uint8_t addr); void is31fl3741_write_register(uint8_t addr, uint8_t reg, uint8_t data); bool is31fl3741_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer); @@ -47,18 +113,34 @@ void is31fl3741_set_led_control_register(uint8_t index, bool red, bool green, bo // If the buffer is dirty, it will update the driver with the buffer. void is31fl3741_update_pwm_buffers(uint8_t addr, uint8_t index); void is31fl3741_update_led_control_registers(uint8_t addr, uint8_t index); -void is31fl3741_set_scaling_registers(const is31_led *pled, uint8_t red, uint8_t green, uint8_t blue); - -void is31fl3741_set_pwm_buffer(const is31_led *pled, uint8_t red, uint8_t green, uint8_t blue); - -#define PUR_0R 0x00 // No PUR resistor -#define PUR_05KR 0x01 // 0.5k Ohm resistor -#define PUR_1KR 0x02 // 1.0k Ohm resistor -#define PUR_2KR 0x03 // 2.0k Ohm resistor -#define PUR_4KR 0x04 // 4.0k Ohm resistor -#define PUR_8KR 0x05 // 8.0k Ohm resistor -#define PUR_16KR 0x06 // 16k Ohm resistor -#define PUR_32KR 0x07 // 32k Ohm resistor +void is31fl3741_set_scaling_registers(const is31fl3741_led_t *pled, uint8_t red, uint8_t green, uint8_t blue); + +void is31fl3741_set_pwm_buffer(const is31fl3741_led_t *pled, uint8_t red, uint8_t green, uint8_t blue); + +void is31fl3741_flush(void); + +#define IS31FL3741_PDR_0_OHM 0b000 // No pull-down resistor +#define IS31FL3741_PDR_0K5_OHM 0b001 // 0.5 kOhm resistor +#define IS31FL3741_PDR_1K_OHM 0b010 // 1 kOhm resistor +#define IS31FL3741_PDR_2K_OHM 0b011 // 2 kOhm resistor +#define IS31FL3741_PDR_4K_OHM 0b100 // 4 kOhm resistor +#define IS31FL3741_PDR_8K_OHM 0b101 // 8 kOhm resistor +#define IS31FL3741_PDR_16K_OHM 0b110 // 16 kOhm resistor +#define IS31FL3741_PDR_32K_OHM 0b111 // 32 kOhm resistor + +#define IS31FL3741_PUR_0_OHM 0b000 // No pull-up resistor +#define IS31FL3741_PUR_0K5_OHM 0b001 // 0.5 kOhm resistor +#define IS31FL3741_PUR_1K_OHM 0b010 // 1 kOhm resistor +#define IS31FL3741_PUR_2K_OHM 0b011 // 2 kOhm resistor +#define IS31FL3741_PUR_4K_OHM 0b100 // 4 kOhm resistor +#define IS31FL3741_PUR_8K_OHM 0b101 // 8 kOhm resistor +#define IS31FL3741_PUR_16K_OHM 0b110 // 16 kOhm resistor +#define IS31FL3741_PUR_32K_OHM 0b111 // 32 kOhm resistor + +#define IS31FL3741_PWM_FREQUENCY_29K_HZ 0b0000 +#define IS31FL3741_PWM_FREQUENCY_3K6_HZ 0b0011 +#define IS31FL3741_PWM_FREQUENCY_1K8_HZ 0b0111 +#define IS31FL3741_PWM_FREQUENCY_900_HZ 0b1011 #define CS1_SW1 0x00 #define CS2_SW1 0x01 diff --git a/drivers/led/issi/is31fl3743.h b/drivers/led/issi/is31fl3743.h index d8fcd79096..706b271254 100644 --- a/drivers/led/issi/is31fl3743.h +++ b/drivers/led/issi/is31fl3743.h @@ -36,7 +36,7 @@ // Set defaults for Spread Spectrum Register #ifndef ISSI_SSR_1 -# if DRIVER_COUNT == 1 +# ifndef DRIVER_ADDR_2 # define ISSI_SSR_1 0x00 # else # define ISSI_SSR_1 0xC0 diff --git a/drivers/led/issi/is31fl3745.h b/drivers/led/issi/is31fl3745.h index ca5dd4a986..1e88aab4a8 100644 --- a/drivers/led/issi/is31fl3745.h +++ b/drivers/led/issi/is31fl3745.h @@ -36,7 +36,7 @@ // Set defaults for Spread Spectrum Register #ifndef ISSI_SSR_1 -# if DRIVER_COUNT == 1 +# ifndef DRIVER_ADDR_2 # define ISSI_SSR_1 0x00 # else # define ISSI_SSR_1 0xC0 diff --git a/drivers/led/issi/is31flcommon.c b/drivers/led/issi/is31flcommon.c index 4b78947ada..d6b9bce93d 100644 --- a/drivers/led/issi/is31flcommon.c +++ b/drivers/led/issi/is31flcommon.c @@ -174,7 +174,55 @@ void IS31FL_common_update_scaling_register(uint8_t addr, uint8_t index) { } } +void IS31FL_common_flush(void) { + IS31FL_common_update_pwm_register(DRIVER_ADDR_1, 0); +#if defined(DRIVER_ADDR_2) + IS31FL_common_update_pwm_register(DRIVER_ADDR_2, 1); +# if defined(DRIVER_ADDR_3) + IS31FL_common_update_pwm_register(DRIVER_ADDR_3, 2); +# if defined(DRIVER_ADDR_4) + IS31FL_common_update_pwm_register(DRIVER_ADDR_4, 3); +# endif +# endif +#endif +} + #ifdef RGB_MATRIX_ENABLE +void IS31FL_RGB_init_drivers(void) { + i2c_init(); + + IS31FL_common_init(DRIVER_ADDR_1, ISSI_SSR_1); +# if defined(DRIVER_ADDR_2) + IS31FL_common_init(DRIVER_ADDR_2, ISSI_SSR_2); +# if defined(DRIVER_ADDR_3) + IS31FL_common_init(DRIVER_ADDR_3, ISSI_SSR_3); +# if defined(DRIVER_ADDR_4) + IS31FL_common_init(DRIVER_ADDR_4, ISSI_SSR_4); +# endif +# endif +# endif + + for (int i = 0; i < RGB_MATRIX_LED_COUNT; i++) { + IS31FL_RGB_set_scaling_buffer(i, true, true, true); + } + + // This actually updates the LED drivers +# ifdef ISSI_MANUAL_SCALING + IS31FL_set_manual_scaling_buffer(); +# endif + + IS31FL_common_update_scaling_register(DRIVER_ADDR_1, 0); +# if defined(DRIVER_ADDR_2) + IS31FL_common_update_scaling_register(DRIVER_ADDR_2, 1); +# if defined(DRIVER_ADDR_3) + IS31FL_common_update_scaling_register(DRIVER_ADDR_3, 2); +# if defined(DRIVER_ADDR_4) + IS31FL_common_update_scaling_register(DRIVER_ADDR_4, 3); +# endif +# endif +# endif +} + // Colour is set by adjusting PWM register void IS31FL_RGB_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) { if (index >= 0 && index < RGB_MATRIX_LED_COUNT) { @@ -218,6 +266,41 @@ void IS31FL_RGB_set_scaling_buffer(uint8_t index, bool red, bool green, bool blu #elif defined(LED_MATRIX_ENABLE) // LED Matrix Specific scripts +void IS31FL_simple_init_drivers(void) { + i2c_init(); + + IS31FL_common_init(DRIVER_ADDR_1, ISSI_SSR_1); +# if defined(DRIVER_ADDR_2) + IS31FL_common_init(DRIVER_ADDR_2, ISSI_SSR_2); +# if defined(DRIVER_ADDR_3) + IS31FL_common_init(DRIVER_ADDR_3, ISSI_SSR_3); +# if defined(DRIVER_ADDR_4) + IS31FL_common_init(DRIVER_ADDR_4, ISSI_SSR_4); +# endif +# endif +# endif + + for (int i = 0; i < LED_MATRIX_LED_COUNT; i++) { + IS31FL_simple_set_scaling_buffer(i, true); + } + +// This actually updates the LED drivers +# ifdef ISSI_MANUAL_SCALING + IS31FL_set_manual_scaling_buffer(); +# endif + + IS31FL_common_update_scaling_register(DRIVER_ADDR_1, 0); +# if defined(DRIVER_ADDR_2) + IS31FL_common_update_scaling_register(DRIVER_ADDR_2, 1); +# if defined(DRIVER_ADDR_3) + IS31FL_common_update_scaling_register(DRIVER_ADDR_3, 2); +# if defined(DRIVER_ADDR_4) + IS31FL_common_update_scaling_register(DRIVER_ADDR_4, 3); +# endif +# endif +# endif +} + void IS31FL_simple_set_scaling_buffer(uint8_t index, bool value) { is31_led led; memcpy_P(&led, (&g_is31_leds[index]), sizeof(led)); diff --git a/drivers/led/issi/is31flcommon.h b/drivers/led/issi/is31flcommon.h index 4b3add558b..10613a6eed 100644 --- a/drivers/led/issi/is31flcommon.h +++ b/drivers/led/issi/is31flcommon.h @@ -23,33 +23,44 @@ #include <stdint.h> #include <stdbool.h> #include "progmem.h" +#include "util.h" // Which variant header file to use -#ifdef IS31FL3742A +#if defined(LED_MATRIX_IS31FL3742A) || defined(RGB_MATRIX_IS31FL3742A) # include "is31fl3742.h" -#elif defined(IS31FL3743A) +#elif defined(LED_MATRIX_IS31FL3743A) || defined(RGB_MATRIX_IS31FL3743A) # include "is31fl3743.h" -#elif defined(IS31FL3745) +#elif defined(LED_MATRIX_IS31FL3745) || defined(RGB_MATRIX_IS31FL3745) # include "is31fl3745.h" -#elif defined(IS31FL3746A) +#elif defined(LED_MATRIX_IS31FL3746A) || defined(RGB_MATRIX_IS31FL3746A) # include "is31fl3746.h" #endif +#if defined DRIVER_ADDR_4 +# define DRIVER_COUNT 4 +#elif defined DRIVER_ADDR_3 +# define DRIVER_COUNT 3 +#elif defined DRIVER_ADDR_2 +# define DRIVER_COUNT 2 +#elif defined DRIVER_ADDR_1 +# define DRIVER_COUNT 1 +#endif + #ifdef RGB_MATRIX_ENABLE typedef struct is31_led { - uint8_t driver; + uint8_t driver : 2; uint8_t r; uint8_t g; uint8_t b; -} __attribute__((packed)) is31_led; +} PACKED is31_led; extern const is31_led PROGMEM g_is31_leds[RGB_MATRIX_LED_COUNT]; #elif defined(LED_MATRIX_ENABLE) typedef struct is31_led { - uint8_t driver; + uint8_t driver : 2; uint8_t v; -} __attribute__((packed)) is31_led; +} PACKED is31_led; extern const is31_led PROGMEM g_is31_leds[LED_MATRIX_LED_COUNT]; #endif @@ -67,13 +78,17 @@ void IS31FL_common_init(uint8_t addr, uint8_t ssr); void IS31FL_common_update_pwm_register(uint8_t addr, uint8_t index); void IS31FL_common_update_scaling_register(uint8_t addr, uint8_t index); +void IS31FL_common_flush(void); + #ifdef RGB_MATRIX_ENABLE // RGB Matrix Specific scripts +void IS31FL_RGB_init_drivers(void); void IS31FL_RGB_set_color(int index, uint8_t red, uint8_t green, uint8_t blue); void IS31FL_RGB_set_color_all(uint8_t red, uint8_t green, uint8_t blue); void IS31FL_RGB_set_scaling_buffer(uint8_t index, bool red, bool green, bool blue); #elif defined(LED_MATRIX_ENABLE) // LED Matrix Specific scripts +void IS31FL_simple_init_drivers(void); void IS31FL_simple_set_scaling_buffer(uint8_t index, bool value); void IS31FL_simple_set_brightness(int index, uint8_t value); void IS31FL_simple_set_brigntness_all(uint8_t value); diff --git a/drivers/led/snled27351-simple.c b/drivers/led/snled27351-simple.c new file mode 100644 index 0000000000..6d504794a9 --- /dev/null +++ b/drivers/led/snled27351-simple.c @@ -0,0 +1,266 @@ +/* Copyright 2021 @ Keychron (https://www.keychron.com) + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include "snled27351-simple.h" +#include "i2c_master.h" + +#define SNLED27351_PWM_REGISTER_COUNT 192 +#define SNLED27351_LED_CONTROL_REGISTER_COUNT 24 + +#ifndef SNLED27351_I2C_TIMEOUT +# define SNLED27351_I2C_TIMEOUT 100 +#endif + +#ifndef SNLED27351_I2C_PERSISTENCE +# define SNLED27351_I2C_PERSISTENCE 0 +#endif + +#ifndef SNLED27351_PHASE_CHANNEL +# define SNLED27351_PHASE_CHANNEL SNLED27351_MSKPHASE_12CHANNEL +#endif + +#ifndef SNLED27351_CURRENT_TUNE +# define SNLED27351_CURRENT_TUNE \ + { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF } +#endif + +// Transfer buffer for TWITransmitData() +uint8_t g_twi_transfer_buffer[20]; + +// These buffers match the SNLED27351 PWM registers. +// The control buffers match the PG0 LED On/Off registers. +// Storing them like this is optimal for I2C transfers to the registers. +// We could optimize this and take out the unused registers from these +// buffers and the transfers in snled27351_write_pwm_buffer() but it's +// probably not worth the extra complexity. +uint8_t g_pwm_buffer[SNLED27351_DRIVER_COUNT][SNLED27351_PWM_REGISTER_COUNT]; +bool g_pwm_buffer_update_required[SNLED27351_DRIVER_COUNT] = {false}; + +uint8_t g_led_control_registers[SNLED27351_DRIVER_COUNT][SNLED27351_LED_CONTROL_REGISTER_COUNT] = {0}; +bool g_led_control_registers_update_required[SNLED27351_DRIVER_COUNT] = {false}; + +bool snled27351_write_register(uint8_t addr, uint8_t reg, uint8_t data) { + // If the transaction fails function returns false. + g_twi_transfer_buffer[0] = reg; + g_twi_transfer_buffer[1] = data; + +#if SNLED27351_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < SNLED27351_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, SNLED27351_I2C_TIMEOUT) != 0) { + return false; + } + } +#else + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, SNLED27351_I2C_TIMEOUT) != 0) { + return false; + } +#endif + return true; +} + +bool snled27351_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { + // Assumes PG1 is already selected. + // If any of the transactions fails function returns false. + // Transmit PWM registers in 12 transfers of 16 bytes. + // g_twi_transfer_buffer[] is 20 bytes + + // Iterate over the pwm_buffer contents at 16 byte intervals. + for (int i = 0; i < SNLED27351_PWM_REGISTER_COUNT; i += 16) { + g_twi_transfer_buffer[0] = i; + // Copy the data from i to i+15. + // Device will auto-increment register for data after the first byte + // Thus this sets registers 0x00-0x0F, 0x10-0x1F, etc. in one transfer. + for (int j = 0; j < 16; j++) { + g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j]; + } + +#if SNLED27351_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < SNLED27351_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, SNLED27351_I2C_TIMEOUT) != 0) { + return false; + } + } +#else + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, SNLED27351_I2C_TIMEOUT) != 0) { + return false; + } +#endif + } + return true; +} + +void snled27351_init_drivers(void) { + i2c_init(); + + snled27351_init(SNLED27351_I2C_ADDRESS_1); +#if defined(SNLED27351_I2C_ADDRESS_2) + snled27351_init(SNLED27351_I2C_ADDRESS_2); +# if defined(SNLED27351_I2C_ADDRESS_3) + snled27351_init(SNLED27351_I2C_ADDRESS_3); +# if defined(SNLED27351_I2C_ADDRESS_4) + snled27351_init(SNLED27351_I2C_ADDRESS_4); +# endif +# endif +#endif + + for (int i = 0; i < SNLED27351_LED_COUNT; i++) { + snled27351_set_led_control_register(i, true); + } + + snled27351_update_led_control_registers(SNLED27351_I2C_ADDRESS_1, 0); +#if defined(SNLED27351_I2C_ADDRESS_2) + snled27351_update_led_control_registers(SNLED27351_I2C_ADDRESS_2, 1); +# if defined(SNLED27351_I2C_ADDRESS_3) + snled27351_update_led_control_registers(SNLED27351_I2C_ADDRESS_3, 2); +# if defined(SNLED27351_I2C_ADDRESS_4) + snled27351_update_led_control_registers(SNLED27351_I2C_ADDRESS_4, 3); +# endif +# endif +#endif +} + +void snled27351_init(uint8_t addr) { + // Select to function page + snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_FUNCTION_PAGE); + // Setting LED driver to shutdown mode + snled27351_write_register(addr, SNLED27351_REG_CONFIGURATION, SNLED27351_MSKSW_SHUT_DOWN_MODE); + // Setting internal channel pulldown/pullup + snled27351_write_register(addr, SNLED27351_REG_PDU, SNLED27351_MSKSET_CA_CB_CHANNEL); + // Select number of scan phase + snled27351_write_register(addr, SNLED27351_REG_SCAN_PHASE, SNLED27351_PHASE_CHANNEL); + // Setting PWM Delay Phase + snled27351_write_register(addr, SNLED27351_REG_SLEW_RATE_CONTROL_MODE1, SNLED27351_MSKPWM_DELAY_PHASE_ENABLE); + // Setting Driving/Sinking Channel Slew Rate + snled27351_write_register(addr, SNLED27351_REG_SLEW_RATE_CONTROL_MODE2, SNLED27351_MSKDRIVING_SINKING_CHANNEL_SLEWRATE_ENABLE); + // Setting Iref + snled27351_write_register(addr, SNLED27351_REG_SOFTWARE_SLEEP, SNLED27351_MSKSLEEP_DISABLE); + // Set LED CONTROL PAGE (Page 0) + snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_CONTROL_PAGE); + for (int i = 0; i < SNLED27351_LED_CONTROL_ON_OFF_LENGTH; i++) { + snled27351_write_register(addr, i, 0x00); + } + + // Set PWM PAGE (Page 1) + snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_PWM_PAGE); + for (int i = 0; i < SNLED27351_LED_CURRENT_TUNE_LENGTH; i++) { + snled27351_write_register(addr, i, 0x00); + } + + // Set CURRENT PAGE (Page 4) + uint8_t current_tune_reg_list[SNLED27351_LED_CURRENT_TUNE_LENGTH] = SNLED27351_CURRENT_TUNE; + snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_CURRENT_TUNE_PAGE); + for (int i = 0; i < SNLED27351_LED_CURRENT_TUNE_LENGTH; i++) { + snled27351_write_register(addr, i, current_tune_reg_list[i]); + } + + // Enable LEDs ON/OFF + snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_CONTROL_PAGE); + for (int i = 0; i < SNLED27351_LED_CONTROL_ON_OFF_LENGTH; i++) { + snled27351_write_register(addr, i, 0xFF); + } + + // Select to function page + snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_FUNCTION_PAGE); + // Setting LED driver to normal mode + snled27351_write_register(addr, SNLED27351_REG_CONFIGURATION, SNLED27351_MSKSW_NORMAL_MODE); +} + +void snled27351_set_value(int index, uint8_t value) { + snled27351_led_t led; + if (index >= 0 && index < SNLED27351_LED_COUNT) { + memcpy_P(&led, (&g_snled27351_leds[index]), sizeof(led)); + + if (g_pwm_buffer[led.driver][led.v] == value) { + return; + } + g_pwm_buffer[led.driver][led.v] = value; + g_pwm_buffer_update_required[led.driver] = true; + } +} + +void snled27351_set_value_all(uint8_t value) { + for (int i = 0; i < SNLED27351_LED_COUNT; i++) { + snled27351_set_value(i, value); + } +} + +void snled27351_set_led_control_register(uint8_t index, bool value) { + snled27351_led_t led; + memcpy_P(&led, (&g_snled27351_leds[index]), sizeof(led)); + + uint8_t control_register = led.v / 8; + uint8_t bit_value = led.v % 8; + + if (value) { + g_led_control_registers[led.driver][control_register] |= (1 << bit_value); + } else { + g_led_control_registers[led.driver][control_register] &= ~(1 << bit_value); + } + + g_led_control_registers_update_required[led.driver] = true; +} + +void snled27351_update_pwm_buffers(uint8_t addr, uint8_t index) { + if (g_pwm_buffer_update_required[index]) { + snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_PWM_PAGE); + + // If any of the transactions fail we risk writing dirty PG0, + // refresh page 0 just in case. + if (!snled27351_write_pwm_buffer(addr, g_pwm_buffer[index])) { + g_led_control_registers_update_required[index] = true; + } + } + g_pwm_buffer_update_required[index] = false; +} + +void snled27351_update_led_control_registers(uint8_t addr, uint8_t index) { + if (g_led_control_registers_update_required[index]) { + snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_CONTROL_PAGE); + for (int i = 0; i < SNLED27351_LED_CONTROL_REGISTER_COUNT; i++) { + snled27351_write_register(addr, i, g_led_control_registers[index][i]); + } + } + g_led_control_registers_update_required[index] = false; +} + +void snled27351_flush(void) { + snled27351_update_pwm_buffers(SNLED27351_I2C_ADDRESS_1, 0); +#if defined(SNLED27351_I2C_ADDRESS_2) + snled27351_update_pwm_buffers(SNLED27351_I2C_ADDRESS_2, 1); +# if defined(SNLED27351_I2C_ADDRESS_3) + snled27351_update_pwm_buffers(SNLED27351_I2C_ADDRESS_3, 2); +# if defined(SNLED27351_I2C_ADDRESS_4) + snled27351_update_pwm_buffers(SNLED27351_I2C_ADDRESS_4, 3); +# endif +# endif +#endif +} + +void snled27351_sw_return_normal(uint8_t addr) { + // Select to function page + snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_FUNCTION_PAGE); + // Setting LED driver to normal mode + snled27351_write_register(addr, SNLED27351_REG_CONFIGURATION, SNLED27351_MSKSW_NORMAL_MODE); +} + +void snled27351_sw_shutdown(uint8_t addr) { + // Select to function page + snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_FUNCTION_PAGE); + // Setting LED driver to shutdown mode + snled27351_write_register(addr, SNLED27351_REG_CONFIGURATION, SNLED27351_MSKSW_SHUT_DOWN_MODE); + // Write SW Sleep Register + snled27351_write_register(addr, SNLED27351_REG_SOFTWARE_SLEEP, SNLED27351_MSKSLEEP_ENABLE); +} diff --git a/drivers/led/snled27351-simple.h b/drivers/led/snled27351-simple.h new file mode 100644 index 0000000000..66e5d162d0 --- /dev/null +++ b/drivers/led/snled27351-simple.h @@ -0,0 +1,391 @@ +/* Copyright 2021 @ Keychron (https://www.keychron.com) + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#pragma once + +#include <stdint.h> +#include <stdbool.h> +#include "progmem.h" +#include "util.h" + +// ======== DEPRECATED DEFINES - DO NOT USE ======== +#ifdef CKLED2001_TIMEOUT +# define SNLED27351_I2C_TIMEOUT CKLED2001_TIMEOUT +#endif +#ifdef CKLED2001_PERSISTENCE +# define SNLED27351_I2C_PERSISTENCE CKLED2001_PERSISTENCE +#endif +#ifdef PHASE_CHANNEL +# define SNLED27351_PHASE_CHANNEL PHASE_CHANNEL +#endif +#ifdef CKLED2001_CURRENT_TUNE +# define SNLED27351_CURRENT_TUNE CKLED2001_CURRENT_TUNE +#endif + +#define MSKPHASE_12CHANNEL SNLED27351_MSKPHASE_12CHANNEL +#define MSKPHASE_11CHANNEL SNLED27351_MSKPHASE_11CHANNEL +#define MSKPHASE_10CHANNEL SNLED27351_MSKPHASE_10CHANNEL +#define MSKPHASE_9CHANNEL SNLED27351_MSKPHASE_9CHANNEL +#define MSKPHASE_8CHANNEL SNLED27351_MSKPHASE_8CHANNEL +#define MSKPHASE_7CHANNEL SNLED27351_MSKPHASE_7CHANNEL +#define MSKPHASE_6CHANNEL SNLED27351_MSKPHASE_6CHANNEL +#define MSKPHASE_5CHANNEL SNLED27351_MSKPHASE_5CHANNEL +#define MSKPHASE_4CHANNEL SNLED27351_MSKPHASE_4CHANNEL +#define MSKPHASE_3CHANNEL SNLED27351_MSKPHASE_3CHANNEL +#define MSKPHASE_2CHANNEL SNLED27351_MSKPHASE_2CHANNEL +#define MSKPHASE_1CHANNEL SNLED27351_MSKPHASE_1CHANNEL + +#define ckled2001_led snled27351_led_t +#define g_ckled2001_leds g_snled27351_leds +// ======== + +#define SNLED27351_I2C_ADDRESS_GND 0x74 +#define SNLED27351_I2C_ADDRESS_SCL 0x75 +#define SNLED27351_I2C_ADDRESS_SDA 0x76 +#define SNLED27351_I2C_ADDRESS_VDDIO 0x77 + +#if defined(LED_MATRIX_SNLED27351) +# define SNLED27351_LED_COUNT LED_MATRIX_LED_COUNT +#endif + +#if defined(SNLED27351_I2C_ADDRESS_4) +# define SNLED27351_DRIVER_COUNT 4 +#elif defined(SNLED27351_I2C_ADDRESS_3) +# define SNLED27351_DRIVER_COUNT 3 +#elif defined(SNLED27351_I2C_ADDRESS_2) +# define SNLED27351_DRIVER_COUNT 2 +#elif defined(SNLED27351_I2C_ADDRESS_1) +# define SNLED27351_DRIVER_COUNT 1 +#endif + +typedef struct snled27351_led_t { + uint8_t driver : 2; + uint8_t v; +} PACKED snled27351_led_t; + +extern const snled27351_led_t PROGMEM g_snled27351_leds[SNLED27351_LED_COUNT]; + +void snled27351_init_drivers(void); +void snled27351_init(uint8_t addr); +bool snled27351_write_register(uint8_t addr, uint8_t reg, uint8_t data); +bool snled27351_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer); + +void snled27351_set_value(int index, uint8_t value); +void snled27351_set_value_all(uint8_t value); + +void snled27351_set_led_control_register(uint8_t index, bool value); + +// This should not be called from an interrupt +// (eg. from a timer interrupt). +// Call this while idle (in between matrix scans). +// If the buffer is dirty, it will update the driver with the buffer. +void snled27351_update_pwm_buffers(uint8_t addr, uint8_t index); +void snled27351_update_led_control_registers(uint8_t addr, uint8_t index); + +void snled27351_flush(void); + +void snled27351_sw_return_normal(uint8_t addr); +void snled27351_sw_shutdown(uint8_t addr); + +// Registers Page Define +#define SNLED27351_REG_CONFIGURE_CMD_PAGE 0xFD +#define SNLED27351_LED_CONTROL_PAGE 0x00 +#define SNLED27351_LED_PWM_PAGE 0x01 +#define SNLED27351_FUNCTION_PAGE 0x03 +#define SNLED27351_CURRENT_TUNE_PAGE 0x04 + +// Function Register: address 0x00 +#define SNLED27351_REG_CONFIGURATION 0x00 +#define SNLED27351_MSKSW_SHUT_DOWN_MODE (0x0 << 0) +#define SNLED27351_MSKSW_NORMAL_MODE (0x1 << 0) + +#define SNLED27351_REG_DRIVER_ID 0x11 +#define SNLED27351_DRIVER_ID 0x8A + +#define SNLED27351_REG_PDU 0x13 +#define SNLED27351_MSKSET_CA_CB_CHANNEL 0xAA +#define SNLED27351_MSKCLR_CA_CB_CHANNEL 0x00 + +#define SNLED27351_REG_SCAN_PHASE 0x14 +#define SNLED27351_MSKPHASE_12CHANNEL 0x00 +#define SNLED27351_MSKPHASE_11CHANNEL 0x01 +#define SNLED27351_MSKPHASE_10CHANNEL 0x02 +#define SNLED27351_MSKPHASE_9CHANNEL 0x03 +#define SNLED27351_MSKPHASE_8CHANNEL 0x04 +#define SNLED27351_MSKPHASE_7CHANNEL 0x05 +#define SNLED27351_MSKPHASE_6CHANNEL 0x06 +#define SNLED27351_MSKPHASE_5CHANNEL 0x07 +#define SNLED27351_MSKPHASE_4CHANNEL 0x08 +#define SNLED27351_MSKPHASE_3CHANNEL 0x09 +#define SNLED27351_MSKPHASE_2CHANNEL 0x0A +#define SNLED27351_MSKPHASE_1CHANNEL 0x0B + +#define SNLED27351_REG_SLEW_RATE_CONTROL_MODE1 0x15 +#define SNLED27351_MSKPWM_DELAY_PHASE_ENABLE 0x04 +#define SNLED27351_MSKPWM_DELAY_PHASE_DISABLE 0x00 + +#define SNLED27351_REG_SLEW_RATE_CONTROL_MODE2 0x16 +#define SNLED27351_MSKDRIVING_SINKING_CHANNEL_SLEWRATE_ENABLE 0xC0 +#define SNLED27351_MSKDRIVING_SINKING_CHANNEL_SLEWRATE_DISABLE 0x00 + +#define SNLED27351_REG_OPEN_SHORT_ENABLE 0x17 +#define SNLED27351_MSKOPEN_DETECTION_ENABLE (0x01 << 7) +#define SNLED27351_MSKOPEN_DETECTION_DISABLE (0x00) + +#define SNLED27351_MSKSHORT_DETECTION_ENABLE (0x01 << 6) +#define SNLED27351_MSKSHORT_DETECTION_DISABLE (0x00) + +#define SNLED27351_REG_OPEN_SHORT_DUTY 0x18 +#define SNLED27351_REG_OPEN_SHORT_FLAG 0x19 + +#define SNLED27351_MSKOPEN_DETECTION_INTERRUPT_ENABLE (0x01 << 7) +#define SNLED27351_MSKOPEN_DETECTION_INTERRUPT_DISABLE (0x00) + +#define SNLED27351_MSKSHORT_DETECTION_INTERRUPT_ENABLE (0x01 << 6) +#define SNLED27351_MSKSHORT_DETECTION_INTERRUPT_DISABLE (0x00) + +#define SNLED27351_REG_SOFTWARE_SLEEP 0x1A +#define SNLED27351_MSKSLEEP_ENABLE 0x02 +#define SNLED27351_MSKSLEEP_DISABLE 0x00 + +// LED Control Registers +#define SNLED27351_LED_CONTROL_ON_OFF_FIRST_ADDR 0x0 +#define SNLED27351_LED_CONTROL_ON_OFF_LAST_ADDR 0x17 +#define SNLED27351_LED_CONTROL_ON_OFF_LENGTH ((SNLED27351_LED_CONTROL_ON_OFF_LAST_ADDR - SNLED27351_LED_CONTROL_ON_OFF_FIRST_ADDR) + 1) + +#define SNLED27351_LED_CONTROL_OPEN_FIRST_ADDR 0x18 +#define SNLED27351_LED_CONTROL_OPEN_LAST_ADDR 0x2F +#define SNLED27351_LED_CONTROL_OPEN_LENGTH ((SNLED27351_LED_CONTROL_OPEN_LAST_ADDR - SNLED27351_LED_CONTROL_OPEN_FIRST_ADDR) + 1) + +#define SNLED27351_LED_CONTROL_SHORT_FIRST_ADDR 0x30 +#define SNLED27351_LED_CONTROL_SHORT_LAST_ADDR 0x47 +#define SNLED27351_LED_CONTROL_SHORT_LENGTH ((SNLED27351_LED_CONTROL_SHORT_LAST_ADDR - SNLED27351_LED_CONTROL_SHORT_FIRST_ADDR) + 1) + +#define SNLED27351_LED_CONTROL_PAGE_LENGTH 0x48 + +// LED Control Registers +#define SNLED27351_LED_PWM_FIRST_ADDR 0x00 +#define SNLED27351_LED_PWM_LAST_ADDR 0xBF +#define SNLED27351_LED_PWM_LENGTH 0xC0 + +// Current Tune Registers +#define SNLED27351_LED_CURRENT_TUNE_FIRST_ADDR 0x00 +#define SNLED27351_LED_CURRENT_TUNE_LAST_ADDR 0x0B +#define SNLED27351_LED_CURRENT_TUNE_LENGTH 0x0C + +#define A_1 0x00 +#define A_2 0x01 +#define A_3 0x02 +#define A_4 0x03 +#define A_5 0x04 +#define A_6 0x05 +#define A_7 0x06 +#define A_8 0x07 +#define A_9 0x08 +#define A_10 0x09 +#define A_11 0x0A +#define A_12 0x0B +#define A_13 0x0C +#define A_14 0x0D +#define A_15 0x0E +#define A_16 0x0F + +#define B_1 0x10 +#define B_2 0x11 +#define B_3 0x12 +#define B_4 0x13 +#define B_5 0x14 +#define B_6 0x15 +#define B_7 0x16 +#define B_8 0x17 +#define B_9 0x18 +#define B_10 0x19 +#define B_11 0x1A +#define B_12 0x1B +#define B_13 0x1C +#define B_14 0x1D +#define B_15 0x1E +#define B_16 0x1F + +#define C_1 0x20 +#define C_2 0x21 +#define C_3 0x22 +#define C_4 0x23 +#define C_5 0x24 +#define C_6 0x25 +#define C_7 0x26 +#define C_8 0x27 +#define C_9 0x28 +#define C_10 0x29 +#define C_11 0x2A +#define C_12 0x2B +#define C_13 0x2C +#define C_14 0x2D +#define C_15 0x2E +#define C_16 0x2F + +#define D_1 0x30 +#define D_2 0x31 +#define D_3 0x32 +#define D_4 0x33 +#define D_5 0x34 +#define D_6 0x35 +#define D_7 0x36 +#define D_8 0x37 +#define D_9 0x38 +#define D_10 0x39 +#define D_11 0x3A +#define D_12 0x3B +#define D_13 0x3C +#define D_14 0x3D +#define D_15 0x3E +#define D_16 0x3F + +#define E_1 0x40 +#define E_2 0x41 +#define E_3 0x42 +#define E_4 0x43 +#define E_5 0x44 +#define E_6 0x45 +#define E_7 0x46 +#define E_8 0x47 +#define E_9 0x48 +#define E_10 0x49 +#define E_11 0x4A +#define E_12 0x4B +#define E_13 0x4C +#define E_14 0x4D +#define E_15 0x4E +#define E_16 0x4F + +#define F_1 0x50 +#define F_2 0x51 +#define F_3 0x52 +#define F_4 0x53 +#define F_5 0x54 +#define F_6 0x55 +#define F_7 0x56 +#define F_8 0x57 +#define F_9 0x58 +#define F_10 0x59 +#define F_11 0x5A +#define F_12 0x5B +#define F_13 0x5C +#define F_14 0x5D +#define F_15 0x5E +#define F_16 0x5F + +#define G_1 0x60 +#define G_2 0x61 +#define G_3 0x62 +#define G_4 0x63 +#define G_5 0x64 +#define G_6 0x65 +#define G_7 0x66 +#define G_8 0x67 +#define G_9 0x68 +#define G_10 0x69 +#define G_11 0x6A +#define G_12 0x6B +#define G_13 0x6C +#define G_14 0x6D +#define G_15 0x6E +#define G_16 0x6F + +#define H_1 0x70 +#define H_2 0x71 +#define H_3 0x72 +#define H_4 0x73 +#define H_5 0x74 +#define H_6 0x75 +#define H_7 0x76 +#define H_8 0x77 +#define H_9 0x78 +#define H_10 0x79 +#define H_11 0x7A +#define H_12 0x7B +#define H_13 0x7C +#define H_14 0x7D +#define H_15 0x7E +#define H_16 0x7F + +#define I_1 0x80 +#define I_2 0x81 +#define I_3 0x82 +#define I_4 0x83 +#define I_5 0x84 +#define I_6 0x85 +#define I_7 0x86 +#define I_8 0x87 +#define I_9 0x88 +#define I_10 0x89 +#define I_11 0x8A +#define I_12 0x8B +#define I_13 0x8C +#define I_14 0x8D +#define I_15 0x8E +#define I_16 0x8F + +#define J_1 0x90 +#define J_2 0x91 +#define J_3 0x92 +#define J_4 0x93 +#define J_5 0x94 +#define J_6 0x95 +#define J_7 0x96 +#define J_8 0x97 +#define J_9 0x98 +#define J_10 0x99 +#define J_11 0x9A +#define J_12 0x9B +#define J_13 0x9C +#define J_14 0x9D +#define J_15 0x9E +#define J_16 0x9F + +#define K_1 0xA0 +#define K_2 0xA1 +#define K_3 0xA2 +#define K_4 0xA3 +#define K_5 0xA4 +#define K_6 0xA5 +#define K_7 0xA6 +#define K_8 0xA7 +#define K_9 0xA8 +#define K_10 0xA9 +#define K_11 0xAA +#define K_12 0xAB +#define K_13 0xAC +#define K_14 0xAD +#define K_15 0xAE +#define K_16 0xAF + +#define L_1 0xB0 +#define L_2 0xB1 +#define L_3 0xB2 +#define L_4 0xB3 +#define L_5 0xB4 +#define L_6 0xB5 +#define L_7 0xB6 +#define L_8 0xB7 +#define L_9 0xB8 +#define L_10 0xB9 +#define L_11 0xBA +#define L_12 0xBB +#define L_13 0xBC +#define L_14 0xBD +#define L_15 0xBE +#define L_16 0xBF diff --git a/drivers/led/snled27351.c b/drivers/led/snled27351.c new file mode 100644 index 0000000000..4e4067854e --- /dev/null +++ b/drivers/led/snled27351.c @@ -0,0 +1,281 @@ +/* Copyright 2021 @ Keychron (https://www.keychron.com) + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include "snled27351.h" +#include "i2c_master.h" + +#define SNLED27351_PWM_REGISTER_COUNT 192 +#define SNLED27351_LED_CONTROL_REGISTER_COUNT 24 + +#ifndef SNLED27351_I2C_TIMEOUT +# define SNLED27351_I2C_TIMEOUT 100 +#endif + +#ifndef SNLED27351_I2C_PERSISTENCE +# define SNLED27351_I2C_PERSISTENCE 0 +#endif + +#ifndef SNLED27351_PHASE_CHANNEL +# define SNLED27351_PHASE_CHANNEL SNLED27351_MSKPHASE_12CHANNEL +#endif + +#ifndef SNLED27351_CURRENT_TUNE +# define SNLED27351_CURRENT_TUNE \ + { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF } +#endif + +// Transfer buffer for TWITransmitData() +uint8_t g_twi_transfer_buffer[65]; + +// These buffers match the SNLED27351 PWM registers. +// The control buffers match the PG0 LED On/Off registers. +// Storing them like this is optimal for I2C transfers to the registers. +// We could optimize this and take out the unused registers from these +// buffers and the transfers in snled27351_write_pwm_buffer() but it's +// probably not worth the extra complexity. +uint8_t g_pwm_buffer[SNLED27351_DRIVER_COUNT][SNLED27351_PWM_REGISTER_COUNT]; +bool g_pwm_buffer_update_required[SNLED27351_DRIVER_COUNT] = {false}; + +uint8_t g_led_control_registers[SNLED27351_DRIVER_COUNT][SNLED27351_LED_CONTROL_REGISTER_COUNT] = {0}; +bool g_led_control_registers_update_required[SNLED27351_DRIVER_COUNT] = {false}; + +bool snled27351_write_register(uint8_t addr, uint8_t reg, uint8_t data) { + // If the transaction fails function returns false. + g_twi_transfer_buffer[0] = reg; + g_twi_transfer_buffer[1] = data; + +#if SNLED27351_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < SNLED27351_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, SNLED27351_I2C_TIMEOUT) != 0) { + return false; + } + } +#else + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, SNLED27351_I2C_TIMEOUT) != 0) { + return false; + } +#endif + return true; +} + +bool snled27351_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { + // Assumes PG1 is already selected. + // If any of the transactions fails function returns false. + // Transmit PWM registers in 3 transfers of 64 bytes. + + // Iterate over the pwm_buffer contents at 64 byte intervals. + for (uint8_t i = 0; i < SNLED27351_PWM_REGISTER_COUNT; i += 64) { + g_twi_transfer_buffer[0] = i; + // Copy the data from i to i+63. + // Device will auto-increment register for data after the first byte + // Thus this sets registers 0x00-0x0F, 0x10-0x1F, etc. in one transfer. + for (uint8_t j = 0; j < 64; j++) { + g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j]; + } + +#if SNLED27351_I2C_PERSISTENCE > 0 + for (uint8_t i = 0; i < SNLED27351_I2C_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 65, SNLED27351_I2C_TIMEOUT) != 0) { + return false; + } + } +#else + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 65, SNLED27351_I2C_TIMEOUT) != 0) { + return false; + } +#endif + } + return true; +} + +void snled27351_init_drivers(void) { + i2c_init(); + + snled27351_init(SNLED27351_I2C_ADDRESS_1); +#if defined(SNLED27351_I2C_ADDRESS_2) + snled27351_init(SNLED27351_I2C_ADDRESS_2); +# if defined(SNLED27351_I2C_ADDRESS_3) + snled27351_init(SNLED27351_I2C_ADDRESS_3); +# if defined(SNLED27351_I2C_ADDRESS_4) + snled27351_init(SNLED27351_I2C_ADDRESS_4); +# endif +# endif +#endif + + for (int i = 0; i < SNLED27351_LED_COUNT; i++) { + snled27351_set_led_control_register(i, true, true, true); + } + + snled27351_update_led_control_registers(SNLED27351_I2C_ADDRESS_1, 0); +#if defined(SNLED27351_I2C_ADDRESS_2) + snled27351_update_led_control_registers(SNLED27351_I2C_ADDRESS_2, 1); +# if defined(SNLED27351_I2C_ADDRESS_3) + snled27351_update_led_control_registers(SNLED27351_I2C_ADDRESS_3, 2); +# if defined(SNLED27351_I2C_ADDRESS_4) + snled27351_update_led_control_registers(SNLED27351_I2C_ADDRESS_4, 3); +# endif +# endif +#endif +} + +void snled27351_init(uint8_t addr) { + // Select to function page + snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_FUNCTION_PAGE); + // Setting LED driver to shutdown mode + snled27351_write_register(addr, SNLED27351_REG_CONFIGURATION, SNLED27351_MSKSW_SHUT_DOWN_MODE); + // Setting internal channel pulldown/pullup + snled27351_write_register(addr, SNLED27351_REG_PDU, SNLED27351_MSKSET_CA_CB_CHANNEL); + // Select number of scan phase + snled27351_write_register(addr, SNLED27351_REG_SCAN_PHASE, SNLED27351_PHASE_CHANNEL); + // Setting PWM Delay Phase + snled27351_write_register(addr, SNLED27351_REG_SLEW_RATE_CONTROL_MODE1, SNLED27351_MSKPWM_DELAY_PHASE_ENABLE); + // Setting Driving/Sinking Channel Slew Rate + snled27351_write_register(addr, SNLED27351_REG_SLEW_RATE_CONTROL_MODE2, SNLED27351_MSKDRIVING_SINKING_CHANNEL_SLEWRATE_ENABLE); + // Setting Iref + snled27351_write_register(addr, SNLED27351_REG_SOFTWARE_SLEEP, SNLED27351_MSKSLEEP_DISABLE); + // Set LED CONTROL PAGE (Page 0) + snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_CONTROL_PAGE); + for (int i = 0; i < SNLED27351_LED_CONTROL_ON_OFF_LENGTH; i++) { + snled27351_write_register(addr, i, 0x00); + } + + // Set PWM PAGE (Page 1) + snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_PWM_PAGE); + for (int i = 0; i < SNLED27351_LED_CURRENT_TUNE_LENGTH; i++) { + snled27351_write_register(addr, i, 0x00); + } + + // Set CURRENT PAGE (Page 4) + uint8_t current_tune_reg_list[SNLED27351_LED_CURRENT_TUNE_LENGTH] = SNLED27351_CURRENT_TUNE; + snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_CURRENT_TUNE_PAGE); + for (int i = 0; i < SNLED27351_LED_CURRENT_TUNE_LENGTH; i++) { + snled27351_write_register(addr, i, current_tune_reg_list[i]); + } + + // Enable LEDs ON/OFF + snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_CONTROL_PAGE); + for (int i = 0; i < SNLED27351_LED_CONTROL_ON_OFF_LENGTH; i++) { + snled27351_write_register(addr, i, 0xFF); + } + + // Select to function page + snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_FUNCTION_PAGE); + // Setting LED driver to normal mode + snled27351_write_register(addr, SNLED27351_REG_CONFIGURATION, SNLED27351_MSKSW_NORMAL_MODE); +} + +void snled27351_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) { + snled27351_led_t led; + if (index >= 0 && index < SNLED27351_LED_COUNT) { + memcpy_P(&led, (&g_snled27351_leds[index]), sizeof(led)); + + if (g_pwm_buffer[led.driver][led.r] == red && g_pwm_buffer[led.driver][led.g] == green && g_pwm_buffer[led.driver][led.b] == blue) { + return; + } + g_pwm_buffer[led.driver][led.r] = red; + g_pwm_buffer[led.driver][led.g] = green; + g_pwm_buffer[led.driver][led.b] = blue; + g_pwm_buffer_update_required[led.driver] = true; + } +} + +void snled27351_set_color_all(uint8_t red, uint8_t green, uint8_t blue) { + for (int i = 0; i < SNLED27351_LED_COUNT; i++) { + snled27351_set_color(i, red, green, blue); + } +} + +void snled27351_set_led_control_register(uint8_t index, bool red, bool green, bool blue) { + snled27351_led_t led; + memcpy_P(&led, (&g_snled27351_leds[index]), sizeof(led)); + + uint8_t control_register_r = led.r / 8; + uint8_t control_register_g = led.g / 8; + uint8_t control_register_b = led.b / 8; + uint8_t bit_r = led.r % 8; + uint8_t bit_g = led.g % 8; + uint8_t bit_b = led.b % 8; + + if (red) { + g_led_control_registers[led.driver][control_register_r] |= (1 << bit_r); + } else { + g_led_control_registers[led.driver][control_register_r] &= ~(1 << bit_r); + } + if (green) { + g_led_control_registers[led.driver][control_register_g] |= (1 << bit_g); + } else { + g_led_control_registers[led.driver][control_register_g] &= ~(1 << bit_g); + } + if (blue) { + g_led_control_registers[led.driver][control_register_b] |= (1 << bit_b); + } else { + g_led_control_registers[led.driver][control_register_b] &= ~(1 << bit_b); + } + + g_led_control_registers_update_required[led.driver] = true; +} + +void snled27351_update_pwm_buffers(uint8_t addr, uint8_t index) { + if (g_pwm_buffer_update_required[index]) { + snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_PWM_PAGE); + + // If any of the transactions fail we risk writing dirty PG0, + // refresh page 0 just in case. + if (!snled27351_write_pwm_buffer(addr, g_pwm_buffer[index])) { + g_led_control_registers_update_required[index] = true; + } + } + g_pwm_buffer_update_required[index] = false; +} + +void snled27351_update_led_control_registers(uint8_t addr, uint8_t index) { + if (g_led_control_registers_update_required[index]) { + snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_LED_CONTROL_PAGE); + for (int i = 0; i < SNLED27351_LED_CONTROL_REGISTER_COUNT; i++) { + snled27351_write_register(addr, i, g_led_control_registers[index][i]); + } + } + g_led_control_registers_update_required[index] = false; +} + +void snled27351_flush(void) { + snled27351_update_pwm_buffers(SNLED27351_I2C_ADDRESS_1, 0); +#if defined(SNLED27351_I2C_ADDRESS_2) + snled27351_update_pwm_buffers(SNLED27351_I2C_ADDRESS_2, 1); +# if defined(SNLED27351_I2C_ADDRESS_3) + snled27351_update_pwm_buffers(SNLED27351_I2C_ADDRESS_3, 2); +# if defined(SNLED27351_I2C_ADDRESS_4) + snled27351_update_pwm_buffers(SNLED27351_I2C_ADDRESS_4, 3); +# endif +# endif +#endif +} + +void snled27351_sw_return_normal(uint8_t addr) { + // Select to function page + snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_FUNCTION_PAGE); + // Setting LED driver to normal mode + snled27351_write_register(addr, SNLED27351_REG_CONFIGURATION, SNLED27351_MSKSW_NORMAL_MODE); +} + +void snled27351_sw_shutdown(uint8_t addr) { + // Select to function page + snled27351_write_register(addr, SNLED27351_REG_CONFIGURE_CMD_PAGE, SNLED27351_FUNCTION_PAGE); + // Setting LED driver to shutdown mode + snled27351_write_register(addr, SNLED27351_REG_CONFIGURATION, SNLED27351_MSKSW_SHUT_DOWN_MODE); + // Write SW Sleep Register + snled27351_write_register(addr, SNLED27351_REG_SOFTWARE_SLEEP, SNLED27351_MSKSLEEP_ENABLE); +} diff --git a/drivers/led/snled27351.h b/drivers/led/snled27351.h new file mode 100644 index 0000000000..77837d36aa --- /dev/null +++ b/drivers/led/snled27351.h @@ -0,0 +1,405 @@ +/* Copyright 2021 @ Keychron (https://www.keychron.com) + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#pragma once + +#include <stdint.h> +#include <stdbool.h> +#include "progmem.h" +#include "util.h" + +// ======== DEPRECATED DEFINES - DO NOT USE ======== +#ifdef DRIVER_ADDR_1 +# define SNLED27351_I2C_ADDRESS_1 DRIVER_ADDR_1 +#endif +#ifdef DRIVER_ADDR_2 +# define SNLED27351_I2C_ADDRESS_2 DRIVER_ADDR_2 +#endif +#ifdef DRIVER_ADDR_3 +# define SNLED27351_I2C_ADDRESS_3 DRIVER_ADDR_3 +#endif +#ifdef DRIVER_ADDR_4 +# define SNLED27351_I2C_ADDRESS_4 DRIVER_ADDR_4 +#endif +#ifdef CKLED2001_TIMEOUT +# define SNLED27351_I2C_TIMEOUT CKLED2001_TIMEOUT +#endif +#ifdef CKLED2001_PERSISTENCE +# define SNLED27351_I2C_PERSISTENCE CKLED2001_PERSISTENCE +#endif +#ifdef PHASE_CHANNEL +# define SNLED27351_PHASE_CHANNEL PHASE_CHANNEL +#endif +#ifdef CKLED2001_CURRENT_TUNE +# define SNLED27351_CURRENT_TUNE CKLED2001_CURRENT_TUNE +#endif + +#define MSKPHASE_12CHANNEL SNLED27351_MSKPHASE_12CHANNEL +#define MSKPHASE_11CHANNEL SNLED27351_MSKPHASE_11CHANNEL +#define MSKPHASE_10CHANNEL SNLED27351_MSKPHASE_10CHANNEL +#define MSKPHASE_9CHANNEL SNLED27351_MSKPHASE_9CHANNEL +#define MSKPHASE_8CHANNEL SNLED27351_MSKPHASE_8CHANNEL +#define MSKPHASE_7CHANNEL SNLED27351_MSKPHASE_7CHANNEL +#define MSKPHASE_6CHANNEL SNLED27351_MSKPHASE_6CHANNEL +#define MSKPHASE_5CHANNEL SNLED27351_MSKPHASE_5CHANNEL +#define MSKPHASE_4CHANNEL SNLED27351_MSKPHASE_4CHANNEL +#define MSKPHASE_3CHANNEL SNLED27351_MSKPHASE_3CHANNEL +#define MSKPHASE_2CHANNEL SNLED27351_MSKPHASE_2CHANNEL +#define MSKPHASE_1CHANNEL SNLED27351_MSKPHASE_1CHANNEL + +#define ckled2001_led snled27351_led_t +#define g_ckled2001_leds g_snled27351_leds +// ======== + +#define SNLED27351_I2C_ADDRESS_GND 0x74 +#define SNLED27351_I2C_ADDRESS_SCL 0x75 +#define SNLED27351_I2C_ADDRESS_SDA 0x76 +#define SNLED27351_I2C_ADDRESS_VDDIO 0x77 + +#if defined(RGB_MATRIX_SNLED27351) +# define SNLED27351_LED_COUNT RGB_MATRIX_LED_COUNT +#endif + +#if defined(SNLED27351_I2C_ADDRESS_4) +# define SNLED27351_DRIVER_COUNT 4 +#elif defined(SNLED27351_I2C_ADDRESS_3) +# define SNLED27351_DRIVER_COUNT 3 +#elif defined(SNLED27351_I2C_ADDRESS_2) +# define SNLED27351_DRIVER_COUNT 2 +#elif defined(SNLED27351_I2C_ADDRESS_1) +# define SNLED27351_DRIVER_COUNT 1 +#endif + +typedef struct snled27351_led_t { + uint8_t driver : 2; + uint8_t r; + uint8_t g; + uint8_t b; +} PACKED snled27351_led_t; + +extern const snled27351_led_t PROGMEM g_snled27351_leds[SNLED27351_LED_COUNT]; + +void snled27351_init_drivers(void); +void snled27351_init(uint8_t addr); +bool snled27351_write_register(uint8_t addr, uint8_t reg, uint8_t data); +bool snled27351_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer); + +void snled27351_set_color(int index, uint8_t red, uint8_t green, uint8_t blue); +void snled27351_set_color_all(uint8_t red, uint8_t green, uint8_t blue); + +void snled27351_set_led_control_register(uint8_t index, bool red, bool green, bool blue); + +// This should not be called from an interrupt +// (eg. from a timer interrupt). +// Call this while idle (in between matrix scans). +// If the buffer is dirty, it will update the driver with the buffer. +void snled27351_update_pwm_buffers(uint8_t addr, uint8_t index); +void snled27351_update_led_control_registers(uint8_t addr, uint8_t index); + +void snled27351_flush(void); + +void snled27351_sw_return_normal(uint8_t addr); +void snled27351_sw_shutdown(uint8_t addr); + +// Registers Page Define +#define SNLED27351_REG_CONFIGURE_CMD_PAGE 0xFD +#define SNLED27351_LED_CONTROL_PAGE 0x00 +#define SNLED27351_LED_PWM_PAGE 0x01 +#define SNLED27351_FUNCTION_PAGE 0x03 +#define SNLED27351_CURRENT_TUNE_PAGE 0x04 + +// Function Register: address 0x00 +#define SNLED27351_REG_CONFIGURATION 0x00 +#define SNLED27351_MSKSW_SHUT_DOWN_MODE (0x0 << 0) +#define SNLED27351_MSKSW_NORMAL_MODE (0x1 << 0) + +#define SNLED27351_REG_DRIVER_ID 0x11 +#define SNLED27351_DRIVER_ID 0x8A + +#define SNLED27351_REG_PDU 0x13 +#define SNLED27351_MSKSET_CA_CB_CHANNEL 0xAA +#define SNLED27351_MSKCLR_CA_CB_CHANNEL 0x00 + +#define SNLED27351_REG_SCAN_PHASE 0x14 +#define SNLED27351_MSKPHASE_12CHANNEL 0x00 +#define SNLED27351_MSKPHASE_11CHANNEL 0x01 +#define SNLED27351_MSKPHASE_10CHANNEL 0x02 +#define SNLED27351_MSKPHASE_9CHANNEL 0x03 +#define SNLED27351_MSKPHASE_8CHANNEL 0x04 +#define SNLED27351_MSKPHASE_7CHANNEL 0x05 +#define SNLED27351_MSKPHASE_6CHANNEL 0x06 +#define SNLED27351_MSKPHASE_5CHANNEL 0x07 +#define SNLED27351_MSKPHASE_4CHANNEL 0x08 +#define SNLED27351_MSKPHASE_3CHANNEL 0x09 +#define SNLED27351_MSKPHASE_2CHANNEL 0x0A +#define SNLED27351_MSKPHASE_1CHANNEL 0x0B + +#define SNLED27351_REG_SLEW_RATE_CONTROL_MODE1 0x15 +#define SNLED27351_MSKPWM_DELAY_PHASE_ENABLE 0x04 +#define SNLED27351_MSKPWM_DELAY_PHASE_DISABLE 0x00 + +#define SNLED27351_REG_SLEW_RATE_CONTROL_MODE2 0x16 +#define SNLED27351_MSKDRIVING_SINKING_CHANNEL_SLEWRATE_ENABLE 0xC0 +#define SNLED27351_MSKDRIVING_SINKING_CHANNEL_SLEWRATE_DISABLE 0x00 + +#define SNLED27351_REG_OPEN_SHORT_ENABLE 0x17 +#define SNLED27351_MSKOPEN_DETECTION_ENABLE (0x01 << 7) +#define SNLED27351_MSKOPEN_DETECTION_DISABLE (0x00) + +#define SNLED27351_MSKSHORT_DETECTION_ENABLE (0x01 << 6) +#define SNLED27351_MSKSHORT_DETECTION_DISABLE (0x00) + +#define SNLED27351_REG_OPEN_SHORT_DUTY 0x18 +#define SNLED27351_REG_OPEN_SHORT_FLAG 0x19 + +#define SNLED27351_MSKOPEN_DETECTION_INTERRUPT_ENABLE (0x01 << 7) +#define SNLED27351_MSKOPEN_DETECTION_INTERRUPT_DISABLE (0x00) + +#define SNLED27351_MSKSHORT_DETECTION_INTERRUPT_ENABLE (0x01 << 6) +#define SNLED27351_MSKSHORT_DETECTION_INTERRUPT_DISABLE (0x00) + +#define SNLED27351_REG_SOFTWARE_SLEEP 0x1A +#define SNLED27351_MSKSLEEP_ENABLE 0x02 +#define SNLED27351_MSKSLEEP_DISABLE 0x00 + +// LED Control Registers +#define SNLED27351_LED_CONTROL_ON_OFF_FIRST_ADDR 0x0 +#define SNLED27351_LED_CONTROL_ON_OFF_LAST_ADDR 0x17 +#define SNLED27351_LED_CONTROL_ON_OFF_LENGTH ((SNLED27351_LED_CONTROL_ON_OFF_LAST_ADDR - SNLED27351_LED_CONTROL_ON_OFF_FIRST_ADDR) + 1) + +#define SNLED27351_LED_CONTROL_OPEN_FIRST_ADDR 0x18 +#define SNLED27351_LED_CONTROL_OPEN_LAST_ADDR 0x2F +#define SNLED27351_LED_CONTROL_OPEN_LENGTH ((SNLED27351_LED_CONTROL_OPEN_LAST_ADDR - SNLED27351_LED_CONTROL_OPEN_FIRST_ADDR) + 1) + +#define SNLED27351_LED_CONTROL_SHORT_FIRST_ADDR 0x30 +#define SNLED27351_LED_CONTROL_SHORT_LAST_ADDR 0x47 +#define SNLED27351_LED_CONTROL_SHORT_LENGTH ((SNLED27351_LED_CONTROL_SHORT_LAST_ADDR - SNLED27351_LED_CONTROL_SHORT_FIRST_ADDR) + 1) + +#define SNLED27351_LED_CONTROL_PAGE_LENGTH 0x48 + +// LED Control Registers +#define SNLED27351_LED_PWM_FIRST_ADDR 0x00 +#define SNLED27351_LED_PWM_LAST_ADDR 0xBF +#define SNLED27351_LED_PWM_LENGTH 0xC0 + +// Current Tune Registers +#define SNLED27351_LED_CURRENT_TUNE_FIRST_ADDR 0x00 +#define SNLED27351_LED_CURRENT_TUNE_LAST_ADDR 0x0B +#define SNLED27351_LED_CURRENT_TUNE_LENGTH 0x0C + +#define A_1 0x00 +#define A_2 0x01 +#define A_3 0x02 +#define A_4 0x03 +#define A_5 0x04 +#define A_6 0x05 +#define A_7 0x06 +#define A_8 0x07 +#define A_9 0x08 +#define A_10 0x09 +#define A_11 0x0A +#define A_12 0x0B +#define A_13 0x0C +#define A_14 0x0D +#define A_15 0x0E +#define A_16 0x0F + +#define B_1 0x10 +#define B_2 0x11 +#define B_3 0x12 +#define B_4 0x13 +#define B_5 0x14 +#define B_6 0x15 +#define B_7 0x16 +#define B_8 0x17 +#define B_9 0x18 +#define B_10 0x19 +#define B_11 0x1A +#define B_12 0x1B +#define B_13 0x1C +#define B_14 0x1D +#define B_15 0x1E +#define B_16 0x1F + +#define C_1 0x20 +#define C_2 0x21 +#define C_3 0x22 +#define C_4 0x23 +#define C_5 0x24 +#define C_6 0x25 +#define C_7 0x26 +#define C_8 0x27 +#define C_9 0x28 +#define C_10 0x29 +#define C_11 0x2A +#define C_12 0x2B +#define C_13 0x2C +#define C_14 0x2D +#define C_15 0x2E +#define C_16 0x2F + +#define D_1 0x30 +#define D_2 0x31 +#define D_3 0x32 +#define D_4 0x33 +#define D_5 0x34 +#define D_6 0x35 +#define D_7 0x36 +#define D_8 0x37 +#define D_9 0x38 +#define D_10 0x39 +#define D_11 0x3A +#define D_12 0x3B +#define D_13 0x3C +#define D_14 0x3D +#define D_15 0x3E +#define D_16 0x3F + +#define E_1 0x40 +#define E_2 0x41 +#define E_3 0x42 +#define E_4 0x43 +#define E_5 0x44 +#define E_6 0x45 +#define E_7 0x46 +#define E_8 0x47 +#define E_9 0x48 +#define E_10 0x49 +#define E_11 0x4A +#define E_12 0x4B +#define E_13 0x4C +#define E_14 0x4D +#define E_15 0x4E +#define E_16 0x4F + +#define F_1 0x50 +#define F_2 0x51 +#define F_3 0x52 +#define F_4 0x53 +#define F_5 0x54 +#define F_6 0x55 +#define F_7 0x56 +#define F_8 0x57 +#define F_9 0x58 +#define F_10 0x59 +#define F_11 0x5A +#define F_12 0x5B +#define F_13 0x5C +#define F_14 0x5D +#define F_15 0x5E +#define F_16 0x5F + +#define G_1 0x60 +#define G_2 0x61 +#define G_3 0x62 +#define G_4 0x63 +#define G_5 0x64 +#define G_6 0x65 +#define G_7 0x66 +#define G_8 0x67 +#define G_9 0x68 +#define G_10 0x69 +#define G_11 0x6A +#define G_12 0x6B +#define G_13 0x6C +#define G_14 0x6D +#define G_15 0x6E +#define G_16 0x6F + +#define H_1 0x70 +#define H_2 0x71 +#define H_3 0x72 +#define H_4 0x73 +#define H_5 0x74 +#define H_6 0x75 +#define H_7 0x76 +#define H_8 0x77 +#define H_9 0x78 +#define H_10 0x79 +#define H_11 0x7A +#define H_12 0x7B +#define H_13 0x7C +#define H_14 0x7D +#define H_15 0x7E +#define H_16 0x7F + +#define I_1 0x80 +#define I_2 0x81 +#define I_3 0x82 +#define I_4 0x83 +#define I_5 0x84 +#define I_6 0x85 +#define I_7 0x86 +#define I_8 0x87 +#define I_9 0x88 +#define I_10 0x89 +#define I_11 0x8A +#define I_12 0x8B +#define I_13 0x8C +#define I_14 0x8D +#define I_15 0x8E +#define I_16 0x8F + +#define J_1 0x90 +#define J_2 0x91 +#define J_3 0x92 +#define J_4 0x93 +#define J_5 0x94 +#define J_6 0x95 +#define J_7 0x96 +#define J_8 0x97 +#define J_9 0x98 +#define J_10 0x99 +#define J_11 0x9A +#define J_12 0x9B +#define J_13 0x9C +#define J_14 0x9D +#define J_15 0x9E +#define J_16 0x9F + +#define K_1 0xA0 +#define K_2 0xA1 +#define K_3 0xA2 +#define K_4 0xA3 +#define K_5 0xA4 +#define K_6 0xA5 +#define K_7 0xA6 +#define K_8 0xA7 +#define K_9 0xA8 +#define K_10 0xA9 +#define K_11 0xAA +#define K_12 0xAB +#define K_13 0xAC +#define K_14 0xAD +#define K_15 0xAE +#define K_16 0xAF + +#define L_1 0xB0 +#define L_2 0xB1 +#define L_3 0xB2 +#define L_4 0xB3 +#define L_5 0xB4 +#define L_6 0xB5 +#define L_7 0xB6 +#define L_8 0xB7 +#define L_9 0xB8 +#define L_10 0xB9 +#define L_11 0xBA +#define L_12 0xBB +#define L_13 0xBC +#define L_14 0xBD +#define L_15 0xBE +#define L_16 0xBF diff --git a/drivers/oled/oled_driver.c b/drivers/oled/oled_driver.c index b9f7207813..4a2121cd7c 100644 --- a/drivers/oled/oled_driver.c +++ b/drivers/oled/oled_driver.c @@ -451,7 +451,7 @@ static void rotate_90(const uint8_t *src, uint8_t *dest) { } } -void oled_render(void) { +void oled_render_dirty(bool all) { // Do we have work to do? oled_dirty &= OLED_ALL_BLOCKS_MASK; if (!oled_dirty || !oled_initialized || oled_scrolling) { @@ -463,7 +463,7 @@ void oled_render(void) { uint8_t update_start = 0; uint8_t num_processed = 0; - while (oled_dirty && num_processed++ < OLED_UPDATE_PROCESS_LIMIT) { // render all dirty blocks (up to the configured limit) + while (oled_dirty && (num_processed++ < OLED_UPDATE_PROCESS_LIMIT || all)) { // render all dirty blocks (up to the configured limit) // Find next dirty block while (!(oled_dirty & ((OLED_BLOCK_TYPE)1 << update_start))) { ++update_start; diff --git a/drivers/oled/oled_driver.h b/drivers/oled/oled_driver.h index 91c376ec27..c3db7e6d97 100644 --- a/drivers/oled/oled_driver.h +++ b/drivers/oled/oled_driver.h @@ -353,20 +353,24 @@ oled_rotation_t oled_init_user(oled_rotation_t rotation); // Clears the display buffer, resets cursor position to 0, and sets the buffer to dirty for rendering void oled_clear(void); -// Renders the dirty chunks of the buffer to oled display -void oled_render(void); +// Alias to oled_render_dirty to avoid a change in api. +#define oled_render() oled_render_dirty(false) + +// Renders all dirty blocks to the display at one time or a subset depending on the value of +// all. +void oled_render_dirty(bool all); // Moves cursor to character position indicated by column and line, wraps if out of bounds // Max column denoted by 'oled_max_chars()' and max lines by 'oled_max_lines()' functions void oled_set_cursor(uint8_t col, uint8_t line); // Advances the cursor to the next page, writing ' ' if true -// Wraps to the begining when out of bounds +// Wraps to the beginning when out of bounds void oled_advance_page(bool clearPageRemainder); // Moves the cursor forward 1 character length // Advance page if there is not enough room for the next character -// Wraps to the begining when out of bounds +// Wraps to the beginning when out of bounds void oled_advance_char(void); // Writes a single character to the buffer at current cursor position @@ -433,10 +437,10 @@ bool oled_off(void); // not bool is_oled_on(void); -// Sets the brightness of the display +// Sets the brightness level of the display uint8_t oled_set_brightness(uint8_t level); -// Gets the current brightness of the display +// Gets the current brightness level of the display uint8_t oled_get_brightness(void); // Basically it's oled_render, but with timeout management and oled_task_user calling! @@ -458,12 +462,12 @@ void oled_scroll_set_area(uint8_t start_line, uint8_t end_line); // 0=2, 1=3, 2=4, 3=5, 4=25, 5=64, 6=128, 7=256 void oled_scroll_set_speed(uint8_t speed); -// Scrolls the entire display right +// Begin scrolling the entire display right // Returns true if the screen was scrolling or starts scrolling // NOTE: display contents cannot be changed while scrolling bool oled_scroll_right(void); -// Scrolls the entire display left +// Begin scrolling the entire display left // Returns true if the screen was scrolling or starts scrolling // NOTE: display contents cannot be changed while scrolling bool oled_scroll_left(void); diff --git a/drivers/painter/comms/qp_comms_dummy.c b/drivers/painter/comms/qp_comms_dummy.c new file mode 100644 index 0000000000..2ed49d2232 --- /dev/null +++ b/drivers/painter/comms/qp_comms_dummy.c @@ -0,0 +1,34 @@ +// Copyright 2023 Nick Brassel (@tzarc) +// SPDX-License-Identifier: GPL-2.0-or-later + +#ifdef QUANTUM_PAINTER_DUMMY_COMMS_ENABLE + +# include "qp_comms_dummy.h" + +static bool dummy_comms_init(painter_device_t device) { + // No-op. + return true; +} + +static bool dummy_comms_start(painter_device_t device) { + // No-op. + return true; +} + +static void dummy_comms_stop(painter_device_t device) { + // No-op. +} + +uint32_t dummy_comms_send(painter_device_t device, const void *data, uint32_t byte_count) { + // No-op. + return byte_count; +} + +painter_comms_vtable_t dummy_comms_vtable = { + // These are all effective no-op's because they're not actually needed. + .comms_init = dummy_comms_init, + .comms_start = dummy_comms_start, + .comms_stop = dummy_comms_stop, + .comms_send = dummy_comms_send}; + +#endif // QUANTUM_PAINTER_DUMMY_COMMS_ENABLE diff --git a/drivers/painter/comms/qp_comms_dummy.h b/drivers/painter/comms/qp_comms_dummy.h new file mode 100644 index 0000000000..b2d5d6eea5 --- /dev/null +++ b/drivers/painter/comms/qp_comms_dummy.h @@ -0,0 +1,11 @@ +// Copyright 2023 Nick Brassel (@tzarc) +// SPDX-License-Identifier: GPL-2.0-or-later +#pragma once + +#ifdef QUANTUM_PAINTER_DUMMY_COMMS_ENABLE + +# include "qp_internal.h" + +extern painter_comms_vtable_t dummy_comms_vtable; + +#endif // QUANTUM_PAINTER_DUMMY_COMMS_ENABLE diff --git a/drivers/painter/comms/qp_comms_i2c.c b/drivers/painter/comms/qp_comms_i2c.c new file mode 100644 index 0000000000..ec45ddfb3b --- /dev/null +++ b/drivers/painter/comms/qp_comms_i2c.c @@ -0,0 +1,94 @@ +// Copyright 2022 Nick Brassel (@tzarc) +// SPDX-License-Identifier: GPL-2.0-or-later + +#ifdef QUANTUM_PAINTER_I2C_ENABLE + +# include "i2c_master.h" +# include "qp_comms_i2c.h" + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Helpers + +static uint32_t qp_comms_i2c_send_raw(painter_device_t device, const void *data, uint32_t byte_count) { + painter_driver_t * driver = (painter_driver_t *)device; + qp_comms_i2c_config_t *comms_config = (qp_comms_i2c_config_t *)driver->comms_config; + i2c_status_t res = i2c_transmit(comms_config->chip_address << 1, data, byte_count, I2C_TIMEOUT); + if (res < 0) { + return 0; + } + return byte_count; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Base I2C support + +bool qp_comms_i2c_init(painter_device_t device) { + i2c_init(); + return true; +} + +bool qp_comms_i2c_start(painter_device_t device) { + painter_driver_t * driver = (painter_driver_t *)device; + qp_comms_i2c_config_t *comms_config = (qp_comms_i2c_config_t *)driver->comms_config; + return i2c_start(comms_config->chip_address << 1) == I2C_STATUS_SUCCESS; +} + +uint32_t qp_comms_i2c_send_data(painter_device_t device, const void *data, uint32_t byte_count) { + return qp_comms_i2c_send_raw(device, data, byte_count); +} + +void qp_comms_i2c_stop(painter_device_t device) { + i2c_stop(); +} + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Command+Data I2C support + +static const uint8_t cmd_byte = 0x00; +static const uint8_t data_byte = 0x40; + +void qp_comms_i2c_cmddata_send_command(painter_device_t device, uint8_t cmd) { + uint8_t buf[2] = {cmd_byte, cmd}; + qp_comms_i2c_send_raw(device, &buf, 2); +} + +uint32_t qp_comms_i2c_cmddata_send_data(painter_device_t device, const void *data, uint32_t byte_count) { + uint8_t buf[1 + byte_count]; + buf[0] = data_byte; + memcpy(&buf[1], data, byte_count); + if (qp_comms_i2c_send_raw(device, buf, sizeof(buf)) != sizeof(buf)) { + return 0; + } + return byte_count; +} + +void qp_comms_i2c_bulk_command_sequence(painter_device_t device, const uint8_t *sequence, size_t sequence_len) { + uint8_t buf[32]; + for (size_t i = 0; i < sequence_len;) { + uint8_t command = sequence[i]; + uint8_t delay = sequence[i + 1]; + uint8_t num_bytes = sequence[i + 2]; + buf[0] = cmd_byte; + buf[1] = command; + memcpy(&buf[2], &sequence[i + 3], num_bytes); + qp_comms_i2c_send_raw(device, buf, num_bytes + 2); + if (delay > 0) { + wait_ms(delay); + } + i += (3 + num_bytes); + } +} + +const painter_comms_with_command_vtable_t i2c_comms_cmddata_vtable = { + .base = + { + .comms_init = qp_comms_i2c_init, + .comms_start = qp_comms_i2c_start, + .comms_send = qp_comms_i2c_cmddata_send_data, + .comms_stop = qp_comms_i2c_stop, + }, + .send_command = qp_comms_i2c_cmddata_send_command, + .bulk_command_sequence = qp_comms_i2c_bulk_command_sequence, +}; + +#endif // QUANTUM_PAINTER_I2C_ENABLE diff --git a/drivers/painter/comms/qp_comms_i2c.h b/drivers/painter/comms/qp_comms_i2c.h new file mode 100644 index 0000000000..70083d6526 --- /dev/null +++ b/drivers/painter/comms/qp_comms_i2c.h @@ -0,0 +1,28 @@ +// Copyright 2022 Nick Brassel (@tzarc) +// SPDX-License-Identifier: GPL-2.0-or-later +#pragma once + +#ifdef QUANTUM_PAINTER_I2C_ENABLE + +# include <stdint.h> + +# include "gpio.h" +# include "qp_internal.h" + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Base I2C support + +typedef struct qp_comms_i2c_config_t { + uint8_t chip_address; +} qp_comms_i2c_config_t; + +bool qp_comms_i2c_init(painter_device_t device); +bool qp_comms_i2c_start(painter_device_t device); +uint32_t qp_comms_i2c_send_data(painter_device_t device, const void* data, uint32_t byte_count); +void qp_comms_i2c_stop(painter_device_t device); + +extern const painter_comms_with_command_vtable_t i2c_comms_cmddata_vtable; + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + +#endif // QUANTUM_PAINTER_I2C_ENABLE diff --git a/drivers/painter/comms/qp_comms_spi.c b/drivers/painter/comms/qp_comms_spi.c index 7534e844d8..9f52bc7d1f 100644 --- a/drivers/painter/comms/qp_comms_spi.c +++ b/drivers/painter/comms/qp_comms_spi.c @@ -105,13 +105,21 @@ void qp_comms_spi_dc_reset_send_command(painter_device_t device, uint8_t cmd) { } void qp_comms_spi_dc_reset_bulk_command_sequence(painter_device_t device, const uint8_t *sequence, size_t sequence_len) { + painter_driver_t * driver = (painter_driver_t *)device; + qp_comms_spi_dc_reset_config_t *comms_config = (qp_comms_spi_dc_reset_config_t *)driver->comms_config; for (size_t i = 0; i < sequence_len;) { uint8_t command = sequence[i]; uint8_t delay = sequence[i + 1]; uint8_t num_bytes = sequence[i + 2]; qp_comms_spi_dc_reset_send_command(device, command); if (num_bytes > 0) { - qp_comms_spi_dc_reset_send_data(device, &sequence[i + 3], num_bytes); + if (comms_config->command_params_uses_command_pin) { + for (uint8_t j = 0; j < num_bytes; j++) { + qp_comms_spi_dc_reset_send_command(device, sequence[i + 3 + j]); + } + } else { + qp_comms_spi_dc_reset_send_data(device, &sequence[i + 3], num_bytes); + } } if (delay > 0) { wait_ms(delay); diff --git a/drivers/painter/comms/qp_comms_spi.h b/drivers/painter/comms/qp_comms_spi.h index b3da86d573..ff323c3c10 100644 --- a/drivers/painter/comms/qp_comms_spi.h +++ b/drivers/painter/comms/qp_comms_spi.h @@ -1,6 +1,5 @@ // Copyright 2021 Nick Brassel (@tzarc) // SPDX-License-Identifier: GPL-2.0-or-later - #pragma once #ifdef QUANTUM_PAINTER_SPI_ENABLE @@ -36,6 +35,7 @@ typedef struct qp_comms_spi_dc_reset_config_t { qp_comms_spi_config_t spi_config; pin_t dc_pin; pin_t reset_pin; + bool command_params_uses_command_pin; // keep D/C held low when sending command sequences for data bytes } qp_comms_spi_dc_reset_config_t; void qp_comms_spi_dc_reset_send_command(painter_device_t device, uint8_t cmd); diff --git a/drivers/painter/gc9a01/qp_gc9a01.c b/drivers/painter/gc9a01/qp_gc9a01.c index a2eb2cf57c..fe6fa7a9d0 100644 --- a/drivers/painter/gc9a01/qp_gc9a01.c +++ b/drivers/painter/gc9a01/qp_gc9a01.c @@ -2,7 +2,6 @@ // Copyright 2023 Nick Brassel (@tzarc) // SPDX-License-Identifier: GPL-2.0-or-later -#include <wait.h> #include "qp_internal.h" #include "qp_comms.h" #include "qp_gc9a01.h" @@ -135,13 +134,14 @@ painter_device_t qp_gc9a01_make_spi_device(uint16_t panel_width, uint16_t panel_ driver->base.offset_y = 0; // SPI and other pin configuration - driver->base.comms_config = &driver->spi_dc_reset_config; - driver->spi_dc_reset_config.spi_config.chip_select_pin = chip_select_pin; - driver->spi_dc_reset_config.spi_config.divisor = spi_divisor; - driver->spi_dc_reset_config.spi_config.lsb_first = false; - driver->spi_dc_reset_config.spi_config.mode = spi_mode; - driver->spi_dc_reset_config.dc_pin = dc_pin; - driver->spi_dc_reset_config.reset_pin = reset_pin; + driver->base.comms_config = &driver->spi_dc_reset_config; + driver->spi_dc_reset_config.spi_config.chip_select_pin = chip_select_pin; + driver->spi_dc_reset_config.spi_config.divisor = spi_divisor; + driver->spi_dc_reset_config.spi_config.lsb_first = false; + driver->spi_dc_reset_config.spi_config.mode = spi_mode; + driver->spi_dc_reset_config.dc_pin = dc_pin; + driver->spi_dc_reset_config.reset_pin = reset_pin; + driver->spi_dc_reset_config.command_params_uses_command_pin = false; if (!qp_internal_register_device((painter_device_t)driver)) { memset(driver, 0, sizeof(tft_panel_dc_reset_painter_device_t)); diff --git a/drivers/painter/gc9a01/qp_gc9a01.h b/drivers/painter/gc9a01/qp_gc9a01.h index e2b1939564..31a3804b50 100644 --- a/drivers/painter/gc9a01/qp_gc9a01.h +++ b/drivers/painter/gc9a01/qp_gc9a01.h @@ -1,6 +1,5 @@ // Copyright 2021 Paul Cotter (@gr1mr3aver) // SPDX-License-Identifier: GPL-2.0-or-later - #pragma once #include "gpio.h" diff --git a/drivers/painter/gc9a01/qp_gc9a01_opcodes.h b/drivers/painter/gc9a01/qp_gc9a01_opcodes.h index 6ff4efe7a8..828e42752b 100644 --- a/drivers/painter/gc9a01/qp_gc9a01_opcodes.h +++ b/drivers/painter/gc9a01/qp_gc9a01_opcodes.h @@ -1,6 +1,5 @@ // Copyright 2021 Paul Cotter (@gr1mr3aver) // SPDX-License-Identifier: GPL-2.0-or-later - #pragma once //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// diff --git a/drivers/painter/generic/qp_rgb565_surface.c b/drivers/painter/generic/qp_rgb565_surface.c deleted file mode 100644 index 9c283e0687..0000000000 --- a/drivers/painter/generic/qp_rgb565_surface.c +++ /dev/null @@ -1,284 +0,0 @@ -// Copyright 2022 Nick Brassel (@tzarc) -// SPDX-License-Identifier: GPL-2.0-or-later -#include "color.h" -#include "qp_rgb565_surface.h" -#include "qp_draw.h" - -//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -// Common - -// Device definition -typedef struct rgb565_surface_painter_device_t { - painter_driver_t base; // must be first, so it can be cast to/from the painter_device_t* type - - // The target buffer - uint16_t *buffer; - - // Manually manage the viewport for streaming pixel data to the display - uint16_t viewport_l; - uint16_t viewport_t; - uint16_t viewport_r; - uint16_t viewport_b; - - // Current write location to the display when streaming pixel data - uint16_t pixdata_x; - uint16_t pixdata_y; - - // Maintain a dirty region so we can stream only what we need - bool is_dirty; - uint16_t dirty_l; - uint16_t dirty_t; - uint16_t dirty_r; - uint16_t dirty_b; - -} rgb565_surface_painter_device_t; - -// Driver storage -rgb565_surface_painter_device_t surface_drivers[RGB565_SURFACE_NUM_DEVICES] = {0}; - -//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -// Helpers - -static inline void increment_pixdata_location(rgb565_surface_painter_device_t *surface) { - // Increment the X-position - surface->pixdata_x++; - - // If the x-coord has gone past the right-side edge, loop it back around and increment the y-coord - if (surface->pixdata_x > surface->viewport_r) { - surface->pixdata_x = surface->viewport_l; - surface->pixdata_y++; - } - - // If the y-coord has gone past the bottom, loop it back to the top - if (surface->pixdata_y > surface->viewport_b) { - surface->pixdata_y = surface->viewport_t; - } -} - -static inline void setpixel(rgb565_surface_painter_device_t *surface, uint16_t x, uint16_t y, uint16_t rgb565) { - // Skip messing with the dirty info if the original value already matches - if (surface->buffer[y * surface->base.panel_width + x] != rgb565) { - // Maintain dirty region - if (surface->dirty_l > x) { - surface->dirty_l = x; - } - if (surface->dirty_r < x) { - surface->dirty_r = x; - } - if (surface->dirty_t > y) { - surface->dirty_t = y; - } - if (surface->dirty_b < y) { - surface->dirty_b = y; - } - - // Always dirty after a setpixel - surface->is_dirty = true; - - // Update the pixel data in the buffer - surface->buffer[y * surface->base.panel_width + x] = rgb565; - } -} - -static inline void append_pixel(rgb565_surface_painter_device_t *surface, uint16_t rgb565) { - setpixel(surface, surface->pixdata_x, surface->pixdata_y, rgb565); - increment_pixdata_location(surface); -} - -static inline void stream_pixdata(rgb565_surface_painter_device_t *surface, const uint16_t *data, uint32_t native_pixel_count) { - for (uint32_t pixel_counter = 0; pixel_counter < native_pixel_count; ++pixel_counter) { - append_pixel(surface, data[pixel_counter]); - } -} - -//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -// Driver vtable - -static bool qp_rgb565_surface_init(painter_device_t device, painter_rotation_t rotation) { - painter_driver_t * driver = (painter_driver_t *)device; - rgb565_surface_painter_device_t *surface = (rgb565_surface_painter_device_t *)driver; - memset(surface->buffer, 0, driver->panel_width * driver->panel_height * driver->native_bits_per_pixel / 8); - return true; -} - -static bool qp_rgb565_surface_power(painter_device_t device, bool power_on) { - // No-op. - return true; -} - -static bool qp_rgb565_surface_clear(painter_device_t device) { - painter_driver_t *driver = (painter_driver_t *)device; - driver->driver_vtable->init(device, driver->rotation); // Re-init the surface - return true; -} - -static bool qp_rgb565_surface_flush(painter_device_t device) { - painter_driver_t * driver = (painter_driver_t *)device; - rgb565_surface_painter_device_t *surface = (rgb565_surface_painter_device_t *)driver; - surface->dirty_l = surface->dirty_t = UINT16_MAX; - surface->dirty_r = surface->dirty_b = 0; - surface->is_dirty = false; - return true; -} - -static bool qp_rgb565_surface_viewport(painter_device_t device, uint16_t left, uint16_t top, uint16_t right, uint16_t bottom) { - painter_driver_t * driver = (painter_driver_t *)device; - rgb565_surface_painter_device_t *surface = (rgb565_surface_painter_device_t *)driver; - - // Set the viewport locations - surface->viewport_l = left; - surface->viewport_t = top; - surface->viewport_r = right; - surface->viewport_b = bottom; - - // Reset the write location to the top left - surface->pixdata_x = left; - surface->pixdata_y = top; - return true; -} - -// Stream pixel data to the current write position in GRAM -static bool qp_rgb565_surface_pixdata(painter_device_t device, const void *pixel_data, uint32_t native_pixel_count) { - painter_driver_t * driver = (painter_driver_t *)device; - rgb565_surface_painter_device_t *surface = (rgb565_surface_painter_device_t *)driver; - stream_pixdata(surface, (const uint16_t *)pixel_data, native_pixel_count); - return true; -} - -// Pixel colour conversion -static bool qp_rgb565_surface_palette_convert_rgb565_swapped(painter_device_t device, int16_t palette_size, qp_pixel_t *palette) { - for (int16_t i = 0; i < palette_size; ++i) { - RGB rgb = hsv_to_rgb_nocie((HSV){palette[i].hsv888.h, palette[i].hsv888.s, palette[i].hsv888.v}); - uint16_t rgb565 = (((uint16_t)rgb.r) >> 3) << 11 | (((uint16_t)rgb.g) >> 2) << 5 | (((uint16_t)rgb.b) >> 3); - palette[i].rgb565 = __builtin_bswap16(rgb565); - } - return true; -} - -// Append pixels to the target location, keyed by the pixel index -static bool qp_rgb565_surface_append_pixels_rgb565(painter_device_t device, uint8_t *target_buffer, qp_pixel_t *palette, uint32_t pixel_offset, uint32_t pixel_count, uint8_t *palette_indices) { - uint16_t *buf = (uint16_t *)target_buffer; - for (uint32_t i = 0; i < pixel_count; ++i) { - buf[pixel_offset + i] = palette[palette_indices[i]].rgb565; - } - return true; -} - -// Append data to the target location -static bool qp_rgb565_surface_append_pixdata(painter_device_t device, uint8_t *target_buffer, uint32_t pixdata_offset, uint8_t pixdata_byte) { - target_buffer[pixdata_offset] = pixdata_byte; - return true; -} - -const painter_driver_vtable_t rgb565_surface_driver_vtable = { - .init = qp_rgb565_surface_init, - .power = qp_rgb565_surface_power, - .clear = qp_rgb565_surface_clear, - .flush = qp_rgb565_surface_flush, - .pixdata = qp_rgb565_surface_pixdata, - .viewport = qp_rgb565_surface_viewport, - .palette_convert = qp_rgb565_surface_palette_convert_rgb565_swapped, - .append_pixels = qp_rgb565_surface_append_pixels_rgb565, - .append_pixdata = qp_rgb565_surface_append_pixdata, -}; - -//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -// Comms vtable - -static bool qp_rgb565_surface_comms_init(painter_device_t device) { - // No-op. - return true; -} -static bool qp_rgb565_surface_comms_start(painter_device_t device) { - // No-op. - return true; -} -static void qp_rgb565_surface_comms_stop(painter_device_t device) { - // No-op. -} -uint32_t qp_rgb565_surface_comms_send(painter_device_t device, const void *data, uint32_t byte_count) { - // No-op. - return byte_count; -} - -painter_comms_vtable_t rgb565_surface_driver_comms_vtable = { - // These are all effective no-op's because they're not actually needed. - .comms_init = qp_rgb565_surface_comms_init, - .comms_start = qp_rgb565_surface_comms_start, - .comms_stop = qp_rgb565_surface_comms_stop, - .comms_send = qp_rgb565_surface_comms_send}; - -//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -// Factory function for creating a handle to an rgb565 surface - -painter_device_t qp_rgb565_make_surface(uint16_t panel_width, uint16_t panel_height, void *buffer) { - for (uint32_t i = 0; i < RGB565_SURFACE_NUM_DEVICES; ++i) { - rgb565_surface_painter_device_t *driver = &surface_drivers[i]; - if (!driver->base.driver_vtable) { - driver->base.driver_vtable = &rgb565_surface_driver_vtable; - driver->base.comms_vtable = &rgb565_surface_driver_comms_vtable; - driver->base.native_bits_per_pixel = 16; // RGB565 - driver->base.panel_width = panel_width; - driver->base.panel_height = panel_height; - driver->base.rotation = QP_ROTATION_0; - driver->base.offset_x = 0; - driver->base.offset_y = 0; - driver->buffer = (uint16_t *)buffer; - return (painter_device_t)driver; - } - } - return NULL; -} - -//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -// Drawing routine to copy out the dirty region and send it to another device - -bool qp_rgb565_surface_draw(painter_device_t surface, painter_device_t display, uint16_t x, uint16_t y) { - painter_driver_t * surface_driver = (painter_driver_t *)surface; - rgb565_surface_painter_device_t *surface_handle = (rgb565_surface_painter_device_t *)surface_driver; - - // If we're not dirty... we're done. - if (!surface_handle->is_dirty) { - return true; - } - - // Set the target drawing area - bool ok = qp_viewport(display, x + surface_handle->dirty_l, y + surface_handle->dirty_t, x + surface_handle->dirty_r, y + surface_handle->dirty_b); - if (!ok) { - return false; - } - - // Housekeeping of the amount of pixels to transfer - uint32_t total_pixel_count = QUANTUM_PAINTER_PIXDATA_BUFFER_SIZE / sizeof(uint16_t); - uint32_t pixel_counter = 0; - uint16_t *target_buffer = (uint16_t *)qp_internal_global_pixdata_buffer; - - // Fill the global pixdata area so that we can start transferring to the panel - for (uint16_t y = surface_handle->dirty_t; y <= surface_handle->dirty_b; ++y) { - for (uint16_t x = surface_handle->dirty_l; x <= surface_handle->dirty_r; ++x) { - // Update the target buffer - target_buffer[pixel_counter++] = surface_handle->buffer[y * surface_handle->base.panel_width + x]; - - // If we've accumulated enough data, send it - if (pixel_counter == total_pixel_count) { - ok = qp_pixdata(display, qp_internal_global_pixdata_buffer, pixel_counter); - if (!ok) { - return false; - } - // Reset the counter - pixel_counter = 0; - } - } - } - - // If there's any leftover data, send it - if (pixel_counter > 0) { - ok = qp_pixdata(display, qp_internal_global_pixdata_buffer, pixel_counter); - if (!ok) { - return false; - } - } - - // Clear the dirty info for the surface - return qp_flush(surface); -} diff --git a/drivers/painter/generic/qp_rgb565_surface.h b/drivers/painter/generic/qp_rgb565_surface.h deleted file mode 100644 index 19e919bb91..0000000000 --- a/drivers/painter/generic/qp_rgb565_surface.h +++ /dev/null @@ -1,42 +0,0 @@ -// Copyright 2022 Nick Brassel (@tzarc) -// SPDX-License-Identifier: GPL-2.0-or-later -#include "qp_internal.h" - -//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -// Quantum Painter RGB565 surface configurables (add to your keyboard's config.h) - -#ifndef RGB565_SURFACE_NUM_DEVICES -/** - * @def This controls the maximum number of surface devices that Quantum Painter can use at any one time. - * Increasing this number allows for multiple framebuffers to be used. Each requires its own RAM allocation. - */ -# define RGB565_SURFACE_NUM_DEVICES 1 -#endif - -//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -// Forward declarations - -#ifdef QUANTUM_PAINTER_RGB565_SURFACE_ENABLE -/** - * Factory method for an RGB565 surface (aka framebuffer). - * - * @param panel_width[in] the width of the display panel - * @param panel_height[in] the height of the display panel - * @param buffer[in] pointer to a preallocated buffer of size `(sizeof(uint16_t) * panel_width * panel_height)` - * @return the device handle used with all drawing routines in Quantum Painter - */ -painter_device_t qp_rgb565_make_surface(uint16_t panel_width, uint16_t panel_height, void *buffer); - -/** - * Helper method to draw the dirty contents of the framebuffer to the target device. - * - * After successful completion, the dirty area is reset. - * - * @param surface[in] the surface to copy from - * @param display[in] the display to copy into - * @param x[in] the x-location of the original position of the framebuffer - * @param y[in] the y-location of the original position of the framebuffer - * @return whether the draw operation completed successfully - */ -bool qp_rgb565_surface_draw(painter_device_t surface, painter_device_t display, uint16_t x, uint16_t y); -#endif // QUANTUM_PAINTER_RGB565_SURFACE_ENABLE diff --git a/drivers/painter/generic/qp_surface.h b/drivers/painter/generic/qp_surface.h new file mode 100644 index 0000000000..a291793649 --- /dev/null +++ b/drivers/painter/generic/qp_surface.h @@ -0,0 +1,67 @@ +// Copyright 2022 Nick Brassel (@tzarc) +// SPDX-License-Identifier: GPL-2.0-or-later +#pragma once + +#include "qp_internal.h" + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Quantum Painter surface helpers + +// Helper for determining buffer size required for a surface +#define SURFACE_REQUIRED_BUFFER_BYTE_SIZE(w, h, bpp) ((((w) * (h) * (bpp)) + 7) / 8) + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Quantum Painter surface configurables (add to your keyboard's config.h) + +#ifndef SURFACE_NUM_DEVICES +/** + * @def This controls the maximum number of surface devices that Quantum Painter can use at any one time. + * Increasing this number allows for multiple framebuffers to be used. Each requires its own RAM allocation. + */ +# define SURFACE_NUM_DEVICES 1 +#endif + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Forward declarations + +#ifdef QUANTUM_PAINTER_SURFACE_ENABLE + +// Surface struct +struct surface_painter_device_t; +typedef struct surface_painter_device_t surface_painter_device_t; + +/** + * Factory method for an RGB565 surface (aka framebuffer). + * + * @param panel_width[in] the width of the display panel + * @param panel_height[in] the height of the display panel + * @param buffer[in] pointer to a preallocated uint8_t buffer of size `SURFACE_REQUIRED_BUFFER_BYTE_SIZE(panel_width, panel_height, 16)` + * @return the device handle used with all drawing routines in Quantum Painter + */ +painter_device_t qp_make_rgb565_surface(uint16_t panel_width, uint16_t panel_height, void *buffer); + +/** + * Factory method for a 1bpp monochrome surface (aka framebuffer). + * + * @param panel_width[in] the width of the display panel + * @param panel_height[in] the height of the display panel + * @param buffer[in] pointer to a preallocated uint8_t buffer of size `SURFACE_REQUIRED_BUFFER_BYTE_SIZE(panel_width, panel_height, 1)` + * @return the device handle used with all drawing routines in Quantum Painter + */ +painter_device_t qp_make_mono1bpp_surface(uint16_t panel_width, uint16_t panel_height, void *buffer); + +/** + * Helper method to draw the contents of the framebuffer to the target device. + * + * After successful completion, the dirty area is reset. + * + * @param surface[in] the surface to copy from + * @param target[in] the target device to copy into + * @param x[in] the x-location of the original position of the framebuffer + * @param y[in] the y-location of the original position of the framebuffer + * @param entire_surface[in] whether the entire surface should be drawn, instead of just the dirty region + * @return whether the draw operation completed successfully + */ +bool qp_surface_draw(painter_device_t surface, painter_device_t target, uint16_t x, uint16_t y, bool entire_surface); + +#endif // QUANTUM_PAINTER_SURFACE_ENABLE diff --git a/drivers/painter/generic/qp_surface_common.c b/drivers/painter/generic/qp_surface_common.c new file mode 100644 index 0000000000..2da96c73ac --- /dev/null +++ b/drivers/painter/generic/qp_surface_common.c @@ -0,0 +1,141 @@ +// Copyright 2022 Nick Brassel (@tzarc) +// SPDX-License-Identifier: GPL-2.0-or-later + +#include "color.h" +#include "qp_draw.h" +#include "qp_surface_internal.h" + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Driver storage + +surface_painter_device_t surface_drivers[SURFACE_NUM_DEVICES] = {0}; + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Helpers + +void qp_surface_increment_pixdata_location(surface_viewport_data_t *viewport) { + // Increment the X-position + viewport->pixdata_x++; + + // If the x-coord has gone past the right-side edge, loop it back around and increment the y-coord + if (viewport->pixdata_x > viewport->viewport_r) { + viewport->pixdata_x = viewport->viewport_l; + viewport->pixdata_y++; + } + + // If the y-coord has gone past the bottom, loop it back to the top + if (viewport->pixdata_y > viewport->viewport_b) { + viewport->pixdata_y = viewport->viewport_t; + } +} + +void qp_surface_update_dirty(surface_dirty_data_t *dirty, uint16_t x, uint16_t y) { + // Maintain dirty region + if (dirty->l > x) { + dirty->l = x; + dirty->is_dirty = true; + } + if (dirty->r < x) { + dirty->r = x; + dirty->is_dirty = true; + } + if (dirty->t > y) { + dirty->t = y; + dirty->is_dirty = true; + } + if (dirty->b < y) { + dirty->b = y; + dirty->is_dirty = true; + } +} + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Driver vtable + +bool qp_surface_init(painter_device_t device, painter_rotation_t rotation) { + painter_driver_t * driver = (painter_driver_t *)device; + surface_painter_device_t *surface = (surface_painter_device_t *)driver; + memset(surface->buffer, 0, SURFACE_REQUIRED_BUFFER_BYTE_SIZE(driver->panel_width, driver->panel_height, driver->native_bits_per_pixel)); + + surface->dirty.l = 0; + surface->dirty.t = 0; + surface->dirty.r = surface->base.panel_width - 1; + surface->dirty.b = surface->base.panel_height - 1; + surface->dirty.is_dirty = true; + + return true; +} + +bool qp_surface_power(painter_device_t device, bool power_on) { + // No-op. + return true; +} + +bool qp_surface_clear(painter_device_t device) { + painter_driver_t *driver = (painter_driver_t *)device; + driver->driver_vtable->init(device, driver->rotation); // Re-init the surface + return true; +} + +bool qp_surface_flush(painter_device_t device) { + painter_driver_t * driver = (painter_driver_t *)device; + surface_painter_device_t *surface = (surface_painter_device_t *)driver; + surface->dirty.l = surface->dirty.t = UINT16_MAX; + surface->dirty.r = surface->dirty.b = 0; + surface->dirty.is_dirty = false; + return true; +} + +bool qp_surface_viewport(painter_device_t device, uint16_t left, uint16_t top, uint16_t right, uint16_t bottom) { + painter_driver_t * driver = (painter_driver_t *)device; + surface_painter_device_t *surface = (surface_painter_device_t *)driver; + + // Set the viewport locations + surface->viewport.viewport_l = left; + surface->viewport.viewport_t = top; + surface->viewport.viewport_r = right; + surface->viewport.viewport_b = bottom; + + // Reset the write location to the top left + surface->viewport.pixdata_x = left; + surface->viewport.pixdata_y = top; + return true; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Drawing routine to copy out the dirty region and send it to another device + +bool qp_surface_draw(painter_device_t surface, painter_device_t target, uint16_t x, uint16_t y, bool entire_surface) { + painter_driver_t * surface_driver = (painter_driver_t *)surface; + surface_painter_device_t *surface_handle = (surface_painter_device_t *)surface_driver; + painter_driver_t * target_driver = (painter_driver_t *)target; + + // If we're not dirty... we're done. + if (!surface_handle->dirty.is_dirty) { + qp_dprintf("qp_surface_draw: ok (not dirty, skipping)\n"); + return true; + } + + // If we have incompatible bit depths, drop out + if (surface_driver->native_bits_per_pixel != target_driver->native_bits_per_pixel) { + qp_dprintf("qp_surface_draw: fail (incompatible bpp: surface=%d, target=%d)\n", (int)surface_driver->native_bits_per_pixel, (int)target_driver->native_bits_per_pixel); + return false; + } + + // Offload to the pixdata transfer function + surface_painter_driver_vtable_t *vtable = (surface_painter_driver_vtable_t *)surface_driver->driver_vtable; + bool ok = vtable->target_pixdata_transfer(surface_driver, target_driver, x, y, entire_surface); + if (!ok) { + qp_dprintf("qp_surface_draw: fail (could not transfer pixel data)\n"); + return false; + } + + // Clear the dirty info for the surface + ok = qp_flush(surface); + if (!ok) { + qp_dprintf("qp_surface_draw: fail (could not flush)\n"); + return false; + } + qp_dprintf("qp_surface_draw: ok\n"); + return true; +} diff --git a/drivers/painter/generic/qp_surface_internal.h b/drivers/painter/generic/qp_surface_internal.h new file mode 100644 index 0000000000..71f82e924d --- /dev/null +++ b/drivers/painter/generic/qp_surface_internal.h @@ -0,0 +1,119 @@ +// Copyright 2022 Nick Brassel (@tzarc) +// SPDX-License-Identifier: GPL-2.0-or-later +#pragma once + +#ifdef QUANTUM_PAINTER_SURFACE_ENABLE + +# include "qp_surface.h" + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Internal declarations + +// Surface vtable +typedef struct surface_painter_driver_vtable_t { + painter_driver_vtable_t base; // must be first, so it can be cast to/from the painter_driver_vtable_t* type + + bool (*target_pixdata_transfer)(painter_driver_t *surface_driver, painter_driver_t *target_driver, uint16_t x, uint16_t y, bool entire_surface); +} surface_painter_driver_vtable_t; + +typedef struct surface_dirty_data_t { + bool is_dirty; + uint16_t l; + uint16_t t; + uint16_t r; + uint16_t b; +} surface_dirty_data_t; + +typedef struct surface_viewport_data_t { + // Manually manage the viewport for streaming pixel data to the display + uint16_t viewport_l; + uint16_t viewport_t; + uint16_t viewport_r; + uint16_t viewport_b; + + // Current write location to the display when streaming pixel data + uint16_t pixdata_x; + uint16_t pixdata_y; +} surface_viewport_data_t; + +// Surface struct +typedef struct surface_painter_device_t { + painter_driver_t base; // must be first, so it can be cast to/from the painter_device_t* type + + // The target buffer + union { + void * buffer; + uint8_t * u8buffer; + uint16_t *u16buffer; + }; + + // Manually manage the viewport for streaming pixel data to the display + surface_viewport_data_t viewport; + + // Maintain a dirty region so we can stream only what we need + surface_dirty_data_t dirty; +} surface_painter_device_t; + +/** + * Factory method for an RGB565 surface (aka framebuffer). Accepts an external device table. + * + * @param device_table[in] the table of devices to use for instantiation + * @param device_table_len[in] the length of the table of devices + * @param panel_width[in] the width of the display panel + * @param panel_height[in] the height of the display panel + * @param buffer[in] pointer to a preallocated uint8_t buffer of size `SURFACE_REQUIRED_BUFFER_BYTE_SIZE(panel_width, panel_height, 16)` + * @return the device handle used with all drawing routines in Quantum Painter + */ +painter_device_t qp_make_rgb565_surface_advanced(surface_painter_device_t *device_table, size_t device_table_len, uint16_t panel_width, uint16_t panel_height, void *buffer); + +/** + * Factory method for a 1bpp monochrome surface (aka framebuffer). + * + * @param device_table[in] the table of devices to use for instantiation + * @param device_table_len[in] the length of the table of devices + * @param panel_width[in] the width of the display panel + * @param panel_height[in] the height of the display panel + * @param buffer[in] pointer to a preallocated uint8_t buffer of size `SURFACE_REQUIRED_BUFFER_BYTE_SIZE(panel_width, panel_height, 16)` + * @return the device handle used with all drawing routines in Quantum Painter + */ +painter_device_t qp_make_mono1bpp_surface_advanced(surface_painter_device_t *device_table, size_t device_table_len, uint16_t panel_width, uint16_t panel_height, void *buffer); + +// Driver storage +extern surface_painter_device_t surface_drivers[SURFACE_NUM_DEVICES]; + +// Surface common APIs +bool qp_surface_init(painter_device_t device, painter_rotation_t rotation); +bool qp_surface_power(painter_device_t device, bool power_on); +bool qp_surface_clear(painter_device_t device); +bool qp_surface_flush(painter_device_t device); +bool qp_surface_viewport(painter_device_t device, uint16_t left, uint16_t top, uint16_t right, uint16_t bottom); +void qp_surface_increment_pixdata_location(surface_viewport_data_t *viewport); +void qp_surface_update_dirty(surface_dirty_data_t *dirty, uint16_t x, uint16_t y); + +#endif // QUANTUM_PAINTER_SURFACE_ENABLE + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Factory functions for creating a handle to a surface + +#define SURFACE_FACTORY_FUNCTION_IMPL(function_name, vtable, bpp) \ + painter_device_t(function_name##_advanced)(surface_painter_device_t * device_table, size_t device_table_len, uint16_t panel_width, uint16_t panel_height, void *buffer) { \ + for (uint32_t i = 0; i < device_table_len; ++i) { \ + surface_painter_device_t *driver = &device_table[i]; \ + if (!driver->base.driver_vtable) { \ + driver->base.driver_vtable = (painter_driver_vtable_t *)&(vtable); \ + driver->base.native_bits_per_pixel = (bpp); \ + driver->base.comms_vtable = &dummy_comms_vtable; \ + driver->base.panel_width = panel_width; \ + driver->base.panel_height = panel_height; \ + driver->base.rotation = QP_ROTATION_0; \ + driver->base.offset_x = 0; \ + driver->base.offset_y = 0; \ + driver->buffer = buffer; \ + return (painter_device_t)driver; \ + } \ + } \ + return NULL; \ + } \ + painter_device_t(function_name)(uint16_t panel_width, uint16_t panel_height, void *buffer) { \ + return (function_name##_advanced)(surface_drivers, SURFACE_NUM_DEVICES, panel_width, panel_height, buffer); \ + } diff --git a/drivers/painter/generic/qp_surface_mono1bpp.c b/drivers/painter/generic/qp_surface_mono1bpp.c new file mode 100644 index 0000000000..c66b56519d --- /dev/null +++ b/drivers/painter/generic/qp_surface_mono1bpp.c @@ -0,0 +1,113 @@ +// Copyright 2022 Nick Brassel (@tzarc) +// SPDX-License-Identifier: GPL-2.0-or-later + +#ifdef QUANTUM_PAINTER_SURFACE_ENABLE + +# include "color.h" +# include "qp_draw.h" +# include "qp_surface_internal.h" +# include "qp_comms_dummy.h" + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Surface driver impl: mono1bpp + +static inline void setpixel_mono1bpp(surface_painter_device_t *surface, uint16_t x, uint16_t y, bool mono_pixel) { + uint16_t w = surface->base.panel_width; + uint16_t h = surface->base.panel_height; + + // Drop out if it's off-screen + if (x >= w || y >= h) { + return; + } + + // Figure out which location needs to be updated + uint32_t pixel_num = y * w + x; + uint32_t byte_offset = pixel_num / 8; + uint8_t bit_offset = pixel_num % 8; + bool curr_val = (surface->u8buffer[byte_offset] & (1 << bit_offset)) ? true : false; + + // Skip messing with the dirty info if the original value already matches + if (curr_val != mono_pixel) { + // Update the dirty region + qp_surface_update_dirty(&surface->dirty, x, y); + + // Update the pixel data in the buffer + if (mono_pixel) { + surface->u8buffer[byte_offset] |= (1 << bit_offset); + } else { + surface->u8buffer[byte_offset] &= ~(1 << bit_offset); + } + } +} + +static inline void append_pixel_mono1bpp(surface_painter_device_t *surface, bool mono_pixel) { + setpixel_mono1bpp(surface, surface->viewport.pixdata_x, surface->viewport.pixdata_y, mono_pixel); + qp_surface_increment_pixdata_location(&surface->viewport); +} + +static inline void stream_pixdata_mono1bpp(surface_painter_device_t *surface, const uint8_t *data, uint32_t native_pixel_count) { + for (uint32_t pixel_counter = 0; pixel_counter < native_pixel_count; ++pixel_counter) { + uint32_t byte_offset = pixel_counter / 8; + uint8_t bit_offset = pixel_counter % 8; + append_pixel_mono1bpp(surface, (data[byte_offset] & (1 << bit_offset)) ? true : false); + } +} + +// Stream pixel data to the current write position in GRAM +static bool qp_surface_pixdata_mono1bpp(painter_device_t device, const void *pixel_data, uint32_t native_pixel_count) { + painter_driver_t * driver = (painter_driver_t *)device; + surface_painter_device_t *surface = (surface_painter_device_t *)driver; + stream_pixdata_mono1bpp(surface, (const uint8_t *)pixel_data, native_pixel_count); + return true; +} + +// Pixel colour conversion +static bool qp_surface_palette_convert_mono1bpp(painter_device_t device, int16_t palette_size, qp_pixel_t *palette) { + for (int16_t i = 0; i < palette_size; ++i) { + palette[i].mono = (palette[i].hsv888.v > 127) ? 1 : 0; + } + return true; +} + +// Append pixels to the target location, keyed by the pixel index +static bool qp_surface_append_pixels_mono1bpp(painter_device_t device, uint8_t *target_buffer, qp_pixel_t *palette, uint32_t pixel_offset, uint32_t pixel_count, uint8_t *palette_indices) { + for (uint32_t i = 0; i < pixel_count; ++i) { + uint32_t pixel_num = pixel_offset + i; + uint32_t byte_offset = pixel_num / 8; + uint8_t bit_offset = pixel_num % 8; + if (palette[palette_indices[i]].mono) { + target_buffer[byte_offset] |= (1 << bit_offset); + } else { + target_buffer[byte_offset] &= ~(1 << bit_offset); + } + } + return true; +} + +static bool mono1bpp_target_pixdata_transfer(painter_driver_t *surface_driver, painter_driver_t *target_driver, uint16_t x, uint16_t y, bool entire_surface) { + return false; // Not yet supported. +} + +static bool qp_surface_append_pixdata_mono1bpp(painter_device_t device, uint8_t *target_buffer, uint32_t pixdata_offset, uint8_t pixdata_byte) { + return false; // Just use 1bpp images. +} + +const surface_painter_driver_vtable_t mono1bpp_surface_driver_vtable = { + .base = + { + .init = qp_surface_init, + .power = qp_surface_power, + .clear = qp_surface_clear, + .flush = qp_surface_flush, + .pixdata = qp_surface_pixdata_mono1bpp, + .viewport = qp_surface_viewport, + .palette_convert = qp_surface_palette_convert_mono1bpp, + .append_pixels = qp_surface_append_pixels_mono1bpp, + .append_pixdata = qp_surface_append_pixdata_mono1bpp, + }, + .target_pixdata_transfer = mono1bpp_target_pixdata_transfer, +}; + +SURFACE_FACTORY_FUNCTION_IMPL(qp_make_mono1bpp_surface, mono1bpp_surface_driver_vtable, 1); + +#endif // QUANTUM_PAINTER_SURFACE_ENABLE diff --git a/drivers/painter/generic/qp_surface_rgb565.c b/drivers/painter/generic/qp_surface_rgb565.c new file mode 100644 index 0000000000..8883ed541d --- /dev/null +++ b/drivers/painter/generic/qp_surface_rgb565.c @@ -0,0 +1,145 @@ +// Copyright 2022 Nick Brassel (@tzarc) +// SPDX-License-Identifier: GPL-2.0-or-later + +#ifdef QUANTUM_PAINTER_SURFACE_ENABLE + +# include "color.h" +# include "qp_draw.h" +# include "qp_surface_internal.h" +# include "qp_comms_dummy.h" + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Surface driver impl: rgb565 + +static inline void setpixel_rgb565(surface_painter_device_t *surface, uint16_t x, uint16_t y, uint16_t rgb565) { + uint16_t w = surface->base.panel_width; + uint16_t h = surface->base.panel_height; + + // Drop out if it's off-screen + if (x >= w || y >= h) { + return; + } + + // Skip messing with the dirty info if the original value already matches + if (surface->u16buffer[y * w + x] != rgb565) { + // Update the dirty region + qp_surface_update_dirty(&surface->dirty, x, y); + + // Update the pixel data in the buffer + surface->u16buffer[y * w + x] = rgb565; + } +} + +static inline void append_pixel_rgb565(surface_painter_device_t *surface, uint16_t rgb565) { + setpixel_rgb565(surface, surface->viewport.pixdata_x, surface->viewport.pixdata_y, rgb565); + qp_surface_increment_pixdata_location(&surface->viewport); +} + +static inline void stream_pixdata_rgb565(surface_painter_device_t *surface, const uint16_t *data, uint32_t native_pixel_count) { + for (uint32_t pixel_counter = 0; pixel_counter < native_pixel_count; ++pixel_counter) { + append_pixel_rgb565(surface, data[pixel_counter]); + } +} + +// Stream pixel data to the current write position in GRAM +static bool qp_surface_pixdata_rgb565(painter_device_t device, const void *pixel_data, uint32_t native_pixel_count) { + painter_driver_t * driver = (painter_driver_t *)device; + surface_painter_device_t *surface = (surface_painter_device_t *)driver; + stream_pixdata_rgb565(surface, (const uint16_t *)pixel_data, native_pixel_count); + return true; +} + +// Pixel colour conversion +static bool qp_surface_palette_convert_rgb565_swapped(painter_device_t device, int16_t palette_size, qp_pixel_t *palette) { + for (int16_t i = 0; i < palette_size; ++i) { + RGB rgb = hsv_to_rgb_nocie((HSV){palette[i].hsv888.h, palette[i].hsv888.s, palette[i].hsv888.v}); + uint16_t rgb565 = (((uint16_t)rgb.r) >> 3) << 11 | (((uint16_t)rgb.g) >> 2) << 5 | (((uint16_t)rgb.b) >> 3); + palette[i].rgb565 = __builtin_bswap16(rgb565); + } + return true; +} + +// Append pixels to the target location, keyed by the pixel index +static bool qp_surface_append_pixels_rgb565(painter_device_t device, uint8_t *target_buffer, qp_pixel_t *palette, uint32_t pixel_offset, uint32_t pixel_count, uint8_t *palette_indices) { + uint16_t *buf = (uint16_t *)target_buffer; + for (uint32_t i = 0; i < pixel_count; ++i) { + buf[pixel_offset + i] = palette[palette_indices[i]].rgb565; + } + return true; +} + +static bool rgb565_target_pixdata_transfer(painter_driver_t *surface_driver, painter_driver_t *target_driver, uint16_t x, uint16_t y, bool entire_surface) { + surface_painter_device_t *surface_handle = (surface_painter_device_t *)surface_driver; + + uint16_t l = entire_surface ? 0 : surface_handle->dirty.l; + uint16_t t = entire_surface ? 0 : surface_handle->dirty.t; + uint16_t r = entire_surface ? (surface_handle->base.panel_width - 1) : surface_handle->dirty.r; + uint16_t b = entire_surface ? (surface_handle->base.panel_height - 1) : surface_handle->dirty.b; + + // Set the target drawing area + bool ok = qp_viewport((painter_device_t)target_driver, x + l, y + t, x + r, y + b); + if (!ok) { + qp_dprintf("rgb565_target_pixdata_transfer: fail (could not set target viewport)\n"); + return false; + } + + // Housekeeping of the amount of pixels to transfer + uint32_t total_pixel_count = (8 * QUANTUM_PAINTER_PIXDATA_BUFFER_SIZE) / surface_driver->native_bits_per_pixel; + uint32_t pixel_counter = 0; + uint16_t *target_buffer = (uint16_t *)qp_internal_global_pixdata_buffer; + + // Fill the global pixdata area so that we can start transferring to the panel + for (uint16_t y = t; y <= b; ++y) { + for (uint16_t x = l; x <= r; ++x) { + // Update the target buffer + target_buffer[pixel_counter++] = surface_handle->u16buffer[y * surface_handle->base.panel_width + x]; + + // If we've accumulated enough data, send it + if (pixel_counter == total_pixel_count) { + ok = qp_pixdata((painter_device_t)target_driver, qp_internal_global_pixdata_buffer, pixel_counter); + if (!ok) { + qp_dprintf("rgb565_target_pixdata_transfer: fail (could not stream pixdata to target)\n"); + return false; + } + // Reset the counter + pixel_counter = 0; + } + } + } + + // If there's any leftover data, send it + if (pixel_counter > 0) { + ok = qp_pixdata((painter_device_t)target_driver, qp_internal_global_pixdata_buffer, pixel_counter); + if (!ok) { + qp_dprintf("rgb565_target_pixdata_transfer: fail (could not stream pixdata to target)\n"); + return false; + } + } + + return true; +} + +static bool qp_surface_append_pixdata_rgb565(painter_device_t device, uint8_t *target_buffer, uint32_t pixdata_offset, uint8_t pixdata_byte) { + target_buffer[pixdata_offset] = pixdata_byte; + return true; +} + +const surface_painter_driver_vtable_t rgb565_surface_driver_vtable = { + .base = + { + .init = qp_surface_init, + .power = qp_surface_power, + .clear = qp_surface_clear, + .flush = qp_surface_flush, + .pixdata = qp_surface_pixdata_rgb565, + .viewport = qp_surface_viewport, + .palette_convert = qp_surface_palette_convert_rgb565_swapped, + .append_pixels = qp_surface_append_pixels_rgb565, + .append_pixdata = qp_surface_append_pixdata_rgb565, + }, + .target_pixdata_transfer = rgb565_target_pixdata_transfer, +}; + +SURFACE_FACTORY_FUNCTION_IMPL(qp_make_rgb565_surface, rgb565_surface_driver_vtable, 16); + +#endif // QUANTUM_PAINTER_SURFACE_ENABLE diff --git a/drivers/painter/ili9xxx/qp_ili9163.c b/drivers/painter/ili9xxx/qp_ili9163.c index a75be57904..7f439dc317 100644 --- a/drivers/painter/ili9xxx/qp_ili9163.c +++ b/drivers/painter/ili9xxx/qp_ili9163.c @@ -103,13 +103,14 @@ painter_device_t qp_ili9163_make_spi_device(uint16_t panel_width, uint16_t panel driver->base.native_bits_per_pixel = 16; // RGB565 // SPI and other pin configuration - driver->base.comms_config = &driver->spi_dc_reset_config; - driver->spi_dc_reset_config.spi_config.chip_select_pin = chip_select_pin; - driver->spi_dc_reset_config.spi_config.divisor = spi_divisor; - driver->spi_dc_reset_config.spi_config.lsb_first = false; - driver->spi_dc_reset_config.spi_config.mode = spi_mode; - driver->spi_dc_reset_config.dc_pin = dc_pin; - driver->spi_dc_reset_config.reset_pin = reset_pin; + driver->base.comms_config = &driver->spi_dc_reset_config; + driver->spi_dc_reset_config.spi_config.chip_select_pin = chip_select_pin; + driver->spi_dc_reset_config.spi_config.divisor = spi_divisor; + driver->spi_dc_reset_config.spi_config.lsb_first = false; + driver->spi_dc_reset_config.spi_config.mode = spi_mode; + driver->spi_dc_reset_config.dc_pin = dc_pin; + driver->spi_dc_reset_config.reset_pin = reset_pin; + driver->spi_dc_reset_config.command_params_uses_command_pin = false; if (!qp_internal_register_device((painter_device_t)driver)) { memset(driver, 0, sizeof(tft_panel_dc_reset_painter_device_t)); diff --git a/drivers/painter/ili9xxx/qp_ili9163.h b/drivers/painter/ili9xxx/qp_ili9163.h index 88d23629a9..a9b3befd48 100644 --- a/drivers/painter/ili9xxx/qp_ili9163.h +++ b/drivers/painter/ili9xxx/qp_ili9163.h @@ -1,6 +1,5 @@ // Copyright 2021 Nick Brassel (@tzarc) // SPDX-License-Identifier: GPL-2.0-or-later - #pragma once #include "gpio.h" diff --git a/drivers/painter/ili9xxx/qp_ili9341.c b/drivers/painter/ili9xxx/qp_ili9341.c index 4130271f71..a101b292aa 100644 --- a/drivers/painter/ili9xxx/qp_ili9341.c +++ b/drivers/painter/ili9xxx/qp_ili9341.c @@ -110,13 +110,14 @@ painter_device_t qp_ili9341_make_spi_device(uint16_t panel_width, uint16_t panel driver->base.offset_y = 0; // SPI and other pin configuration - driver->base.comms_config = &driver->spi_dc_reset_config; - driver->spi_dc_reset_config.spi_config.chip_select_pin = chip_select_pin; - driver->spi_dc_reset_config.spi_config.divisor = spi_divisor; - driver->spi_dc_reset_config.spi_config.lsb_first = false; - driver->spi_dc_reset_config.spi_config.mode = spi_mode; - driver->spi_dc_reset_config.dc_pin = dc_pin; - driver->spi_dc_reset_config.reset_pin = reset_pin; + driver->base.comms_config = &driver->spi_dc_reset_config; + driver->spi_dc_reset_config.spi_config.chip_select_pin = chip_select_pin; + driver->spi_dc_reset_config.spi_config.divisor = spi_divisor; + driver->spi_dc_reset_config.spi_config.lsb_first = false; + driver->spi_dc_reset_config.spi_config.mode = spi_mode; + driver->spi_dc_reset_config.dc_pin = dc_pin; + driver->spi_dc_reset_config.reset_pin = reset_pin; + driver->spi_dc_reset_config.command_params_uses_command_pin = false; if (!qp_internal_register_device((painter_device_t)driver)) { memset(driver, 0, sizeof(tft_panel_dc_reset_painter_device_t)); diff --git a/drivers/painter/ili9xxx/qp_ili9341.h b/drivers/painter/ili9xxx/qp_ili9341.h index 28b0152a84..d850aba114 100644 --- a/drivers/painter/ili9xxx/qp_ili9341.h +++ b/drivers/painter/ili9xxx/qp_ili9341.h @@ -1,6 +1,5 @@ // Copyright 2021 Nick Brassel (@tzarc) // SPDX-License-Identifier: GPL-2.0-or-later - #pragma once #include "gpio.h" diff --git a/drivers/painter/ili9xxx/qp_ili9488.c b/drivers/painter/ili9xxx/qp_ili9488.c index a8da52132e..63deaf5f2e 100644 --- a/drivers/painter/ili9xxx/qp_ili9488.c +++ b/drivers/painter/ili9xxx/qp_ili9488.c @@ -103,13 +103,14 @@ painter_device_t qp_ili9488_make_spi_device(uint16_t panel_width, uint16_t panel driver->base.offset_y = 0; // SPI and other pin configuration - driver->base.comms_config = &driver->spi_dc_reset_config; - driver->spi_dc_reset_config.spi_config.chip_select_pin = chip_select_pin; - driver->spi_dc_reset_config.spi_config.divisor = spi_divisor; - driver->spi_dc_reset_config.spi_config.lsb_first = false; - driver->spi_dc_reset_config.spi_config.mode = spi_mode; - driver->spi_dc_reset_config.dc_pin = dc_pin; - driver->spi_dc_reset_config.reset_pin = reset_pin; + driver->base.comms_config = &driver->spi_dc_reset_config; + driver->spi_dc_reset_config.spi_config.chip_select_pin = chip_select_pin; + driver->spi_dc_reset_config.spi_config.divisor = spi_divisor; + driver->spi_dc_reset_config.spi_config.lsb_first = false; + driver->spi_dc_reset_config.spi_config.mode = spi_mode; + driver->spi_dc_reset_config.dc_pin = dc_pin; + driver->spi_dc_reset_config.reset_pin = reset_pin; + driver->spi_dc_reset_config.command_params_uses_command_pin = false; if (!qp_internal_register_device((painter_device_t)driver)) { memset(driver, 0, sizeof(tft_panel_dc_reset_painter_device_t)); diff --git a/drivers/painter/ili9xxx/qp_ili9488.h b/drivers/painter/ili9xxx/qp_ili9488.h index 21b8f03322..da56f1090f 100644 --- a/drivers/painter/ili9xxx/qp_ili9488.h +++ b/drivers/painter/ili9xxx/qp_ili9488.h @@ -1,6 +1,5 @@ // Copyright 2021 Nick Brassel (@tzarc) // SPDX-License-Identifier: GPL-2.0-or-later - #pragma once #include "gpio.h" diff --git a/drivers/painter/oled_panel/qp_oled_panel.c b/drivers/painter/oled_panel/qp_oled_panel.c new file mode 100644 index 0000000000..eefee3f13f --- /dev/null +++ b/drivers/painter/oled_panel/qp_oled_panel.c @@ -0,0 +1,195 @@ +// Copyright 2023 Nick Brassel (@tzarc) +// SPDX-License-Identifier: GPL-2.0-or-later + +#include "color.h" +#include "qp_internal.h" +#include "qp_comms.h" +#include "qp_draw.h" +#include "qp_oled_panel.h" + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Quantum Painter API implementations + +// Power control +bool qp_oled_panel_power(painter_device_t device, bool power_on) { + painter_driver_t * driver = (painter_driver_t *)device; + oled_panel_painter_driver_vtable_t *vtable = (oled_panel_painter_driver_vtable_t *)driver->driver_vtable; + qp_comms_command(device, power_on ? vtable->opcodes.display_on : vtable->opcodes.display_off); + return true; +} + +// Screen clear +bool qp_oled_panel_clear(painter_device_t device) { + painter_driver_t *driver = (painter_driver_t *)device; + driver->driver_vtable->init(device, driver->rotation); // Re-init the display + return true; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Surface passthru +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + +bool qp_oled_panel_passthru_pixdata(painter_device_t device, const void *pixel_data, uint32_t native_pixel_count) { + oled_panel_painter_device_t *driver = (oled_panel_painter_device_t *)device; + return driver->surface.base.validate_ok && driver->surface.base.driver_vtable->pixdata(&driver->surface.base, pixel_data, native_pixel_count); +} + +bool qp_oled_panel_passthru_viewport(painter_device_t device, uint16_t left, uint16_t top, uint16_t right, uint16_t bottom) { + oled_panel_painter_device_t *driver = (oled_panel_painter_device_t *)device; + return driver->surface.base.validate_ok && driver->surface.base.driver_vtable->viewport(&driver->surface.base, left, top, right, bottom); +} + +bool qp_oled_panel_passthru_palette_convert(painter_device_t device, int16_t palette_size, qp_pixel_t *palette) { + oled_panel_painter_device_t *driver = (oled_panel_painter_device_t *)device; + return driver->surface.base.validate_ok && driver->surface.base.driver_vtable->palette_convert(&driver->surface.base, palette_size, palette); +} + +bool qp_oled_panel_passthru_append_pixels(painter_device_t device, uint8_t *target_buffer, qp_pixel_t *palette, uint32_t pixel_offset, uint32_t pixel_count, uint8_t *palette_indices) { + oled_panel_painter_device_t *driver = (oled_panel_painter_device_t *)device; + return driver->surface.base.validate_ok && driver->surface.base.driver_vtable->append_pixels(&driver->surface.base, target_buffer, palette, pixel_offset, pixel_count, palette_indices); +} + +bool qp_oled_panel_passthru_append_pixdata(painter_device_t device, uint8_t *target_buffer, uint32_t pixdata_offset, uint8_t pixdata_byte) { + oled_panel_painter_device_t *driver = (oled_panel_painter_device_t *)device; + return driver->surface.base.validate_ok && driver->surface.base.driver_vtable->append_pixdata(&driver->surface.base, target_buffer, pixdata_offset, pixdata_byte); +} + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Flush helpers +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + +void qp_oled_panel_page_column_flush_rot0(painter_device_t device, surface_dirty_data_t *dirty, const uint8_t *framebuffer) { + painter_driver_t * driver = (painter_driver_t *)device; + oled_panel_painter_driver_vtable_t *vtable = (oled_panel_painter_driver_vtable_t *)driver->driver_vtable; + + // TODO: account for offset_x/y in base driver + int min_page = dirty->t / 8; + int max_page = dirty->b / 8; + int min_column = dirty->l; + int max_column = dirty->r; + + for (int page = min_page; page <= max_page; ++page) { + int cols_required = max_column - min_column + 1; + uint8_t column_data[cols_required]; + memset(column_data, 0, cols_required); + for (int x = min_column; x <= max_column; ++x) { + uint16_t data_offset = x - min_column; + for (int y = 0; y < 8; ++y) { + uint32_t pixel_num = ((page * 8) + y) * driver->panel_width + x; + uint32_t byte_offset = pixel_num / 8; + uint8_t bit_offset = pixel_num % 8; + column_data[data_offset] |= ((framebuffer[byte_offset] & (1 << bit_offset)) >> bit_offset) << y; + } + } + + int actual_page = page; + int start_column = min_column; + qp_comms_command(device, vtable->opcodes.set_page | actual_page); + qp_comms_command(device, vtable->opcodes.set_column_lsb | (start_column & 0x0F)); + qp_comms_command(device, vtable->opcodes.set_column_msb | (start_column & 0xF0) >> 4); + qp_comms_send(device, column_data, cols_required); + } +} + +void qp_oled_panel_page_column_flush_rot90(painter_device_t device, surface_dirty_data_t *dirty, const uint8_t *framebuffer) { + painter_driver_t * driver = (painter_driver_t *)device; + oled_panel_painter_driver_vtable_t *vtable = (oled_panel_painter_driver_vtable_t *)driver->driver_vtable; + + // TODO: account for offset_x/y in base driver + int num_columns = driver->panel_width; + int min_page = dirty->l / 8; + int max_page = dirty->r / 8; + int min_column = dirty->t; + int max_column = dirty->b; + + for (int page = min_page; page <= max_page; ++page) { + int cols_required = max_column - min_column + 1; + uint8_t column_data[cols_required]; + memset(column_data, 0, cols_required); + for (int y = min_column; y <= max_column; ++y) { + uint16_t data_offset = cols_required - 1 - (y - min_column); + for (int x = 0; x < 8; ++x) { + uint32_t pixel_num = y * driver->panel_height + ((page * 8) + x); + uint32_t byte_offset = pixel_num / 8; + uint8_t bit_offset = pixel_num % 8; + column_data[data_offset] |= ((framebuffer[byte_offset] & (1 << bit_offset)) >> bit_offset) << x; + } + } + + int actual_page = page; + int start_column = num_columns - 1 - max_column; + qp_comms_command(device, vtable->opcodes.set_page | actual_page); + qp_comms_command(device, vtable->opcodes.set_column_lsb | (start_column & 0x0F)); + qp_comms_command(device, vtable->opcodes.set_column_msb | (start_column & 0xF0) >> 4); + qp_comms_send(device, column_data, cols_required); + } +} + +void qp_oled_panel_page_column_flush_rot180(painter_device_t device, surface_dirty_data_t *dirty, const uint8_t *framebuffer) { + painter_driver_t * driver = (painter_driver_t *)device; + oled_panel_painter_driver_vtable_t *vtable = (oled_panel_painter_driver_vtable_t *)driver->driver_vtable; + + // TODO: account for offset_x/y in base driver + int num_pages = driver->panel_height / 8; + int num_columns = driver->panel_width; + int min_page = dirty->t / 8; + int max_page = dirty->b / 8; + int min_column = dirty->l; + int max_column = dirty->r; + + for (int page = min_page; page <= max_page; ++page) { + int cols_required = max_column - min_column + 1; + uint8_t column_data[cols_required]; + memset(column_data, 0, cols_required); + for (int x = min_column; x <= max_column; ++x) { + uint16_t data_offset = cols_required - 1 - (x - min_column); + for (int y = 0; y < 8; ++y) { + uint32_t pixel_num = ((page * 8) + y) * driver->panel_width + x; + uint32_t byte_offset = pixel_num / 8; + uint8_t bit_offset = pixel_num % 8; + column_data[data_offset] |= ((framebuffer[byte_offset] & (1 << bit_offset)) >> bit_offset) << (7 - y); + } + } + + int actual_page = num_pages - 1 - page; + int start_column = num_columns - 1 - max_column; + qp_comms_command(device, vtable->opcodes.set_page | actual_page); + qp_comms_command(device, vtable->opcodes.set_column_lsb | (start_column & 0x0F)); + qp_comms_command(device, vtable->opcodes.set_column_msb | (start_column & 0xF0) >> 4); + qp_comms_send(device, column_data, cols_required); + } +} + +void qp_oled_panel_page_column_flush_rot270(painter_device_t device, surface_dirty_data_t *dirty, const uint8_t *framebuffer) { + painter_driver_t * driver = (painter_driver_t *)device; + oled_panel_painter_driver_vtable_t *vtable = (oled_panel_painter_driver_vtable_t *)driver->driver_vtable; + + // TODO: account for offset_x/y in base driver + int num_pages = driver->panel_height / 8; + int min_page = dirty->l / 8; + int max_page = dirty->r / 8; + int min_column = dirty->t; + int max_column = dirty->b; + + for (int page = min_page; page <= max_page; ++page) { + int cols_required = max_column - min_column + 1; + uint8_t column_data[cols_required]; + memset(column_data, 0, cols_required); + for (int y = min_column; y <= max_column; ++y) { + uint16_t data_offset = y - min_column; + for (int x = 0; x < 8; ++x) { + uint32_t pixel_num = y * driver->panel_height + ((page * 8) + x); + uint32_t byte_offset = pixel_num / 8; + uint8_t bit_offset = pixel_num % 8; + column_data[data_offset] |= ((framebuffer[byte_offset] & (1 << bit_offset)) >> bit_offset) << (7 - x); + } + } + + int actual_page = num_pages - 1 - page; + int start_column = min_column; + qp_comms_command(device, vtable->opcodes.set_page | actual_page); + qp_comms_command(device, vtable->opcodes.set_column_lsb | (start_column & 0x0F)); + qp_comms_command(device, vtable->opcodes.set_column_msb | (start_column & 0xF0) >> 4); + qp_comms_send(device, column_data, cols_required); + } +} diff --git a/drivers/painter/oled_panel/qp_oled_panel.h b/drivers/painter/oled_panel/qp_oled_panel.h new file mode 100644 index 0000000000..ccc7ab9204 --- /dev/null +++ b/drivers/painter/oled_panel/qp_oled_panel.h @@ -0,0 +1,68 @@ +// Copyright 2023 Nick Brassel (@tzarc) +// SPDX-License-Identifier: GPL-2.0-or-later +#pragma once + +#include "color.h" +#include "qp_internal.h" +#include "qp_surface_internal.h" + +#ifdef QUANTUM_PAINTER_SPI_ENABLE +# include "qp_comms_spi.h" +#endif // QUANTUM_PAINTER_SPI_ENABLE + +#ifdef QUANTUM_PAINTER_I2C_ENABLE +# include "qp_comms_i2c.h" +#endif // QUANTUM_PAINTER_I2C_ENABLE + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Common OLED panel implementation + +// Driver vtable with extras +typedef struct oled_panel_painter_driver_vtable_t { + painter_driver_vtable_t base; // must be first, so it can be cast to/from the painter_driver_vtable_t* type + + // Opcodes for normal display operation + struct { + uint8_t display_on; + uint8_t display_off; + uint8_t set_page; + uint8_t set_column_lsb; + uint8_t set_column_msb; + } opcodes; +} oled_panel_painter_driver_vtable_t; + +// Device definition +typedef struct oled_panel_painter_device_t { + painter_driver_t base; // must be first, so it can be cast to/from the painter_device_t* type + + union { +#ifdef QUANTUM_PAINTER_SPI_ENABLE + // SPI-based configurables + qp_comms_spi_dc_reset_config_t spi_dc_reset_config; +#endif // QUANTUM_PAINTER_SPI_ENABLE +#ifdef QUANTUM_PAINTER_I2C_ENABLE + // I2C-based configurables + qp_comms_i2c_config_t i2c_config; +#endif // QUANTUM_PAINTER_I2C_ENABLE + }; + + surface_painter_device_t surface; +} oled_panel_painter_device_t; + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Forward declarations for injecting into concrete driver vtables + +bool qp_oled_panel_power(painter_device_t device, bool power_on); +bool qp_oled_panel_clear(painter_device_t device); + +bool qp_oled_panel_passthru_pixdata(painter_device_t device, const void *pixel_data, uint32_t native_pixel_count); +bool qp_oled_panel_passthru_viewport(painter_device_t device, uint16_t left, uint16_t top, uint16_t right, uint16_t bottom); +bool qp_oled_panel_passthru_palette_convert(painter_device_t device, int16_t palette_size, qp_pixel_t *palette); +bool qp_oled_panel_passthru_append_pixels(painter_device_t device, uint8_t *target_buffer, qp_pixel_t *palette, uint32_t pixel_offset, uint32_t pixel_count, uint8_t *palette_indices); +bool qp_oled_panel_passthru_append_pixdata(painter_device_t device, uint8_t *target_buffer, uint32_t pixdata_offset, uint8_t pixdata_byte); + +// Helpers for flushing data from the dirty region to the correct location on the OLED +void qp_oled_panel_page_column_flush_rot0(painter_device_t device, surface_dirty_data_t *dirty, const uint8_t *framebuffer); +void qp_oled_panel_page_column_flush_rot90(painter_device_t device, surface_dirty_data_t *dirty, const uint8_t *framebuffer); +void qp_oled_panel_page_column_flush_rot180(painter_device_t device, surface_dirty_data_t *dirty, const uint8_t *framebuffer); +void qp_oled_panel_page_column_flush_rot270(painter_device_t device, surface_dirty_data_t *dirty, const uint8_t *framebuffer); diff --git a/drivers/painter/sh1106/qp_sh1106.c b/drivers/painter/sh1106/qp_sh1106.c new file mode 100644 index 0000000000..7cb6e398fa --- /dev/null +++ b/drivers/painter/sh1106/qp_sh1106.c @@ -0,0 +1,206 @@ +// Copyright 2023 Nick Brassel (@tzarc) +// SPDX-License-Identifier: GPL-2.0-or-later + +#include "qp_internal.h" +#include "qp_comms.h" +#include "qp_oled_panel.h" +#include "qp_sh1106.h" +#include "qp_sh1106_opcodes.h" +#include "qp_surface.h" +#include "qp_surface_internal.h" + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Driver storage +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + +typedef struct sh1106_device_t { + oled_panel_painter_device_t oled; + + uint8_t framebuffer[SURFACE_REQUIRED_BUFFER_BYTE_SIZE(128, 64, 1)]; +} sh1106_device_t; + +static sh1106_device_t sh1106_drivers[SH1106_NUM_DEVICES] = {0}; + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Quantum Painter API implementations + +// Initialisation +__attribute__((weak)) bool qp_sh1106_init(painter_device_t device, painter_rotation_t rotation) { + sh1106_device_t *driver = (sh1106_device_t *)device; + + // Change the surface geometry based on the panel rotation + if (rotation == QP_ROTATION_90 || rotation == QP_ROTATION_270) { + driver->oled.surface.base.panel_width = driver->oled.base.panel_height; + driver->oled.surface.base.panel_height = driver->oled.base.panel_width; + } else { + driver->oled.surface.base.panel_width = driver->oled.base.panel_width; + driver->oled.surface.base.panel_height = driver->oled.base.panel_height; + } + + // Init the internal surface + if (!qp_init(&driver->oled.surface.base, QP_ROTATION_0)) { + qp_dprintf("Failed to init internal surface in qp_sh1106_init\n"); + return false; + } + + // clang-format off + const uint8_t sh1106_init_sequence[] = { + // Command, Delay, N, Data[N] + SH1106_SET_MUX_RATIO, 0, 1, 0x3F, + SH1106_DISPLAY_OFFSET, 0, 1, 0x00, + SH1106_DISPLAY_START_LINE, 0, 0, + SH1106_SET_SEGMENT_REMAP_INV, 0, 0, + SH1106_COM_SCAN_DIR_DEC, 0, 0, + SH1106_COM_PADS_HW_CFG, 0, 1, 0x12, + SH1106_SET_CONTRAST, 0, 1, 0x7F, + SH1106_ALL_ON_RESUME, 0, 0, + SH1106_NON_INVERTING_DISPLAY, 0, 0, + SH1106_SET_OSC_DIVFREQ, 0, 1, 0x80, + SH1106_SET_CHARGE_PUMP, 0, 1, 0x14, + SH1106_DISPLAY_ON, 0, 0, + }; + // clang-format on + + qp_comms_bulk_command_sequence(device, sh1106_init_sequence, sizeof(sh1106_init_sequence)); + return true; +} + +// Screen flush +bool qp_sh1106_flush(painter_device_t device) { + sh1106_device_t *driver = (sh1106_device_t *)device; + + if (!driver->oled.surface.dirty.is_dirty) { + return true; + } + + switch (driver->oled.base.rotation) { + default: + case QP_ROTATION_0: + qp_oled_panel_page_column_flush_rot0(device, &driver->oled.surface.dirty, driver->framebuffer); + break; + case QP_ROTATION_90: + qp_oled_panel_page_column_flush_rot90(device, &driver->oled.surface.dirty, driver->framebuffer); + break; + case QP_ROTATION_180: + qp_oled_panel_page_column_flush_rot180(device, &driver->oled.surface.dirty, driver->framebuffer); + break; + case QP_ROTATION_270: + qp_oled_panel_page_column_flush_rot270(device, &driver->oled.surface.dirty, driver->framebuffer); + break; + } + + // Clear the dirty area + qp_flush(&driver->oled.surface); + + return true; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Driver vtable +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + +const oled_panel_painter_driver_vtable_t sh1106_driver_vtable = { + .base = + { + .init = qp_sh1106_init, + .power = qp_oled_panel_power, + .clear = qp_oled_panel_clear, + .flush = qp_sh1106_flush, + .pixdata = qp_oled_panel_passthru_pixdata, + .viewport = qp_oled_panel_passthru_viewport, + .palette_convert = qp_oled_panel_passthru_palette_convert, + .append_pixels = qp_oled_panel_passthru_append_pixels, + .append_pixdata = qp_oled_panel_passthru_append_pixdata, + }, + .opcodes = + { + .display_on = SH1106_DISPLAY_ON, + .display_off = SH1106_DISPLAY_OFF, + .set_page = SH1106_PAGE_ADDR, + .set_column_lsb = SH1106_SETCOLUMN_LSB, + .set_column_msb = SH1106_SETCOLUMN_MSB, + }, +}; + +#ifdef QUANTUM_PAINTER_SH1106_SPI_ENABLE +// Factory function for creating a handle to the SH1106 device +painter_device_t qp_sh1106_make_spi_device(uint16_t panel_width, uint16_t panel_height, pin_t chip_select_pin, pin_t dc_pin, pin_t reset_pin, uint16_t spi_divisor, int spi_mode) { + for (uint32_t i = 0; i < SH1106_NUM_DEVICES; ++i) { + sh1106_device_t *driver = &sh1106_drivers[i]; + if (!driver->oled.base.driver_vtable) { + painter_device_t surface = qp_make_mono1bpp_surface_advanced(&driver->oled.surface, 1, panel_width, panel_height, driver->framebuffer); + if (!surface) { + return NULL; + } + + // Setup the OLED device + driver->oled.base.driver_vtable = (const painter_driver_vtable_t *)&sh1106_driver_vtable; + driver->oled.base.comms_vtable = (const painter_comms_vtable_t *)&spi_comms_with_dc_vtable; + driver->oled.base.native_bits_per_pixel = 1; // 1bpp mono + driver->oled.base.panel_width = panel_width; + driver->oled.base.panel_height = panel_height; + driver->oled.base.rotation = QP_ROTATION_0; + driver->oled.base.offset_x = 0; + driver->oled.base.offset_y = 0; + + // SPI and other pin configuration + driver->oled.base.comms_config = &driver->oled.spi_dc_reset_config; + driver->oled.spi_dc_reset_config.spi_config.chip_select_pin = chip_select_pin; + driver->oled.spi_dc_reset_config.spi_config.divisor = spi_divisor; + driver->oled.spi_dc_reset_config.spi_config.lsb_first = false; + driver->oled.spi_dc_reset_config.spi_config.mode = spi_mode; + driver->oled.spi_dc_reset_config.dc_pin = dc_pin; + driver->oled.spi_dc_reset_config.reset_pin = reset_pin; + driver->oled.spi_dc_reset_config.command_params_uses_command_pin = true; + + if (!qp_internal_register_device((painter_device_t)driver)) { + memset(driver, 0, sizeof(sh1106_device_t)); + return NULL; + } + + return (painter_device_t)driver; + } + } + return NULL; +} + +#endif // QUANTUM_PAINTER_SH1106_SPI_ENABLE + +#ifdef QUANTUM_PAINTER_SH1106_I2C_ENABLE +// Factory function for creating a handle to the SH1106 device +painter_device_t qp_sh1106_make_i2c_device(uint16_t panel_width, uint16_t panel_height, uint8_t i2c_address) { + for (uint32_t i = 0; i < SH1106_NUM_DEVICES; ++i) { + sh1106_device_t *driver = &sh1106_drivers[i]; + if (!driver->oled.base.driver_vtable) { + // Instantiate the surface, intentional swap of width/high due to transpose + painter_device_t surface = qp_make_mono1bpp_surface_advanced(&driver->oled.surface, 1, panel_width, panel_height, driver->framebuffer); + if (!surface) { + return NULL; + } + + // Setup the OLED device + driver->oled.base.driver_vtable = (const painter_driver_vtable_t *)&sh1106_driver_vtable; + driver->oled.base.comms_vtable = (const painter_comms_vtable_t *)&i2c_comms_cmddata_vtable; + driver->oled.base.native_bits_per_pixel = 1; // 1bpp mono + driver->oled.base.panel_width = panel_width; + driver->oled.base.panel_height = panel_height; + driver->oled.base.rotation = QP_ROTATION_0; + driver->oled.base.offset_x = 0; + driver->oled.base.offset_y = 0; + + // I2C configuration + driver->oled.base.comms_config = &driver->oled.i2c_config; + driver->oled.i2c_config.chip_address = i2c_address; + + if (!qp_internal_register_device((painter_device_t)driver)) { + memset(driver, 0, sizeof(sh1106_device_t)); + return NULL; + } + + return (painter_device_t)driver; + } + } + return NULL; +} + +#endif // QUANTUM_PAINTER_SH1106_SPI_ENABLE diff --git a/drivers/painter/sh1106/qp_sh1106.h b/drivers/painter/sh1106/qp_sh1106.h new file mode 100644 index 0000000000..6c325dba4b --- /dev/null +++ b/drivers/painter/sh1106/qp_sh1106.h @@ -0,0 +1,66 @@ +// Copyright 2023 Nick Brassel (@tzarc) +// SPDX-License-Identifier: GPL-2.0-or-later +#pragma once + +#include "gpio.h" +#include "qp_internal.h" + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Quantum Painter SH1106 configurables (add to your keyboard's config.h) + +#if defined(QUANTUM_PAINTER_SH1106_SPI_ENABLE) && !defined(SH1106_NUM_SPI_DEVICES) +/** + * @def This controls the maximum number of SPI SH1106 devices that Quantum Painter can communicate with at any one time. + * Increasing this number allows for multiple displays to be used. + */ +# define SH1106_NUM_SPI_DEVICES 1 +#else +# define SH1106_NUM_SPI_DEVICES 0 +#endif + +#if defined(QUANTUM_PAINTER_SH1106_I2C_ENABLE) && !defined(SH1106_NUM_I2C_DEVICES) +/** + * @def This controls the maximum number of I2C SH1106 devices that Quantum Painter can communicate with at any one time. + * Increasing this number allows for multiple displays to be used. + */ +# define SH1106_NUM_I2C_DEVICES 1 +#else +# define SH1106_NUM_I2C_DEVICES 0 +#endif + +#define SH1106_NUM_DEVICES ((SH1106_NUM_SPI_DEVICES) + (SH1106_NUM_I2C_DEVICES)) + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Quantum Painter SH1106 device factories + +#ifdef QUANTUM_PAINTER_SH1106_SPI_ENABLE + +/** + * Factory method for an SH1106 SPI LCD device. + * + * @param panel_width[in] the width of the display in pixels (usually 128) + * @param panel_height[in] the height of the display in pixels (usually 64) + * @param chip_select_pin[in] the GPIO pin used for SPI chip select + * @param dc_pin[in] the GPIO pin used for D/C control + * @param reset_pin[in] the GPIO pin used for RST + * @param spi_divisor[in] the SPI divisor to use when communicating with the display + * @param spi_mode[in] the SPI mode to use when communicating with the display + * @return the device handle used with all drawing routines in Quantum Painter + */ +painter_device_t qp_sh1106_make_spi_device(uint16_t panel_width, uint16_t panel_height, pin_t chip_select_pin, pin_t dc_pin, pin_t reset_pin, uint16_t spi_divisor, int spi_mode); + +#endif // QUANTUM_PAINTER_SH1106_SPI_ENABLE + +#ifdef QUANTUM_PAINTER_SH1106_I2C_ENABLE + +/** + * Factory method for an SH1106 I2C LCD device. + * + * @param panel_width[in] the width of the display in pixels (usually 128) + * @param panel_height[in] the height of the display in pixels (usually 64) + * @param i2c_address[in] the I2C address to use + * @return the device handle used with all drawing routines in Quantum Painter + */ +painter_device_t qp_sh1106_make_i2c_device(uint16_t panel_width, uint16_t panel_height, uint8_t i2c_address); + +#endif // QUANTUM_PAINTER_SH1106_I2C_ENABLE diff --git a/drivers/painter/sh1106/qp_sh1106_opcodes.h b/drivers/painter/sh1106/qp_sh1106_opcodes.h new file mode 100644 index 0000000000..a2e100d770 --- /dev/null +++ b/drivers/painter/sh1106/qp_sh1106_opcodes.h @@ -0,0 +1,26 @@ +// Copyright 2023 Nick Brassel (@tzarc) +// SPDX-License-Identifier: GPL-2.0-or-later +#pragma once + +#define SH1106_DISPLAY_ON 0xAF +#define SH1106_DISPLAY_OFF 0xAE +#define SH1106_SET_OSC_DIVFREQ 0xD5 +#define SH1106_SET_MUX_RATIO 0xA8 +#define SH1106_DISPLAY_OFFSET 0xD3 +#define SH1106_DISPLAY_START_LINE 0x40 +#define SH1106_SET_CHARGE_PUMP 0x8D +#define SH1106_SET_SEGMENT_REMAP_NORMAL 0xA0 +#define SH1106_SET_SEGMENT_REMAP_INV 0xA1 +#define SH1106_COM_SCAN_DIR_INC 0xC0 +#define SH1106_COM_SCAN_DIR_DEC 0xC8 +#define SH1106_COM_PADS_HW_CFG 0xDA +#define SH1106_SET_CONTRAST 0x81 +#define SH1106_SET_PRECHARGE_PERIOD 0xD9 +#define SH1106_VCOM_DETECT 0xDB +#define SH1106_ALL_ON_RESUME 0xA4 +#define SH1106_NON_INVERTING_DISPLAY 0xA6 +#define SH1106_DEACTIVATE_SCROLL 0x2E + +#define SH1106_SETCOLUMN_LSB 0x00 +#define SH1106_SETCOLUMN_MSB 0x10 +#define SH1106_PAGE_ADDR 0xB0 diff --git a/drivers/painter/ssd1351/qp_ssd1351.c b/drivers/painter/ssd1351/qp_ssd1351.c index 434b7f0327..3270a362c2 100644 --- a/drivers/painter/ssd1351/qp_ssd1351.c +++ b/drivers/painter/ssd1351/qp_ssd1351.c @@ -107,13 +107,14 @@ painter_device_t qp_ssd1351_make_spi_device(uint16_t panel_width, uint16_t panel driver->base.native_bits_per_pixel = 16; // RGB565 // SPI and other pin configuration - driver->base.comms_config = &driver->spi_dc_reset_config; - driver->spi_dc_reset_config.spi_config.chip_select_pin = chip_select_pin; - driver->spi_dc_reset_config.spi_config.divisor = spi_divisor; - driver->spi_dc_reset_config.spi_config.lsb_first = false; - driver->spi_dc_reset_config.spi_config.mode = spi_mode; - driver->spi_dc_reset_config.dc_pin = dc_pin; - driver->spi_dc_reset_config.reset_pin = reset_pin; + driver->base.comms_config = &driver->spi_dc_reset_config; + driver->spi_dc_reset_config.spi_config.chip_select_pin = chip_select_pin; + driver->spi_dc_reset_config.spi_config.divisor = spi_divisor; + driver->spi_dc_reset_config.spi_config.lsb_first = false; + driver->spi_dc_reset_config.spi_config.mode = spi_mode; + driver->spi_dc_reset_config.dc_pin = dc_pin; + driver->spi_dc_reset_config.reset_pin = reset_pin; + driver->spi_dc_reset_config.command_params_uses_command_pin = false; if (!qp_internal_register_device((painter_device_t)driver)) { memset(driver, 0, sizeof(tft_panel_dc_reset_painter_device_t)); diff --git a/drivers/painter/ssd1351/qp_ssd1351.h b/drivers/painter/ssd1351/qp_ssd1351.h index 0df34f204d..0045c4926b 100644 --- a/drivers/painter/ssd1351/qp_ssd1351.h +++ b/drivers/painter/ssd1351/qp_ssd1351.h @@ -1,6 +1,5 @@ // Copyright 2021 Nick Brassel (@tzarc) // SPDX-License-Identifier: GPL-2.0-or-later - #pragma once #include "gpio.h" diff --git a/drivers/painter/ssd1351/qp_ssd1351_opcodes.h b/drivers/painter/ssd1351/qp_ssd1351_opcodes.h index 48ed2a3a7c..ca8e2bf77e 100644 --- a/drivers/painter/ssd1351/qp_ssd1351_opcodes.h +++ b/drivers/painter/ssd1351/qp_ssd1351_opcodes.h @@ -1,6 +1,5 @@ // Copyright 2021 Nick Brassel (@tzarc) // SPDX-License-Identifier: GPL-2.0-or-later - #pragma once //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// diff --git a/drivers/painter/st77xx/qp_st7735.c b/drivers/painter/st77xx/qp_st7735.c index 98baf400ab..1db0d01dcb 100644 --- a/drivers/painter/st77xx/qp_st7735.c +++ b/drivers/painter/st77xx/qp_st7735.c @@ -58,6 +58,8 @@ __attribute__((weak)) bool qp_st7735_init(painter_device_t device, painter_rotat ST77XX_SET_PIX_FMT, 0, 1, 0x55, ST77XX_CMD_INVERT_OFF, 0, 0, ST77XX_CMD_NORMAL_ON, 0, 0, + ST7735_SET_PGAMMA, 0, 16, 0x02, 0x1C, 0x07, 0x12, 0x37, 0x32, 0x29, 0x2D, 0x29, 0x25, 0x2B, 0x39, 0x00, 0x01, 0x03, 0x10, + ST7735_SET_NGAMMA, 0, 16, 0x03, 0x1D, 0x07, 0x06, 0x2E, 0x2C, 0x29, 0x2D, 0x2E, 0x2E, 0x37, 0x3F, 0x00, 0x00, 0x02, 0x10, ST77XX_CMD_DISPLAY_ON, 20, 0 }; // clang-format on @@ -127,13 +129,14 @@ painter_device_t qp_st7735_make_spi_device(uint16_t panel_width, uint16_t panel_ driver->base.native_bits_per_pixel = 16; // RGB565 // SPI and other pin configuration - driver->base.comms_config = &driver->spi_dc_reset_config; - driver->spi_dc_reset_config.spi_config.chip_select_pin = chip_select_pin; - driver->spi_dc_reset_config.spi_config.divisor = spi_divisor; - driver->spi_dc_reset_config.spi_config.lsb_first = false; - driver->spi_dc_reset_config.spi_config.mode = spi_mode; - driver->spi_dc_reset_config.dc_pin = dc_pin; - driver->spi_dc_reset_config.reset_pin = reset_pin; + driver->base.comms_config = &driver->spi_dc_reset_config; + driver->spi_dc_reset_config.spi_config.chip_select_pin = chip_select_pin; + driver->spi_dc_reset_config.spi_config.divisor = spi_divisor; + driver->spi_dc_reset_config.spi_config.lsb_first = false; + driver->spi_dc_reset_config.spi_config.mode = spi_mode; + driver->spi_dc_reset_config.dc_pin = dc_pin; + driver->spi_dc_reset_config.reset_pin = reset_pin; + driver->spi_dc_reset_config.command_params_uses_command_pin = false; if (!qp_internal_register_device((painter_device_t)driver)) { memset(driver, 0, sizeof(tft_panel_dc_reset_painter_device_t)); diff --git a/drivers/painter/st77xx/qp_st7735.h b/drivers/painter/st77xx/qp_st7735.h index a9ce16bef1..e65b7ca706 100644 --- a/drivers/painter/st77xx/qp_st7735.h +++ b/drivers/painter/st77xx/qp_st7735.h @@ -2,7 +2,6 @@ // Copyright 2021 Nick Brassel (@tzarc) // Copyright 2022 David Hoelscher (@customMK) // SPDX-License-Identifier: GPL-2.0-or-later - #pragma once #include "gpio.h" @@ -42,4 +41,4 @@ * @return the device handle used with all drawing routines in Quantum Painter */ painter_device_t qp_st7735_make_spi_device(uint16_t panel_width, uint16_t panel_height, pin_t chip_select_pin, pin_t dc_pin, pin_t reset_pin, uint16_t spi_divisor, int spi_mode); -#endif // QUANTUM_PAINTER_ST7735_SPI_ENABLE
\ No newline at end of file +#endif // QUANTUM_PAINTER_ST7735_SPI_ENABLE diff --git a/drivers/painter/st77xx/qp_st7735_opcodes.h b/drivers/painter/st77xx/qp_st7735_opcodes.h index 816e32f3d7..f390d113c5 100644 --- a/drivers/painter/st77xx/qp_st7735_opcodes.h +++ b/drivers/painter/st77xx/qp_st7735_opcodes.h @@ -1,6 +1,5 @@ // Copyright 2022 David Hoelscher (@customMK) // SPDX-License-Identifier: GPL-2.0-or-later - #pragma once //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// diff --git a/drivers/painter/st77xx/qp_st7789.c b/drivers/painter/st77xx/qp_st7789.c index f9065f5178..855a9cc0c8 100644 --- a/drivers/painter/st77xx/qp_st7789.c +++ b/drivers/painter/st77xx/qp_st7789.c @@ -126,13 +126,14 @@ painter_device_t qp_st7789_make_spi_device(uint16_t panel_width, uint16_t panel_ driver->base.native_bits_per_pixel = 16; // RGB565 // SPI and other pin configuration - driver->base.comms_config = &driver->spi_dc_reset_config; - driver->spi_dc_reset_config.spi_config.chip_select_pin = chip_select_pin; - driver->spi_dc_reset_config.spi_config.divisor = spi_divisor; - driver->spi_dc_reset_config.spi_config.lsb_first = false; - driver->spi_dc_reset_config.spi_config.mode = spi_mode; - driver->spi_dc_reset_config.dc_pin = dc_pin; - driver->spi_dc_reset_config.reset_pin = reset_pin; + driver->base.comms_config = &driver->spi_dc_reset_config; + driver->spi_dc_reset_config.spi_config.chip_select_pin = chip_select_pin; + driver->spi_dc_reset_config.spi_config.divisor = spi_divisor; + driver->spi_dc_reset_config.spi_config.lsb_first = false; + driver->spi_dc_reset_config.spi_config.mode = spi_mode; + driver->spi_dc_reset_config.dc_pin = dc_pin; + driver->spi_dc_reset_config.reset_pin = reset_pin; + driver->spi_dc_reset_config.command_params_uses_command_pin = false; if (!qp_internal_register_device((painter_device_t)driver)) { memset(driver, 0, sizeof(tft_panel_dc_reset_painter_device_t)); diff --git a/drivers/painter/st77xx/qp_st7789.h b/drivers/painter/st77xx/qp_st7789.h index ec61f5d70b..03d618cae4 100644 --- a/drivers/painter/st77xx/qp_st7789.h +++ b/drivers/painter/st77xx/qp_st7789.h @@ -1,7 +1,6 @@ // Copyright 2021 Paul Cotter (@gr1mr3aver) // Copyright 2021 Nick Brassel (@tzarc) // SPDX-License-Identifier: GPL-2.0-or-later - #pragma once #include "gpio.h" diff --git a/drivers/painter/st77xx/qp_st7789_opcodes.h b/drivers/painter/st77xx/qp_st7789_opcodes.h index b5baba7184..4b46f994b4 100644 --- a/drivers/painter/st77xx/qp_st7789_opcodes.h +++ b/drivers/painter/st77xx/qp_st7789_opcodes.h @@ -1,6 +1,5 @@ // Copyright 2021 Paul Cotter (@gr1mr3aver) // SPDX-License-Identifier: GPL-2.0-or-later - #pragma once //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// diff --git a/drivers/painter/st77xx/qp_st77xx_opcodes.h b/drivers/painter/st77xx/qp_st77xx_opcodes.h index 131378d832..c01e2b21e6 100644 --- a/drivers/painter/st77xx/qp_st77xx_opcodes.h +++ b/drivers/painter/st77xx/qp_st77xx_opcodes.h @@ -1,6 +1,5 @@ // Copyright 2021 Paul Cotter (@gr1mr3aver) // SPDX-License-Identifier: GPL-2.0-or-later - #pragma once //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// diff --git a/drivers/painter/tft_panel/qp_tft_panel.h b/drivers/painter/tft_panel/qp_tft_panel.h index 67168645b7..3b184f2eba 100644 --- a/drivers/painter/tft_panel/qp_tft_panel.h +++ b/drivers/painter/tft_panel/qp_tft_panel.h @@ -1,5 +1,6 @@ // Copyright 2021 Nick Brassel (@tzarc) // SPDX-License-Identifier: GPL-2.0-or-later +#pragma once #include "color.h" #include "qp_internal.h" diff --git a/drivers/ps2/ps2_mouse.c b/drivers/ps2/ps2_mouse.c index ae594c94bc..88c9bdcebe 100644 --- a/drivers/ps2/ps2_mouse.c +++ b/drivers/ps2/ps2_mouse.c @@ -265,6 +265,7 @@ static inline void ps2_mouse_scroll_button_task(report_mouse_t *mouse_report) { SCROLL_SENT, } scroll_state = SCROLL_NONE; static uint16_t scroll_button_time = 0; + static int16_t scroll_x, scroll_y; if (PS2_MOUSE_SCROLL_BTN_MASK == (mouse_report->buttons & (PS2_MOUSE_SCROLL_BTN_MASK))) { // All scroll buttons are pressed @@ -272,13 +273,19 @@ static inline void ps2_mouse_scroll_button_task(report_mouse_t *mouse_report) { if (scroll_state == SCROLL_NONE) { scroll_button_time = timer_read(); scroll_state = SCROLL_BTN; + scroll_x = 0; + scroll_y = 0; } // If the mouse has moved, update the report to scroll instead of move the mouse if (mouse_report->x || mouse_report->y) { - scroll_state = SCROLL_SENT; - mouse_report->v = -mouse_report->y / (PS2_MOUSE_SCROLL_DIVISOR_V); - mouse_report->h = mouse_report->x / (PS2_MOUSE_SCROLL_DIVISOR_H); + scroll_state = SCROLL_SENT; + scroll_y += mouse_report->y; + scroll_x += mouse_report->x; + mouse_report->v = -scroll_y / (PS2_MOUSE_SCROLL_DIVISOR_V); + mouse_report->h = scroll_x / (PS2_MOUSE_SCROLL_DIVISOR_H); + scroll_y += (mouse_report->v * (PS2_MOUSE_SCROLL_DIVISOR_V)); + scroll_x -= (mouse_report->h * (PS2_MOUSE_SCROLL_DIVISOR_H)); mouse_report->x = 0; mouse_report->y = 0; #ifdef PS2_MOUSE_INVERT_H diff --git a/drivers/sensors/pmw3320.c b/drivers/sensors/pmw3320.c index a4648ef425..69a584f4e1 100644 --- a/drivers/sensors/pmw3320.c +++ b/drivers/sensors/pmw3320.c @@ -178,7 +178,7 @@ uint16_t pmw3320_get_cpi(void) { } void pmw3320_set_cpi(uint16_t cpi) { - uint8_t cpival = constrain((cpi / PMW3320_CPI_STEP) - 1U, 0, (PMW3320_CPI_MAX / PMW3320_CPI_STEP) - 1U); + uint8_t cpival = constrain((cpi / PMW3320_CPI_STEP), (PMW3320_CPI_MIN / PMW3320_CPI_STEP), (PMW3320_CPI_MAX / PMW3320_CPI_STEP)) - 1U; // Fifth bit is probably a control bit. // PMW3320 datasheet don't have any info on this, so this is a pure guess. pmw3320_write_reg(REG_Resolution, 0x20 | cpival); diff --git a/drivers/sensors/pmw3360.c b/drivers/sensors/pmw3360.c index 81dca002e2..a7dc687f50 100644 --- a/drivers/sensors/pmw3360.c +++ b/drivers/sensors/pmw3360.c @@ -23,7 +23,7 @@ void pmw33xx_set_cpi(uint8_t sensor, uint16_t cpi) { return; } - uint8_t cpival = CONSTRAIN((cpi / PMW33XX_CPI_STEP) - 1, 0, (PMW33XX_CPI_MAX / PMW33XX_CPI_STEP) - 1U); + uint8_t cpival = CONSTRAIN((cpi / PMW33XX_CPI_STEP), (PMW33XX_CPI_MIN / PMW33XX_CPI_STEP), (PMW33XX_CPI_MAX / PMW33XX_CPI_STEP)) - 1U; pmw33xx_write(sensor, REG_Config1, cpival); } diff --git a/drivers/sensors/pmw3389.c b/drivers/sensors/pmw3389.c index c5781a5ffe..10e578edac 100644 --- a/drivers/sensors/pmw3389.c +++ b/drivers/sensors/pmw3389.c @@ -22,7 +22,7 @@ void pmw33xx_set_cpi(uint8_t sensor, uint16_t cpi) { return; } - uint16_t cpival = CONSTRAIN((cpi / PMW33XX_CPI_STEP) - 1, 0, (PMW33XX_CPI_MAX / PMW33XX_CPI_STEP) - 1U); + uint16_t cpival = CONSTRAIN((cpi / PMW33XX_CPI_STEP), (PMW33XX_CPI_MIN / PMW33XX_CPI_STEP), (PMW33XX_CPI_MAX / PMW33XX_CPI_STEP)) - 1U; // Sets upper byte first for more consistent setting of cpi pmw33xx_write(sensor, REG_Resolution_H, (cpival >> 8) & 0xFF); pmw33xx_write(sensor, REG_Resolution_L, cpival & 0xFF); diff --git a/drivers/ws2812.h b/drivers/ws2812.h index 8750b0110e..1527df23d3 100644 --- a/drivers/ws2812.h +++ b/drivers/ws2812.h @@ -73,4 +73,4 @@ * - Send out the LED data * - Wait 50us to reset the LEDs */ -void ws2812_setleds(LED_TYPE *ledarray, uint16_t number_of_leds); +void ws2812_setleds(rgb_led_t *ledarray, uint16_t number_of_leds); |