diff options
Diffstat (limited to 'drivers')
56 files changed, 3864 insertions, 1564 deletions
diff --git a/drivers/eeprom/eeprom_i2c.h b/drivers/eeprom/eeprom_i2c.h index 77eea66d63..85317c9ea5 100644 --- a/drivers/eeprom/eeprom_i2c.h +++ b/drivers/eeprom/eeprom_i2c.h @@ -54,6 +54,11 @@ # define EXTERNAL_EEPROM_PAGE_SIZE 32 # define EXTERNAL_EEPROM_ADDRESS_SIZE 2 # define EXTERNAL_EEPROM_WRITE_TIME 5 +#elif defined(EEPROM_I2C_24LC32A) +# define EXTERNAL_EEPROM_BYTE_COUNT 4096 +# define EXTERNAL_EEPROM_PAGE_SIZE 32 +# define EXTERNAL_EEPROM_ADDRESS_SIZE 2 +# define EXTERNAL_EEPROM_WRITE_TIME 5 #elif defined(EEPROM_I2C_MB85RC256V) # define EXTERNAL_EEPROM_BYTE_COUNT 32768 # define EXTERNAL_EEPROM_PAGE_SIZE 128 diff --git a/drivers/eeprom/eeprom_spi.c b/drivers/eeprom/eeprom_spi.c index 25955498c4..51ba25dece 100644 --- a/drivers/eeprom/eeprom_spi.c +++ b/drivers/eeprom/eeprom_spi.c @@ -58,14 +58,20 @@ static bool spi_eeprom_start(void) { static spi_status_t spi_eeprom_wait_while_busy(int timeout) { uint32_t deadline = timer_read32() + timeout; - spi_status_t response; - do { + spi_status_t response = SR_WIP; + while (response & SR_WIP) { + if (!spi_eeprom_start()) { + return SPI_STATUS_ERROR; + } + spi_write(CMD_RDSR); response = spi_read(); + spi_stop(); + if (timer_read32() >= deadline) { return SPI_STATUS_TIMEOUT; } - } while (response & SR_WIP); + } return SPI_STATUS_SUCCESS; } @@ -105,27 +111,21 @@ void eeprom_driver_erase(void) { void eeprom_read_block(void *buf, const void *addr, size_t len) { //------------------------------------------------- // Wait for the write-in-progress bit to be cleared - bool res = spi_eeprom_start(); - if (!res) { - dprint("failed to start SPI for WIP check\n"); - memset(buf, 0, len); - return; - } - spi_status_t response = spi_eeprom_wait_while_busy(EXTERNAL_EEPROM_SPI_TIMEOUT); - spi_stop(); - if (response == SPI_STATUS_TIMEOUT) { - dprint("SPI timeout for WIP check\n"); + if (response != SPI_STATUS_SUCCESS) { + spi_stop(); memset(buf, 0, len); + dprint("SPI timeout for WIP check\n"); return; } //------------------------------------------------- // Perform read - res = spi_eeprom_start(); + bool res = spi_eeprom_start(); if (!res) { - dprint("failed to start SPI for read\n"); + spi_stop(); memset(buf, 0, len); + dprint("failed to start SPI for read\n"); return; } @@ -158,15 +158,9 @@ void eeprom_write_block(const void *buf, void *addr, size_t len) { //------------------------------------------------- // Wait for the write-in-progress bit to be cleared - res = spi_eeprom_start(); - if (!res) { - dprint("failed to start SPI for WIP check\n"); - return; - } - spi_status_t response = spi_eeprom_wait_while_busy(EXTERNAL_EEPROM_SPI_TIMEOUT); - spi_stop(); - if (response == SPI_STATUS_TIMEOUT) { + if (response != SPI_STATUS_SUCCESS) { + spi_stop(); dprint("SPI timeout for WIP check\n"); return; } @@ -175,6 +169,7 @@ void eeprom_write_block(const void *buf, void *addr, size_t len) { // Enable writes res = spi_eeprom_start(); if (!res) { + spi_stop(); dprint("failed to start SPI for write-enable\n"); return; } @@ -186,6 +181,7 @@ void eeprom_write_block(const void *buf, void *addr, size_t len) { // Perform the write res = spi_eeprom_start(); if (!res) { + spi_stop(); dprint("failed to start SPI for write\n"); return; } diff --git a/drivers/eeprom/eeprom_wear_leveling.c b/drivers/eeprom/eeprom_wear_leveling.c new file mode 100644 index 0000000000..bd77eef35c --- /dev/null +++ b/drivers/eeprom/eeprom_wear_leveling.c @@ -0,0 +1,23 @@ +// Copyright 2022 Nick Brassel (@tzarc) +// SPDX-License-Identifier: GPL-2.0-or-later +#include <stdint.h> +#include <string.h> + +#include "eeprom_driver.h" +#include "wear_leveling.h" + +void eeprom_driver_init(void) { + wear_leveling_init(); +} + +void eeprom_driver_erase(void) { + wear_leveling_erase(); +} + +void eeprom_read_block(void *buf, const void *addr, size_t len) { + wear_leveling_read((uint32_t)addr, buf, len); +} + +void eeprom_write_block(const void *buf, void *addr, size_t len) { + wear_leveling_write((uint32_t)addr, buf, len); +} diff --git a/drivers/flash/flash_spi.c b/drivers/flash/flash_spi.c index 684ee06d71..0c0eb8a99e 100644 --- a/drivers/flash/flash_spi.c +++ b/drivers/flash/flash_spi.c @@ -207,7 +207,7 @@ flash_status_t flash_erase_sector(uint32_t addr) { /* Check that the address exceeds the limit. */ if ((addr + (EXTERNAL_FLASH_SECTOR_SIZE)) >= (EXTERNAL_FLASH_SIZE) || ((addr % (EXTERNAL_FLASH_SECTOR_SIZE)) != 0)) { - dprintf("Flash erase sector address over limit! [addr:0x%x]\n", (uint32_t)addr); + dprintf("Flash erase sector address over limit! [addr:0x%lx]\n", (uint32_t)addr); return FLASH_STATUS_ERROR; } @@ -247,7 +247,7 @@ flash_status_t flash_erase_block(uint32_t addr) { /* Check that the address exceeds the limit. */ if ((addr + (EXTERNAL_FLASH_BLOCK_SIZE)) >= (EXTERNAL_FLASH_SIZE) || ((addr % (EXTERNAL_FLASH_BLOCK_SIZE)) != 0)) { - dprintf("Flash erase block address over limit! [addr:0x%x]\n", (uint32_t)addr); + dprintf("Flash erase block address over limit! [addr:0x%lx]\n", (uint32_t)addr); return FLASH_STATUS_ERROR; } @@ -303,7 +303,7 @@ flash_status_t flash_read_block(uint32_t addr, void *buf, size_t len) { } #if defined(CONSOLE_ENABLE) && defined(DEBUG_FLASH_SPI_OUTPUT) - dprintf("[SPI FLASH R] 0x%08lX: ", addr); + dprintf("[SPI FLASH R] 0x%08lx: ", addr); for (size_t i = 0; i < len; ++i) { dprintf(" %02X", (int)(((uint8_t *)read_buf)[i])); } @@ -339,7 +339,7 @@ flash_status_t flash_write_block(uint32_t addr, const void *buf, size_t len) { } #if defined(CONSOLE_ENABLE) && defined(DEBUG_FLASH_SPI_OUTPUT) - dprintf("[SPI FLASH W] 0x%08lX: ", addr); + dprintf("[SPI FLASH W] 0x%08lx: ", addr); for (size_t i = 0; i < write_length; i++) { dprintf(" %02X", (int)(uint8_t)(write_buf[i])); } diff --git a/drivers/gpio/pca9505.c b/drivers/gpio/pca9505.c new file mode 100644 index 0000000000..5803746c96 --- /dev/null +++ b/drivers/gpio/pca9505.c @@ -0,0 +1,166 @@ +// Copyright 2022 nirim000 +// SPDX-License-Identifier: GPL-2.0-or-later + +#include "i2c_master.h" +#include "pca9505.h" + +#include "debug.h" + +#define SLAVE_TO_ADDR(n) (n << 1) +#define TIMEOUT 100 + +enum { + CMD_INPUT_0 = 0, + CMD_INPUT_1, + CMD_INPUT_2, + CMD_INPUT_3, + CMD_INPUT_4, + CMD_OUTPUT_0 = 8, + CMD_OUTPUT_1, + CMD_OUTPUT_2, + CMD_OUTPUT_3, + CMD_OUTPUT_4, + CMD_INVERSION_0 = 16, + CMD_INVERSION_1, + CMD_INVERSION_2, + CMD_INVERSION_3, + CMD_INVERSION_4, + CMD_CONFIG_0 = 24, + CMD_CONFIG_1, + CMD_CONFIG_2, + CMD_CONFIG_3, + CMD_CONFIG_4, +}; + +void pca9505_init(uint8_t slave_addr) { + static uint8_t s_init = 0; + if (!s_init) { + i2c_init(); + + s_init = 1; + } + + // TODO: could check device connected + // i2c_start(SLAVE_TO_ADDR(slave) | I2C_WRITE); + // i2c_stop(); +} + +bool pca9505_set_config(uint8_t slave_addr, pca9505_port_t port, uint8_t conf) { + uint8_t addr = SLAVE_TO_ADDR(slave_addr); + uint8_t cmd = 0; + switch (port) { + case 0: + cmd = CMD_CONFIG_0; + break; + case 1: + cmd = CMD_CONFIG_1; + break; + case 2: + cmd = CMD_CONFIG_2; + break; + case 3: + cmd = CMD_CONFIG_3; + break; + case 4: + cmd = CMD_CONFIG_4; + break; + } + + i2c_status_t ret = i2c_writeReg(addr, cmd, &conf, sizeof(conf), TIMEOUT); + if (ret != I2C_STATUS_SUCCESS) { + print("pca9505_set_config::FAILED\n"); + return false; + } + + return true; +} + +bool pca9505_set_polarity(uint8_t slave_addr, pca9505_port_t port, uint8_t conf) { + uint8_t addr = SLAVE_TO_ADDR(slave_addr); + uint8_t cmd = 0; + switch (port) { + case 0: + cmd = CMD_INVERSION_0; + break; + case 1: + cmd = CMD_INVERSION_1; + break; + case 2: + cmd = CMD_INVERSION_2; + break; + case 3: + cmd = CMD_INVERSION_3; + break; + case 4: + cmd = CMD_INVERSION_4; + break; + } + + i2c_status_t ret = i2c_writeReg(addr, cmd, &conf, sizeof(conf), TIMEOUT); + if (ret != I2C_STATUS_SUCCESS) { + print("pca9505_set_polarity::FAILED\n"); + return false; + } + + return true; +} + +bool pca9505_set_output(uint8_t slave_addr, pca9505_port_t port, uint8_t conf) { + uint8_t addr = SLAVE_TO_ADDR(slave_addr); + uint8_t cmd = 0; + switch (port) { + case 0: + cmd = CMD_OUTPUT_0; + break; + case 1: + cmd = CMD_OUTPUT_1; + break; + case 2: + cmd = CMD_OUTPUT_2; + break; + case 3: + cmd = CMD_OUTPUT_3; + break; + case 4: + cmd = CMD_OUTPUT_4; + break; + } + + i2c_status_t ret = i2c_writeReg(addr, cmd, &conf, sizeof(conf), TIMEOUT); + if (ret != I2C_STATUS_SUCCESS) { + print("pca9505_set_output::FAILED\n"); + return false; + } + + return true; +} + +bool pca9505_readPins(uint8_t slave_addr, pca9505_port_t port, uint8_t* out) { + uint8_t addr = SLAVE_TO_ADDR(slave_addr); + uint8_t cmd = 0; + switch (port) { + case 0: + cmd = CMD_INPUT_0; + break; + case 1: + cmd = CMD_INPUT_1; + break; + case 2: + cmd = CMD_INPUT_2; + break; + case 3: + cmd = CMD_INPUT_3; + break; + case 4: + cmd = CMD_INPUT_4; + break; + } + + i2c_status_t ret = i2c_readReg(addr, cmd, out, sizeof(uint8_t), TIMEOUT); + if (ret != I2C_STATUS_SUCCESS) { + print("pca9505_readPins::FAILED\n"); + return false; + } + + return true; +} diff --git a/drivers/gpio/pca9505.h b/drivers/gpio/pca9505.h new file mode 100644 index 0000000000..732ddb88ea --- /dev/null +++ b/drivers/gpio/pca9505.h @@ -0,0 +1,67 @@ +// Copyright 2022 nirim000 +// SPDX-License-Identifier: GPL-2.0-or-later + +#pragma once + +#include <stdint.h> +#include <stdbool.h> + +/** + * Port ID + */ +typedef enum { + PCA9505_PORT0, + PCA9505_PORT1, + PCA9505_PORT2, + PCA9505_PORT3, + PCA9505_PORT4, +} pca9505_port_t; + +/** + * Helpers for set_config + */ +enum { + ALL_NORMAL = 0, + ALL_INVERTED = 0xFF, +}; + +/** + * Helpers for set_config + */ +enum { + ALL_OUTPUT = 0, + ALL_INPUT = 0xFF, +}; + +/** + * Helpers for set_output + */ +enum { + ALL_LOW = 0, + ALL_HIGH = 0xFF, +}; + +/** + * Init expander and any other dependent drivers + */ +void pca9505_init(uint8_t slave_addr); + +/** + * Configure input/output to a given port + */ +bool pca9505_set_config(uint8_t slave_addr, pca9505_port_t port, uint8_t conf); + +/** + * Configure polarity to a given port + */ +bool pca9505_set_polarity(uint8_t slave_addr, pca9505_port_t port, uint8_t conf); + +/** + * Write high/low to a given port + */ +bool pca9505_set_output(uint8_t slave_addr, pca9505_port_t port, uint8_t conf); + +/** + * Read state of a given port + */ +bool pca9505_readPins(uint8_t slave_addr, pca9505_port_t port, uint8_t* ret); diff --git a/drivers/led/aw20216.c b/drivers/led/aw20216.c index 448accdcd3..55083936ef 100644 --- a/drivers/led/aw20216.c +++ b/drivers/led/aw20216.c @@ -53,6 +53,10 @@ # define AW_GLOBAL_CURRENT_MAX 150 #endif +#ifndef AW_SPI_MODE +# define AW_SPI_MODE 0 +#endif + #ifndef AW_SPI_DIVISOR # define AW_SPI_DIVISOR 4 #endif @@ -63,7 +67,7 @@ bool g_pwm_buffer_update_required[DRIVER_COUNT] = {false}; bool AW20216_write(pin_t cs_pin, uint8_t page, uint8_t reg, uint8_t* data, uint8_t len) { static uint8_t s_spi_transfer_buffer[2] = {0}; - if (!spi_start(cs_pin, false, 3, AW_SPI_DIVISOR)) { + if (!spi_start(cs_pin, false, AW_SPI_MODE, AW_SPI_DIVISOR)) { spi_stop(); return false; } diff --git a/drivers/led/ckled2001-simple.c b/drivers/led/ckled2001-simple.c new file mode 100644 index 0000000000..da4bf20b99 --- /dev/null +++ b/drivers/led/ckled2001-simple.c @@ -0,0 +1,218 @@ +/* Copyright 2021 @ Keychron (https://www.keychron.com) + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include "ckled2001-simple.h" +#include "i2c_master.h" +#include "wait.h" + +#ifndef CKLED2001_TIMEOUT +# define CKLED2001_TIMEOUT 100 +#endif + +#ifndef CKLED2001_PERSISTENCE +# define CKLED2001_PERSISTENCE 0 +#endif + +#ifndef PHASE_CHANNEL +# define PHASE_CHANNEL MSKPHASE_12CHANNEL +#endif + +#ifndef CKLED2001_CURRENT_TUNE +# define CKLED2001_CURRENT_TUNE \ + { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF } +#endif + +// Transfer buffer for TWITransmitData() +uint8_t g_twi_transfer_buffer[20]; + +// These buffers match the CKLED2001 PWM registers. +// The control buffers match the PG0 LED On/Off registers. +// Storing them like this is optimal for I2C transfers to the registers. +// We could optimize this and take out the unused registers from these +// buffers and the transfers in CKLED2001_write_pwm_buffer() but it's +// probably not worth the extra complexity. +uint8_t g_pwm_buffer[DRIVER_COUNT][192]; +bool g_pwm_buffer_update_required[DRIVER_COUNT] = {false}; + +uint8_t g_led_control_registers[DRIVER_COUNT][24] = {0}; +bool g_led_control_registers_update_required[DRIVER_COUNT] = {false}; + +bool CKLED2001_write_register(uint8_t addr, uint8_t reg, uint8_t data) { + // If the transaction fails function returns false. + g_twi_transfer_buffer[0] = reg; + g_twi_transfer_buffer[1] = data; + +#if CKLED2001_PERSISTENCE > 0 + for (uint8_t i = 0; i < CKLED2001_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, CKLED2001_TIMEOUT) != 0) { + return false; + } + } +#else + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, CKLED2001_TIMEOUT) != 0) { + return false; + } +#endif + return true; +} + +bool CKLED2001_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { + // Assumes PG1 is already selected. + // If any of the transactions fails function returns false. + // Transmit PWM registers in 12 transfers of 16 bytes. + // g_twi_transfer_buffer[] is 20 bytes + + // Iterate over the pwm_buffer contents at 16 byte intervals. + for (int i = 0; i < 192; i += 16) { + g_twi_transfer_buffer[0] = i; + // Copy the data from i to i+15. + // Device will auto-increment register for data after the first byte + // Thus this sets registers 0x00-0x0F, 0x10-0x1F, etc. in one transfer. + for (int j = 0; j < 16; j++) { + g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j]; + } + +#if CKLED2001_PERSISTENCE > 0 + for (uint8_t i = 0; i < CKLED2001_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, CKLED2001_TIMEOUT) != 0) { + return false; + } + } +#else + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, CKLED2001_TIMEOUT) != 0) { + return false; + } +#endif + } + return true; +} + +void CKLED2001_init(uint8_t addr) { + // Select to function page + CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE); + // Setting LED driver to shutdown mode + CKLED2001_write_register(addr, CONFIGURATION_REG, MSKSW_SHUT_DOWN_MODE); + // Setting internal channel pulldown/pullup + CKLED2001_write_register(addr, PDU_REG, MSKSET_CA_CB_CHANNEL); + // Select number of scan phase + CKLED2001_write_register(addr, SCAN_PHASE_REG, PHASE_CHANNEL); + // Setting PWM Delay Phase + CKLED2001_write_register(addr, SLEW_RATE_CONTROL_MODE1_REG, MSKPWM_DELAY_PHASE_ENABLE); + // Setting Driving/Sinking Channel Slew Rate + CKLED2001_write_register(addr, SLEW_RATE_CONTROL_MODE2_REG, MSKDRIVING_SINKING_CHHANNEL_SLEWRATE_ENABLE); + // Setting Iref + CKLED2001_write_register(addr, SOFTWARE_SLEEP_REG, MSKSLEEP_DISABLE); + // Set LED CONTROL PAGE (Page 0) + CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_CONTROL_PAGE); + for (int i = 0; i < LED_CONTROL_ON_OFF_LENGTH; i++) { + CKLED2001_write_register(addr, i, 0x00); + } + + // Set PWM PAGE (Page 1) + CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_PWM_PAGE); + for (int i = 0; i < LED_CURRENT_TUNE_LENGTH; i++) { + CKLED2001_write_register(addr, i, 0x00); + } + + // Set CURRENT PAGE (Page 4) + uint8_t current_tuen_reg_list[LED_CURRENT_TUNE_LENGTH] = CKLED2001_CURRENT_TUNE; + CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, CURRENT_TUNE_PAGE); + for (int i = 0; i < LED_CURRENT_TUNE_LENGTH; i++) { + CKLED2001_write_register(addr, i, current_tuen_reg_list[i]); + } + + // Enable LEDs ON/OFF + CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_CONTROL_PAGE); + for (int i = 0; i < LED_CONTROL_ON_OFF_LENGTH; i++) { + CKLED2001_write_register(addr, i, 0xFF); + } + + // Select to function page + CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE); + // Setting LED driver to normal mode + CKLED2001_write_register(addr, CONFIGURATION_REG, MSKSW_NORMAL_MODE); +} + +void CKLED2001_set_value(int index, uint8_t value) { + ckled2001_led led; + if (index >= 0 && index < DRIVER_LED_TOTAL) { + memcpy_P(&led, (&g_ckled2001_leds[index]), sizeof(led)); + + g_pwm_buffer[led.driver][led.v] = value; + g_pwm_buffer_update_required[led.driver] = true; + } +} + +void CKLED2001_set_value_all(uint8_t value) { + for (int i = 0; i < DRIVER_LED_TOTAL; i++) { + CKLED2001_set_value(i, value); + } +} + +void CKLED2001_set_led_control_register(uint8_t index, bool value) { + ckled2001_led led; + memcpy_P(&led, (&g_ckled2001_leds[index]), sizeof(led)); + + uint8_t control_register = led.v / 8; + uint8_t bit_value = led.v % 8; + + if (value) { + g_led_control_registers[led.driver][control_register] |= (1 << bit_value); + } else { + g_led_control_registers[led.driver][control_register] &= ~(1 << bit_value); + } + + g_led_control_registers_update_required[led.driver] = true; +} + +void CKLED2001_update_pwm_buffers(uint8_t addr, uint8_t index) { + if (g_pwm_buffer_update_required[index]) { + CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_PWM_PAGE); + + // If any of the transactions fail we risk writing dirty PG0, + // refresh page 0 just in case. + if (!CKLED2001_write_pwm_buffer(addr, g_pwm_buffer[index])) { + g_led_control_registers_update_required[index] = true; + } + } + g_pwm_buffer_update_required[index] = false; +} + +void CKLED2001_update_led_control_registers(uint8_t addr, uint8_t index) { + if (g_led_control_registers_update_required[index]) { + CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_CONTROL_PAGE); + for (int i = 0; i < 24; i++) { + CKLED2001_write_register(addr, i, g_led_control_registers[index][i]); + } + } + g_led_control_registers_update_required[index] = false; +} + +void CKLED2001_sw_return_normal(uint8_t addr) { + // Select to function page + CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE); + // Setting LED driver to normal mode + CKLED2001_write_register(addr, CONFIGURATION_REG, MSKSW_NORMAL_MODE); +} + +void CKLED2001_sw_shutdown(uint8_t addr) { + // Select to function page + CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE); + // Setting LED driver to shutdown mode + CKLED2001_write_register(addr, CONFIGURATION_REG, MSKSW_SHUT_DOWN_MODE); + // Write SW Sleep Register + CKLED2001_write_register(addr, SOFTWARE_SLEEP_REG, MSKSLEEP_ENABLE); +} diff --git a/drivers/led/ckled2001-simple.h b/drivers/led/ckled2001-simple.h new file mode 100644 index 0000000000..731da2e1cd --- /dev/null +++ b/drivers/led/ckled2001-simple.h @@ -0,0 +1,337 @@ +/* Copyright 2021 @ Keychron (https://www.keychron.com) + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#pragma once + +#include <stdint.h> +#include <stdbool.h> +#include "progmem.h" + +typedef struct ckled2001_led { + uint8_t driver : 2; + uint8_t v; +} __attribute__((packed)) ckled2001_led; + +extern const ckled2001_led PROGMEM g_ckled2001_leds[DRIVER_LED_TOTAL]; + +void CKLED2001_init(uint8_t addr); +bool CKLED2001_write_register(uint8_t addr, uint8_t reg, uint8_t data); +bool CKLED2001_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer); + +void CKLED2001_set_value(int index, uint8_t value); +void CKLED2001_set_value_all(uint8_t value); + +void CKLED2001_set_led_control_register(uint8_t index, bool value); + +// This should not be called from an interrupt +// (eg. from a timer interrupt). +// Call this while idle (in between matrix scans). +// If the buffer is dirty, it will update the driver with the buffer. +void CKLED2001_update_pwm_buffers(uint8_t addr, uint8_t index); +void CKLED2001_update_led_control_registers(uint8_t addr, uint8_t index); + +void CKLED2001_sw_return_normal(uint8_t addr); +void CKLED2001_sw_shutdown(uint8_t addr); + +// Registers Page Define +#define CONFIGURE_CMD_PAGE 0xFD +#define LED_CONTROL_PAGE 0x00 +#define LED_PWM_PAGE 0x01 +#define FUNCTION_PAGE 0x03 +#define CURRENT_TUNE_PAGE 0x04 + +// Function Register: address 0x00 +#define CONFIGURATION_REG 0x00 +#define MSKSW_SHUT_DOWN_MODE (0x0 << 0) +#define MSKSW_NORMAL_MODE (0x1 << 0) + +#define DRIVER_ID_REG 0x11 +#define CKLED2001_ID 0x8A + +#define PDU_REG 0x13 +#define MSKSET_CA_CB_CHANNEL 0xAA +#define MSKCLR_CA_CB_CHANNEL 0x00 + +#define SCAN_PHASE_REG 0x14 +#define MSKPHASE_12CHANNEL 0x00 +#define MSKPHASE_11CHANNEL 0x01 +#define MSKPHASE_10CHANNEL 0x02 +#define MSKPHASE_9CHANNEL 0x03 +#define MSKPHASE_8CHANNEL 0x04 +#define MSKPHASE_7CHANNEL 0x05 +#define MSKPHASE_6CHANNEL 0x06 +#define MSKPHASE_5CHANNEL 0x07 +#define MSKPHASE_4CHANNEL 0x08 +#define MSKPHASE_3CHANNEL 0x09 +#define MSKPHASE_2CHANNEL 0x0A +#define MSKPHASE_1CHANNEL 0x0B + +#define SLEW_RATE_CONTROL_MODE1_REG 0x15 +#define MSKPWM_DELAY_PHASE_ENABLE 0x04 +#define MSKPWM_DELAY_PHASE_DISABLE 0x00 + +#define SLEW_RATE_CONTROL_MODE2_REG 0x16 +#define MSKDRIVING_SINKING_CHHANNEL_SLEWRATE_ENABLE 0xC0 +#define MSKDRIVING_SINKING_CHHANNEL_SLEWRATE_DISABLE 0x00 + +#define OPEN_SHORT_ENABLE_REG 0x17 +#define MSKOPEN_DETECTION_ENABLE (0x01 << 7) +#define MSKOPEN_DETECTION_DISABLE (0x00) + +#define MSKSHORT_DETECTION_ENABLE (0x01 << 6) +#define MSKSHORT_DETECTION_DISABLE (0x00) + +#define OPEN_SHORT_DUTY_REG 0x18 +#define OPEN_SHORT_FLAG_REG 0x19 + +#define MSKOPEN_DETECTION_INTERRUPT_ENABLE (0x01 << 7) +#define MSKOPEN_DETECTION_INTERRUPT_DISABLE (0x00) + +#define MSKSHORT_DETECTION_INTERRUPT_ENABLE (0x01 << 6) +#define MSKSHORT_DETECTION_INTERRUPT_DISABLE (0x00) + +#define SOFTWARE_SLEEP_REG 0x1A +#define MSKSLEEP_ENABLE 0x02 +#define MSKSLEEP_DISABLE 0x00 + +// LED Control Registers +#define LED_CONTROL_ON_OFF_FIRST_ADDR 0x0 +#define LED_CONTROL_ON_OFF_LAST_ADDR 0x17 +#define LED_CONTROL_ON_OFF_LENGTH ((LED_CONTROL_ON_OFF_LAST_ADDR - LED_CONTROL_ON_OFF_FIRST_ADDR) + 1) + +#define LED_CONTROL_OPEN_FIRST_ADDR 0x18 +#define LED_CONTROL_OPEN_LAST_ADDR 0x2F +#define LED_CONTROL_OPEN_LENGTH ((LED_CONTROL_OPEN_LAST_ADDR - LED_CONTROL_OPEN_FIRST_ADDR) + 1) + +#define LED_CONTROL_SHORT_FIRST_ADDR 0x30 +#define LED_CONTROL_SHORT_LAST_ADDR 0x47 +#define LED_CONTROL_SHORT_LENGTH ((LED_CONTROL_SHORT_LAST_ADDR - LED_CONTROL_SHORT_FIRST_ADDR) + 1) + +#define LED_CONTROL_PAGE_LENGTH 0x48 + +// LED Control Registers +#define LED_PWM_FIRST_ADDR 0x00 +#define LED_PWM_LAST_ADDR 0xBF +#define LED_PWM_LENGTH 0xC0 + +// Current Tune Registers +#define LED_CURRENT_TUNE_FIRST_ADDR 0x00 +#define LED_CURRENT_TUNE_LAST_ADDR 0x0B +#define LED_CURRENT_TUNE_LENGTH 0x0C + +#define A_1 0x00 +#define A_2 0x01 +#define A_3 0x02 +#define A_4 0x03 +#define A_5 0x04 +#define A_6 0x05 +#define A_7 0x06 +#define A_8 0x07 +#define A_9 0x08 +#define A_10 0x09 +#define A_11 0x0A +#define A_12 0x0B +#define A_13 0x0C +#define A_14 0x0D +#define A_15 0x0E +#define A_16 0x0F + +#define B_1 0x10 +#define B_2 0x11 +#define B_3 0x12 +#define B_4 0x13 +#define B_5 0x14 +#define B_6 0x15 +#define B_7 0x16 +#define B_8 0x17 +#define B_9 0x18 +#define B_10 0x19 +#define B_11 0x1A +#define B_12 0x1B +#define B_13 0x1C +#define B_14 0x1D +#define B_15 0x1E +#define B_16 0x1F + +#define C_1 0x20 +#define C_2 0x21 +#define C_3 0x22 +#define C_4 0x23 +#define C_5 0x24 +#define C_6 0x25 +#define C_7 0x26 +#define C_8 0x27 +#define C_9 0x28 +#define C_10 0x29 +#define C_11 0x2A +#define C_12 0x2B +#define C_13 0x2C +#define C_14 0x2D +#define C_15 0x2E +#define C_16 0x2F + +#define D_1 0x30 +#define D_2 0x31 +#define D_3 0x32 +#define D_4 0x33 +#define D_5 0x34 +#define D_6 0x35 +#define D_7 0x36 +#define D_8 0x37 +#define D_9 0x38 +#define D_10 0x39 +#define D_11 0x3A +#define D_12 0x3B +#define D_13 0x3C +#define D_14 0x3D +#define D_15 0x3E +#define D_16 0x3F + +#define E_1 0x40 +#define E_2 0x41 +#define E_3 0x42 +#define E_4 0x43 +#define E_5 0x44 +#define E_6 0x45 +#define E_7 0x46 +#define E_8 0x47 +#define E_9 0x48 +#define E_10 0x49 +#define E_11 0x4A +#define E_12 0x4B +#define E_13 0x4C +#define E_14 0x4D +#define E_15 0x4E +#define E_16 0x4F + +#define F_1 0x50 +#define F_2 0x51 +#define F_3 0x52 +#define F_4 0x53 +#define F_5 0x54 +#define F_6 0x55 +#define F_7 0x56 +#define F_8 0x57 +#define F_9 0x58 +#define F_10 0x59 +#define F_11 0x5A +#define F_12 0x5B +#define F_13 0x5C +#define F_14 0x5D +#define F_15 0x5E +#define F_16 0x5F + +#define G_1 0x60 +#define G_2 0x61 +#define G_3 0x62 +#define G_4 0x63 +#define G_5 0x64 +#define G_6 0x65 +#define G_7 0x66 +#define G_8 0x67 +#define G_9 0x68 +#define G_10 0x69 +#define G_11 0x6A +#define G_12 0x6B +#define G_13 0x6C +#define G_14 0x6D +#define G_15 0x6E +#define G_16 0x6F + +#define H_1 0x70 +#define H_2 0x71 +#define H_3 0x72 +#define H_4 0x73 +#define H_5 0x74 +#define H_6 0x75 +#define H_7 0x76 +#define H_8 0x77 +#define H_9 0x78 +#define H_10 0x79 +#define H_11 0x7A +#define H_12 0x7B +#define H_13 0x7C +#define H_14 0x7D +#define H_15 0x7E +#define H_16 0x7F + +#define I_1 0x80 +#define I_2 0x81 +#define I_3 0x82 +#define I_4 0x83 +#define I_5 0x84 +#define I_6 0x85 +#define I_7 0x86 +#define I_8 0x87 +#define I_9 0x88 +#define I_10 0x89 +#define I_11 0x8A +#define I_12 0x8B +#define I_13 0x8C +#define I_14 0x8D +#define I_15 0x8E +#define I_16 0x8F + +#define J_1 0x90 +#define J_2 0x91 +#define J_3 0x92 +#define J_4 0x93 +#define J_5 0x94 +#define J_6 0x95 +#define J_7 0x96 +#define J_8 0x97 +#define J_9 0x98 +#define J_10 0x99 +#define J_11 0x9A +#define J_12 0x9B +#define J_13 0x9C +#define J_14 0x9D +#define J_15 0x9E +#define J_16 0x9F + +#define K_1 0xA0 +#define K_2 0xA1 +#define K_3 0xA2 +#define K_4 0xA3 +#define K_5 0xA4 +#define K_6 0xA5 +#define K_7 0xA6 +#define K_8 0xA7 +#define K_9 0xA8 +#define K_10 0xA9 +#define K_11 0xAA +#define K_12 0xAB +#define K_13 0xAC +#define K_14 0xAD +#define K_15 0xAE +#define K_16 0xAF + +#define L_1 0xB0 +#define L_2 0xB1 +#define L_3 0xB2 +#define L_4 0xB3 +#define L_5 0xB4 +#define L_6 0xB5 +#define L_7 0xB6 +#define L_8 0xB7 +#define L_9 0xB8 +#define L_10 0xB9 +#define L_11 0xBA +#define L_12 0xBB +#define L_13 0xBC +#define L_14 0xBD +#define L_15 0xBE +#define L_16 0xBF
\ No newline at end of file diff --git a/drivers/led/ckled2001.c b/drivers/led/ckled2001.c index 8d71805a24..b7e7db06cc 100644 --- a/drivers/led/ckled2001.c +++ b/drivers/led/ckled2001.c @@ -30,6 +30,11 @@ # define PHASE_CHANNEL MSKPHASE_12CHANNEL #endif +#ifndef CKLED2001_CURRENT_TUNE +# define CKLED2001_CURRENT_TUNE \ + { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF } +#endif + // Transfer buffer for TWITransmitData() uint8_t g_twi_transfer_buffer[20]; @@ -123,18 +128,10 @@ void CKLED2001_init(uint8_t addr) { } // Set CURRENT PAGE (Page 4) + uint8_t current_tuen_reg_list[LED_CURRENT_TUNE_LENGTH] = CKLED2001_CURRENT_TUNE; CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, CURRENT_TUNE_PAGE); for (int i = 0; i < LED_CURRENT_TUNE_LENGTH; i++) { - switch (i) { - case 2: - case 5: - case 8: - case 11: - CKLED2001_write_register(addr, i, 0xA0); - break; - default: - CKLED2001_write_register(addr, i, 0xFF); - } + CKLED2001_write_register(addr, i, current_tuen_reg_list[i]); } // Enable LEDs ON/OFF @@ -220,14 +217,14 @@ void CKLED2001_update_led_control_registers(uint8_t addr, uint8_t index) { g_led_control_registers_update_required[index] = false; } -void CKLED2001_return_normal(uint8_t addr) { +void CKLED2001_sw_return_normal(uint8_t addr) { // Select to function page CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE); // Setting LED driver to normal mode CKLED2001_write_register(addr, CONFIGURATION_REG, MSKSW_NORMAL_MODE); } -void CKLED2001_shutdown(uint8_t addr) { +void CKLED2001_sw_shutdown(uint8_t addr) { // Select to function page CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE); // Setting LED driver to shutdown mode diff --git a/drivers/led/ckled2001.h b/drivers/led/ckled2001.h index 1967961d20..7d5ad34f95 100644 --- a/drivers/led/ckled2001.h +++ b/drivers/led/ckled2001.h @@ -45,8 +45,8 @@ void CKLED2001_set_led_control_register(uint8_t index, bool red, bool green, boo void CKLED2001_update_pwm_buffers(uint8_t addr, uint8_t index); void CKLED2001_update_led_control_registers(uint8_t addr, uint8_t index); -void CKLED2001_return_normal(uint8_t addr); -void CKLED2001_shutdown(uint8_t addr); +void CKLED2001_sw_return_normal(uint8_t addr); +void CKLED2001_sw_shutdown(uint8_t addr); // Registers Page Define #define CONFIGURE_CMD_PAGE 0xFD diff --git a/drivers/led/issi/is31fl3733-simple.c b/drivers/led/issi/is31fl3733-simple.c index af006f756d..2f41a7b1a9 100644 --- a/drivers/led/issi/is31fl3733-simple.c +++ b/drivers/led/issi/is31fl3733-simple.c @@ -70,6 +70,10 @@ # define ISSI_CSPULLUP PUR_0R #endif +#ifndef ISSI_GLOBALCURRENT +# define ISSI_GLOBALCURRENT 0xFF +#endif + // Transfer buffer for TWITransmitData() uint8_t g_twi_transfer_buffer[20]; @@ -182,7 +186,7 @@ void IS31FL3733_init(uint8_t addr, uint8_t sync) { // Set de-ghost pull-down resistors (CSx) IS31FL3733_write_register(addr, ISSI_REG_CSPULLUP, ISSI_CSPULLUP); // Set global current to maximum. - IS31FL3733_write_register(addr, ISSI_REG_GLOBALCURRENT, 0xFF); + IS31FL3733_write_register(addr, ISSI_REG_GLOBALCURRENT, ISSI_GLOBALCURRENT); // Disable software shutdown. IS31FL3733_write_register(addr, ISSI_REG_CONFIGURATION, ((sync & 0b11) << 6) | ((ISSI_PWM_FREQUENCY & 0b111) << 3) | 0x01); diff --git a/drivers/led/issi/is31fl3733.c b/drivers/led/issi/is31fl3733.c index a2fdaa90fa..add998f256 100644 --- a/drivers/led/issi/is31fl3733.c +++ b/drivers/led/issi/is31fl3733.c @@ -69,6 +69,10 @@ # define ISSI_CSPULLUP PUR_0R #endif +#ifndef ISSI_GLOBALCURRENT +# define ISSI_GLOBALCURRENT 0xFF +#endif + // Transfer buffer for TWITransmitData() uint8_t g_twi_transfer_buffer[20]; @@ -172,7 +176,7 @@ void IS31FL3733_init(uint8_t addr, uint8_t sync) { // Set de-ghost pull-down resistors (CSx) IS31FL3733_write_register(addr, ISSI_REG_CSPULLUP, ISSI_CSPULLUP); // Set global current to maximum. - IS31FL3733_write_register(addr, ISSI_REG_GLOBALCURRENT, 0xFF); + IS31FL3733_write_register(addr, ISSI_REG_GLOBALCURRENT, ISSI_GLOBALCURRENT); // Disable software shutdown. IS31FL3733_write_register(addr, ISSI_REG_CONFIGURATION, ((sync & 0b11) << 6) | ((ISSI_PWM_FREQUENCY & 0b111) << 3) | 0x01); diff --git a/drivers/led/issi/is31fl3736.c b/drivers/led/issi/is31fl3736.c index 7752a3f6cb..e9943614d2 100644 --- a/drivers/led/issi/is31fl3736.c +++ b/drivers/led/issi/is31fl3736.c @@ -63,6 +63,10 @@ # define ISSI_CSPULLUP PUR_0R #endif +#ifndef ISSI_GLOBALCURRENT +# define ISSI_GLOBALCURRENT 0xFF +#endif + // Transfer buffer for TWITransmitData() uint8_t g_twi_transfer_buffer[20]; @@ -154,7 +158,7 @@ void IS31FL3736_init(uint8_t addr) { // Set de-ghost pull-down resistors (CSx) IS31FL3736_write_register(addr, ISSI_REG_CSPULLUP, ISSI_CSPULLUP); // Set global current to maximum. - IS31FL3736_write_register(addr, ISSI_REG_GLOBALCURRENT, 0xFF); + IS31FL3736_write_register(addr, ISSI_REG_GLOBALCURRENT, ISSI_GLOBALCURRENT); // Disable software shutdown. IS31FL3736_write_register(addr, ISSI_REG_CONFIGURATION, 0x01); diff --git a/drivers/led/issi/is31fl3737.c b/drivers/led/issi/is31fl3737.c index bce0c34b2c..932530ac0a 100644 --- a/drivers/led/issi/is31fl3737.c +++ b/drivers/led/issi/is31fl3737.c @@ -69,6 +69,10 @@ # define ISSI_CSPULLUP PUR_0R #endif +#ifndef ISSI_GLOBALCURRENT +# define ISSI_GLOBALCURRENT 0xFF +#endif + // Transfer buffer for TWITransmitData() uint8_t g_twi_transfer_buffer[20]; @@ -161,7 +165,7 @@ void IS31FL3737_init(uint8_t addr) { // Set de-ghost pull-down resistors (CSx) IS31FL3737_write_register(addr, ISSI_REG_CSPULLUP, ISSI_CSPULLUP); // Set global current to maximum. - IS31FL3737_write_register(addr, ISSI_REG_GLOBALCURRENT, 0xFF); + IS31FL3737_write_register(addr, ISSI_REG_GLOBALCURRENT, ISSI_GLOBALCURRENT); // Disable software shutdown. IS31FL3737_write_register(addr, ISSI_REG_CONFIGURATION, ((ISSI_PWM_FREQUENCY & 0b111) << 3) | 0x01); diff --git a/drivers/led/issi/is31fl3741.c b/drivers/led/issi/is31fl3741.c index 393b0179b5..ba6b6761a3 100644 --- a/drivers/led/issi/is31fl3741.c +++ b/drivers/led/issi/is31fl3741.c @@ -69,6 +69,10 @@ # define ISSI_CSPULLUP PUR_32KR #endif +#ifndef ISSI_GLOBALCURRENT +# define ISSI_GLOBALCURRENT 0xFF +#endif + #define ISSI_MAX_LEDS 351 // Transfer buffer for TWITransmitData() @@ -163,7 +167,7 @@ void IS31FL3741_init(uint8_t addr) { IS31FL3741_write_register(addr, ISSI_REG_CONFIGURATION, 0x01); // Set Golbal Current Control Register - IS31FL3741_write_register(addr, ISSI_REG_GLOBALCURRENT, 0xFF); + IS31FL3741_write_register(addr, ISSI_REG_GLOBALCURRENT, ISSI_GLOBALCURRENT); // Set Pull up & Down for SWx CSy IS31FL3741_write_register(addr, ISSI_REG_PULLDOWNUP, ((ISSI_CSPULLUP << 4) | ISSI_SWPULLUP)); diff --git a/drivers/painter/gc9a01/qp_gc9a01.c b/drivers/painter/gc9a01/qp_gc9a01.c index ad76d58b07..37700a28a4 100644 --- a/drivers/painter/gc9a01/qp_gc9a01.c +++ b/drivers/painter/gc9a01/qp_gc9a01.c @@ -102,12 +102,11 @@ const struct tft_panel_dc_reset_painter_driver_vtable_t gc9a01_driver_vtable = { .flush = qp_tft_panel_flush, .pixdata = qp_tft_panel_pixdata, .viewport = qp_tft_panel_viewport, - .palette_convert = qp_tft_panel_palette_convert, - .append_pixels = qp_tft_panel_append_pixels, + .palette_convert = qp_tft_panel_palette_convert_rgb565_swapped, + .append_pixels = qp_tft_panel_append_pixels_rgb565, }, - .rgb888_to_native16bit = qp_rgb888_to_rgb565_swapped, - .num_window_bytes = 2, - .swap_window_coords = false, + .num_window_bytes = 2, + .swap_window_coords = false, .opcodes = { .display_on = GC9A01_CMD_DISPLAY_ON, diff --git a/drivers/painter/ili9xxx/qp_ili9163.c b/drivers/painter/ili9xxx/qp_ili9163.c index beaac0fbb5..14363c7d04 100644 --- a/drivers/painter/ili9xxx/qp_ili9163.c +++ b/drivers/painter/ili9xxx/qp_ili9163.c @@ -67,12 +67,11 @@ const struct tft_panel_dc_reset_painter_driver_vtable_t ili9163_driver_vtable = .flush = qp_tft_panel_flush, .pixdata = qp_tft_panel_pixdata, .viewport = qp_tft_panel_viewport, - .palette_convert = qp_tft_panel_palette_convert, - .append_pixels = qp_tft_panel_append_pixels, + .palette_convert = qp_tft_panel_palette_convert_rgb565_swapped, + .append_pixels = qp_tft_panel_append_pixels_rgb565, }, - .rgb888_to_native16bit = qp_rgb888_to_rgb565_swapped, - .num_window_bytes = 2, - .swap_window_coords = false, + .num_window_bytes = 2, + .swap_window_coords = false, .opcodes = { .display_on = ILI9XXX_CMD_DISPLAY_ON, diff --git a/drivers/painter/ili9xxx/qp_ili9341.c b/drivers/painter/ili9xxx/qp_ili9341.c index 1f41dcfc0b..9608f109bd 100644 --- a/drivers/painter/ili9xxx/qp_ili9341.c +++ b/drivers/painter/ili9xxx/qp_ili9341.c @@ -74,12 +74,11 @@ const struct tft_panel_dc_reset_painter_driver_vtable_t ili9341_driver_vtable = .flush = qp_tft_panel_flush, .pixdata = qp_tft_panel_pixdata, .viewport = qp_tft_panel_viewport, - .palette_convert = qp_tft_panel_palette_convert, - .append_pixels = qp_tft_panel_append_pixels, + .palette_convert = qp_tft_panel_palette_convert_rgb565_swapped, + .append_pixels = qp_tft_panel_append_pixels_rgb565, }, - .rgb888_to_native16bit = qp_rgb888_to_rgb565_swapped, - .num_window_bytes = 2, - .swap_window_coords = false, + .num_window_bytes = 2, + .swap_window_coords = false, .opcodes = { .display_on = ILI9XXX_CMD_DISPLAY_ON, diff --git a/drivers/painter/ili9xxx/qp_ili9488.c b/drivers/painter/ili9xxx/qp_ili9488.c new file mode 100644 index 0000000000..55cf9f896f --- /dev/null +++ b/drivers/painter/ili9xxx/qp_ili9488.c @@ -0,0 +1,120 @@ +// Copyright 2021 Nick Brassel (@tzarc) +// SPDX-License-Identifier: GPL-2.0-or-later + +#include "qp_internal.h" +#include "qp_comms.h" +#include "qp_ili9488.h" +#include "qp_ili9xxx_opcodes.h" +#include "qp_tft_panel.h" + +#ifdef QUANTUM_PAINTER_ILI9488_SPI_ENABLE +# include <qp_comms_spi.h> +#endif // QUANTUM_PAINTER_ILI9488_SPI_ENABLE + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Common + +// Driver storage +tft_panel_dc_reset_painter_device_t ili9488_drivers[ILI9488_NUM_DEVICES] = {0}; + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Initialization + +bool qp_ili9488_init(painter_device_t device, painter_rotation_t rotation) { + // clang-format off + const uint8_t ili9488_init_sequence[] = { + // Command, Delay, N, Data[N] + ILI9XXX_CMD_RESET, 120, 0, + ILI9XXX_SET_PGAMMA, 0, 15, 0x00, 0x03, 0x09, 0x08, 0x16, 0x0A, 0x3F, 0x78, 0x4C, 0x09, 0x0A, 0x08, 0x16, 0x1A, 0x0F, + ILI9XXX_SET_NGAMMA, 0, 15, 0x00, 0x16, 0x19, 0x03, 0x0F, 0x05, 0x32, 0x45, 0x46, 0x04, 0x0E, 0x0D, 0x35, 0x37, 0x0F, + ILI9XXX_SET_POWER_CTL_1, 0, 2, 0x17, 0x15, + ILI9XXX_SET_POWER_CTL_2, 0, 1, 0x41, + ILI9XXX_SET_VCOM_CTL_1, 0, 3, 0x00, 0x12, 0x80, + ILI9XXX_SET_PIX_FMT, 0, 1, 0x66, + ILI9XXX_SET_RGB_IF_SIG_CTL, 0, 1, 0x80, + ILI9XXX_SET_FRAME_CTL_NORMAL, 0, 1, 0xA0, + ILI9XXX_SET_INVERSION_CTL, 0, 1, 0x02, + ILI9XXX_SET_FUNCTION_CTL, 0, 2, 0x02, 0x02, + ILI9XXX_SET_IMAGE_FUNCTION, 0, 1, 0x00, + ILI9XXX_SET_PUMP_RATIO_CTL, 0, 4, 0xA9, 0x51, 0x2C, 0x82, + ILI9XXX_CMD_SLEEP_OFF, 5, 0, + ILI9XXX_CMD_DISPLAY_ON, 20, 0 + }; + // clang-format on + qp_comms_bulk_command_sequence(device, ili9488_init_sequence, sizeof(ili9488_init_sequence)); + + // Configure the rotation (i.e. the ordering and direction of memory writes in GRAM) + const uint8_t madctl[] = { + [QP_ROTATION_0] = ILI9XXX_MADCTL_BGR | ILI9XXX_MADCTL_MY, + [QP_ROTATION_90] = ILI9XXX_MADCTL_BGR | ILI9XXX_MADCTL_MX | ILI9XXX_MADCTL_MV | ILI9XXX_MADCTL_MY, + [QP_ROTATION_180] = ILI9XXX_MADCTL_BGR | ILI9XXX_MADCTL_MX, + [QP_ROTATION_270] = ILI9XXX_MADCTL_BGR | ILI9XXX_MADCTL_MV, + }; + qp_comms_command_databyte(device, ILI9XXX_SET_MEM_ACS_CTL, madctl[rotation]); + + return true; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Driver vtable + +const struct tft_panel_dc_reset_painter_driver_vtable_t ili9488_driver_vtable = { + .base = + { + .init = qp_ili9488_init, + .power = qp_tft_panel_power, + .clear = qp_tft_panel_clear, + .flush = qp_tft_panel_flush, + .pixdata = qp_tft_panel_pixdata, + .viewport = qp_tft_panel_viewport, + .palette_convert = qp_tft_panel_palette_convert_rgb888, + .append_pixels = qp_tft_panel_append_pixels_rgb888, + }, + .num_window_bytes = 2, + .swap_window_coords = false, + .opcodes = + { + .display_on = ILI9XXX_CMD_DISPLAY_ON, + .display_off = ILI9XXX_CMD_DISPLAY_OFF, + .set_column_address = ILI9XXX_SET_COL_ADDR, + .set_row_address = ILI9XXX_SET_PAGE_ADDR, + .enable_writes = ILI9XXX_SET_MEM, + }, +}; + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// SPI + +#ifdef QUANTUM_PAINTER_ILI9488_SPI_ENABLE + +// Factory function for creating a handle to the ILI9488 device +painter_device_t qp_ili9488_make_spi_device(uint16_t panel_width, uint16_t panel_height, pin_t chip_select_pin, pin_t dc_pin, pin_t reset_pin, uint16_t spi_divisor, int spi_mode) { + for (uint32_t i = 0; i < ILI9488_NUM_DEVICES; ++i) { + tft_panel_dc_reset_painter_device_t *driver = &ili9488_drivers[i]; + if (!driver->base.driver_vtable) { + driver->base.driver_vtable = (const struct painter_driver_vtable_t *)&ili9488_driver_vtable; + driver->base.comms_vtable = (const struct painter_comms_vtable_t *)&spi_comms_with_dc_vtable; + driver->base.native_bits_per_pixel = 24; // RGB888 + driver->base.panel_width = panel_width; + driver->base.panel_height = panel_height; + driver->base.rotation = QP_ROTATION_0; + driver->base.offset_x = 0; + driver->base.offset_y = 0; + + // SPI and other pin configuration + driver->base.comms_config = &driver->spi_dc_reset_config; + driver->spi_dc_reset_config.spi_config.chip_select_pin = chip_select_pin; + driver->spi_dc_reset_config.spi_config.divisor = spi_divisor; + driver->spi_dc_reset_config.spi_config.lsb_first = false; + driver->spi_dc_reset_config.spi_config.mode = spi_mode; + driver->spi_dc_reset_config.dc_pin = dc_pin; + driver->spi_dc_reset_config.reset_pin = reset_pin; + return (painter_device_t)driver; + } + } + return NULL; +} + +#endif // QUANTUM_PAINTER_ILI9488_SPI_ENABLE + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// diff --git a/drivers/painter/ili9xxx/qp_ili9488.h b/drivers/painter/ili9xxx/qp_ili9488.h new file mode 100644 index 0000000000..21b8f03322 --- /dev/null +++ b/drivers/painter/ili9xxx/qp_ili9488.h @@ -0,0 +1,37 @@ +// Copyright 2021 Nick Brassel (@tzarc) +// SPDX-License-Identifier: GPL-2.0-or-later + +#pragma once + +#include "gpio.h" +#include "qp_internal.h" + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Quantum Painter ILI9488 configurables (add to your keyboard's config.h) + +#ifndef ILI9488_NUM_DEVICES +/** + * @def This controls the maximum number of ILI9488 devices that Quantum Painter can communicate with at any one time. + * Increasing this number allows for multiple displays to be used. + */ +# define ILI9488_NUM_DEVICES 1 +#endif + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Quantum Painter ILI9488 device factories + +#ifdef QUANTUM_PAINTER_ILI9488_SPI_ENABLE +/** + * Factory method for an ILI9488 SPI LCD device. + * + * @param panel_width[in] the width of the display panel + * @param panel_height[in] the height of the display panel + * @param chip_select_pin[in] the GPIO pin used for SPI chip select + * @param dc_pin[in] the GPIO pin used for D/C control + * @param reset_pin[in] the GPIO pin used for RST + * @param spi_divisor[in] the SPI divisor to use when communicating with the display + * @param spi_mode[in] the SPI mode to use when communicating with the display + * @return the device handle used with all drawing routines in Quantum Painter + */ +painter_device_t qp_ili9488_make_spi_device(uint16_t panel_width, uint16_t panel_height, pin_t chip_select_pin, pin_t dc_pin, pin_t reset_pin, uint16_t spi_divisor, int spi_mode); +#endif // QUANTUM_PAINTER_ILI9488_SPI_ENABLE diff --git a/drivers/painter/ili9xxx/qp_ili9xxx_opcodes.h b/drivers/painter/ili9xxx/qp_ili9xxx_opcodes.h index 1fa395cb89..47bb703648 100644 --- a/drivers/painter/ili9xxx/qp_ili9xxx_opcodes.h +++ b/drivers/painter/ili9xxx/qp_ili9xxx_opcodes.h @@ -85,6 +85,7 @@ #define ILI9XXX_SET_NGAMMA 0xE1 // Set negative gamma #define ILI9XXX_SET_DGAMMA_CTL_1 0xE2 // Set digital gamma ctl 1 #define ILI9XXX_SET_DGAMMA_CTL_2 0xE3 // Set digital gamma ctl 2 +#define ILI9XXX_SET_IMAGE_FUNCTION 0xE9 // Set image function #define ILI9XXX_ENABLE_3_GAMMA 0xF2 // Enable 3 gamma #define ILI9XXX_SET_IF_CTL 0xF6 // Set interface control #define ILI9XXX_SET_PUMP_RATIO_CTL 0xF7 // Set pump ratio control diff --git a/drivers/painter/ssd1351/qp_ssd1351.c b/drivers/painter/ssd1351/qp_ssd1351.c index 970e7e67f3..7ce76bab6d 100644 --- a/drivers/painter/ssd1351/qp_ssd1351.c +++ b/drivers/painter/ssd1351/qp_ssd1351.c @@ -71,12 +71,11 @@ const struct tft_panel_dc_reset_painter_driver_vtable_t ssd1351_driver_vtable = .flush = qp_tft_panel_flush, .pixdata = qp_tft_panel_pixdata, .viewport = qp_tft_panel_viewport, - .palette_convert = qp_tft_panel_palette_convert, - .append_pixels = qp_tft_panel_append_pixels, + .palette_convert = qp_tft_panel_palette_convert_rgb565_swapped, + .append_pixels = qp_tft_panel_append_pixels_rgb565, }, - .rgb888_to_native16bit = qp_rgb888_to_rgb565_swapped, - .num_window_bytes = 1, - .swap_window_coords = true, + .num_window_bytes = 1, + .swap_window_coords = true, .opcodes = { .display_on = SSD1351_DISPLAYON, diff --git a/drivers/painter/st77xx/qp_st7735.c b/drivers/painter/st77xx/qp_st7735.c new file mode 100644 index 0000000000..e434e31b92 --- /dev/null +++ b/drivers/painter/st77xx/qp_st7735.c @@ -0,0 +1,144 @@ +// Copyright 2021 Paul Cotter (@gr1mr3aver) +// Copyright 2021 Nick Brassel (@tzarc) +// Copyright 2022 David Hoelscher (@customMK) +// SPDX-License-Identifier: GPL-2.0-or-later + +#include "qp_internal.h" +#include "qp_comms.h" +#include "qp_st7735.h" +#include "qp_st77xx_opcodes.h" +#include "qp_st7735_opcodes.h" +#include "qp_tft_panel.h" + +#ifdef QUANTUM_PAINTER_ST7735_SPI_ENABLE +# include "qp_comms_spi.h" +#endif // QUANTUM_PAINTER_ST7735_SPI_ENABLE + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Common + +// Driver storage +tft_panel_dc_reset_painter_device_t st7735_drivers[ST7735_NUM_DEVICES] = {0}; + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Automatic viewport offsets + +#ifndef ST7735_NO_AUTOMATIC_OFFSETS +static inline void st7735_automatic_viewport_offsets(painter_device_t device, painter_rotation_t rotation) { + struct painter_driver_t *driver = (struct painter_driver_t *)device; + + // clang-format off + const struct { + uint16_t offset_x; + uint16_t offset_y; + } rotation_offsets_80x160[] = { + [QP_ROTATION_0] = { .offset_x = 24, .offset_y = 0 }, + [QP_ROTATION_90] = { .offset_x = 0, .offset_y = 24 }, + [QP_ROTATION_180] = { .offset_x = 24, .offset_y = 0 }, + [QP_ROTATION_270] = { .offset_x = 0, .offset_y = 24 }, + }; + // clang-format on + + if (driver->panel_width == 80 && driver->panel_height == 160) { + driver->offset_x = rotation_offsets_80x160[rotation].offset_x; + driver->offset_y = rotation_offsets_80x160[rotation].offset_y; + } +} +#endif // ST7735_NO_AUTOMATIC_OFFSETS + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Initialization + +bool qp_st7735_init(painter_device_t device, painter_rotation_t rotation) { + // clang-format off + const uint8_t st7735_init_sequence[] = { + // Command, Delay, N, Data[N] + ST77XX_CMD_RESET, 120, 0, + ST77XX_CMD_SLEEP_OFF, 5, 0, + ST77XX_SET_PIX_FMT, 0, 1, 0x55, + ST77XX_CMD_INVERT_OFF, 0, 0, + ST77XX_CMD_NORMAL_ON, 0, 0, + ST77XX_CMD_DISPLAY_ON, 20, 0 + }; + // clang-format on + qp_comms_bulk_command_sequence(device, st7735_init_sequence, sizeof(st7735_init_sequence)); + + // Configure the rotation (i.e. the ordering and direction of memory writes in GRAM) + const uint8_t madctl[] = { + [QP_ROTATION_0] = ST77XX_MADCTL_BGR, + [QP_ROTATION_90] = ST77XX_MADCTL_BGR | ST77XX_MADCTL_MX | ST77XX_MADCTL_MV, + [QP_ROTATION_180] = ST77XX_MADCTL_BGR | ST77XX_MADCTL_MX | ST77XX_MADCTL_MY, + [QP_ROTATION_270] = ST77XX_MADCTL_BGR | ST77XX_MADCTL_MV | ST77XX_MADCTL_MY, + }; + qp_comms_command_databyte(device, ST77XX_SET_MADCTL, madctl[rotation]); + +#ifndef ST7735_NO_AUTOMATIC_VIEWPORT_OFFSETS + st7735_automatic_viewport_offsets(device, rotation); +#endif // ST7735_NO_AUTOMATIC_VIEWPORT_OFFSETS + + return true; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Driver vtable + +const struct tft_panel_dc_reset_painter_driver_vtable_t st7735_driver_vtable = { + .base = + { + .init = qp_st7735_init, + .power = qp_tft_panel_power, + .clear = qp_tft_panel_clear, + .flush = qp_tft_panel_flush, + .pixdata = qp_tft_panel_pixdata, + .viewport = qp_tft_panel_viewport, + .palette_convert = qp_tft_panel_palette_convert_rgb565_swapped, + .append_pixels = qp_tft_panel_append_pixels_rgb565, + }, + .num_window_bytes = 2, + .swap_window_coords = false, + .opcodes = + { + .display_on = ST77XX_CMD_DISPLAY_ON, + .display_off = ST77XX_CMD_DISPLAY_OFF, + .set_column_address = ST77XX_SET_COL_ADDR, + .set_row_address = ST77XX_SET_ROW_ADDR, + .enable_writes = ST77XX_SET_MEM, + }, +}; + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// SPI + +#ifdef QUANTUM_PAINTER_ST7735_SPI_ENABLE + +// Factory function for creating a handle to the ST7735 device +painter_device_t qp_st7735_make_spi_device(uint16_t panel_width, uint16_t panel_height, pin_t chip_select_pin, pin_t dc_pin, pin_t reset_pin, uint16_t spi_divisor, int spi_mode) { + for (uint32_t i = 0; i < ST7735_NUM_DEVICES; ++i) { + tft_panel_dc_reset_painter_device_t *driver = &st7735_drivers[i]; + if (!driver->base.driver_vtable) { + driver->base.driver_vtable = (const struct painter_driver_vtable_t *)&st7735_driver_vtable; + driver->base.comms_vtable = (const struct painter_comms_vtable_t *)&spi_comms_with_dc_vtable; + driver->base.panel_width = panel_width; + driver->base.panel_height = panel_height; + driver->base.rotation = QP_ROTATION_0; + driver->base.offset_x = 0; + driver->base.offset_y = 0; + driver->base.native_bits_per_pixel = 16; // RGB565 + + // SPI and other pin configuration + driver->base.comms_config = &driver->spi_dc_reset_config; + driver->spi_dc_reset_config.spi_config.chip_select_pin = chip_select_pin; + driver->spi_dc_reset_config.spi_config.divisor = spi_divisor; + driver->spi_dc_reset_config.spi_config.lsb_first = false; + driver->spi_dc_reset_config.spi_config.mode = spi_mode; + driver->spi_dc_reset_config.dc_pin = dc_pin; + driver->spi_dc_reset_config.reset_pin = reset_pin; + return (painter_device_t)driver; + } + } + return NULL; +} + +#endif // QUANTUM_PAINTER_ST7735_SPI_ENABLE + +////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
\ No newline at end of file diff --git a/drivers/painter/st77xx/qp_st7735.h b/drivers/painter/st77xx/qp_st7735.h new file mode 100644 index 0000000000..a9ce16bef1 --- /dev/null +++ b/drivers/painter/st77xx/qp_st7735.h @@ -0,0 +1,45 @@ +// Copyright 2021 Paul Cotter (@gr1mr3aver) +// Copyright 2021 Nick Brassel (@tzarc) +// Copyright 2022 David Hoelscher (@customMK) +// SPDX-License-Identifier: GPL-2.0-or-later + +#pragma once + +#include "gpio.h" +#include "qp_internal.h" + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Quantum Painter ST7735 configurables (add to your keyboard's config.h) + +#ifndef ST7735_NUM_DEVICES +/** + * @def This controls the maximum number of ST7735 devices that Quantum Painter can communicate with at any one time. + * Increasing this number allows for multiple displays to be used. + */ +# define ST7735_NUM_DEVICES 1 +#endif + +// Additional configuration options to be copied to your keyboard's config.h (don't change here): + +// If you know exactly which offsets should be used on your panel with respect to selected rotation, then this config +// option allows you to save some flash space -- you'll need to invoke qp_set_viewport_offsets() instead from your keyboard. +// #define ST7735_NO_AUTOMATIC_VIEWPORT_OFFSETS + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Quantum Painter ST7735 device factories + +#ifdef QUANTUM_PAINTER_ST7735_SPI_ENABLE +/** + * Factory method for an ST7735 SPI LCD device. + * + * @param panel_width[in] the width of the display panel + * @param panel_height[in] the height of the display panel + * @param chip_select_pin[in] the GPIO pin used for SPI chip select + * @param dc_pin[in] the GPIO pin used for D/C control + * @param reset_pin[in] the GPIO pin used for RST + * @param spi_divisor[in] the SPI divisor to use when communicating with the display + * @param spi_mode[in] the SPI mode to use when communicating with the display + * @return the device handle used with all drawing routines in Quantum Painter + */ +painter_device_t qp_st7735_make_spi_device(uint16_t panel_width, uint16_t panel_height, pin_t chip_select_pin, pin_t dc_pin, pin_t reset_pin, uint16_t spi_divisor, int spi_mode); +#endif // QUANTUM_PAINTER_ST7735_SPI_ENABLE
\ No newline at end of file diff --git a/drivers/painter/st77xx/qp_st7735_opcodes.h b/drivers/painter/st77xx/qp_st7735_opcodes.h new file mode 100644 index 0000000000..816e32f3d7 --- /dev/null +++ b/drivers/painter/st77xx/qp_st7735_opcodes.h @@ -0,0 +1,31 @@ +// Copyright 2022 David Hoelscher (@customMK) +// SPDX-License-Identifier: GPL-2.0-or-later + +#pragma once + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Quantum Painter ST7735 additional command opcodes + +// Panel Function Commands +#define ST7735_SET_FRAME_RATE_CTL_1 0xB1 // Set frame rate control 1 +#define ST7735_SET_FRAME_RATE_CTL_2 0xB2 // Set frame rate control 2 +#define ST7735_SET_FRAME_RATE_CTL_3 0xB3 // Set frame rate control 3 +#define ST7735_SET_INVERSION_CTL 0xB4 // Set inversion mode control +#define ST7735_SET_DISPLAY_CTL 0xB6 // Set display control 5 +#define ST7735_SET_POWER_CTL_1 0xC0 // Set GVDD +#define ST7735_SET_POWER_CTL_2 0xC1 // Set VGH and VGL +#define ST7735_SET_POWER_CTL_3 0xC2 // Set normal mode op amp current +#define ST7735_SET_POWER_CTL_4 0xC3 // Set idle mode op amp current +#define ST7735_SET_POWER_CTL_5 0xC4 // Set partial mode op amp current +#define ST7735_SET_VCOM_CTL 0xC5 // Set VCOM voltages +#define ST7735_SET_VCOM_OFFSET_CTL 0xC7 // Set VCOM offset ctl +#define ST7735_SET_LCD_ID 0xD1 // Set LCD module version +#define ST7735_SET_PROJECT_ID 0xD2 // Set product project ID +#define ST7735_SET_POWER_CTL_6 0xFC // Set partial+idle op amp current +#define ST7735_SET_NVMEM_CTL_STATUS 0xD9 // EEPROM Control Status +#define ST7735_SET_NVMEM_READ_CMD 0xCC // EEPROM Read Command +#define ST7735_SET_NVMEM_WRITE_CMD 0xDF // EEPROM Write Command +#define ST7735_SET_PGAMMA 0xE0 // Set positive gamma +#define ST7735_SET_NGAMMA 0xE1 // Set negative gamma +#define ST7735_SET_EXTENSION_ENABLE 0xF0 // Enable extension command +#define ST7735_SET_VCOM_DELAY 0xFF // Set VCOM delay time diff --git a/drivers/painter/st77xx/qp_st7789.c b/drivers/painter/st77xx/qp_st7789.c index d005ece050..49e8436c29 100644 --- a/drivers/painter/st77xx/qp_st7789.c +++ b/drivers/painter/st77xx/qp_st7789.c @@ -90,12 +90,11 @@ const struct tft_panel_dc_reset_painter_driver_vtable_t st7789_driver_vtable = { .flush = qp_tft_panel_flush, .pixdata = qp_tft_panel_pixdata, .viewport = qp_tft_panel_viewport, - .palette_convert = qp_tft_panel_palette_convert, - .append_pixels = qp_tft_panel_append_pixels, + .palette_convert = qp_tft_panel_palette_convert_rgb565_swapped, + .append_pixels = qp_tft_panel_append_pixels_rgb565, }, - .rgb888_to_native16bit = qp_rgb888_to_rgb565_swapped, - .num_window_bytes = 2, - .swap_window_coords = false, + .num_window_bytes = 2, + .swap_window_coords = false, .opcodes = { .display_on = ST77XX_CMD_DISPLAY_ON, diff --git a/drivers/painter/tft_panel/qp_tft_panel.c b/drivers/painter/tft_panel/qp_tft_panel.c index 4d636c9509..ad83b6c792 100644 --- a/drivers/painter/tft_panel/qp_tft_panel.c +++ b/drivers/painter/tft_panel/qp_tft_panel.c @@ -10,29 +10,6 @@ #define BYTE_SWAP(x) (((((uint16_t)(x)) >> 8) & 0x00FF) | ((((uint16_t)(x)) << 8) & 0xFF00)) //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -// Native pixel format conversion - -uint16_t qp_rgb888_to_rgb565(uint8_t r, uint8_t g, uint8_t b) { - uint16_t rgb565 = (((uint16_t)r) >> 3) << 11 | (((uint16_t)g) >> 2) << 5 | (((uint16_t)b) >> 3); - return rgb565; -} - -uint16_t qp_rgb888_to_rgb565_swapped(uint8_t r, uint8_t g, uint8_t b) { - uint16_t rgb565 = (((uint16_t)r) >> 3) << 11 | (((uint16_t)g) >> 2) << 5 | (((uint16_t)b) >> 3); - return BYTE_SWAP(rgb565); -} - -uint16_t qp_rgb888_to_bgr565(uint8_t r, uint8_t g, uint8_t b) { - uint16_t bgr565 = (((uint16_t)b) >> 3) << 11 | (((uint16_t)g) >> 2) << 5 | (((uint16_t)r) >> 3); - return bgr565; -} - -uint16_t qp_rgb888_to_bgr565_swapped(uint8_t r, uint8_t g, uint8_t b) { - uint16_t bgr565 = (((uint16_t)b) >> 3) << 11 | (((uint16_t)g) >> 2) << 5 | (((uint16_t)r) >> 3); - return BYTE_SWAP(bgr565); -} - -//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// // Quantum Painter API implementations // Power control @@ -105,26 +82,49 @@ bool qp_tft_panel_viewport(painter_device_t device, uint16_t left, uint16_t top, // Stream pixel data to the current write position in GRAM bool qp_tft_panel_pixdata(painter_device_t device, const void *pixel_data, uint32_t native_pixel_count) { - qp_comms_send(device, pixel_data, native_pixel_count * sizeof(uint16_t)); + struct painter_driver_t *driver = (struct painter_driver_t *)device; + qp_comms_send(device, pixel_data, native_pixel_count * driver->native_bits_per_pixel / 8); return true; } +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// // Convert supplied palette entries into their native equivalents -bool qp_tft_panel_palette_convert(painter_device_t device, int16_t palette_size, qp_pixel_t *palette) { - struct painter_driver_t * driver = (struct painter_driver_t *)device; - struct tft_panel_dc_reset_painter_driver_vtable_t *vtable = (struct tft_panel_dc_reset_painter_driver_vtable_t *)driver->driver_vtable; + +bool qp_tft_panel_palette_convert_rgb565_swapped(painter_device_t device, int16_t palette_size, qp_pixel_t *palette) { for (int16_t i = 0; i < palette_size; ++i) { - RGB rgb = hsv_to_rgb_nocie((HSV){palette[i].hsv888.h, palette[i].hsv888.s, palette[i].hsv888.v}); - palette[i].rgb565 = vtable->rgb888_to_native16bit(rgb.r, rgb.g, rgb.b); + RGB rgb = hsv_to_rgb_nocie((HSV){palette[i].hsv888.h, palette[i].hsv888.s, palette[i].hsv888.v}); + uint16_t rgb565 = (((uint16_t)rgb.r) >> 3) << 11 | (((uint16_t)rgb.g) >> 2) << 5 | (((uint16_t)rgb.b) >> 3); + palette[i].rgb565 = BYTE_SWAP(rgb565); } return true; } +bool qp_tft_panel_palette_convert_rgb888(painter_device_t device, int16_t palette_size, qp_pixel_t *palette) { + for (int16_t i = 0; i < palette_size; ++i) { + RGB rgb = hsv_to_rgb_nocie((HSV){palette[i].hsv888.h, palette[i].hsv888.s, palette[i].hsv888.v}); + palette[i].rgb888.r = rgb.r; + palette[i].rgb888.g = rgb.g; + palette[i].rgb888.b = rgb.b; + } + return true; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// // Append pixels to the target location, keyed by the pixel index -bool qp_tft_panel_append_pixels(painter_device_t device, uint8_t *target_buffer, qp_pixel_t *palette, uint32_t pixel_offset, uint32_t pixel_count, uint8_t *palette_indices) { + +bool qp_tft_panel_append_pixels_rgb565(painter_device_t device, uint8_t *target_buffer, qp_pixel_t *palette, uint32_t pixel_offset, uint32_t pixel_count, uint8_t *palette_indices) { uint16_t *buf = (uint16_t *)target_buffer; for (uint32_t i = 0; i < pixel_count; ++i) { buf[pixel_offset + i] = palette[palette_indices[i]].rgb565; } return true; } + +bool qp_tft_panel_append_pixels_rgb888(painter_device_t device, uint8_t *target_buffer, qp_pixel_t *palette, uint32_t pixel_offset, uint32_t pixel_count, uint8_t *palette_indices) { + for (uint32_t i = 0; i < pixel_count; ++i) { + target_buffer[(pixel_offset + i) * 3 + 0] = palette[palette_indices[i]].rgb888.r; + target_buffer[(pixel_offset + i) * 3 + 1] = palette[palette_indices[i]].rgb888.g; + target_buffer[(pixel_offset + i) * 3 + 2] = palette[palette_indices[i]].rgb888.b; + } + return true; +} diff --git a/drivers/painter/tft_panel/qp_tft_panel.h b/drivers/painter/tft_panel/qp_tft_panel.h index 6eddfc503d..3cb015891b 100644 --- a/drivers/painter/tft_panel/qp_tft_panel.h +++ b/drivers/painter/tft_panel/qp_tft_panel.h @@ -11,15 +11,10 @@ //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// // Common TFT panel implementation using D/C, and RST pins. -typedef uint16_t (*rgb888_to_native_uint16_t)(uint8_t r, uint8_t g, uint8_t b); - // Driver vtable with extras struct tft_panel_dc_reset_painter_driver_vtable_t { struct painter_driver_vtable_t base; // must be first, so it can be cast to/from the painter_driver_vtable_t* type - // Conversion function for palette entries - rgb888_to_native_uint16_t rgb888_to_native16bit; - // Number of bytes for transmitting x/y coordinates uint8_t num_window_bytes; @@ -58,10 +53,9 @@ bool qp_tft_panel_clear(painter_device_t device); bool qp_tft_panel_flush(painter_device_t device); bool qp_tft_panel_viewport(painter_device_t device, uint16_t left, uint16_t top, uint16_t right, uint16_t bottom); bool qp_tft_panel_pixdata(painter_device_t device, const void *pixel_data, uint32_t native_pixel_count); -bool qp_tft_panel_palette_convert(painter_device_t device, int16_t palette_size, qp_pixel_t *palette); -bool qp_tft_panel_append_pixels(painter_device_t device, uint8_t *target_buffer, qp_pixel_t *palette, uint32_t pixel_offset, uint32_t pixel_count, uint8_t *palette_indices); -uint16_t qp_rgb888_to_rgb565(uint8_t r, uint8_t g, uint8_t b); -uint16_t qp_rgb888_to_rgb565_swapped(uint8_t r, uint8_t g, uint8_t b); -uint16_t qp_rgb888_to_bgr565(uint8_t r, uint8_t g, uint8_t b); -uint16_t qp_rgb888_to_bgr565_swapped(uint8_t r, uint8_t g, uint8_t b); +bool qp_tft_panel_palette_convert_rgb565_swapped(painter_device_t device, int16_t palette_size, qp_pixel_t *palette); +bool qp_tft_panel_palette_convert_rgb888(painter_device_t device, int16_t palette_size, qp_pixel_t *palette); + +bool qp_tft_panel_append_pixels_rgb565(painter_device_t device, uint8_t *target_buffer, qp_pixel_t *palette, uint32_t pixel_offset, uint32_t pixel_count, uint8_t *palette_indices); +bool qp_tft_panel_append_pixels_rgb888(painter_device_t device, uint8_t *target_buffer, qp_pixel_t *palette, uint32_t pixel_offset, uint32_t pixel_count, uint8_t *palette_indices); diff --git a/drivers/ps2/ps2.h b/drivers/ps2/ps2.h index f123192852..2465e16235 100644 --- a/drivers/ps2/ps2.h +++ b/drivers/ps2/ps2.h @@ -89,6 +89,7 @@ uint8_t ps2_host_send(uint8_t data); uint8_t ps2_host_recv_response(void); uint8_t ps2_host_recv(void); void ps2_host_set_led(uint8_t usb_led); +bool pbuf_has_data(void); /*-------------------------------------------------------------------- * static functions diff --git a/drivers/ps2/ps2_interrupt.c b/drivers/ps2/ps2_interrupt.c index c49b4f8b75..c9a9f1e1ec 100644 --- a/drivers/ps2/ps2_interrupt.c +++ b/drivers/ps2/ps2_interrupt.c @@ -66,8 +66,8 @@ uint8_t ps2_error = PS2_ERR_NONE; static inline uint8_t pbuf_dequeue(void); static inline void pbuf_enqueue(uint8_t data); -static inline bool pbuf_has_data(void); static inline void pbuf_clear(void); +bool pbuf_has_data(void); #if defined(PROTOCOL_CHIBIOS) void ps2_interrupt_service_routine(void); @@ -309,7 +309,7 @@ static inline uint8_t pbuf_dequeue(void) { return val; } -static inline bool pbuf_has_data(void) { +bool pbuf_has_data(void) { #if defined(__AVR__) uint8_t sreg = SREG; cli(); diff --git a/drivers/ps2/ps2_mouse.c b/drivers/ps2/ps2_mouse.c index ccb0a929ae..66b48bb3c3 100644 --- a/drivers/ps2/ps2_mouse.c +++ b/drivers/ps2/ps2_mouse.c @@ -53,6 +53,7 @@ void ps2_mouse_init(void) { ps2_mouse_set_remote_mode(); #else ps2_mouse_enable_data_reporting(); + ps2_mouse_set_stream_mode(); #endif #ifdef PS2_MOUSE_ENABLE_SCROLLING @@ -75,19 +76,33 @@ void ps2_mouse_task(void) { extern int tp_buttons; /* receives packet from mouse */ +#ifdef PS2_MOUSE_USE_REMOTE_MODE uint8_t rcv; rcv = ps2_host_send(PS2_MOUSE_READ_DATA); if (rcv == PS2_ACK) { mouse_report.buttons = ps2_host_recv_response() | tp_buttons; mouse_report.x = ps2_host_recv_response() * PS2_MOUSE_X_MULTIPLIER; mouse_report.y = ps2_host_recv_response() * PS2_MOUSE_Y_MULTIPLIER; -#ifdef PS2_MOUSE_ENABLE_SCROLLING +# ifdef PS2_MOUSE_ENABLE_SCROLLING mouse_report.v = -(ps2_host_recv_response() & PS2_MOUSE_SCROLL_MASK) * PS2_MOUSE_V_MULTIPLIER; -#endif +# endif + } else { + if (debug_mouse) print("ps2_mouse: fail to get mouse packet\n"); + return; + } +#else + if (pbuf_has_data()) { + mouse_report.buttons = ps2_host_recv_response() | tp_buttons; + mouse_report.x = ps2_host_recv_response() * PS2_MOUSE_X_MULTIPLIER; + mouse_report.y = ps2_host_recv_response() * PS2_MOUSE_Y_MULTIPLIER; +# ifdef PS2_MOUSE_ENABLE_SCROLLING + mouse_report.v = -(ps2_host_recv_response() & PS2_MOUSE_SCROLL_MASK) * PS2_MOUSE_V_MULTIPLIER; +# endif } else { if (debug_mouse) print("ps2_mouse: fail to get mouse packet\n"); return; } +#endif /* if mouse moves or buttons state changes */ if (mouse_report.x || mouse_report.y || mouse_report.v || ((mouse_report.buttons ^ buttons_prev) & PS2_MOUSE_BTN_MASK)) { diff --git a/drivers/sensors/adns5050.h b/drivers/sensors/adns5050.h index e45a250196..f20c2f74bc 100644 --- a/drivers/sensors/adns5050.h +++ b/drivers/sensors/adns5050.h @@ -40,15 +40,27 @@ // Definitions for the ADNS serial line. #ifndef ADNS5050_SCLK_PIN -# error "No clock pin defined -- missing ADNS5050_SCLK_PIN" +# ifdef POINTING_DEVICE_SCLK_PIN +# define ADNS5050_SCLK_PIN POINTING_DEVICE_SCLK_PIN +# else +# error "No clock pin defined -- missing POINTING_DEVICE_SCLK_PIN or ADNS5050_SCLK_PIN" +# endif #endif #ifndef ADNS5050_SDIO_PIN -# error "No data pin defined -- missing ADNS5050_SDIO_PIN" +# ifdef POINTING_DEVICE_SDIO_PIN +# define ADNS5050_SDIO_PIN POINTING_DEVICE_SDIO_PIN +# else +# error "No data pin defined -- missing POINTING_DEVICE_SDIO_PIN or ADNS5050_SDIO_PIN" +# endif #endif #ifndef ADNS5050_CS_PIN -# error "No chip select pin defined -- missing ADNS5050_CS_PIN" +# ifdef POINTING_DEVICE_CS_PIN +# define ADNS5050_CS_PIN POINTING_DEVICE_CS_PIN +# else +# error "No chip select pin defined -- missing POINTING_DEVICE_CS_PIN or ADNS5050_CS_PIN define" +# endif #endif typedef struct { diff --git a/drivers/sensors/adns9800.h b/drivers/sensors/adns9800.h index e75a869c03..3f1a005789 100644 --- a/drivers/sensors/adns9800.h +++ b/drivers/sensors/adns9800.h @@ -43,7 +43,11 @@ #endif #ifndef ADNS9800_CS_PIN -# error "No chip select pin defined -- missing ADNS9800_CS_PIN" +# ifdef POINTING_DEVICE_CS_PIN +# define ADNS9800_CS_PIN POINTING_DEVICE_CS_PIN +# else +# error "No chip select pin defined -- missing POINTING_DEVICE_CS_PIN or ADNS9800_CS_PIN" +# endif #endif typedef struct { diff --git a/drivers/sensors/cirque_pinnacle.c b/drivers/sensors/cirque_pinnacle.c index 2db7f916fe..8bd4eb736e 100644 --- a/drivers/sensors/cirque_pinnacle.c +++ b/drivers/sensors/cirque_pinnacle.c @@ -1,52 +1,26 @@ // Copyright (c) 2018 Cirque Corp. Restrictions apply. See: www.cirque.com/sw-license +// based on https://github.com/cirque-corp/Cirque_Pinnacle_1CA027/tree/master/Circular_Trackpad +// with modifications and changes for QMK +// refer to documentation: Gen2 and Gen3 (Pinnacle ASIC) at https://www.cirque.com/documentation + #include "cirque_pinnacle.h" #include "print.h" #include "debug.h" #include "wait.h" +#include "timer.h" + +#include <stdlib.h> -// Registers for RAP -// clang-format off -#define FIRMWARE_ID 0x00 -#define FIRMWARE_VERSION_C 0x01 -#define STATUS_1 0x02 -#define SYSCONFIG_1 0x03 -#define FEEDCONFIG_1 0x04 -#define FEEDCONFIG_2 0x05 -#define CALIBRATION_CONFIG_1 0x07 -#define PS2_AU_CONTROL 0x08 -#define SAMPLE_RATE 0x09 -#define Z_IDLE_COUNT 0x0A -#define Z_SCALER 0x0B -#define SLEEP_INTERVAL 0x0C -#define SLEEP_TIMER 0x0D -#define PACKET_BYTE_0 0x12 -#define PACKET_BYTE_1 0x13 -#define PACKET_BYTE_2 0x14 -#define PACKET_BYTE_3 0x15 -#define PACKET_BYTE_4 0x16 -#define PACKET_BYTE_5 0x17 - -#define ERA_VALUE 0x1B -#define ERA_HIGH_BYTE 0x1C -#define ERA_LOW_BYTE 0x1D -#define ERA_CONTROL 0x1E - -// ADC-attenuation settings (held in BIT_7 and BIT_6) -// 1X = most sensitive, 4X = least sensitive -#define ADC_ATTENUATE_1X 0x00 -#define ADC_ATTENUATE_2X 0x40 -#define ADC_ATTENUATE_3X 0x80 -#define ADC_ATTENUATE_4X 0xC0 - -// Register config values for this demo -#define SYSCONFIG_1_VALUE 0x00 -#define FEEDCONFIG_1_VALUE 0x03 // 0x03 for absolute mode 0x01 for relative mode -#define FEEDCONFIG_2_VALUE 0x1C // 0x1F for normal functionality 0x1E for intellimouse disabled -#define Z_IDLE_COUNT_VALUE 0x05 -// clang-format on +#ifndef CIRQUE_PINNACLE_ATTENUATION +# ifdef CIRQUE_PINNACLE_CURVED_OVERLAY +# define CIRQUE_PINNACLE_ATTENUATION EXTREG__TRACK_ADCCONFIG__ADC_ATTENUATE_2X +# else +# define CIRQUE_PINNACLE_ATTENUATION EXTREG__TRACK_ADCCONFIG__ADC_ATTENUATE_4X +# endif +#endif bool touchpad_init; -uint16_t scale_data = 1024; +uint16_t scale_data = CIRQUE_PINNACLE_DEFAULT_SCALE; void cirque_pinnacle_clear_flags(void); void cirque_pinnacle_enable_feed(bool feedEnable); @@ -59,6 +33,7 @@ void print_byte(uint8_t byte) { } #endif +#if CIRQUE_PINNACLE_POSITION_MODE /* Logical Scaling Functions */ // Clips raw coordinates to "reachable" window of sensor // NOTE: values outside this window can only appear as a result of noise @@ -74,6 +49,7 @@ void ClipCoordinates(pinnacle_data_t* coordinates) { coordinates->yValue = CIRQUE_PINNACLE_Y_UPPER; } } +#endif uint16_t cirque_pinnacle_get_scale(void) { return scale_data; @@ -84,6 +60,7 @@ void cirque_pinnacle_set_scale(uint16_t scale) { // Scales data to desired X & Y resolution void cirque_pinnacle_scale_data(pinnacle_data_t* coordinates, uint16_t xResolution, uint16_t yResolution) { +#if CIRQUE_PINNACLE_POSITION_MODE uint32_t xTemp = 0; uint32_t yTemp = 0; @@ -99,49 +76,65 @@ void cirque_pinnacle_scale_data(pinnacle_data_t* coordinates, uint16_t xResoluti // scale coordinates to (xResolution, yResolution) range coordinates->xValue = (uint16_t)(xTemp * xResolution / CIRQUE_PINNACLE_X_RANGE); coordinates->yValue = (uint16_t)(yTemp * yResolution / CIRQUE_PINNACLE_Y_RANGE); +#else + int32_t xTemp = 0, yTemp = 0; + ldiv_t temp; + static int32_t xRemainder, yRemainder; + + temp = ldiv(((int32_t)coordinates->xDelta) * (int32_t)xResolution + xRemainder, (int32_t)CIRQUE_PINNACLE_X_RANGE); + xTemp = temp.quot; + xRemainder = temp.rem; + + temp = ldiv(((int32_t)coordinates->yDelta) * (int32_t)yResolution + yRemainder, (int32_t)CIRQUE_PINNACLE_Y_RANGE); + yTemp = temp.quot; + yRemainder = temp.rem; + + coordinates->xDelta = (int16_t)xTemp; + coordinates->yDelta = (int16_t)yTemp; +#endif } // Clears Status1 register flags (SW_CC and SW_DR) void cirque_pinnacle_clear_flags() { - RAP_Write(STATUS_1, 0x00); + RAP_Write(HOSTREG__STATUS1, HOSTREG__STATUS1_DEFVAL & ~(HOSTREG__STATUS1__COMMAND_COMPLETE | HOSTREG__STATUS1__DATA_READY)); wait_us(50); } // Enables/Disables the feed void cirque_pinnacle_enable_feed(bool feedEnable) { - uint8_t temp; - - RAP_ReadBytes(FEEDCONFIG_1, &temp, 1); // Store contents of FeedConfig1 register + uint8_t feedconfig1; + RAP_ReadBytes(HOSTREG__FEEDCONFIG1, &feedconfig1, 1); if (feedEnable) { - temp |= 0x01; // Set Feed Enable bit - RAP_Write(0x04, temp); + feedconfig1 |= HOSTREG__FEEDCONFIG1__FEED_ENABLE; } else { - temp &= ~0x01; // Clear Feed Enable bit - RAP_Write(0x04, temp); + feedconfig1 &= ~HOSTREG__FEEDCONFIG1__FEED_ENABLE; } + RAP_Write(HOSTREG__FEEDCONFIG1, feedconfig1); } /* ERA (Extended Register Access) Functions */ // Reads <count> bytes from an extended register at <address> (16-bit address), // stores values in <*data> void ERA_ReadBytes(uint16_t address, uint8_t* data, uint16_t count) { - uint8_t ERAControlValue = 0xFF; + uint8_t ERAControlValue = 0xFF; + uint16_t timeout_timer; cirque_pinnacle_enable_feed(false); // Disable feed - RAP_Write(ERA_HIGH_BYTE, (uint8_t)(address >> 8)); // Send upper byte of ERA address - RAP_Write(ERA_LOW_BYTE, (uint8_t)(address & 0x00FF)); // Send lower byte of ERA address + RAP_Write(HOSTREG__EXT_REG_AXS_ADDR_HIGH, (uint8_t)(address >> 8)); // Send upper byte of ERA address + RAP_Write(HOSTREG__EXT_REG_AXS_ADDR_LOW, (uint8_t)(address & 0x00FF)); // Send lower byte of ERA address for (uint16_t i = 0; i < count; i++) { - RAP_Write(ERA_CONTROL, 0x05); // Signal ERA-read (auto-increment) to Pinnacle + RAP_Write(HOSTREG__EXT_REG_AXS_CTRL, HOSTREG__EREG_AXS__INC_ADDR_READ | HOSTREG__EREG_AXS__READ); // Signal ERA-read (auto-increment) to Pinnacle // Wait for status register 0x1E to clear + timeout_timer = timer_read(); do { - RAP_ReadBytes(ERA_CONTROL, &ERAControlValue, 1); - } while (ERAControlValue != 0x00); + RAP_ReadBytes(HOSTREG__EXT_REG_AXS_CTRL, &ERAControlValue, 1); + } while ((ERAControlValue != 0x00) && (timer_elapsed(timeout_timer) <= CIRQUE_PINNACLE_TIMEOUT)); - RAP_ReadBytes(ERA_VALUE, data + i, 1); + RAP_ReadBytes(HOSTREG__EXT_REG_AXS_VALUE, data + i, 1); cirque_pinnacle_clear_flags(); } @@ -149,49 +142,89 @@ void ERA_ReadBytes(uint16_t address, uint8_t* data, uint16_t count) { // Writes a byte, <data>, to an extended register at <address> (16-bit address) void ERA_WriteByte(uint16_t address, uint8_t data) { - uint8_t ERAControlValue = 0xFF; + uint8_t ERAControlValue = 0xFF; + uint16_t timeout_timer; cirque_pinnacle_enable_feed(false); // Disable feed - RAP_Write(ERA_VALUE, data); // Send data byte to be written + RAP_Write(HOSTREG__EXT_REG_AXS_VALUE, data); // Send data byte to be written - RAP_Write(ERA_HIGH_BYTE, (uint8_t)(address >> 8)); // Upper byte of ERA address - RAP_Write(ERA_LOW_BYTE, (uint8_t)(address & 0x00FF)); // Lower byte of ERA address + RAP_Write(HOSTREG__EXT_REG_AXS_ADDR_HIGH, (uint8_t)(address >> 8)); // Upper byte of ERA address + RAP_Write(HOSTREG__EXT_REG_AXS_ADDR_LOW, (uint8_t)(address & 0x00FF)); // Lower byte of ERA address - RAP_Write(ERA_CONTROL, 0x02); // Signal an ERA-write to Pinnacle + RAP_Write(HOSTREG__EXT_REG_AXS_CTRL, HOSTREG__EREG_AXS__WRITE); // Signal an ERA-write to Pinnacle // Wait for status register 0x1E to clear + timeout_timer = timer_read(); do { - RAP_ReadBytes(ERA_CONTROL, &ERAControlValue, 1); - } while (ERAControlValue != 0x00); + RAP_ReadBytes(HOSTREG__EXT_REG_AXS_CTRL, &ERAControlValue, 1); + } while ((ERAControlValue != 0x00) && (timer_elapsed(timeout_timer) <= CIRQUE_PINNACLE_TIMEOUT)); cirque_pinnacle_clear_flags(); } -void cirque_pinnacle_set_adc_attenuation(uint8_t adcGain) { - uint8_t temp = 0x00; +bool cirque_pinnacle_set_adc_attenuation(uint8_t adcGain) { + uint8_t adcconfig = 0x00; + + ERA_ReadBytes(EXTREG__TRACK_ADCCONFIG, &adcconfig, 1); + adcGain &= EXTREG__TRACK_ADCCONFIG__ADC_ATTENUATE_MASK; + if (adcGain == (adcconfig & EXTREG__TRACK_ADCCONFIG__ADC_ATTENUATE_MASK)) { + return false; + } + adcconfig &= ~EXTREG__TRACK_ADCCONFIG__ADC_ATTENUATE_MASK; + adcconfig |= adcGain; + ERA_WriteByte(EXTREG__TRACK_ADCCONFIG, adcconfig); + ERA_ReadBytes(EXTREG__TRACK_ADCCONFIG, &adcconfig, 1); - ERA_ReadBytes(0x0187, &temp, 1); - temp &= 0x3F; // clear top two bits - temp |= adcGain; - ERA_WriteByte(0x0187, temp); - ERA_ReadBytes(0x0187, &temp, 1); + return true; } // Changes thresholds to improve detection of fingers +// Not needed for flat overlay? void cirque_pinnacle_tune_edge_sensitivity(void) { - uint8_t temp = 0x00; + uint8_t widezmin = 0x00; + + ERA_ReadBytes(EXTREG__XAXIS_WIDEZMIN, &widezmin, 1); + ERA_WriteByte(EXTREG__XAXIS_WIDEZMIN, 0x04); // magic number from Cirque sample code + ERA_ReadBytes(EXTREG__XAXIS_WIDEZMIN, &widezmin, 1); + + ERA_ReadBytes(EXTREG__YAXIS_WIDEZMIN, &widezmin, 1); + ERA_WriteByte(EXTREG__YAXIS_WIDEZMIN, 0x03); // magic number from Cirque sample code + ERA_ReadBytes(EXTREG__YAXIS_WIDEZMIN, &widezmin, 1); +} + +// Perform calibration +void cirque_pinnacle_calibrate(void) { + uint8_t calconfig; + uint16_t timeout_timer; + + RAP_ReadBytes(HOSTREG__CALCONFIG1, &calconfig, 1); + calconfig |= HOSTREG__CALCONFIG1__CALIBRATE; + RAP_Write(HOSTREG__CALCONFIG1, calconfig); + + // Calibration takes ~100ms according to GT-AN-090624, doubling the timeout just to be safe + timeout_timer = timer_read(); + do { + RAP_ReadBytes(HOSTREG__CALCONFIG1, &calconfig, 1); + } while ((calconfig & HOSTREG__CALCONFIG1__CALIBRATE) && (timer_elapsed(timeout_timer) <= 200)); + + cirque_pinnacle_clear_flags(); +} - ERA_ReadBytes(0x0149, &temp, 1); - ERA_WriteByte(0x0149, 0x04); - ERA_ReadBytes(0x0149, &temp, 1); +// Enable/disable cursor smoothing, smoothing is enabled by default +void cirque_pinnacle_cursor_smoothing(bool enable) { + uint8_t feedconfig3; - ERA_ReadBytes(0x0168, &temp, 1); - ERA_WriteByte(0x0168, 0x03); - ERA_ReadBytes(0x0168, &temp, 1); + RAP_ReadBytes(HOSTREG__FEEDCONFIG3, &feedconfig3, 1); + if (enable) { + feedconfig3 &= ~HOSTREG__FEEDCONFIG3__DISABLE_CROSS_RATE_SMOOTHING; + } else { + feedconfig3 |= HOSTREG__FEEDCONFIG3__DISABLE_CROSS_RATE_SMOOTHING; + } + RAP_Write(HOSTREG__FEEDCONFIG3, feedconfig3); } -/* Pinnacle-based TM040040 Functions */ +/* Pinnacle-based TM040040/TM035035/TM023023 Functions */ void cirque_pinnacle_init(void) { #if defined(POINTING_DEVICE_DRIVER_cirque_pinnacle_spi) spi_init(); @@ -200,39 +233,101 @@ void cirque_pinnacle_init(void) { #endif touchpad_init = true; + + // send a RESET command now, in case QMK had a soft-reset without a power cycle + RAP_Write(HOSTREG__SYSCONFIG1, HOSTREG__SYSCONFIG1__RESET); + wait_ms(30); // Pinnacle needs 10-15ms to boot, so wait long enough before configuring + RAP_Write(HOSTREG__SYSCONFIG1, HOSTREG__SYSCONFIG1_DEFVAL); + wait_us(50); + // Host clears SW_CC flag cirque_pinnacle_clear_flags(); - // Host configures bits of registers 0x03 and 0x05 - RAP_Write(SYSCONFIG_1, SYSCONFIG_1_VALUE); - RAP_Write(FEEDCONFIG_2, FEEDCONFIG_2_VALUE); +#if CIRQUE_PINNACLE_POSITION_MODE + RAP_Write(HOSTREG__FEEDCONFIG2, HOSTREG__FEEDCONFIG2_DEFVAL); +#else + // FeedConfig2 (Feature flags for Relative Mode Only) + uint8_t feedconfig2 = HOSTREG__FEEDCONFIG2__GLIDE_EXTEND_DISABLE | HOSTREG__FEEDCONFIG2__INTELLIMOUSE_MODE; +# if !defined(CIRQUE_PINNACLE_TAP_ENABLE) + feedconfig2 |= HOSTREG__FEEDCONFIG2__ALL_TAP_DISABLE; +# endif +# if !defined(CIRQUE_PINNACLE_SECONDARY_TAP_ENABLE) + feedconfig2 |= HOSTREG__FEEDCONFIG2__SECONDARY_TAP_DISABLE; +# elif !defined(CIRQUE_PINNACLE_TAP_ENABLE) +# error CIRQUE_PINNACLE_TAP_ENABLE must be defined for CIRQUE_PINNACLE_SECONDARY_TAP_ENABLE to work +# endif +# if !defined(CIRQUE_PINNACLE_SIDE_SCROLL_ENABLE) + feedconfig2 |= HOSTREG__FEEDCONFIG2__SCROLL_DISABLE; +# endif + RAP_Write(HOSTREG__FEEDCONFIG2, feedconfig2); +#endif - // Host enables preferred output mode (absolute) - RAP_Write(FEEDCONFIG_1, FEEDCONFIG_1_VALUE); + // FeedConfig1 (Data Output Flags) + RAP_Write(HOSTREG__FEEDCONFIG1, CIRQUE_PINNACLE_POSITION_MODE ? HOSTREG__FEEDCONFIG1__DATA_TYPE__REL0_ABS1 : HOSTREG__FEEDCONFIG1_DEFVAL); - // Host sets z-idle packet count to 5 (default is 30) - RAP_Write(Z_IDLE_COUNT, Z_IDLE_COUNT_VALUE); +#if CIRQUE_PINNACLE_POSITION_MODE + // Host sets z-idle packet count to 5 (default is 0x1E/30) + RAP_Write(HOSTREG__ZIDLE, 5); +#endif - cirque_pinnacle_set_adc_attenuation(0xFF); + bool calibrate = cirque_pinnacle_set_adc_attenuation(CIRQUE_PINNACLE_ATTENUATION); + +#ifdef CIRQUE_PINNACLE_CURVED_OVERLAY cirque_pinnacle_tune_edge_sensitivity(); + calibrate = true; +#endif + if (calibrate) { + // Force a calibration after setting ADC attenuation + cirque_pinnacle_calibrate(); + } + cirque_pinnacle_enable_feed(true); } -// Reads XYZ data from Pinnacle registers 0x14 through 0x17 -// Stores result in pinnacle_data_t struct with xValue, yValue, and zValue members pinnacle_data_t cirque_pinnacle_read_data(void) { - uint8_t data[6] = {0}; - pinnacle_data_t result = {0}; - RAP_ReadBytes(PACKET_BYTE_0, data, 6); + uint8_t data_ready = 0; + uint8_t data[6] = {0}; + pinnacle_data_t result = {0}; + + // Check if there is valid data available + RAP_ReadBytes(HOSTREG__STATUS1, &data_ready, 1); + if ((data_ready & HOSTREG__STATUS1__DATA_READY) == 0) { + // no data available yet + result.valid = false; // be explicit + return result; + } - cirque_pinnacle_clear_flags(); + // Read all data bytes + RAP_ReadBytes(HOSTREG__PACKETBYTE_0, data, 6); - result.buttonFlags = data[0] & 0x3F; - result.xValue = data[2] | ((data[4] & 0x0F) << 8); - result.yValue = data[3] | ((data[4] & 0xF0) << 4); - result.zValue = data[5] & 0x3F; + // Get ready for the next data sample + cirque_pinnacle_clear_flags(); - result.touchDown = (result.xValue != 0 || result.yValue != 0); +#if CIRQUE_PINNACLE_POSITION_MODE + // Decode data for absolute mode + // Register 0x13 is unused in this mode (palm detection area) + result.buttonFlags = data[0] & 0x3F; // bit0 to bit5 are switch 0-5, only hardware button presses (from input pin on the Pinnacle chip) + result.xValue = data[2] | ((data[4] & 0x0F) << 8); // merge high and low bits for X + result.yValue = data[3] | ((data[4] & 0xF0) << 4); // merge high and low bits for Y + result.zValue = data[5] & 0x3F; // Z is only lower 6 bits, upper 2 bits are reserved/unused + result.touchDown = (result.xValue != 0 || result.yValue != 0); // (0,0) is a "magic coordinate" to indicate "finger touched down" +#else + // Decode data for relative mode + // Registers 0x16 and 0x17 are unused in this mode + result.buttons = data[0] & 0x07; // Only three buttons are supported + if ((data[0] & 0x10) && data[1] != 0) { + result.xDelta = -((int16_t)256 - (int16_t)(data[1])); + } else { + result.xDelta = data[1]; + } + if ((data[0] & 0x20) && data[2] != 0) { + result.yDelta = ((int16_t)256 - (int16_t)(data[2])); + } else { + result.yDelta = -((int16_t)data[2]); + } + result.wheelCount = ((int8_t*)data)[3]; +#endif + result.valid = true; return result; } diff --git a/drivers/sensors/cirque_pinnacle.h b/drivers/sensors/cirque_pinnacle.h index c8cb360e03..fa06e047f2 100644 --- a/drivers/sensors/cirque_pinnacle.h +++ b/drivers/sensors/cirque_pinnacle.h @@ -2,53 +2,63 @@ #pragma once +#include "cirque_pinnacle_regdefs.h" #include <stdint.h> #include <stdbool.h> -// Convenient way to store and access measurements -typedef struct { - uint16_t xValue; - uint16_t yValue; - uint16_t zValue; - uint8_t buttonFlags; - bool touchDown; -} pinnacle_data_t; - -void cirque_pinnacle_init(void); -pinnacle_data_t cirque_pinnacle_read_data(void); -void cirque_pinnacle_scale_data(pinnacle_data_t* coordinates, uint16_t xResolution, uint16_t yResolution); -uint16_t cirque_pinnacle_get_scale(void); -void cirque_pinnacle_set_scale(uint16_t scale); - #ifndef CIRQUE_PINNACLE_TIMEOUT -# define CIRQUE_PINNACLE_TIMEOUT 20 +# define CIRQUE_PINNACLE_TIMEOUT 20 // I2C timeout in milliseconds #endif -// Coordinate scaling values -#ifndef CIRQUE_PINNACLE_X_LOWER -# define CIRQUE_PINNACLE_X_LOWER 127 // min "reachable" X value -#endif -#ifndef CIRQUE_PINNACLE_X_UPPER -# define CIRQUE_PINNACLE_X_UPPER 1919 // max "reachable" X value -#endif -#ifndef CIRQUE_PINNACLE_Y_LOWER -# define CIRQUE_PINNACLE_Y_LOWER 63 // min "reachable" Y value +#define CIRQUE_PINNACLE_ABSOLUTE_MODE 1 +#define CIRQUE_PINNACLE_RELATIVE_MODE 0 +#ifndef CIRQUE_PINNACLE_POSITION_MODE +# define CIRQUE_PINNACLE_POSITION_MODE CIRQUE_PINNACLE_ABSOLUTE_MODE #endif -#ifndef CIRQUE_PINNACLE_Y_UPPER -# define CIRQUE_PINNACLE_Y_UPPER 1471 // max "reachable" Y value + +#define CIRQUE_PINNACLE_DEFAULT_SCALE 1024 +#ifndef CIRQUE_PINNACLE_DIAMETER_MM +# define CIRQUE_PINNACLE_DIAMETER_MM 40 #endif -#ifndef CIRQUE_PINNACLE_X_RANGE -# define CIRQUE_PINNACLE_X_RANGE (CIRQUE_PINNACLE_X_UPPER - CIRQUE_PINNACLE_X_LOWER) + +#if CIRQUE_PINNACLE_POSITION_MODE +// Coordinate scaling values +# ifndef CIRQUE_PINNACLE_X_LOWER +# define CIRQUE_PINNACLE_X_LOWER 127 // min "reachable" X value +# endif +# ifndef CIRQUE_PINNACLE_X_UPPER +# define CIRQUE_PINNACLE_X_UPPER 1919 // max "reachable" X value +# endif +# ifndef CIRQUE_PINNACLE_Y_LOWER +# define CIRQUE_PINNACLE_Y_LOWER 63 // min "reachable" Y value +# endif +# ifndef CIRQUE_PINNACLE_Y_UPPER +# define CIRQUE_PINNACLE_Y_UPPER 1471 // max "reachable" Y value +# endif +# ifndef CIRQUE_PINNACLE_X_RANGE +# define CIRQUE_PINNACLE_X_RANGE (CIRQUE_PINNACLE_X_UPPER - CIRQUE_PINNACLE_X_LOWER) +# endif +# ifndef CIRQUE_PINNACLE_Y_RANGE +# define CIRQUE_PINNACLE_Y_RANGE (CIRQUE_PINNACLE_Y_UPPER - CIRQUE_PINNACLE_Y_LOWER) +# endif +# if defined(POINTING_DEVICE_GESTURES_SCROLL_ENABLE) +# define CIRQUE_PINNACLE_CIRCULAR_SCROLL_ENABLE +# endif +#else +# define CIRQUE_PINNACLE_X_RANGE 256 +# define CIRQUE_PINNACLE_Y_RANGE 256 +# if defined(POINTING_DEVICE_GESTURES_SCROLL_ENABLE) +# define CIRQUE_PINNACLE_SIDE_SCROLL_ENABLE +# endif #endif -#ifndef CIRQUE_PINNACLE_Y_RANGE -# define CIRQUE_PINNACLE_Y_RANGE (CIRQUE_PINNACLE_Y_UPPER - CIRQUE_PINNACLE_Y_LOWER) +#if !defined(POINTING_DEVICE_TASK_THROTTLE_MS) +# define POINTING_DEVICE_TASK_THROTTLE_MS 10 // Cirque Pinnacle in normal operation produces data every 10ms. Advanced configuration for pen/stylus usage might require lower values. #endif - #if defined(POINTING_DEVICE_DRIVER_cirque_pinnacle_i2c) # include "i2c_master.h" // Cirque's 7-bit I2C Slave Address # ifndef CIRQUE_PINNACLE_ADDR -# define CIRQUE_PINNACLE_ADDR 0x2A +# define CIRQUE_PINNACLE_ADDR I2C_ADDRESS_DEFAULT # endif #elif defined(POINTING_DEVICE_DRIVER_cirque_pinnacle_spi) # include "spi_master.h" @@ -68,7 +78,40 @@ void cirque_pinnacle_set_scale(uint16_t scale); # define CIRQUE_PINNACLE_SPI_DIVISOR 64 # endif # ifndef CIRQUE_PINNACLE_SPI_CS_PIN -# error "No Chip Select pin has been defined -- missing CIRQUE_PINNACLE_SPI_CS_PIN define" +# ifdef POINTING_DEVICE_CS_PIN +# define CIRQUE_PINNACLE_SPI_CS_PIN POINTING_DEVICE_CS_PIN +# else +# error "No Chip Select pin has been defined -- missing POINTING_DEVICE_CS_PIN or CIRQUE_PINNACLE_SPI_CS_PIN define" +# endif # endif # endif #endif + +#define DIVIDE_UNSIGNED_ROUND(numerator, denominator) (((numerator) + ((denominator) / 2)) / (denominator)) +#define CIRQUE_PINNACLE_INCH_TO_PX(inch) (DIVIDE_UNSIGNED_ROUND((inch) * (uint32_t)CIRQUE_PINNACLE_DIAMETER_MM * 10, 254)) +#define CIRQUE_PINNACLE_PX_TO_INCH(px) (DIVIDE_UNSIGNED_ROUND((px) * (uint32_t)254, CIRQUE_PINNACLE_DIAMETER_MM * 10)) + +// Convenient way to store and access measurements +typedef struct { + bool valid; // true if valid data was read, false if no data was ready +#if CIRQUE_PINNACLE_POSITION_MODE + uint16_t xValue; + uint16_t yValue; + uint16_t zValue; + uint8_t buttonFlags; + bool touchDown; +#else + int16_t xDelta; + int16_t yDelta; + int8_t wheelCount; + uint8_t buttons; +#endif +} pinnacle_data_t; + +void cirque_pinnacle_init(void); +void cirque_pinnacle_calibrate(void); +void cirque_pinnacle_cursor_smoothing(bool enable); +pinnacle_data_t cirque_pinnacle_read_data(void); +void cirque_pinnacle_scale_data(pinnacle_data_t* coordinates, uint16_t xResolution, uint16_t yResolution); +uint16_t cirque_pinnacle_get_scale(void); +void cirque_pinnacle_set_scale(uint16_t scale); diff --git a/drivers/sensors/cirque_pinnacle_gestures.c b/drivers/sensors/cirque_pinnacle_gestures.c new file mode 100644 index 0000000000..a73b745e59 --- /dev/null +++ b/drivers/sensors/cirque_pinnacle_gestures.c @@ -0,0 +1,238 @@ +/* Copyright 2020 Christopher Courtney, aka Drashna Jael're (@drashna) <drashna@live.com> + * Copyright 2022 Daniel Kao <daniel.m.kao@gmail.com> + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ +#include <stdlib.h> +#include <lib/lib8tion/lib8tion.h> +#include "cirque_pinnacle_gestures.h" +#include "pointing_device.h" +#include "timer.h" +#include "wait.h" +#if defined(SPLIT_POINTING_ENABLE) && defined(POINTING_DEVICE_COMBINED) +# include "keyboard.h" +#endif + +#if (defined(CIRQUE_PINNACLE_TAP_ENABLE) || defined(CIRQUE_PINNACLE_CIRCULAR_SCROLL_ENABLE)) && CIRQUE_PINNACLE_POSITION_MODE +static cirque_pinnacle_features_t features = {.tap_enable = true, .circular_scroll_enable = true}; +#endif + +#if defined(CIRQUE_PINNACLE_TAP_ENABLE) && CIRQUE_PINNACLE_POSITION_MODE +static trackpad_tap_context_t tap; + +static report_mouse_t trackpad_tap(report_mouse_t mouse_report, pinnacle_data_t touchData) { + if (touchData.touchDown != tap.touchDown) { + tap.touchDown = touchData.touchDown; + if (!touchData.zValue) { + if (timer_elapsed(tap.timer) < CIRQUE_PINNACLE_TAPPING_TERM && tap.timer != 0) { + mouse_report.buttons = pointing_device_handle_buttons(mouse_report.buttons, true, POINTING_DEVICE_BUTTON1); + pointing_device_set_report(mouse_report); + pointing_device_send(); +# if TAP_CODE_DELAY > 0 + wait_ms(TAP_CODE_DELAY); +# endif + mouse_report.buttons = pointing_device_handle_buttons(mouse_report.buttons, false, POINTING_DEVICE_BUTTON1); + pointing_device_set_report(mouse_report); + pointing_device_send(); + } + } + tap.timer = timer_read(); + } + if (timer_elapsed(tap.timer) > (CIRQUE_PINNACLE_TOUCH_DEBOUNCE)) { + tap.timer = 0; + } + + return mouse_report; +} + +void cirque_pinnacle_enable_tap(bool enable) { + features.tap_enable = enable; +} +#endif + +#ifdef CIRQUE_PINNACLE_CIRCULAR_SCROLL_ENABLE +# if !CIRQUE_PINNACLE_POSITION_MODE +# error "Circular scroll is not supported in relative mode" +# endif +/* To set a trackpad exclusively as scroll wheel: outer_ring_pct = 100, trigger_px = 0, trigger_ang = 0 */ +static circular_scroll_context_t scroll = {.config = {.outer_ring_pct = 33, + .trigger_px = 16, + .trigger_ang = 9102, /* 50 degrees */ + .wheel_clicks = 18}}; + +static inline uint16_t atan2_16(int32_t dy, int32_t dx) { + if (dy == 0) { + if (dx >= 0) { + return 0; + } else { + return 32768; + } + } + + int32_t abs_y = dy > 0 ? dy : -dy; + int16_t a; + + if (dx >= 0) { + a = 8192 - (8192 * (dx - abs_y) / (dx + abs_y)); + } else { + a = 24576 - (8192 * (dx + abs_y) / (abs_y - dx)); + } + + if (dy < 0) { + return -a; // negate if in quad III or IV + } + return a; +} + +static circular_scroll_t circular_scroll(pinnacle_data_t touchData) { + circular_scroll_t report = {0, 0, false}; + int8_t x, y, wheel_clicks; + uint8_t center = INT8_MAX, mag; + int16_t ang, dot, det, opposite_side, adjacent_side; + uint16_t scale = cirque_pinnacle_get_scale(); + + if (touchData.zValue) { + /* + * Place origin at center of trackpad, treat coordinates as vectors. + * Scale to +/-INT8_MAX; angles are independent of resolution. + */ + if (scale) { + /* Rotate coordinates into a consistent orientation */ + report_mouse_t rot = {.x = (int8_t)((int32_t)touchData.xValue * INT8_MAX * 2 / scale - center), .y = (int8_t)((int32_t)touchData.yValue * INT8_MAX * 2 / scale - center)}; +# if defined(SPLIT_POINTING_ENABLE) && defined(POINTING_DEVICE_COMBINED) + if (!is_keyboard_left()) { + rot = pointing_device_adjust_by_defines_right(rot); + } else +# endif + { + rot = pointing_device_adjust_by_defines(rot); + } + x = rot.x; + y = rot.y; + } else { + x = 0; + y = 0; + } + + /* Check if first touch */ + if (!scroll.z) { + report.suppress_touch = false; + /* Check if touch falls within outer ring */ + mag = sqrt16(x * x + y * y); + if (mag * 100 / center >= 100 - scroll.config.outer_ring_pct) { + scroll.state = SCROLL_DETECTING; + scroll.x = x; + scroll.y = y; + scroll.mag = mag; + /* + * Decide scroll axis: + * Vertical if started from righ half + * Horizontal if started from left half + * Flipped for left-handed + */ + scroll.axis = x < 0; + } + } else if (scroll.state == SCROLL_DETECTING) { + report.suppress_touch = true; + /* Already detecting scroll, check movement from touchdown location */ + mag = sqrt16((x - scroll.x) * (x - scroll.x) + (y - scroll.y) * (y - scroll.y)); + if (mag >= scroll.config.trigger_px) { + /* + * Find angle of movement. + * 0 degrees here means movement towards center of circle + */ + dot = scroll.x * x + scroll.y * y; + det = scroll.x * y - scroll.y * x; + opposite_side = abs(det); /* Based on scalar rejection */ + adjacent_side = abs(scroll.mag * scroll.mag - abs(dot)); /* Based on scalar projection */ + ang = (int16_t)atan2_16(opposite_side, adjacent_side); + if (ang < scroll.config.trigger_ang) { + /* Not a scroll, release coordinates */ + report.suppress_touch = false; + scroll.state = NOT_SCROLL; + } else { + /* Scroll detected */ + scroll.state = SCROLL_VALID; + } + } + } + if (scroll.state == SCROLL_VALID) { + report.suppress_touch = true; + dot = scroll.x * x + scroll.y * y; + det = scroll.x * y - scroll.y * x; + ang = (int16_t)atan2_16(det, dot); + wheel_clicks = ((int32_t)ang * scroll.config.wheel_clicks) / 65536; + if (wheel_clicks >= 1 || wheel_clicks <= -1) { + if (scroll.config.left_handed) { + if (scroll.axis == 0) { + report.h = -wheel_clicks; + } else { + report.v = wheel_clicks; + } + } else { + if (scroll.axis == 0) { + report.v = -wheel_clicks; + } else { + report.h = wheel_clicks; + } + } + scroll.x = x; + scroll.y = y; + } + } + } + + scroll.z = touchData.zValue; + if (!scroll.z) scroll.state = SCROLL_UNINITIALIZED; + + return report; +} + +void cirque_pinnacle_enable_circular_scroll(bool enable) { + features.circular_scroll_enable = enable; +} + +void cirque_pinnacle_configure_circular_scroll(uint8_t outer_ring_pct, uint8_t trigger_px, uint16_t trigger_ang, uint8_t wheel_clicks, bool left_handed) { + scroll.config.outer_ring_pct = outer_ring_pct; + scroll.config.trigger_px = trigger_px; + scroll.config.trigger_ang = trigger_ang; + scroll.config.wheel_clicks = wheel_clicks; + scroll.config.left_handed = left_handed; +} +#endif + +bool cirque_pinnacle_gestures(report_mouse_t* mouse_report, pinnacle_data_t touchData) { + bool suppress_mouse_update = false; + +#ifdef CIRQUE_PINNACLE_CIRCULAR_SCROLL_ENABLE +# if !CIRQUE_PINNACLE_POSITION_MODE +# error "Circular scroll is not supported in relative mode" +# endif + circular_scroll_t scroll_report; + if (features.circular_scroll_enable) { + scroll_report = circular_scroll(touchData); + mouse_report->v = scroll_report.v; + mouse_report->h = scroll_report.h; + suppress_mouse_update = scroll_report.suppress_touch; + } +#endif + +#if defined(CIRQUE_PINNACLE_TAP_ENABLE) && CIRQUE_PINNACLE_POSITION_MODE + if (features.tap_enable) { + *mouse_report = trackpad_tap(*mouse_report, touchData); + } +#endif + + return suppress_mouse_update; +} diff --git a/drivers/sensors/cirque_pinnacle_gestures.h b/drivers/sensors/cirque_pinnacle_gestures.h new file mode 100644 index 0000000000..d2aa206b2b --- /dev/null +++ b/drivers/sensors/cirque_pinnacle_gestures.h @@ -0,0 +1,110 @@ +/* Copyright 2020 Christopher Courtney, aka Drashna Jael're (@drashna) <drashna@live.com> + * Copyright 2022 Daniel Kao <daniel.m.kao@gmail.com> + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ +#pragma once + +#include "cirque_pinnacle.h" +#include "report.h" + +typedef struct { + bool tap_enable; + bool circular_scroll_enable; +} cirque_pinnacle_features_t; + +#if defined(CIRQUE_PINNACLE_TAP_ENABLE) && CIRQUE_PINNACLE_POSITION_MODE +# ifndef CIRQUE_PINNACLE_TAPPING_TERM +# include "action.h" +# include "action_tapping.h" +# define CIRQUE_PINNACLE_TAPPING_TERM GET_TAPPING_TERM(KC_BTN1, &(keyrecord_t){}) +# endif +# ifndef CIRQUE_PINNACLE_TOUCH_DEBOUNCE +# define CIRQUE_PINNACLE_TOUCH_DEBOUNCE (CIRQUE_PINNACLE_TAPPING_TERM * 8) +# endif + +typedef struct { + uint16_t timer; + bool touchDown; +} trackpad_tap_context_t; + +/* Enable/disable tap gesture */ +void cirque_pinnacle_enable_tap(bool enable); +#endif + +#ifdef CIRQUE_PINNACLE_CIRCULAR_SCROLL_ENABLE +# if !CIRQUE_PINNACLE_POSITION_MODE +# error "Circular scroll is not supported in relative mode" +# endif +typedef enum { + SCROLL_UNINITIALIZED, + SCROLL_DETECTING, + SCROLL_VALID, + NOT_SCROLL, +} circular_scroll_status_t; + +typedef struct { + int8_t v; + int8_t h; + bool suppress_touch; +} circular_scroll_t; + +typedef struct { + uint8_t outer_ring_pct; /* Width of outer ring, given as a percentage of the radius */ + uint8_t trigger_px; /* Amount of movement before triggering scroll validation, in pixels 0~127 */ + uint16_t trigger_ang; /* Angle required to validate scroll, in radians where pi = 32768 */ + uint8_t wheel_clicks; /* How many clicks to report in a circle */ + bool left_handed; /* Whether scrolling should be flipped for left handed use */ +} circular_scroll_config_t; + +typedef struct { + circular_scroll_config_t config; + circular_scroll_status_t state; + uint8_t mag; + int8_t x; + int8_t y; + uint16_t z; + bool axis; +} circular_scroll_context_t; + +/* Enable/disable circular scroll gesture */ +void cirque_pinnacle_enable_circular_scroll(bool enable); + +/* + * Configure circular scroll gesture. + * Trackpad can be configured to act exclusively as a scroll wheel with outer_ring_pct = 0, trigger_px = 0, trigger_ang = 0. + * @param outer_ring_pct Width of outer ring from which to begin scroll validation, given as a percentage of the radius. + * @param trigger_px Amount of movement before triggering scroll validation. Expressed in pixels, trackpad coordinates are scaled to radius of 128 pixels for circular scroll. + * @param triger_ang Angle required to validate scroll, angle smaller than this will invalidate scroll. In radians where pi = 32768, 0 means movement towards center of trackpad, 16384 means movement perpendicular to center. + * @param wheel_clicks Number of scroll wheel clicks to report in a full rotation. + * @param left_handed Whether scrolling should be flipped for left-handed use. + */ +void cirque_pinnacle_configure_circular_scroll(uint8_t outer_ring_pct, uint8_t trigger_px, uint16_t trigger_ang, uint8_t wheel_clicks, bool left_handed); +#endif + +#ifdef POINTING_DEVICE_GESTURES_CURSOR_GLIDE_ENABLE +/* Implementation in pointing_device_drivers.c */ + +/* Enable/disable inertial cursor */ +void cirque_pinnacle_enable_cursor_glide(bool enable); + +/* + * Configure inertial cursor. + * @param trigger_px Movement required to trigger cursor glide, set this to non-zero if you have some amount of hover. + */ +void cirque_pinnacle_configure_cursor_glide(float trigger_px); +#endif + +/* Process available gestures */ +bool cirque_pinnacle_gestures(report_mouse_t* mouse_report, pinnacle_data_t touchData); diff --git a/drivers/sensors/cirque_pinnacle_i2c.c b/drivers/sensors/cirque_pinnacle_i2c.c index 8a38f1dcea..b328dd9a7a 100644 --- a/drivers/sensors/cirque_pinnacle_i2c.c +++ b/drivers/sensors/cirque_pinnacle_i2c.c @@ -19,7 +19,7 @@ void RAP_ReadBytes(uint8_t address, uint8_t* data, uint8_t count) { i2c_writeReg(CIRQUE_PINNACLE_ADDR << 1, cmdByte, NULL, 0, CIRQUE_PINNACLE_TIMEOUT); if (i2c_readReg(CIRQUE_PINNACLE_ADDR << 1, cmdByte, data, count, CIRQUE_PINNACLE_TIMEOUT) != I2C_STATUS_SUCCESS) { #ifdef CONSOLE_ENABLE - dprintf("error right touchpad\n"); + dprintf("error cirque_pinnacle i2c_readReg\n"); #endif touchpad_init = false; } @@ -34,7 +34,7 @@ void RAP_Write(uint8_t address, uint8_t data) { if (touchpad_init) { if (i2c_writeReg(CIRQUE_PINNACLE_ADDR << 1, cmdByte, &data, sizeof(data), CIRQUE_PINNACLE_TIMEOUT) != I2C_STATUS_SUCCESS) { #ifdef CONSOLE_ENABLE - dprintf("error right touchpad\n"); + dprintf("error cirque_pinnacle i2c_writeReg\n"); #endif touchpad_init = false; } diff --git a/drivers/sensors/cirque_pinnacle_regdefs.h b/drivers/sensors/cirque_pinnacle_regdefs.h new file mode 100644 index 0000000000..fb9e09af6e --- /dev/null +++ b/drivers/sensors/cirque_pinnacle_regdefs.h @@ -0,0 +1,405 @@ +// Copyright (c) 2018 Cirque Corp. Restrictions apply. See: www.cirque.com/sw-license +// based on https://github.com/cirque-corp/Cirque_Pinnacle_1CA027/tree/master/Additional_Examples +// with modifications and changes for QMK +// refer to documentation: Gen2 and Gen3 (Pinnacle ASIC) at https://www.cirque.com/gen2gen3-asic-details + +#pragma once + +// clang-format off + +#define HostReg__0 (0x00) +#define HostReg__1 (0x01) +#define HostReg__2 (0x02) +#define HostReg__3 (0x03) +#define HostReg__4 (0x04) +#define HostReg__5 (0x05) +#define HostReg__6 (0x06) +#define HostReg__7 (0x07) +#define HostReg__8 (0x08) +#define HostReg__9 (0x09) +#define HostReg__10 (0x0A) +#define HostReg__11 (0x0B) +#define HostReg__12 (0x0C) +#define HostReg__13 (0x0D) +#define HostReg__14 (0x0E) +#define HostReg__15 (0x0F) +#define HostReg__16 (0x10) +#define HostReg__17 (0x11) +#define HostReg__18 (0x12) +#define HostReg__19 (0x13) +#define HostReg__20 (0x14) +#define HostReg__21 (0x15) +#define HostReg__22 (0x16) +#define HostReg__23 (0x17) +#define HostReg__24 (0x18) +#define HostReg__25 (0x19) +#define HostReg__26 (0x1A) +#define HostReg__27 (0x1B) +#define HostReg__28 (0x1C) +#define HostReg__29 (0x1D) +#define HostReg__30 (0x1E) +#define HostReg__31 (0x1F) + +// ---------------- Register Assignments ------------------------------------- + +/*--------------------------------------------------------------------------*\ + Chip ID / Version +\*--------------------------------------------------------------------------*/ +// Chip ID Register +#define HOSTREG__CHIPID HostReg__0 + +// Chip Version Register +#define HOSTREG__VERSION HostReg__1 + +/*--------------------------------------------------------------------------*\ + Status Register +\*--------------------------------------------------------------------------*/ +// Status 1 Register -- MUST BE HOSTREG__2 +#define HOSTREG__STATUS1 HostReg__2 +# define HOSTREG__STATUS1__DATA_READY 0x04 +# define HOSTREG__STATUS1__COMMAND_COMPLETE 0x08 +#define HOSTREG__STATUS1_DEFVAL 0x00 + +/*--------------------------------------------------------------------------*\ + System Config Register +\*--------------------------------------------------------------------------*/ +#define HOSTREG__SYSCONFIG1 HostReg__3 +# define HOSTREG__SYSCONFIG1__RESET 0x01 +# define HOSTREG__SYSCONFIG1__STANDBY 0x02 +# define HOSTREG__SYSCONFIG1__AUTO_SLEEP 0x04 +# define HOSTREG__SYSCONFIG1__TRACK_DISABLE 0x08 +# define HOSTREG__SYSCONFIG1__ANYMEAS_ENABLE 0x10 +# define HOSTREG__SYSCONFIG1__GPIO_CTRL_ENABLE 0x20 +# define HOSTREG__SYSCONFIG1__WAKEUP_TOGGLE 0x40 +# define HOSTREG__SYSCONFIG1__FORCE_WAKEUP 0x80 +#define HOSTREG__SYSCONFIG1_DEFVAL 0x00 + +/*--------------------------------------------------------------------------*\ + Feed Config Registers +\*--------------------------------------------------------------------------*/ +// Feed Config Register1 +#define HOSTREG__FEEDCONFIG1 HostReg__4 +# define HOSTREG__FEEDCONFIG1__FEED_ENABLE 0x01 +# define HOSTREG__FEEDCONFIG1__DATA_TYPE__REL0_ABS1 0x02 +# define HOSTREG__FEEDCONFIG1__FILTER_DISABLE 0x04 +# define HOSTREG__FEEDCONFIG1__X_AXIS_DISABLE 0x08 +# define HOSTREG__FEEDCONFIG1__Y_AXIS_DISABLE 0x10 +# define HOSTREG__FEEDCONFIG1__AXIS_FOR_Z__Y0_X1 0x20 +# define HOSTREG__FEEDCONFIG1__X_DATA_INVERT 0x40 +# define HOSTREG__FEEDCONFIG1__Y_DATA_INVERT 0x80 +#define HOSTREG__FEEDCONFIG1_DEFVAL 0x00 + +// Feed Config Register2 +#define HOSTREG__FEEDCONFIG2 HostReg__5 +# define HOSTREG__FEEDCONFIG2__INTELLIMOUSE_MODE 0x01 +# define HOSTREG__FEEDCONFIG2__ALL_TAP_DISABLE 0x02 +# define HOSTREG__FEEDCONFIG2__SECONDARY_TAP_DISABLE 0x04 +# define HOSTREG__FEEDCONFIG2__SCROLL_DISABLE 0x08 +# define HOSTREG__FEEDCONFIG2__GLIDE_EXTEND_DISABLE 0x10 +# define HOSTREG__FEEDCONFIG2__PALM_BEFORE_Z_ENABLE 0x20 +# define HOSTREG__FEEDCONFIG2__BUTNS_46_SCROLL_5_MIDDLE 0x40 +# define HOSTREG__FEEDCONFIG2__SWAP_XY_RELATIVE 0x80 +#define HOSTREG__FEEDCONFIG2_DEFVAL 0x00 + +// Feed Config Register3 +#define HOSTREG__FEEDCONFIG3 HostReg__6 +# define HOSTREG__FEEDCONFIG3__BTNS_456_TO_123_IN_REL 0x01 +# define HOSTREG__FEEDCONFIG3__DISABLE_CROSS_RATE_SMOOTHING 0x02 +# define HOSTREG__FEEDCONFIG3__DISABLE_PALM_NERD_MEAS 0x04 +# define HOSTREG__FEEDCONFIG3__DISABLE_NOISE_AVOIDANCE 0x08 +# define HOSTREG__FEEDCONFIG3__DISABLE_WRAP_LOCKOUT 0x10 +# define HOSTREG__FEEDCONFIG3__DISABLE_DYNAMIC_EMI_ADJUST 0x20 +# define HOSTREG__FEEDCONFIG3__DISABLE_HW_EMI_DETECT 0x40 +# define HOSTREG__FEEDCONFIG3__DISABLE_SW_EMI_DETECT 0x80 +#define HOSTREG__FEEDCONFIG3_DEFVAL 0x00 + +/*--------------------------------------------------------------------------*\ + Calibration Config +\*--------------------------------------------------------------------------*/ +#define HOSTREG__CALCONFIG1 HostReg__7 +# define HOSTREG__CALCONFIG1__CALIBRATE 0x01 +# define HOSTREG__CALCONFIG1__BACKGROUND_COMP_ENABLE 0x02 +# define HOSTREG__CALCONFIG1__NERD_COMP_ENABLE 0x04 +# define HOSTREG__CALCONFIG1__TRACK_ERROR_COMP_ENABLE 0x08 +# define HOSTREG__CALCONFIG1__TAP_COMP_ENABLE 0x10 +# define HOSTREG__CALCONFIG1__PALM_ERROR_COMP_ENABLE 0x20 +# define HOSTREG__CALCONFIG1__CALIBRATION_MATRIX_DISABLE 0x40 +# define HOSTREG__CALCONFIG1__FORCE_PRECALIBRATION_NOISE_CHECK 0x80 +#define HOSTREG__CALCONFIG1_DEFVAL (HOSTREG__CALCONFIG1__BACKGROUND_COMP_ENABLE | HOSTREG__CALCONFIG1__NERD_COMP_ENABLE | HOSTREG__CALCONFIG1__TRACK_ERROR_COMP_ENABLE | HOSTREG__CALCONFIG1__TAP_COMP_ENABLE | HOSTREG__CALCONFIG1__PALM_ERROR_COMP_ENABLE) + +/*--------------------------------------------------------------------------*\ + PS2 Aux Control Register +\*--------------------------------------------------------------------------*/ +#define HOSTREG__PS2AUX_CTRL HostReg__8 +# define HOSTREG__PS2AUX_CTRL__CMD_PASSTHRU_ENABLE 0x01 +# define HOSTREG__PS2AUX_CTRL__SP_EXTENDED_MODE 0x02 +# define HOSTREG__PS2AUX_CTRL__GS_DISABLE 0x04 +# define HOSTREG__PS2AUX_CTRL__SP_DISABLE 0x08 +# define HOSTREG__PS2AUX_CTRL__GS_COORDINATE_DISABLE 0x10 +# define HOSTREG__PS2AUX_CTRL__SP_COORDINATE_DISABLE 0x20 +# define HOSTREG__PS2AUX_CTRL__DISABLE_AA00_DETECT 0x40 +# define HOSTREG__PS2AUX_CTRL__AUX_PRESENT 0x80 +#define HOSTREG__PR2AUX_CTRL_DEFVAL 0x00 + +/*--------------------------------------------------------------------------*\ + Sample Rate Value +\*--------------------------------------------------------------------------*/ +#define HOSTREG__SAMPLERATE HostReg__9 +# define HOSTREG__SAMPLERATE__10_SPS 0x0A +# define HOSTREG__SAMPLERATE__20_SPS 0x14 +# define HOSTREG__SAMPLERATE__40_SPS 0x28 +# define HOSTREG__SAMPLERATE__60_SPS 0x3C +# define HOSTREG__SAMPLERATE__80_SPS 0x50 +# define HOSTREG__SAMPLERATE__100_SPS 0x64 +# define HOSTREG__SAMPLERATE__200_SPS 0xC8 // 200sps not supported + // only for ps2 compatibility + // rate set to 100sps +#define HOSTREG__SAMPLERATE_DEFVAL HOSTREG__SAMPLERATE__100_SPS + +/*--------------------------------------------------------------------------*\ + Z Idle Value +\*--------------------------------------------------------------------------*/ +#define HOSTREG__ZIDLE HostReg__10 +#define HOSTREG__ZIDLE_DEFVAL 30 // 0x1E + +/*--------------------------------------------------------------------------*\ + Z Scaler Value +\*--------------------------------------------------------------------------*/ +#define HOSTREG__ZSCALER HostReg__11 +#define HOSTREG__ZSCALER_DEFVAL 8 // 0x08 + +/*--------------------------------------------------------------------------*\ + Sleep Interval Value +\*--------------------------------------------------------------------------*/ +#define HOSTREG__SLEEP_INTERVAL HostReg__12 +#define HOSTREG__SLEEP_INTERVAL_DEFVAL 73 // 0x49 + +/*--------------------------------------------------------------------------*\ + Sleep Delay Value +\*--------------------------------------------------------------------------*/ +#define HOSTREG__SLEEP_DELAY HostReg__13 +#define HOSTREG__SLEEP_DELAY_DEFVAL 39 // 0x27 + +/*--------------------------------------------------------------------------*\ + Dynamic EMI Bad Channel Count Thresholds +\*--------------------------------------------------------------------------*/ +#define HOSTREG__DYNAMIC_EMI_ADJUST_THRESHOLD HostReg__14 +#define HOSTREG__DYNAMIC_EMI_ADJUST_THRESHOLD_DEFVAL 66 // 0x42 + +/*--------------------------------------------------------------------------*\ + Packet Registers +\*--------------------------------------------------------------------------*/ +#define HOSTREG__PACKETBYTE_0 HostReg__18 +#define HOSTREG__PACKETBYTE_1 HostReg__19 +#define HOSTREG__PACKETBYTE_2 HostReg__20 +#define HOSTREG__PACKETBYTE_3 HostReg__21 +#define HOSTREG__PACKETBYTE_4 HostReg__22 +#define HOSTREG__PACKETBYTE_5 HostReg__23 + +/*--------------------------------------------------------------------------*\ + Port A GPIO Control +\*--------------------------------------------------------------------------*/ +#define HOSTREG__PORTA_GPIO_CTRL HostReg__24 +#define HOSTREG__PORTA_GPIO_CTRL_DEFVAL 0xFF + +/*--------------------------------------------------------------------------*\ + Port A GPIO Data +\*--------------------------------------------------------------------------*/ +#define HOSTREG__PORTA_GPIO_DATA HostReg__25 +#define HOSTREG__PORTA_GPIO_DATA_DEFVAL 0x00 + +/*--------------------------------------------------------------------------*\ + Port B GPIO Control And Data +\*--------------------------------------------------------------------------*/ + +#define HOSTREG__PORTB_GPIO_CTRL_DATA HostReg__26 +# define HOSTREG__PORTB_GPIO_DATA__PB0 0x01 +# define HOSTREG__PORTB_GPIO_DATA__PB1 0x02 +# define HOSTREG__PORTB_GPIO_DATA__PB2 0x04 +# define HOSTREG__PORTB_GPIO_CTRL__PB0 0x08 +# define HOSTREG__PORTB_GPIO_CTRL__PB1 0x10 +# define HOSTREG__PORTB_GPIO_CTRL__PB2 0x20 +# define HOSTREG__PORTB_GPIO_RSVD_0 0x40 +# define HOSTREG__PORTB_GPIO_READ1_WRITE0 0x80 +#define HOSTREG__PORTB_GPIO_CTRL_DATA_DEFVAL (HOSTREG__PORTB_GPIO_CTRL__PB0 | HOSTREG__PORTB_GPIO_CTRL__PB1 | HOSTREG__PORTB_GPIO_CTRL__PB2) + +/*--------------------------------------------------------------------------*\ + Extended Register Access +\*--------------------------------------------------------------------------*/ +#define HOSTREG__EXT_REG_AXS_VALUE HostReg__27 + +#define HOSTREG__EXT_REG_AXS_ADDR_HIGH HostReg__28 +#define HOSTREG__EXT_REG_AXS_ADDR_LOW HostReg__29 + +#define HOSTREG__EXT_REG_AXS_CTRL HostReg__30 +# define HOSTREG__EREG_AXS__READ 0x01 +# define HOSTREG__EREG_AXS__WRITE 0x02 +# define HOSTREG__EREG_AXS__INC_ADDR_READ 0x04 +# define HOSTREG__EREG_AXS__INC_ADDR_WRITE 0x08 +# define HOSTREG__EREG_AXS__RSVD_3 0x10 +# define HOSTREG__EREG_AXS__RSVD_2 0x20 +# define HOSTREG__EREG_AXS__RSVD_1 0x40 +# define HOSTREG__EREG_AXS__RSVD_0 0x80 + +#define HOSTREG__EXT_REG_AXS_VALUE_DEFVAL 0x00 +#define HOSTREG__EXT_REG_AXS_ADDR_HIGH_DEFVAL 0x00 +#define HOSTREG__EXT_REG_AXS_ADDR_LOW_DEFVAL 0x00 +#define HOSTREG__EXT_REG_AXS_CTRL_DEFVAL 0x00 + +/*--------------------------------------------------------------------------*\ + Product ID +\*--------------------------------------------------------------------------*/ +#define HOSTREG__PRODUCT_ID HostReg__31 + + + +//Some useful values +#define I2C_ADDRESS_DEFAULT 0x2A +#define FIRMWARE_ID 0x07 +#define FIRMWARE_VERSION 0x9D + +//Anymeas config options +//First setting is HostReg 5. This sets toggle frequency (EF) and gain. +//Gain is upper two bits (0xC0), frequency is lower 6 bits (0x3F) +#define AnyMeas_AccumBits_ElecFreq HostReg__5 +# define ADCCNFG_ELEC_FREQ 0x3F /* Bit 4, 3, 2, 1, 0 */ +# define ADCCNFG_EF_0 0x02 // 500,000Hz +# define ADCCNFG_EF_1 0x03 // 444,444Hz +# define ADCCNFG_EF_2 0x04 // 400,000Hz +# define ADCCNFG_EF_3 0x05 // 363,636Hz +# define ADCCNFG_EF_4 0x06 // 333,333Hz +# define ADCCNFG_EF_5 0x07 // 307,692Hz +# define ADCCNFG_EF_6 0x09 // 267,000Hz +# define ADCCNFG_EF_7 0x0B // 235,000Hz +# define ADCCNFG_ACCUMBITSSELECT 0xC0 /* Bit 7, 6 */ +# define ADCCNFG_ACCBITS_17_14_0 0x00 //This is about 2x gain +# define ADCCNFG_ACCBITS_17_15_1 0x40 //This is about 1.6x gain +# define ADCCNFG_ACCBITS_17_2__80 0x80 //This is about 1.3x gain +# define ADCCNFG_ACCBITS_17_2__C0 0xC0 //This is lowest gain +//Note, all frequencies above are based on default 500ns aperture. If aperture is shorter the frequencies will be faster and if aperture is longer the frequencies will be slower. + +//Next is HostReg 6. This sets the sample length. There are four possible settings to bit length. All other settings are not normally used and should be a 0. +#define AnyMeas_BitLength HostReg__6 +# define ADCCTRL_BIT_LENGTH 0x03 /* Bit 1, 0 */ +# define ADCCTRL_SAMPLES_32 0x00 //Note: this does not work. +# define ADCCTRL_SAMPLES_128 0x01 +# define ADCCTRL_SAMPLES_256 0x02 +# define ADCCTRL_SAMPLES_512 0x03 +# define ADCCTRL_ENABLE 0x20 /* Bit 5 */ +# define ADCCTRL_INT_FLAG 0x40 /* Bit 6 */ +# define ADCCTRL_START_BUSY 0x80 /* Bit 7 */ +//The smaller the sample length the faster the measurement but the lower the SNR. For high SNR requirements 512 sample length is recommended. Alternatively, multiple 128 or 256 length measurements could be averaged. + +//Next is HostReg 7. This sets the sense mux. Pinnacle has 2 sense lines, Sense N and Sense P1. There is also a Sense P2 but it is not bonded out, it is only internal. +//Signal on Sense N will be inverted from signal on Sense P1. Other than sign inversion, signal strength should be the same. +#define AnyMeas_ADC_MuxControl HostReg__7 +# define ADCMUXCTRL_SENSEP1GATE 0x01 //Enables Sense P1. Can be combined with Sense N input or exclusivly Sense P1 alone. +# define ADCMUXCTRL_SENSEP2GATE 0x02 //Not used. +# define ADCMUXCTRL_SENSENGATE 0x04 //Enables Sense N. Can be combined with Sense P inputs or exclusivly Sense N alone. +# define ADCMUXCTRL_REF0GATE 0x08 //This enables the RefCap0. This is a capacitor inside the chip that is roughly 0.25pF. It is also controlled with the toggle and polarity bits so those bits must be set properly as well in order to use it. +# define ADCMUXCTRL_REF1GATE 0x10 //This enables the RefCap1. This is a capacitor inside the chip that is roughly 0.5pF. It is also controlled with the toggle and polarity bits so those bits must be set properly as well in order to use it. +# define ADCMUXCTRL_OSCMEASEN 0x80 //this is a test mode for measuring the internal oscillator. It is for IC test only. + +//Next is HostReg 8. This contains various ADC config settings that are not likely to be used. +#define AnyMeas_ADC_Config2 HostReg__8 +# define ADCCNFG2_ADC_CLK_SELECT 0x01 /* Bit 0 */ //If 0 use the standard 8Mhz clock. If 1 use a divide by 2, 4Mhz clock. Only used if extra slow toggle frequencies are required. +# define ADCCNFG2_EMI_FLAG 0x02 /* Bit 1 */ //EMI flag threshold only used with internal FW. Not valid in anymeas mode. +# define ADCCNFG2_EMI_FLAG_THRESHOLD_0 0x04 /* Bit 2 */ //EMI flag threshold only used with internal FW. Not valid in anymeas mode. +# define ADCCNFG2_EMI_FLAG_THRESHOLD_1 0x08 /* Bit 3 */ //EMI flag threshold only used with internal FW. Not valid in anymeas mode. +# define ADCCNFG2_DSX2_EXTEND 0x10 /* Bit 4 */ //extend one signal on the receive. Could also be helpful in situations where sensor cap is extremely high. +# define ADCCNFG2_ETOGGLE_DELAY 0x20 /* Bit 5 */ //delay a bit before toggling electrodes. Could be helpful in situations where sensor cap is extremely high. + +//Next is HostReg 9. This sets the aperture length. Bottom 4 bits set the aperture width +#define AnyMeas_ADC_AWidth HostReg__9 +# define ADCAWIDTH_AWIDTHMASK 0x0F +# define ADCAWIDTH_APERTURE_OPEN 0x00 //does not work +# define ADCAWIDTH_APERTURE_125NS 0x01 //does not work +# define ADCAWIDTH_APERTURE_250NS 0x02 +# define ADCAWIDTH_APERTURE_375NS 0x03 +# define ADCAWIDTH_APERTURE_500NS 0x04 +# define ADCAWIDTH_APERTURE_625NS 0x05 +# define ADCAWIDTH_APERTURE_750NS 0x06 +# define ADCAWIDTH_APERTURE_875NS 0x07 +# define ADCAWIDTH_APERTURE_1000NS 0x08 +# define ADCAWIDTH_APERTURE_1125NS 0x09 +# define ADCAWIDTH_APERTURE_1250NS 0x0A +# define ADCAWIDTH_APERTURE_1375NS 0x0B +# define ADCAWIDTH_APERTURE_1500NS 0x0C +# define ADCAWIDTH_APERTURE_1625NS 0x0D +# define ADCAWIDTH_APERTURE_1750NS 0x0E +# define ADCAWIDTH_APERTURE_1875NS 0x0F +# define ADCAWIDTH_AWIDTHPLUSHALF 0x10 +# define ADCAWIDTH_AOPEN 0x20 +# define ADCAWIDTH_W2WAIT 0x40 + +//next two registers give the high and low bytes to the 16 bit address where Pinnacle will pull the measurement data. Normally these addresses are within the base 32 registers. +#define AnyMeas_pADCMeasInfoStart_High_Byte HostReg__10 +#define AnyMeas_pADCMeasInfoStart_Low_Byte HostReg__11 + +//Next is the measurement index, this sets the measurement state machine to the start and should be a 0 at start. +#define AnyMeas_MeasIndex HostReg__12 +# define ANYMEASSTATE_RESET_START 0x00 +# define ANYMEASSTATE_START_MEASUREMENT 0x01 +# define ANYMEASSTATE_WAIT_FOR_MEASUREMENT_AND_HOST 0x02 + +//next is the state itself of the measurement, should always be 0. +#define AnyMeas_State HostReg__13 + +//next is the number of measurements. Use 0x80 to repeat the single measurement or repeat a number of measurements. +//0x40 will turn the ADC off after measurements. This will result in longer startup time for a subsequent measurement, but lower idle power draw. +#define AnyMeas_Control_NumMeas HostReg__14 +# define ANYMEAS_CONTROL__NUM_MEAS_MASK 0x3F +# define ANYMEAS_CONTROL__ADC_POST_MEAS_PWR 0x40 +# define ANYMEAS_CONTROL__REPEAT 0x80 + +//These are not used +#define AnyMeas_pADCMeasInfo_High_Byte HostReg__15 +#define AnyMeas_pADCMeasInfo_Low_Byte HostReg__16 + +//16 bit result of measurement will be found in these two registers. +#define AnyMeas_Result_High_Byte HostReg__17 +#define AnyMeas_Result_Low_Byte HostReg__18 + +// ---------------- Extended Register Assignments ---------------------------- +/*--------------------------------------------------------------------------*\ + ADC Mux Control +\*--------------------------------------------------------------------------*/ +#define EXTREG__ADCMUX_CTRL 0x00EB +# define EXTREG__ADCMUX_CTRL__SNSP_ENABLE 0x01 +# define EXTREG__ADCMUX_CTRL__SNSN_ENABLE 0x04 + +/*--------------------------------------------------------------------------*\ + Timer Reload Registers +\*--------------------------------------------------------------------------*/ +#define EXTREG__PACKET_TIMER_RELOAD 0x019F +#define EXTREG__TRACK_TIMER_RELOAD 0x019E +// These two registers should have matching content. +# define EXTREG__TIMER_RELOAD__300_SPS 0x06 +# define EXTREG__TIMER_RELOAD__200_SPS 0x09 +# define EXTREG__TIMER_RELOAD__100_SPS 0x13 + +/*--------------------------------------------------------------------------*\ + Track ADC Config +\*--------------------------------------------------------------------------*/ +#define EXTREG__TRACK_ADCCONFIG 0x0187 +// ADC-attenuation settings (held in BIT_7 and BIT_6) +// 1X = most sensitive, 4X = least sensitive +# define EXTREG__TRACK_ADCCONFIG__ADC_ATTENUATE_MASK 0xC0 +# define EXTREG__TRACK_ADCCONFIG__ADC_ATTENUATE_1X 0x00 +# define EXTREG__TRACK_ADCCONFIG__ADC_ATTENUATE_2X 0x40 +# define EXTREG__TRACK_ADCCONFIG__ADC_ATTENUATE_3X 0x80 +# define EXTREG__TRACK_ADCCONFIG__ADC_ATTENUATE_4X 0xC0 +#define EXTREG__TRACK_ADCCONFIG_DEFVAL 0x4E + + +/*--------------------------------------------------------------------------*\ + Tune Edge Sensitivity +\*--------------------------------------------------------------------------*/ +// These registers are not detailed in any publically available documentation +// Names inferred from debug prints in https://github.com/cirque-corp/Cirque_Pinnacle_1CA027/blob/master/Circular_Trackpad +#define EXTREG__XAXIS_WIDEZMIN 0x0149 +#define EXTREG__YAXIS_WIDEZMIN 0x0168 +#define EXTREG__XAXIS_WIDEZMIN_DEFVAL 0x06 +#define EXTREG__YAXIS_WIDEZMIN_DEFVAL 0x05 + +// clang-format on diff --git a/drivers/sensors/cirque_pinnacle_spi.c b/drivers/sensors/cirque_pinnacle_spi.c index 34c77df07b..bd980fc863 100644 --- a/drivers/sensors/cirque_pinnacle_spi.c +++ b/drivers/sensors/cirque_pinnacle_spi.c @@ -25,7 +25,7 @@ void RAP_ReadBytes(uint8_t address, uint8_t* data, uint8_t count) { } } else { #ifdef CONSOLE_ENABLE - dprintf("error right touchpad\n"); + dprintf("error cirque_pinnacle spi_start read\n"); #endif touchpad_init = false; } @@ -43,7 +43,7 @@ void RAP_Write(uint8_t address, uint8_t data) { spi_write(data); } else { #ifdef CONSOLE_ENABLE - dprintf("error right touchpad\n"); + dprintf("error cirque_pinnacle spi_start write\n"); #endif touchpad_init = false; } diff --git a/drivers/sensors/paw3204.c b/drivers/sensors/paw3204.c new file mode 100644 index 0000000000..a13753dd6f --- /dev/null +++ b/drivers/sensors/paw3204.c @@ -0,0 +1,172 @@ +/* Copyright 2021 Gompa (@Gompa) + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +// https://github.com/shinoaliceKabocha/choco60_track/tree/master/keymaps/default + +#include "paw3204.h" +#include "wait.h" +#include "debug.h" +#include "gpio.h" + +#define REG_PID1 0x00 +#define REG_PID2 0x01 +#define REG_STAT 0x02 +#define REG_X 0x03 +#define REG_Y 0x04 + +#define REG_SETUP 0x06 +#define REG_IMGQUAL 0x07 +#define REG_IMGREC 0x0E +#define REG_IMGTRASH 0x0D + +#define constrain(amt, low, high) ((amt) < (low) ? (low) : ((amt) > (high) ? (high) : (amt))) + +// CPI values +enum cpi_values { + CPI400, // 0b000 + CPI500, // 0b001 + CPI600, // 0b010 + CPI800, // 0b011 + CPI1000, // 0b100 + CPI1200, // 0b101 + CPI1600, // 0b110 +}; + +uint8_t paw3204_serial_read(void); +void paw3204_serial_write(uint8_t reg_addr); +uint8_t paw3204_read_reg(uint8_t reg_addr); +void paw3204_write_reg(uint8_t reg_addr, uint8_t data); + +void paw3204_init(void) { + setPinOutput(PAW3204_SCLK_PIN); // setclockpin to output + setPinInputHigh(PAW3204_SDIO_PIN); // set datapin input high + + paw3204_write_reg(REG_SETUP, 0x86); // reset sensor and set 1600cpi + wait_us(5); + + paw3204_read_reg(0x00); // read id + paw3204_read_reg(0x01); // read id2 + // PAW3204_write_reg(REG_SETUP,0x06); // dont reset sensor and set cpi 1600 + paw3204_write_reg(REG_IMGTRASH, 0x32); // write image trashhold +} + +uint8_t paw3204_serial_read(void) { + setPinInput(PAW3204_SDIO_PIN); + uint8_t byte = 0; + + for (uint8_t i = 0; i < 8; ++i) { + writePinLow(PAW3204_SCLK_PIN); + wait_us(1); + + byte = (byte << 1) | readPin(PAW3204_SDIO_PIN); + + writePinHigh(PAW3204_SCLK_PIN); + wait_us(1); + } + + return byte; +} + +void paw3204_serial_write(uint8_t data) { + writePinLow(PAW3204_SDIO_PIN); + setPinOutput(PAW3204_SDIO_PIN); + + for (int8_t b = 7; b >= 0; b--) { + writePinLow(PAW3204_SCLK_PIN); + if (data & (1 << b)) { + writePinHigh(PAW3204_SDIO_PIN); + } else { + writePinLow(PAW3204_SDIO_PIN); + } + writePinHigh(PAW3204_SCLK_PIN); + } + + wait_us(4); +} + +report_paw3204_t paw3204_read(void) { + report_paw3204_t data = {0}; + + data.isMotion = paw3204_read_reg(REG_STAT) & (1 << 7); // check for motion only (bit 7 in field) + data.x = (int8_t)paw3204_read_reg(REG_X); + data.y = (int8_t)paw3204_read_reg(REG_Y); + + return data; +} + +void paw3204_write_reg(uint8_t reg_addr, uint8_t data) { + paw3204_serial_write(0b10000000 | reg_addr); + paw3204_serial_write(data); +} + +uint8_t paw3204_read_reg(uint8_t reg_addr) { + paw3204_serial_write(reg_addr); + wait_us(5); + return paw3204_serial_read(); +} + +void paw3204_set_cpi(uint16_t cpi) { + uint8_t cpival = CPI1000; + if (cpi <= 450) { + cpival = CPI400; + } else if (cpi <= 550) { + cpival = CPI500; + } else if (cpi <= 700) { + cpival = CPI600; + } else if (cpi <= 900) { + cpival = CPI800; + } else if (cpi <= 1100) { + cpival = CPI1000; + } else if (cpi <= 1400) { + cpival = CPI1200; + } else if (cpi > 1400) { + cpival = CPI1600; + } + paw3204_write_reg(REG_SETUP, cpival); +} + +uint16_t paw3204_get_cpi(void) { + uint16_t cpival = 1000; + + switch (paw3204_read_reg(REG_SETUP) & 0b111) { + case CPI400: + cpival = 400; + break; + case CPI500: + cpival = 500; + break; + case CPI600: + cpival = 600; + break; + case CPI800: + cpival = 800; + break; + case CPI1000: + cpival = 1000; + break; + case CPI1200: + cpival = 1200; + break; + case CPI1600: + cpival = 1600; + break; + } + return cpival; +} + +uint8_t read_pid_paw3204(void) { + return paw3204_read_reg(REG_PID1); +} diff --git a/drivers/sensors/paw3204.h b/drivers/sensors/paw3204.h new file mode 100644 index 0000000000..7f487d90dc --- /dev/null +++ b/drivers/sensors/paw3204.h @@ -0,0 +1,76 @@ +/* Copyright 2021 Gompa (@Gompa) + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#pragma once + +#include <stdint.h> +#include <stdbool.h> + +#ifndef PAW3204_SCLK_PIN +# ifdef POINTING_DEVICE_SCLK_PIN +# define PAW3204_SCLK_PIN POINTING_DEVICE_SCLK_PIN +# else +# error "No clock pin defined -- missing POINTING_DEVICE_SCLK_PIN or PAW3204_SCLK_PIN" +# endif +#endif +#ifndef PAW3204_SDIO_PIN +# ifdef POINTING_DEVICE_SDIO_PIN +# define PAW3204_SDIO_PIN POINTING_DEVICE_SDIO_PIN +# else +# error "No data pin defined -- missing POINTING_DEVICE_SDIO_PIN or PAW3204_SDIO_PIN" +# endif +#endif + +typedef struct { + int16_t x; + int16_t y; + bool isMotion; +} report_paw3204_t; + +/** + * @brief Initializes the sensor so it is in a working state and ready to + * be polled for data. + * + * @return true Initialization was a success + * @return false Initialization failed, do not proceed operation + */ +void paw3204_init(void); + +/** + * @brief Reads and clears the current delta, and motion register values on the + * given sensor. + * + * @return pmw33xx_report_t Current values of the sensor, if errors occurred all + * fields are set to zero + */ + +report_paw3204_t paw3204_read(void); +/** + * @brief Sets the given CPI value the sensor. CPI is often refereed to + * as the sensors sensitivity. Values outside of the allowed range are + * constrained into legal values. + * + * @param cpi CPI value to set + */ +void paw3204_set_cpi(uint16_t cpi); + +/** + * @brief Gets the currently set CPI value from the sensor. CPI is often + * refereed to as the sensors sensitivity. + * + * @return uint16_t Current CPI value of the sensor + */ +uint16_t paw3204_get_cpi(void); diff --git a/drivers/sensors/pimoroni_trackball.c b/drivers/sensors/pimoroni_trackball.c index 333e017a06..88a351316b 100644 --- a/drivers/sensors/pimoroni_trackball.c +++ b/drivers/sensors/pimoroni_trackball.c @@ -95,16 +95,3 @@ int16_t pimoroni_trackball_get_offsets(uint8_t negative_dir, uint8_t positive_di uint16_t magnitude = (scale * offset * offset * precision) >> 7; return isnegative ? -(int16_t)(magnitude) : (int16_t)(magnitude); } - -void pimoroni_trackball_adapt_values(int8_t* mouse, int16_t* offset) { - if (*offset > 127) { - *mouse = 127; - *offset -= 127; - } else if (*offset < -127) { - *mouse = -127; - *offset += 127; - } else { - *mouse = *offset; - *offset = 0; - } -} diff --git a/drivers/sensors/pimoroni_trackball.h b/drivers/sensors/pimoroni_trackball.h index e20ee748a7..749f381bbd 100644 --- a/drivers/sensors/pimoroni_trackball.h +++ b/drivers/sensors/pimoroni_trackball.h @@ -52,7 +52,6 @@ typedef struct { void pimoroni_trackball_device_init(void); void pimoroni_trackball_set_rgbw(uint8_t red, uint8_t green, uint8_t blue, uint8_t white); int16_t pimoroni_trackball_get_offsets(uint8_t negative_dir, uint8_t positive_dir, uint8_t scale); -void pimoroni_trackball_adapt_values(int8_t* mouse, int16_t* offset); uint16_t pimoroni_trackball_get_cpi(void); void pimoroni_trackball_set_cpi(uint16_t cpi); i2c_status_t read_pimoroni_trackball(pimoroni_data_t* data); diff --git a/drivers/sensors/pmw3360.c b/drivers/sensors/pmw3360.c index 5f4d17a3f0..2c6d91d588 100644 --- a/drivers/sensors/pmw3360.c +++ b/drivers/sensors/pmw3360.c @@ -1,291 +1,294 @@ -/* Copyright 2020 Christopher Courtney, aka Drashna Jael're (@drashna) <drashna@live.com> - * Copyright 2019 Sunjun Kim - * Copyright 2020 Ploopy Corporation - * Copyright 2022 Ulrich Spörlein - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#include "spi_master.h" -#include "pmw3360.h" -#include "wait.h" -#include "debug.h" -#include "print.h" -#include "pmw3360_firmware.h" - -// Registers -// clang-format off -#define REG_Product_ID 0x00 -#define REG_Revision_ID 0x01 -#define REG_Motion 0x02 -#define REG_Delta_X_L 0x03 -#define REG_Delta_X_H 0x04 -#define REG_Delta_Y_L 0x05 -#define REG_Delta_Y_H 0x06 -#define REG_SQUAL 0x07 -#define REG_Raw_Data_Sum 0x08 -#define REG_Maximum_Raw_data 0x09 -#define REG_Minimum_Raw_data 0x0a -#define REG_Shutter_Lower 0x0b -#define REG_Shutter_Upper 0x0c -#define REG_Control 0x0d -#define REG_Config1 0x0f -#define REG_Config2 0x10 -#define REG_Angle_Tune 0x11 -#define REG_Frame_Capture 0x12 -#define REG_SROM_Enable 0x13 -#define REG_Run_Downshift 0x14 -#define REG_Rest1_Rate_Lower 0x15 -#define REG_Rest1_Rate_Upper 0x16 -#define REG_Rest1_Downshift 0x17 -#define REG_Rest2_Rate_Lower 0x18 -#define REG_Rest2_Rate_Upper 0x19 -#define REG_Rest2_Downshift 0x1a -#define REG_Rest3_Rate_Lower 0x1b -#define REG_Rest3_Rate_Upper 0x1c -#define REG_Observation 0x24 -#define REG_Data_Out_Lower 0x25 -#define REG_Data_Out_Upper 0x26 -#define REG_Raw_Data_Dump 0x29 -#define REG_SROM_ID 0x2a -#define REG_Min_SQ_Run 0x2b -#define REG_Raw_Data_Threshold 0x2c -#define REG_Config5 0x2f -#define REG_Power_Up_Reset 0x3a -#define REG_Shutdown 0x3b -#define REG_Inverse_Product_ID 0x3f -#define REG_LiftCutoff_Tune3 0x41 -#define REG_Angle_Snap 0x42 -#define REG_LiftCutoff_Tune1 0x4a -#define REG_Motion_Burst 0x50 -#define REG_LiftCutoff_Tune_Timeout 0x58 -#define REG_LiftCutoff_Tune_Min_Length 0x5a -#define REG_SROM_Load_Burst 0x62 -#define REG_Lift_Config 0x63 -#define REG_Raw_Data_Burst 0x64 -#define REG_LiftCutoff_Tune2 0x65 - -#define CPI_STEP 100 -// clang-format on - -// limits to 0--119, resulting in a CPI range of 100 -- 12000 (as only steps of 100 are possible). -#ifndef MAX_CPI -# define MAX_CPI 0x77 -#endif - -static const pin_t pins[] = PMW3360_CS_PINS; -#define NUMBER_OF_SENSORS (sizeof(pins) / sizeof(pin_t)) - -// per-sensor driver state -static bool _inBurst[NUMBER_OF_SENSORS] = {0}; - -#ifdef CONSOLE_ENABLE -void print_byte(uint8_t byte) { - dprintf("%c%c%c%c%c%c%c%c|", (byte & 0x80 ? '1' : '0'), (byte & 0x40 ? '1' : '0'), (byte & 0x20 ? '1' : '0'), (byte & 0x10 ? '1' : '0'), (byte & 0x08 ? '1' : '0'), (byte & 0x04 ? '1' : '0'), (byte & 0x02 ? '1' : '0'), (byte & 0x01 ? '1' : '0')); -} -#endif -#define constrain(amt, low, high) ((amt) < (low) ? (low) : ((amt) > (high) ? (high) : (amt))) - -bool pmw3360_spi_start(int8_t index) { - bool status = spi_start(pins[index], PMW3360_SPI_LSBFIRST, PMW3360_SPI_MODE, PMW3360_SPI_DIVISOR); - // tNCS-SCLK, 120ns - wait_us(1); - return status; -} - -spi_status_t pmw3360_write(int8_t index, uint8_t reg_addr, uint8_t data) { - pmw3360_spi_start(index); - - if (reg_addr != REG_Motion_Burst) { - _inBurst[index] = false; - } - - // send address of the register, with MSBit = 1 to indicate it's a write - spi_status_t status = spi_write(reg_addr | 0x80); - status = spi_write(data); - - // tSCLK-NCS for write operation is 35us - wait_us(35); - spi_stop(); - - // tSWW/tSWR (=180us) minus tSCLK-NCS. Could be shortened, but it looks like a safe lower bound - wait_us(145); - return status; -} - -uint8_t pmw3360_read(int8_t index, uint8_t reg_addr) { - pmw3360_spi_start(index); - // send adress of the register, with MSBit = 0 to indicate it's a read - spi_write(reg_addr & 0x7f); - // tSRAD (=160us) - wait_us(160); - uint8_t data = spi_read(); - - // tSCLK-NCS for read operation is 120ns - wait_us(1); - spi_stop(); - - // tSRW/tSRR (=20us) minus tSCLK-NCS - wait_us(19); - return data; -} - -bool pmw3360_check_signature(int8_t index) { - uint8_t pid = pmw3360_read(index, REG_Product_ID); - uint8_t iv_pid = pmw3360_read(index, REG_Inverse_Product_ID); - uint8_t SROM_ver = pmw3360_read(index, REG_SROM_ID); - return (pid == firmware_signature[0] && iv_pid == firmware_signature[1] && SROM_ver == firmware_signature[2]); // signature for SROM 0x04 -} - -void pmw3360_upload_firmware(int8_t index) { - // Datasheet claims we need to disable REST mode first, but during startup - // it's already disabled and we're not turning it on ... - // pmw3360_write(index, REG_Config2, 0x00); // disable REST mode - pmw3360_write(index, REG_SROM_Enable, 0x1d); - - wait_ms(10); - - pmw3360_write(index, REG_SROM_Enable, 0x18); - - pmw3360_spi_start(index); - spi_write(REG_SROM_Load_Burst | 0x80); - wait_us(15); - - for (uint16_t i = 0; i < FIRMWARE_LENGTH; i++) { - spi_write(pgm_read_byte(firmware_data + i)); -#ifndef PMW3360_FIRMWARE_UPLOAD_FAST - wait_us(15); -#endif +// Copyright 2022 Stefan Kerkmann (KarlK90) +// Copyright 2022 Ulrich Spörlein (@uqs) +// Copyright 2021 Alabastard (@Alabastard-64) +// Copyright 2020 Christopher Courtney, aka Drashna Jael're (@drashna) <drashna@live.com> +// Copyright 2019 Sunjun Kim +// Copyright 2020 Ploopy Corporation +// SPDX-License-Identifier: GPL-2.0-or-later + +#include "pmw33xx_common.h" +#include "progmem.h" + +extern const size_t pmw33xx_number_of_sensors; + +uint16_t pmw33xx_get_cpi(uint8_t sensor) { + if (sensor >= pmw33xx_number_of_sensors) { + return 0; } - wait_us(200); - pmw3360_read(index, REG_SROM_ID); - pmw3360_write(index, REG_Config2, 0x00); + uint8_t cpival = pmw33xx_read(sensor, REG_Config1); + return (uint16_t)((cpival + 1) & 0xFF) * PMW33XX_CPI_STEP; } -bool pmw3360_init(int8_t index) { - if (index >= NUMBER_OF_SENSORS) { - return false; +void pmw33xx_set_cpi(uint8_t sensor, uint16_t cpi) { + if (sensor >= pmw33xx_number_of_sensors) { + return; } - spi_init(); - // power up, need to first drive NCS high then low. - // the datasheet does not say for how long, 40us works well in practice. - pmw3360_spi_start(index); - wait_us(40); - spi_stop(); - wait_us(40); - pmw3360_write(index, REG_Power_Up_Reset, 0x5a); - wait_ms(50); - - // read registers and discard - pmw3360_read(index, REG_Motion); - pmw3360_read(index, REG_Delta_X_L); - pmw3360_read(index, REG_Delta_X_H); - pmw3360_read(index, REG_Delta_Y_L); - pmw3360_read(index, REG_Delta_Y_H); - - pmw3360_upload_firmware(index); - - spi_stop(); - - wait_ms(10); - pmw3360_set_cpi(PMW3360_CPI); - - wait_ms(1); - - pmw3360_write(index, REG_Config2, 0x00); - - pmw3360_write(index, REG_Angle_Tune, constrain(ROTATIONAL_TRANSFORM_ANGLE, -127, 127)); - - pmw3360_write(index, REG_Lift_Config, PMW3360_LIFTOFF_DISTANCE); - - bool init_success = pmw3360_check_signature(index); -#ifdef CONSOLE_ENABLE - if (init_success) { - dprintf("pmw3360 signature verified"); - } else { - dprintf("pmw3360 signature verification failed!"); - } -#endif - - return init_success; + uint8_t cpival = CONSTRAIN((cpi / PMW33XX_CPI_STEP) - 1, 0, (PMW33XX_CPI_MAX / PMW33XX_CPI_STEP) - 1U); + pmw33xx_write(sensor, REG_Config1, cpival); } -// Only support reading the value from sensor #0, no one is using this anyway. -uint16_t pmw3360_get_cpi(void) { - uint8_t cpival = pmw3360_read(0, REG_Config1); - return (uint16_t)((cpival + 1) & 0xFF) * CPI_STEP; -} - -// Write same CPI to all sensors. -void pmw3360_set_cpi(uint16_t cpi) { - uint8_t cpival = constrain((cpi / CPI_STEP) - 1, 0, MAX_CPI); - for (size_t i = 0; i < NUMBER_OF_SENSORS; i++) { - pmw3360_write(i, REG_Config1, cpival); - } -} +// PID, Inverse PID, SROM version +const uint8_t pmw33xx_firmware_signature[3] PROGMEM = {0x42, 0xBD, 0x04}; -report_pmw3360_t pmw3360_read_burst(int8_t index) { - report_pmw3360_t report = {0}; - if (index >= NUMBER_OF_SENSORS) { - return report; - } - - if (!_inBurst[index]) { -#ifdef CONSOLE_ENABLE - dprintf("burst on for index %d", index); -#endif - pmw3360_write(index, REG_Motion_Burst, 0x00); - _inBurst[index] = true; - } - - pmw3360_spi_start(index); - spi_write(REG_Motion_Burst); - wait_us(35); // waits for tSRAD_MOTBR - - report.motion = spi_read(); - spi_read(); // skip Observation - // delta registers - report.dx = spi_read(); - report.mdx = spi_read(); - report.dy = spi_read(); - report.mdy = spi_read(); - - if (report.motion & 0b111) { // panic recovery, sometimes burst mode works weird. - _inBurst[index] = false; - } - - spi_stop(); - -#ifdef CONSOLE_ENABLE - if (debug_mouse) { - print_byte(report.motion); - print_byte(report.dx); - print_byte(report.mdx); - print_byte(report.dy); - print_byte(report.mdy); - dprintf("\n"); - } -#endif - - report.isMotion = (report.motion & 0x80) != 0; - report.isOnSurface = (report.motion & 0x08) == 0; - report.dx |= (report.mdx << 8); - report.dx = report.dx * -1; - report.dy |= (report.mdy << 8); - report.dy = report.dy * -1; - - return report; -} +// Firmware Blob for PMW3360 +// clang-format off +const uint8_t pmw33xx_firmware_data[PMW33XX_FIRMWARE_LENGTH] PROGMEM = { + 0x01, 0x04, 0x8E, 0x96, 0x6E, 0x77, 0x3E, 0xFE, 0x7E, 0x5F, 0x1D, 0xB8, 0xF2, 0x66, 0x4E, 0xFF, + 0x5D, 0x19, 0xB0, 0xC2, 0x04, 0x69, 0x54, 0x2A, 0xD6, 0x2E, 0xBF, 0xDD, 0x19, 0xB0, 0xC3, 0xE5, + 0x29, 0xB1, 0xE0, 0x23, 0xA5, 0xA9, 0xB1, 0xC1, 0x00, 0x82, 0x67, 0x4C, 0x1A, 0x97, 0x8D, 0x79, + 0x51, 0x20, 0xC7, 0x06, 0x8E, 0x7C, 0x7C, 0x7A, 0x76, 0x4F, 0xFD, 0x59, 0x30, 0xE2, 0x46, 0x0E, + 0x9E, 0xBE, 0xDF, 0x1D, 0x99, 0x91, 0xA0, 0xA5, 0xA1, 0xA9, 0xD0, 0x22, 0xC6, 0xEF, 0x5C, 0x1B, + 0x95, 0x89, 0x90, 0xA2, 0xA7, 0xCC, 0xFB, 0x55, 0x28, 0xB3, 0xE4, 0x4A, 0xF7, 0x6C, 0x3B, 0xF4, + 0x6A, 0x56, 0x2E, 0xDE, 0x1F, 0x9D, 0xB8, 0xD3, 0x05, 0x88, 0x92, 0xA6, 0xCE, 0x1E, 0xBE, 0xDF, + 0x1D, 0x99, 0xB0, 0xE2, 0x46, 0xEF, 0x5C, 0x07, 0x11, 0x5D, 0x98, 0x0B, 0x9D, 0x94, 0x97, 0xEE, + 0x4E, 0x45, 0x33, 0x6B, 0x44, 0xC7, 0x29, 0x56, 0x27, 0x30, 0xC6, 0xA7, 0xD5, 0xF2, 0x56, 0xDF, + 0xB4, 0x38, 0x62, 0xCB, 0xA0, 0xB6, 0xE3, 0x0F, 0x84, 0x06, 0x24, 0x05, 0x65, 0x6F, 0x76, 0x89, + 0xB5, 0x77, 0x41, 0x27, 0x82, 0x66, 0x65, 0x82, 0xCC, 0xD5, 0xE6, 0x20, 0xD5, 0x27, 0x17, 0xC5, + 0xF8, 0x03, 0x23, 0x7C, 0x5F, 0x64, 0xA5, 0x1D, 0xC1, 0xD6, 0x36, 0xCB, 0x4C, 0xD4, 0xDB, 0x66, + 0xD7, 0x8B, 0xB1, 0x99, 0x7E, 0x6F, 0x4C, 0x36, 0x40, 0x06, 0xD6, 0xEB, 0xD7, 0xA2, 0xE4, 0xF4, + 0x95, 0x51, 0x5A, 0x54, 0x96, 0xD5, 0x53, 0x44, 0xD7, 0x8C, 0xE0, 0xB9, 0x40, 0x68, 0xD2, 0x18, + 0xE9, 0xDD, 0x9A, 0x23, 0x92, 0x48, 0xEE, 0x7F, 0x43, 0xAF, 0xEA, 0x77, 0x38, 0x84, 0x8C, 0x0A, + 0x72, 0xAF, 0x69, 0xF8, 0xDD, 0xF1, 0x24, 0x83, 0xA3, 0xF8, 0x4A, 0xBF, 0xF5, 0x94, 0x13, 0xDB, + 0xBB, 0xD8, 0xB4, 0xB3, 0xA0, 0xFB, 0x45, 0x50, 0x60, 0x30, 0x59, 0x12, 0x31, 0x71, 0xA2, 0xD3, + 0x13, 0xE7, 0xFA, 0xE7, 0xCE, 0x0F, 0x63, 0x15, 0x0B, 0x6B, 0x94, 0xBB, 0x37, 0x83, 0x26, 0x05, + 0x9D, 0xFB, 0x46, 0x92, 0xFC, 0x0A, 0x15, 0xD1, 0x0D, 0x73, 0x92, 0xD6, 0x8C, 0x1B, 0x8C, 0xB8, + 0x55, 0x8A, 0xCE, 0xBD, 0xFE, 0x8E, 0xFC, 0xED, 0x09, 0x12, 0x83, 0x91, 0x82, 0x51, 0x31, 0x23, + 0xFB, 0xB4, 0x0C, 0x76, 0xAD, 0x7C, 0xD9, 0xB4, 0x4B, 0xB2, 0x67, 0x14, 0x09, 0x9C, 0x7F, 0x0C, + 0x18, 0xBA, 0x3B, 0xD6, 0x8E, 0x14, 0x2A, 0xE4, 0x1B, 0x52, 0x9F, 0x2B, 0x7D, 0xE1, 0xFB, 0x6A, + 0x33, 0x02, 0xFA, 0xAC, 0x5A, 0xF2, 0x3E, 0x88, 0x7E, 0xAE, 0xD1, 0xF3, 0x78, 0xE8, 0x05, 0xD1, + 0xE3, 0xDC, 0x21, 0xF6, 0xE1, 0x9A, 0xBD, 0x17, 0x0E, 0xD9, 0x46, 0x9B, 0x88, 0x03, 0xEA, 0xF6, + 0x66, 0xBE, 0x0E, 0x1B, 0x50, 0x49, 0x96, 0x40, 0x97, 0xF1, 0xF1, 0xE4, 0x80, 0xA6, 0x6E, 0xE8, + 0x77, 0x34, 0xBF, 0x29, 0x40, 0x44, 0xC2, 0xFF, 0x4E, 0x98, 0xD3, 0x9C, 0xA3, 0x32, 0x2B, 0x76, + 0x51, 0x04, 0x09, 0xE7, 0xA9, 0xD1, 0xA6, 0x32, 0xB1, 0x23, 0x53, 0xE2, 0x47, 0xAB, 0xD6, 0xF5, + 0x69, 0x5C, 0x3E, 0x5F, 0xFA, 0xAE, 0x45, 0x20, 0xE5, 0xD2, 0x44, 0xFF, 0x39, 0x32, 0x6D, 0xFD, + 0x27, 0x57, 0x5C, 0xFD, 0xF0, 0xDE, 0xC1, 0xB5, 0x99, 0xE5, 0xF5, 0x1C, 0x77, 0x01, 0x75, 0xC5, + 0x6D, 0x58, 0x92, 0xF2, 0xB2, 0x47, 0x00, 0x01, 0x26, 0x96, 0x7A, 0x30, 0xFF, 0xB7, 0xF0, 0xEF, + 0x77, 0xC1, 0x8A, 0x5D, 0xDC, 0xC0, 0xD1, 0x29, 0x30, 0x1E, 0x77, 0x38, 0x7A, 0x94, 0xF1, 0xB8, + 0x7A, 0x7E, 0xEF, 0xA4, 0xD1, 0xAC, 0x31, 0x4A, 0xF2, 0x5D, 0x64, 0x3D, 0xB2, 0xE2, 0xF0, 0x08, + 0x99, 0xFC, 0x70, 0xEE, 0x24, 0xA7, 0x7E, 0xEE, 0x1E, 0x20, 0x69, 0x7D, 0x44, 0xBF, 0x87, 0x42, + 0xDF, 0x88, 0x3B, 0x0C, 0xDA, 0x42, 0xC9, 0x04, 0xF9, 0x45, 0x50, 0xFC, 0x83, 0x8F, 0x11, 0x6A, + 0x72, 0xBC, 0x99, 0x95, 0xF0, 0xAC, 0x3D, 0xA7, 0x3B, 0xCD, 0x1C, 0xE2, 0x88, 0x79, 0x37, 0x11, + 0x5F, 0x39, 0x89, 0x95, 0x0A, 0x16, 0x84, 0x7A, 0xF6, 0x8A, 0xA4, 0x28, 0xE4, 0xED, 0x83, 0x80, + 0x3B, 0xB1, 0x23, 0xA5, 0x03, 0x10, 0xF4, 0x66, 0xEA, 0xBB, 0x0C, 0x0F, 0xC5, 0xEC, 0x6C, 0x69, + 0xC5, 0xD3, 0x24, 0xAB, 0xD4, 0x2A, 0xB7, 0x99, 0x88, 0x76, 0x08, 0xA0, 0xA8, 0x95, 0x7C, 0xD8, + 0x38, 0x6D, 0xCD, 0x59, 0x02, 0x51, 0x4B, 0xF1, 0xB5, 0x2B, 0x50, 0xE3, 0xB6, 0xBD, 0xD0, 0x72, + 0xCF, 0x9E, 0xFD, 0x6E, 0xBB, 0x44, 0xC8, 0x24, 0x8A, 0x77, 0x18, 0x8A, 0x13, 0x06, 0xEF, 0x97, + 0x7D, 0xFA, 0x81, 0xF0, 0x31, 0xE6, 0xFA, 0x77, 0xED, 0x31, 0x06, 0x31, 0x5B, 0x54, 0x8A, 0x9F, + 0x30, 0x68, 0xDB, 0xE2, 0x40, 0xF8, 0x4E, 0x73, 0xFA, 0xAB, 0x74, 0x8B, 0x10, 0x58, 0x13, 0xDC, + 0xD2, 0xE6, 0x78, 0xD1, 0x32, 0x2E, 0x8A, 0x9F, 0x2C, 0x58, 0x06, 0x48, 0x27, 0xC5, 0xA9, 0x5E, + 0x81, 0x47, 0x89, 0x46, 0x21, 0x91, 0x03, 0x70, 0xA4, 0x3E, 0x88, 0x9C, 0xDA, 0x33, 0x0A, 0xCE, + 0xBC, 0x8B, 0x8E, 0xCF, 0x9F, 0xD3, 0x71, 0x80, 0x43, 0xCF, 0x6B, 0xA9, 0x51, 0x83, 0x76, 0x30, + 0x82, 0xC5, 0x6A, 0x85, 0x39, 0x11, 0x50, 0x1A, 0x82, 0xDC, 0x1E, 0x1C, 0xD5, 0x7D, 0xA9, 0x71, + 0x99, 0x33, 0x47, 0x19, 0x97, 0xB3, 0x5A, 0xB1, 0xDF, 0xED, 0xA4, 0xF2, 0xE6, 0x26, 0x84, 0xA2, + 0x28, 0x9A, 0x9E, 0xDF, 0xA6, 0x6A, 0xF4, 0xD6, 0xFC, 0x2E, 0x5B, 0x9D, 0x1A, 0x2A, 0x27, 0x68, + 0xFB, 0xC1, 0x83, 0x21, 0x4B, 0x90, 0xE0, 0x36, 0xDD, 0x5B, 0x31, 0x42, 0x55, 0xA0, 0x13, 0xF7, + 0xD0, 0x89, 0x53, 0x71, 0x99, 0x57, 0x09, 0x29, 0xC5, 0xF3, 0x21, 0xF8, 0x37, 0x2F, 0x40, 0xF3, + 0xD4, 0xAF, 0x16, 0x08, 0x36, 0x02, 0xFC, 0x77, 0xC5, 0x8B, 0x04, 0x90, 0x56, 0xB9, 0xC9, 0x67, + 0x9A, 0x99, 0xE8, 0x00, 0xD3, 0x86, 0xFF, 0x97, 0x2D, 0x08, 0xE9, 0xB7, 0xB3, 0x91, 0xBC, 0xDF, + 0x45, 0xC6, 0xED, 0x0F, 0x8C, 0x4C, 0x1E, 0xE6, 0x5B, 0x6E, 0x38, 0x30, 0xE4, 0xAA, 0xE3, 0x95, + 0xDE, 0xB9, 0xE4, 0x9A, 0xF5, 0xB2, 0x55, 0x9A, 0x87, 0x9B, 0xF6, 0x6A, 0xB2, 0xF2, 0x77, 0x9A, + 0x31, 0xF4, 0x7A, 0x31, 0xD1, 0x1D, 0x04, 0xC0, 0x7C, 0x32, 0xA2, 0x9E, 0x9A, 0xF5, 0x62, 0xF8, + 0x27, 0x8D, 0xBF, 0x51, 0xFF, 0xD3, 0xDF, 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Ploopy Corporation - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +// Copyright 2022 Stefan Kerkmann (KarlK90) +// Copyright 2022 Ulrich Spörlein (@uqs) +// Copyright 2020 Christopher Courtney, aka Drashna Jael're (@drashna) <drashna@live.com> +// Copyright 2019 Sunjun Kim +// Copyright 2020 Ploopy Corporation +// SPDX-License-Identifier: GPL-2.0-or-later #pragma once #include <stdint.h> -#ifndef PMW3360_CPI -# define PMW3360_CPI 1600 +#if !defined(PMW33XX_CPI) +# define PMW33XX_CPI 1600U #endif -#ifndef PMW3360_CLOCK_SPEED -# define PMW3360_CLOCK_SPEED 2000000 -#endif - -#ifndef PMW3360_SPI_LSBFIRST -# define PMW3360_SPI_LSBFIRST false -#endif - -#ifndef PMW3360_SPI_MODE -# define PMW3360_SPI_MODE 3 -#endif - -#ifndef PMW3360_SPI_DIVISOR -# ifdef __AVR__ -# define PMW3360_SPI_DIVISOR (F_CPU / PMW3360_CLOCK_SPEED) -# else -# define PMW3360_SPI_DIVISOR 64 -# endif -#endif - -#ifndef PMW3360_LIFTOFF_DISTANCE -# define PMW3360_LIFTOFF_DISTANCE 0x02 -#endif - -#ifndef ROTATIONAL_TRANSFORM_ANGLE -# define ROTATIONAL_TRANSFORM_ANGLE 0x00 -#endif - -// Support single and plural spellings -#ifndef PMW3360_CS_PINS -# ifndef PMW3360_CS_PIN -# error "No chip select pin defined -- missing PMW3360_CS_PIN or PMW3360_CS_PINS" -# else -# define PMW3360_CS_PINS \ - { PMW3360_CS_PIN } -# endif -#endif +#define PMW33XX_CPI_STEP 100 +#define PMW33XX_CPI_MIN 100 +#define PMW33XX_CPI_MAX 12000 -typedef struct { - int8_t motion; - bool isMotion; // True if a motion is detected. - bool isOnSurface; // True when a chip is on a surface - int16_t dx; // displacement on x directions. Unit: Count. (CPI * Count = Inch value) - int8_t mdx; - int16_t dy; // displacement on y directions. - int8_t mdy; -} report_pmw3360_t; +#define PMW33XX_FIRMWARE_LENGTH 4094 -bool pmw3360_init(int8_t index); -uint16_t pmw3360_get_cpi(void); -void pmw3360_set_cpi(uint16_t cpi); -/* Reads and clears the current delta values on the sensor */ -report_pmw3360_t pmw3360_read_burst(int8_t index); +// PMW3360 register addresses +// clang-format off +#define REG_Product_ID 0x00 +#define REG_Revision_ID 0x01 +#define REG_Motion 0x02 +#define REG_Delta_X_L 0x03 +#define REG_Delta_X_H 0x04 +#define REG_Delta_Y_L 0x05 +#define REG_Delta_Y_H 0x06 +#define REG_SQUAL 0x07 +#define REG_Raw_Data_Sum 0x08 +#define REG_Maximum_Raw_data 0x09 +#define REG_Minimum_Raw_data 0x0a +#define REG_Shutter_Lower 0x0b +#define REG_Shutter_Upper 0x0c +#define REG_Control 0x0d +#define REG_Config1 0x0f +#define REG_Config2 0x10 +#define REG_Angle_Tune 0x11 +#define REG_Frame_Capture 0x12 +#define REG_SROM_Enable 0x13 +#define REG_Run_Downshift 0x14 +#define REG_Rest1_Rate_Lower 0x15 +#define REG_Rest1_Rate_Upper 0x16 +#define REG_Rest1_Downshift 0x17 +#define REG_Rest2_Rate_Lower 0x18 +#define REG_Rest2_Rate_Upper 0x19 +#define REG_Rest2_Downshift 0x1a +#define REG_Rest3_Rate_Lower 0x1b +#define REG_Rest3_Rate_Upper 0x1c +#define REG_Observation 0x24 +#define REG_Data_Out_Lower 0x25 +#define REG_Data_Out_Upper 0x26 +#define REG_Raw_Data_Dump 0x29 +#define REG_SROM_ID 0x2a +#define REG_Min_SQ_Run 0x2b +#define REG_Raw_Data_Threshold 0x2c +#define REG_Config5 0x2f +#define REG_Power_Up_Reset 0x3a +#define REG_Shutdown 0x3b +#define REG_Inverse_Product_ID 0x3f +#define REG_LiftCutoff_Tune3 0x41 +#define REG_Angle_Snap 0x42 +#define REG_LiftCutoff_Tune1 0x4a +#define REG_Motion_Burst 0x50 +#define REG_LiftCutoff_Tune_Timeout 0x58 +#define REG_LiftCutoff_Tune_Min_Length 0x5a +#define REG_SROM_Load_Burst 0x62 +#define REG_Lift_Config 0x63 +#define REG_Raw_Data_Burst 0x64 +#define REG_LiftCutoff_Tune2 0x65 +// clang-format on diff --git a/drivers/sensors/pmw3360_firmware.h b/drivers/sensors/pmw3360_firmware.h deleted file mode 100644 index ed9fda5a75..0000000000 --- a/drivers/sensors/pmw3360_firmware.h +++ /dev/null @@ -1,288 +0,0 @@ -/* Copyright 2020 Christopher Courtney, aka Drashna Jael're (@drashna) <drashna@live.com> - * Copyright 2019 Sunjun Kim - * Copyright 2020 Ploopy Corporation - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#pragma once - -#include "progmem.h" - -// PID, Inverse PID, SROM version -const uint8_t firmware_signature[] PROGMEM = {0x42, 0xBD, 0x04}; - -#define FIRMWARE_LENGTH 4094 - -// Firmware Blob foor PMW3360 - -// clang-format off -const uint8_t firmware_data[FIRMWARE_LENGTH] PROGMEM = { - 0x01, 0x04, 0x8E, 0x96, 0x6E, 0x77, 0x3E, 0xFE, 0x7E, 0x5F, 0x1D, 0xB8, 0xF2, 0x66, 0x4E, 0xFF, - 0x5D, 0x19, 0xB0, 0xC2, 0x04, 0x69, 0x54, 0x2A, 0xD6, 0x2E, 0xBF, 0xDD, 0x19, 0xB0, 0xC3, 0xE5, - 0x29, 0xB1, 0xE0, 0x23, 0xA5, 0xA9, 0xB1, 0xC1, 0x00, 0x82, 0x67, 0x4C, 0x1A, 0x97, 0x8D, 0x79, - 0x51, 0x20, 0xC7, 0x06, 0x8E, 0x7C, 0x7C, 0x7A, 0x76, 0x4F, 0xFD, 0x59, 0x30, 0xE2, 0x46, 0x0E, - 0x9E, 0xBE, 0xDF, 0x1D, 0x99, 0x91, 0xA0, 0xA5, 0xA1, 0xA9, 0xD0, 0x22, 0xC6, 0xEF, 0x5C, 0x1B, - 0x95, 0x89, 0x90, 0xA2, 0xA7, 0xCC, 0xFB, 0x55, 0x28, 0xB3, 0xE4, 0x4A, 0xF7, 0x6C, 0x3B, 0xF4, - 0x6A, 0x56, 0x2E, 0xDE, 0x1F, 0x9D, 0xB8, 0xD3, 0x05, 0x88, 0x92, 0xA6, 0xCE, 0x1E, 0xBE, 0xDF, - 0x1D, 0x99, 0xB0, 0xE2, 0x46, 0xEF, 0x5C, 0x07, 0x11, 0x5D, 0x98, 0x0B, 0x9D, 0x94, 0x97, 0xEE, - 0x4E, 0x45, 0x33, 0x6B, 0x44, 0xC7, 0x29, 0x56, 0x27, 0x30, 0xC6, 0xA7, 0xD5, 0xF2, 0x56, 0xDF, - 0xB4, 0x38, 0x62, 0xCB, 0xA0, 0xB6, 0xE3, 0x0F, 0x84, 0x06, 0x24, 0x05, 0x65, 0x6F, 0x76, 0x89, - 0xB5, 0x77, 0x41, 0x27, 0x82, 0x66, 0x65, 0x82, 0xCC, 0xD5, 0xE6, 0x20, 0xD5, 0x27, 0x17, 0xC5, - 0xF8, 0x03, 0x23, 0x7C, 0x5F, 0x64, 0xA5, 0x1D, 0xC1, 0xD6, 0x36, 0xCB, 0x4C, 0xD4, 0xDB, 0x66, - 0xD7, 0x8B, 0xB1, 0x99, 0x7E, 0x6F, 0x4C, 0x36, 0x40, 0x06, 0xD6, 0xEB, 0xD7, 0xA2, 0xE4, 0xF4, - 0x95, 0x51, 0x5A, 0x54, 0x96, 0xD5, 0x53, 0x44, 0xD7, 0x8C, 0xE0, 0xB9, 0x40, 0x68, 0xD2, 0x18, - 0xE9, 0xDD, 0x9A, 0x23, 0x92, 0x48, 0xEE, 0x7F, 0x43, 0xAF, 0xEA, 0x77, 0x38, 0x84, 0x8C, 0x0A, - 0x72, 0xAF, 0x69, 0xF8, 0xDD, 0xF1, 0x24, 0x83, 0xA3, 0xF8, 0x4A, 0xBF, 0xF5, 0x94, 0x13, 0xDB, - 0xBB, 0xD8, 0xB4, 0xB3, 0xA0, 0xFB, 0x45, 0x50, 0x60, 0x30, 0x59, 0x12, 0x31, 0x71, 0xA2, 0xD3, - 0x13, 0xE7, 0xFA, 0xE7, 0xCE, 0x0F, 0x63, 0x15, 0x0B, 0x6B, 0x94, 0xBB, 0x37, 0x83, 0x26, 0x05, - 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* - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +// Copyright 2022 Stefan Kerkmann (KarlK90) +// Copyright 2021 Alabastard (@Alabastard-64) +// Copyright 2020 Christopher Courtney, aka Drashna Jael're (@drashna) <drashna@live.com> +// Copyright 2019 Sunjun Kim +// Copyright 2020 Ploopy Corporation +// SPDX-License-Identifier: GPL-2.0-or-later -#include "spi_master.h" -#include "pmw3389.h" -#include "wait.h" -#include "debug.h" -#include "print.h" -#include "pmw3389_firmware.h" +#include "pmw33xx_common.h" +#include "progmem.h" -// Registers -// clang-format off -#define REG_Product_ID 0x00 -#define REG_Revision_ID 0x01 -#define REG_Motion 0x02 -#define REG_Delta_X_L 0x03 -#define REG_Delta_X_H 0x04 -#define REG_Delta_Y_L 0x05 -#define REG_Delta_Y_H 0x06 -#define REG_SQUAL 0x07 -#define REG_RawData_Sum 0x08 -#define REG_Maximum_RawData 0x09 -#define REG_Minimum_RawData 0x0a -#define REG_Shutter_Lower 0x0b -#define REG_Shutter_Upper 0x0c -#define REG_Ripple_Control 0x0d -#define REG_Resolution_L 0x0e -#define REG_Resolution_H 0x0f -#define REG_Config2 0x10 -#define REG_Angle_Tune 0x11 -#define REG_Frame_Capture 0x12 -#define REG_SROM_Enable 0x13 -#define REG_Run_Downshift 0x14 -#define REG_Rest1_Rate_Lower 0x15 -#define REG_Rest1_Rate_Upper 0x16 -#define REG_Rest1_Downshift 0x17 -#define REG_Rest2_Rate_Lower 0x18 -#define REG_Rest2_Rate_Upper 0x19 -#define REG_Rest2_Downshift 0x1a -#define REG_Rest3_Rate_Lower 0x1b -#define REG_Rest3_Rate_Upper 0x1c -#define REG_Observation 0x24 -#define REG_Data_Out_Lower 0x25 -#define REG_Data_Out_Upper 0x26 -#define REG_SROM_ID 0x2a -#define REG_Min_SQ_Run 0x2b -#define REG_RawData_Threshold 0x2c -#define REG_Control2 0x2d -#define REG_Config5_L 0x2e -#define REG_Config5_H 0x2f -#define REG_Power_Up_Reset 0X3a -#define REG_Shutdown 0x3b -#define REG_Inverse_Product_ID 0x3f -#define REG_LiftCutoff_Cal3 0x41 -#define REG_Angle_Snap 0x42 -#define REG_LiftCutoff_Cal1 0x4a -#define REG_Motion_Burst 0x50 -#define REG_SROM_Load_Burst 0x62 -#define REG_Lift_Config 0x63 -#define REG_RawData_Burst 0x64 -#define REG_LiftCutoff_Cal2 0x65 -#define REG_LiftCutoff_Cal_Timeout 0x71 -#define REG_LiftCutoff_Cal_Min_Length 0x72 -#define REG_PWM_Period_Cnt 0x73 -#define REG_PWM_Width_Cnt 0x74 - -#define CPI_STEP 50 -// clang-format on - -// limits to 0--319, resulting in a CPI range of 50 -- 16000 (as only steps of 50 are possible). -#ifndef MAX_CPI -# define MAX_CPI 0x013f -#endif - -bool _inBurst = false; - -#ifdef CONSOLE_ENABLE -void print_byte(uint8_t byte) { - dprintf("%c%c%c%c%c%c%c%c|", (byte & 0x80 ? '1' : '0'), (byte & 0x40 ? '1' : '0'), (byte & 0x20 ? '1' : '0'), (byte & 0x10 ? '1' : '0'), (byte & 0x08 ? '1' : '0'), (byte & 0x04 ? '1' : '0'), (byte & 0x02 ? '1' : '0'), (byte & 0x01 ? '1' : '0')); -} -#endif -#define constrain(amt, low, high) ((amt) < (low) ? (low) : ((amt) > (high) ? (high) : (amt))) - -bool pmw3389_spi_start(void) { - bool status = spi_start(PMW3389_CS_PIN, PMW3389_SPI_LSBFIRST, PMW3389_SPI_MODE, PMW3389_SPI_DIVISOR); - // tNCS-SCLK, 120ns - wait_us(1); - return status; -} - -spi_status_t pmw3389_write(uint8_t reg_addr, uint8_t data) { - pmw3389_spi_start(); - - if (reg_addr != REG_Motion_Burst) { - _inBurst = false; - } - - // send address of the register, with MSBit = 1 to indicate it's a write - spi_status_t status = spi_write(reg_addr | 0x80); - status = spi_write(data); - - // tSCLK-NCS for write operation is 35 us - wait_us(35); - spi_stop(); - - // tSWW/tSWR (=180us) minus tSCLK-NCS. Could be shortened, but is looks like a safe lower bound - wait_us(145); - return status; -} - -uint8_t pmw3389_read(uint8_t reg_addr) { - pmw3389_spi_start(); - // send adress of the register, with MSBit = 0 to indicate it's a read - spi_write(reg_addr & 0x7f); - // tSRAD (=160us) - wait_us(160); - uint8_t data = spi_read(); - - // tSCLK-NCS, 120ns - wait_us(1); - spi_stop(); - - // tSRW/tSRR (=20us) minus tSCLK-NCS - wait_us(19); - return data; -} - -bool pmw3389_init(void) { - setPinOutput(PMW3389_CS_PIN); - - spi_init(); - _inBurst = false; - - spi_stop(); - pmw3389_spi_start(); - spi_stop(); - - pmw3389_write(REG_Shutdown, 0xb6); // Shutdown first - wait_ms(300); - - pmw3389_spi_start(); - wait_us(40); - spi_stop(); - wait_us(40); - - // power up, need to first drive NCS high then low, see above. - pmw3389_write(REG_Power_Up_Reset, 0x5a); - wait_ms(50); - - // read registers and discard - pmw3389_read(REG_Motion); - pmw3389_read(REG_Delta_X_L); - pmw3389_read(REG_Delta_X_H); - pmw3389_read(REG_Delta_Y_L); - pmw3389_read(REG_Delta_Y_H); - - pmw3389_upload_firmware(); - - spi_stop(); +extern const size_t pmw33xx_number_of_sensors; - wait_ms(10); - pmw3389_set_cpi(PMW3389_CPI); - - wait_ms(1); - - pmw3389_write(REG_Config2, 0x00); - - pmw3389_write(REG_Angle_Tune, constrain(ROTATIONAL_TRANSFORM_ANGLE, -127, 127)); - - pmw3389_write(REG_Lift_Config, PMW3389_LIFTOFF_DISTANCE); - - bool init_success = pmw3389_check_signature(); -#ifdef CONSOLE_ENABLE - if (init_success) { - dprintf("pmw3389 signature verified"); - } else { - dprintf("pmw3389 signature verification failed!"); +uint16_t pmw33xx_get_cpi(uint8_t sensor) { + if (sensor >= pmw33xx_number_of_sensors) { + return 0; } -#endif - - writePinLow(PMW3389_CS_PIN); - return init_success; + uint16_t cpival = (pmw33xx_read(sensor, REG_Resolution_H) << 8) | pmw33xx_read(sensor, REG_Resolution_L); + return (uint16_t)((cpival + 1) & 0xFFFF) * PMW33XX_CPI_STEP; } -void pmw3389_upload_firmware(void) { - // Datasheet claims we need to disable REST mode first, but during startup - // it's already disabled and we're not turning it on ... - // pmw3389_write(REG_Config2, 0x00); // disable REST mode - pmw3389_write(REG_SROM_Enable, 0x1d); - - wait_ms(10); - - pmw3389_write(REG_SROM_Enable, 0x18); - - pmw3389_spi_start(); - spi_write(REG_SROM_Load_Burst | 0x80); - wait_us(15); - - for (uint16_t i = 0; i < FIRMWARE_LENGTH; i++) { - spi_write(pgm_read_byte(firmware_data + i)); -#ifndef PMW3389_FIRMWARE_UPLOAD_FAST - wait_us(15); -#endif +void pmw33xx_set_cpi(uint8_t sensor, uint16_t cpi) { + if (sensor >= pmw33xx_number_of_sensors) { + return; } - wait_us(200); - - pmw3389_read(REG_SROM_ID); - pmw3389_write(REG_Config2, 0x00); -} - -bool pmw3389_check_signature(void) { - uint8_t pid = pmw3389_read(REG_Product_ID); - uint8_t iv_pid = pmw3389_read(REG_Inverse_Product_ID); - uint8_t SROM_ver = pmw3389_read(REG_SROM_ID); - return (pid == firmware_signature[0] && iv_pid == firmware_signature[1] && SROM_ver == firmware_signature[2]); // signature for SROM 0x04 -} -uint16_t pmw3389_get_cpi(void) { - uint16_t cpival = (pmw3389_read(REG_Resolution_H) << 8) | pmw3389_read(REG_Resolution_L); - return (uint16_t)((cpival + 1) & 0xffff) * CPI_STEP; -} - -void pmw3389_set_cpi(uint16_t cpi) { - uint16_t cpival = constrain((cpi / CPI_STEP) - 1, 0, MAX_CPI); + uint16_t cpival = CONSTRAIN((cpi / PMW33XX_CPI_STEP) - 1, 0, (PMW33XX_CPI_MAX / PMW33XX_CPI_STEP) - 1U); // Sets upper byte first for more consistent setting of cpi - pmw3389_write(REG_Resolution_H, (cpival >> 8) & 0xff); - pmw3389_write(REG_Resolution_L, cpival & 0xff); + pmw33xx_write(sensor, REG_Resolution_H, (cpival >> 8) & 0xFF); + pmw33xx_write(sensor, REG_Resolution_L, cpival & 0xFF); } -report_pmw3389_t pmw3389_read_burst(void) { - report_pmw3389_t report = {0}; - - if (!_inBurst) { -#ifdef CONSOLE_ENABLE - dprintf("burst on"); -#endif - pmw3389_write(REG_Motion_Burst, 0x00); - _inBurst = true; - } - - pmw3389_spi_start(); - spi_write(REG_Motion_Burst); - wait_us(35); // waits for tSRAD_MOTBR - - report.motion = spi_read(); - spi_read(); // skip Observation - // delta registers - report.dx = spi_read(); - report.mdx = spi_read(); - report.dy = spi_read(); - report.mdy = spi_read(); - - if (report.motion & 0b111) { // panic recovery, sometimes burst mode works weird. - _inBurst = false; - } - - spi_stop(); - -#ifdef CONSOLE_ENABLE - if (debug_mouse) { - print_byte(report.motion); - print_byte(report.dx); - print_byte(report.mdx); - print_byte(report.dy); - print_byte(report.mdy); - dprintf("\n"); - } -#endif +// PID, Inverse PID, SROM version +const uint8_t pmw33xx_firmware_signature[3] PROGMEM = {0x42, 0xBD, 0x04}; - report.isMotion = (report.motion & 0x80) != 0; - report.isOnSurface = (report.motion & 0x08) == 0; - report.dx |= (report.mdx << 8); - report.dx = report.dx * -1; - report.dy |= (report.mdy << 8); - report.dy = report.dy * -1; +// Firmware Blob for PMW3389 +// clang-format off +const uint8_t pmw33xx_firmware_data[PMW33XX_FIRMWARE_LENGTH] PROGMEM = { + 0x01, 0xe8, 0xba, 0x26, 0x0b, 0xb2, 0xbe, 0xfe, 0x7e, 0x5f, 0x3c, 0xdb, 0x15, 0xa8, 0xb3, + 0xe4, 0x2b, 0xb5, 0xe8, 0x53, 0x07, 0x6d, 0x3b, 0xd1, 0x20, 0xc2, 0x06, 0x6f, 0x3d, 0xd9, + 0x11, 0xa0, 0xc2, 0xe7, 0x2d, 0xb9, 0xd1, 0x20, 0xa3, 0xa5, 0xc8, 0xf3, 0x64, 0x4a, 0xf7, + 0x4d, 0x18, 0x93, 0xa4, 0xca, 0xf7, 0x6c, 0x5a, 0x36, 0xee, 0x5e, 0x3e, 0xfe, 0x7e, 0x7e, + 0x5f, 0x1d, 0x99, 0xb0, 0xc3, 0xe5, 0x29, 0xd3, 0x03, 0x65, 0x48, 0x12, 0x87, 0x6d, 0x58, + 0x32, 0xe6, 0x2f, 0xdc, 0x3a, 0xf2, 0x4f, 0xfd, 0x59, 0x11, 0x81, 0x61, 0x21, 0xc0, 0x02, + 0x86, 0x8e, 0x7f, 0x5d, 0x38, 0xf2, 0x47, 0x0c, 0x7b, 0x55, 0x28, 0xb3, 0xe4, 0x4a, 0x16, + 0xab, 0xbf, 0xdd, 0x38, 0xf2, 0x66, 0x4e, 0xff, 0x5d, 0x19, 0x91, 0xa0, 0xa3, 0xa5, 0xc8, + 0x12, 0xa6, 0xaf, 0xdc, 0x3a, 0xd1, 0x41, 0x60, 0x75, 0x58, 0x24, 0x92, 0xd4, 0x72, 0x6c, + 0xe0, 0x2f, 0xfd, 0x23, 0x8d, 0x1c, 0x5b, 0xb2, 0x97, 0x36, 0x3d, 0x0b, 0xa2, 0x49, 0xb1, + 0x58, 0xf2, 0x1f, 0xc0, 0xcb, 0xf8, 0x41, 0x4f, 0xcd, 0x1e, 0x6b, 0x39, 0xa7, 0x2b, 0xe9, + 0x30, 0x16, 0x83, 0xd2, 0x0e, 0x47, 0x8f, 0xe3, 0xb1, 0xdf, 0xa2, 0x15, 0xdb, 0x5d, 0x30, + 0xc5, 0x1a, 0xab, 0x31, 0x99, 0xf3, 0xfa, 0xb2, 0x86, 0x69, 0xad, 0x7a, 0xe8, 0xa7, 0x18, + 0x6a, 0xcc, 0xc8, 0x65, 0x23, 0x87, 0xa8, 0x5f, 0xf5, 0x21, 0x59, 0x75, 0x09, 0x71, 0x45, + 0x55, 0x25, 0x4b, 0xda, 0xa1, 0xc3, 0xf7, 0x41, 0xab, 0x59, 0xd9, 0x74, 0x12, 0x55, 0x5f, + 0xbc, 0xaf, 0xd9, 0xfd, 0xb0, 0x1e, 0xa3, 0x0f, 0xff, 0xde, 0x11, 0x16, 0x6a, 0xae, 0x0e, + 0xe1, 0x5d, 0x3c, 0x10, 0x43, 0x9a, 0xa1, 0x0b, 0x24, 0x8f, 0x0d, 0x7f, 0x0b, 0x5e, 0x4c, + 0x42, 0xa4, 0x84, 0x2c, 0x40, 0xd0, 0x55, 0x39, 0xe6, 0x4b, 0xf8, 0x9b, 0x2f, 0xdc, 0x28, + 0xff, 0xfa, 0xb5, 0x85, 0x19, 0xe5, 0x28, 0xa1, 0x77, 0xaa, 0x73, 0xf3, 0x03, 0xc7, 0x62, + 0xa6, 0x91, 0x18, 0xc9, 0xb0, 0xcd, 0x05, 0xdc, 0xca, 0x81, 0x26, 0x1a, 0x47, 0x40, 0xda, + 0x36, 0x7d, 0x6a, 0x53, 0xc8, 0x5a, 0x77, 0x5d, 0x19, 0xa4, 0x1b, 0x23, 0x83, 0xd0, 0xb2, + 0xaa, 0x0e, 0xbf, 0x77, 0x4e, 0x3a, 0x3b, 0x59, 0x00, 0x31, 0x0d, 0x02, 0x1b, 0x88, 0x7a, + 0xd4, 0xbd, 0x9d, 0xcc, 0x58, 0x04, 0x69, 0xf6, 0x3b, 0xca, 0x42, 0xe2, 0xfd, 0xc3, 0x3d, + 0x39, 0xc5, 0xd0, 0x71, 0xe4, 0xc8, 0xb7, 0x3e, 0x3f, 0xc8, 0xe9, 0xca, 0xc9, 0x3f, 0x04, + 0x4e, 0x1b, 0x79, 0xca, 0xa5, 0x61, 0xc2, 0xed, 0x1d, 0xa6, 0xda, 0x5a, 0xe9, 0x7f, 0x65, + 0x8c, 0xbe, 0x12, 0x6e, 0xa4, 0x5b, 0x33, 0x2f, 0x84, 0x28, 0x9c, 0x1c, 0x88, 0x2d, 0xff, + 0x07, 0xbf, 0xa6, 0xd7, 0x5a, 0x88, 0x86, 0xb0, 0x3f, 0xf6, 0x31, 0x5b, 0x11, 0x6d, 0xf5, + 0x58, 0xeb, 0x58, 0x02, 0x9e, 0xb5, 0x9a, 0xb1, 0xff, 0x25, 0x9d, 0x8b, 0x4f, 0xb6, 0x0a, + 0xf9, 0xea, 0x3e, 0x3f, 0x21, 0x09, 0x65, 0x21, 0x22, 0xfe, 0x3d, 0x4e, 0x11, 0x5b, 0x9e, + 0x5a, 0x59, 0x8b, 0xdd, 0xd8, 0xce, 0xd6, 0xd9, 0x59, 0xd2, 0x1e, 0xfd, 0xef, 0x0d, 0x1b, + 0xd9, 0x61, 0x7f, 0xd7, 0x2d, 0xad, 0x62, 0x09, 0xe5, 0x22, 0x63, 0xea, 0xc7, 0x31, 0xd9, + 0xa1, 0x38, 0x80, 0x5c, 0xa7, 0x32, 0x82, 0xec, 0x1b, 0xa2, 0x49, 0x5a, 0x06, 0xd2, 0x7c, + 0xc9, 0x96, 0x57, 0xbb, 0x17, 0x75, 0xfc, 0x7a, 0x8f, 0x0d, 0x77, 0xb5, 0x7a, 0x8e, 0x3e, + 0xf4, 0xba, 0x2f, 0x69, 0x13, 0x26, 0xd6, 0xd9, 0x21, 0x60, 0x2f, 0x21, 0x3e, 0x87, 0xee, + 0xfd, 0x87, 0x16, 0x0d, 0xc8, 0x08, 0x00, 0x25, 0x71, 0xac, 0x2c, 0x03, 0x2a, 0x37, 0x2d, + 0xb3, 0x34, 0x09, 0x91, 0xe3, 0x06, 0x2c, 0x38, 0x37, 0x95, 0x3b, 0x17, 0x7a, 0xaf, 0xac, + 0x99, 0x55, 0xab, 0x41, 0x39, 0x5f, 0x8e, 0xa6, 0x43, 0x80, 0x03, 0x88, 0x6f, 0x7d, 0xbd, + 0x5a, 0xb4, 0x2b, 0x32, 0x23, 0x5a, 0xa9, 0x31, 0x32, 0x39, 0x4c, 0x5b, 0xf4, 0x6b, 0xaf, + 0x66, 0x6f, 0x3c, 0x8e, 0x2d, 0x82, 0x97, 0x9f, 0x4a, 0x01, 0xdc, 0x99, 0x98, 0x00, 0xec, + 0x38, 0x7a, 0x79, 0x70, 0xa6, 0x85, 0xd6, 0x21, 0x63, 0x0d, 0x45, 0x9a, 0x2e, 0x5e, 0xa7, + 0xb1, 0xea, 0x66, 0x6a, 0xbc, 0x62, 0x2d, 0x7b, 0x7d, 0x85, 0xea, 0x95, 0x2f, 0xc0, 0xe8, + 0x6f, 0x35, 0xa0, 0x3a, 0x02, 0x25, 0xbc, 0xb2, 0x5f, 0x5c, 0x43, 0x96, 0xcc, 0x26, 0xd2, + 0x16, 0xb4, 0x96, 0x73, 0xd7, 0x13, 0xc7, 0xae, 0x53, 0x15, 0x31, 0x89, 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0xec, 0x3b, 0xd5, 0x28, 0xb3, 0xc5, 0xe9, 0x31, 0xc1, 0x00, 0x82, 0x67, 0x4c, + 0xfb, 0x55, 0x28, 0xd2, 0x26, 0xaf, 0xbd, 0xd9, 0x11, 0x81, 0x61, 0x21, 0xa1, 0xa1, 0xc0, + 0x02, 0x86, 0x6f, 0x5c, 0x1b, 0xb4, 0xcb, 0x14, 0x8b, 0x94, 0xaa, 0xd6, 0x2e, 0xbf, 0xdd, + 0x19, 0xb0, 0xe2, 0x46, 0x0e, 0x7f, 0x7c, 0x5b, 0x15, 0x89, 0x90, 0x83, 0x84, 0x6b, 0x54, + 0x0b, 0x75, 0x68, 0x52, 0x07, 0x6d, 0x58, 0x32, 0xc7, 0xed, 0x58, 0x32, 0xc7, 0xed, 0x58, + 0x32, 0xe6, 0x4e, 0xff, 0x7c, 0x7a, 0x76, 0x6e, 0x3f, 0xdd, 0x38, 0xd3, 0x05, 0x88, 0x92, + 0xa6, 0xaf, 0xdc, 0x1b, 0xb4, 0xcb, 0xf5, 0x68, 0x52, 0x07, 0x8c, 0x7b, 0x55, 0x09, 0x90, + 0x83, 0x84, 0x6b, 0x54, 0x2a, 0xb7, 0xec, 0x3b, 0xd5, 0x09, 0x90, 0xa2, 0xc6, 0x0e, 0x7f, + 0x7c, 0x7a, 0x57, 0x0d, 0x98, 0xb2, 0xc7, 0xed, 0x58, 0x32, 0xc7, 0x0c, 0x7b, 0x74, 0x4b, + 0x14, 0x8b, 0x94, 0xaa, 0xb7, 0xcd, 0x18, 0x93, 0xa4, 0xca, 0x16, 0xae, 0xbf, 0xdd, 0x19, + 0xb0, 0xe2, 0x46, 0x0e, 0x7f, 0x5d, 0x19, 0x91, 0x81, 0x80, 0x63, 0x44, 0xeb, 0x35, 0xc9, + 0x10, 0x83, 0x65, 0x48, 0x12, 0xa6, 0xce, 0x1e, 0x9f, 0xbc, 0xdb, 0x15, 0x89, 0x71, 0x60, + 0x23, 0xc4, 0xeb, 0x54, 0x2a, 0xb7, 0xec, 0x5a, 0x36, 0xcf, 0x81, 0x10, 0xac, 0x74 +}; - return report; -} +// clang-format off diff --git a/drivers/sensors/pmw3389.h b/drivers/sensors/pmw3389.h index db4a763fe3..fafd1e2046 100644 --- a/drivers/sensors/pmw3389.h +++ b/drivers/sensors/pmw3389.h @@ -1,76 +1,77 @@ -/* Copyright 2021 Alabastard (@Alabastard-64) - * Copyright 2020 Christopher Courtney, aka Drashna Jael're (@drashna) <drashna@live.com> - * Copyright 2019 Sunjun Kim - * Copyright 2020 Ploopy Corporation - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +// Copyright 2022 Stefan Kerkmann (KarlK90) +// Copyright 2021 Alabastard (@Alabastard-64) +// Copyright 2020 Christopher Courtney, aka Drashna Jael're (@drashna) <drashna@live.com> +// Copyright 2019 Sunjun Kim +// Copyright 2020 Ploopy Corporation +// SPDX-License-Identifier: GPL-2.0-or-later #pragma once #include <stdint.h> -#ifndef PMW3389_CPI -# define PMW3389_CPI 2000 +#if !defined(PMW33XX_CPI) +# define PMW33XX_CPI 2000 #endif -#ifndef PMW3389_CLOCK_SPEED -# define PMW3389_CLOCK_SPEED 2000000 -#endif - -#ifndef PMW3389_SPI_LSBFIRST -# define PMW3389_SPI_LSBFIRST false -#endif - -#ifndef PMW3389_SPI_MODE -# define PMW3389_SPI_MODE 3 -#endif - -#ifndef PMW3389_SPI_DIVISOR -# ifdef __AVR__ -# define PMW3389_SPI_DIVISOR (F_CPU / PMW3389_CLOCK_SPEED) -# else -# define PMW3389_SPI_DIVISOR 64 -# endif -#endif - -#ifndef PMW3389_LIFTOFF_DISTANCE -# define PMW3389_LIFTOFF_DISTANCE 0x02 -#endif - -#ifndef ROTATIONAL_TRANSFORM_ANGLE -# define ROTATIONAL_TRANSFORM_ANGLE 0x00 -#endif - -#ifndef PMW3389_CS_PIN -# error "No chip select pin defined -- missing PMW3389_CS_PIN" -#endif +#define PMW33XX_CPI_STEP 50 +#define PMW33XX_CPI_MIN 50 +#define PMW33XX_CPI_MAX 16000 -typedef struct { - int8_t motion; - bool isMotion; // True if a motion is detected. - bool isOnSurface; // True when a chip is on a surface - int16_t dx; // displacement on x directions. Unit: Count. (CPI * Count = Inch value) - int8_t mdx; - int16_t dy; // displacement on y directions. - int8_t mdy; -} report_pmw3389_t; +#define PMW33XX_FIRMWARE_LENGTH 4094 -bool pmw3389_init(void); -void pmw3389_upload_firmware(void); -bool pmw3389_check_signature(void); -uint16_t pmw3389_get_cpi(void); -void pmw3389_set_cpi(uint16_t cpi); -/* Reads and clears the current delta values on the sensor */ -report_pmw3389_t pmw3389_read_burst(void); +// PMW3389 register addresses +// clang-format off +#define REG_Product_ID 0x00 +#define REG_Revision_ID 0x01 +#define REG_Motion 0x02 +#define REG_Delta_X_L 0x03 +#define REG_Delta_X_H 0x04 +#define REG_Delta_Y_L 0x05 +#define REG_Delta_Y_H 0x06 +#define REG_SQUAL 0x07 +#define REG_RawData_Sum 0x08 +#define REG_Maximum_RawData 0x09 +#define REG_Minimum_RawData 0x0a +#define REG_Shutter_Lower 0x0b +#define REG_Shutter_Upper 0x0c +#define REG_Ripple_Control 0x0d +#define REG_Resolution_L 0x0e +#define REG_Resolution_H 0x0f +#define REG_Config2 0x10 +#define REG_Angle_Tune 0x11 +#define REG_Frame_Capture 0x12 +#define REG_SROM_Enable 0x13 +#define REG_Run_Downshift 0x14 +#define REG_Rest1_Rate_Lower 0x15 +#define REG_Rest1_Rate_Upper 0x16 +#define REG_Rest1_Downshift 0x17 +#define REG_Rest2_Rate_Lower 0x18 +#define REG_Rest2_Rate_Upper 0x19 +#define REG_Rest2_Downshift 0x1a +#define REG_Rest3_Rate_Lower 0x1b +#define REG_Rest3_Rate_Upper 0x1c +#define REG_Observation 0x24 +#define REG_Data_Out_Lower 0x25 +#define REG_Data_Out_Upper 0x26 +#define REG_SROM_ID 0x2a +#define REG_Min_SQ_Run 0x2b +#define REG_RawData_Threshold 0x2c +#define REG_Control2 0x2d +#define REG_Config5_L 0x2e +#define REG_Config5_H 0x2f +#define REG_Power_Up_Reset 0X3a +#define REG_Shutdown 0x3b +#define REG_Inverse_Product_ID 0x3f +#define REG_LiftCutoff_Cal3 0x41 +#define REG_Angle_Snap 0x42 +#define REG_LiftCutoff_Cal1 0x4a +#define REG_Motion_Burst 0x50 +#define REG_SROM_Load_Burst 0x62 +#define REG_Lift_Config 0x63 +#define REG_RawData_Burst 0x64 +#define REG_LiftCutoff_Cal2 0x65 +#define REG_LiftCutoff_Cal_Timeout 0x71 +#define REG_LiftCutoff_Cal_Min_Length 0x72 +#define REG_PWM_Period_Cnt 0x73 +#define REG_PWM_Width_Cnt 0x74 +// clang-format on diff --git a/drivers/sensors/pmw3389_firmware.h b/drivers/sensors/pmw3389_firmware.h deleted file mode 100644 index cd9638b605..0000000000 --- a/drivers/sensors/pmw3389_firmware.h +++ /dev/null @@ -1,307 +0,0 @@ -/* Copyright 2020 Christopher Courtney, aka Drashna Jael're (@drashna) <drashna@live.com> - * Copyright 2019 Sunjun Kim - * Copyright 2020 Ploopy Corporation - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#pragma once - -#include "progmem.h" - -// PID, Inverse PID, SROM version -const uint8_t firmware_signature[] PROGMEM = {0x42, 0xBD, 0x04}; - -#define FIRMWARE_LENGTH 4094 - -// Firmware Blob for PMW3389 - -// clang-format off -const uint8_t firmware_data[FIRMWARE_LENGTH] PROGMEM = { - 0x01, 0xe8, 0xba, 0x26, 0x0b, 0xb2, 0xbe, 0xfe, 0x7e, 0x5f, 0x3c, 0xdb, 0x15, 0xa8, 0xb3, - 0xe4, 0x2b, 0xb5, 0xe8, 0x53, 0x07, 0x6d, 0x3b, 0xd1, 0x20, 0xc2, 0x06, 0x6f, 0x3d, 0xd9, - 0x11, 0xa0, 0xc2, 0xe7, 0x2d, 0xb9, 0xd1, 0x20, 0xa3, 0xa5, 0xc8, 0xf3, 0x64, 0x4a, 0xf7, - 0x4d, 0x18, 0x93, 0xa4, 0xca, 0xf7, 0x6c, 0x5a, 0x36, 0xee, 0x5e, 0x3e, 0xfe, 0x7e, 0x7e, - 0x5f, 0x1d, 0x99, 0xb0, 0xc3, 0xe5, 0x29, 0xd3, 0x03, 0x65, 0x48, 0x12, 0x87, 0x6d, 0x58, - 0x32, 0xe6, 0x2f, 0xdc, 0x3a, 0xf2, 0x4f, 0xfd, 0x59, 0x11, 0x81, 0x61, 0x21, 0xc0, 0x02, - 0x86, 0x8e, 0x7f, 0x5d, 0x38, 0xf2, 0x47, 0x0c, 0x7b, 0x55, 0x28, 0xb3, 0xe4, 0x4a, 0x16, - 0xab, 0xbf, 0xdd, 0x38, 0xf2, 0x66, 0x4e, 0xff, 0x5d, 0x19, 0x91, 0xa0, 0xa3, 0xa5, 0xc8, - 0x12, 0xa6, 0xaf, 0xdc, 0x3a, 0xd1, 0x41, 0x60, 0x75, 0x58, 0x24, 0x92, 0xd4, 0x72, 0x6c, - 0xe0, 0x2f, 0xfd, 0x23, 0x8d, 0x1c, 0x5b, 0xb2, 0x97, 0x36, 0x3d, 0x0b, 0xa2, 0x49, 0xb1, - 0x58, 0xf2, 0x1f, 0xc0, 0xcb, 0xf8, 0x41, 0x4f, 0xcd, 0x1e, 0x6b, 0x39, 0xa7, 0x2b, 0xe9, - 0x30, 0x16, 0x83, 0xd2, 0x0e, 0x47, 0x8f, 0xe3, 0xb1, 0xdf, 0xa2, 0x15, 0xdb, 0x5d, 0x30, - 0xc5, 0x1a, 0xab, 0x31, 0x99, 0xf3, 0xfa, 0xb2, 0x86, 0x69, 0xad, 0x7a, 0xe8, 0xa7, 0x18, - 0x6a, 0xcc, 0xc8, 0x65, 0x23, 0x87, 0xa8, 0x5f, 0xf5, 0x21, 0x59, 0x75, 0x09, 0x71, 0x45, - 0x55, 0x25, 0x4b, 0xda, 0xa1, 0xc3, 0xf7, 0x41, 0xab, 0x59, 0xd9, 0x74, 0x12, 0x55, 0x5f, - 0xbc, 0xaf, 0xd9, 0xfd, 0xb0, 0x1e, 0xa3, 0x0f, 0xff, 0xde, 0x11, 0x16, 0x6a, 0xae, 0x0e, - 0xe1, 0x5d, 0x3c, 0x10, 0x43, 0x9a, 0xa1, 0x0b, 0x24, 0x8f, 0x0d, 0x7f, 0x0b, 0x5e, 0x4c, - 0x42, 0xa4, 0x84, 0x2c, 0x40, 0xd0, 0x55, 0x39, 0xe6, 0x4b, 0xf8, 0x9b, 0x2f, 0xdc, 0x28, - 0xff, 0xfa, 0xb5, 0x85, 0x19, 0xe5, 0x28, 0xa1, 0x77, 0xaa, 0x73, 0xf3, 0x03, 0xc7, 0x62, - 0xa6, 0x91, 0x18, 0xc9, 0xb0, 0xcd, 0x05, 0xdc, 0xca, 0x81, 0x26, 0x1a, 0x47, 0x40, 0xda, - 0x36, 0x7d, 0x6a, 0x53, 0xc8, 0x5a, 0x77, 0x5d, 0x19, 0xa4, 0x1b, 0x23, 0x83, 0xd0, 0xb2, - 0xaa, 0x0e, 0xbf, 0x77, 0x4e, 0x3a, 0x3b, 0x59, 0x00, 0x31, 0x0d, 0x02, 0x1b, 0x88, 0x7a, - 0xd4, 0xbd, 0x9d, 0xcc, 0x58, 0x04, 0x69, 0xf6, 0x3b, 0xca, 0x42, 0xe2, 0xfd, 0xc3, 0x3d, - 0x39, 0xc5, 0xd0, 0x71, 0xe4, 0xc8, 0xb7, 0x3e, 0x3f, 0xc8, 0xe9, 0xca, 0xc9, 0x3f, 0x04, - 0x4e, 0x1b, 0x79, 0xca, 0xa5, 0x61, 0xc2, 0xed, 0x1d, 0xa6, 0xda, 0x5a, 0xe9, 0x7f, 0x65, - 0x8c, 0xbe, 0x12, 0x6e, 0xa4, 0x5b, 0x33, 0x2f, 0x84, 0x28, 0x9c, 0x1c, 0x88, 0x2d, 0xff, - 0x07, 0xbf, 0xa6, 0xd7, 0x5a, 0x88, 0x86, 0xb0, 0x3f, 0xf6, 0x31, 0x5b, 0x11, 0x6d, 0xf5, - 0x58, 0xeb, 0x58, 0x02, 0x9e, 0xb5, 0x9a, 0xb1, 0xff, 0x25, 0x9d, 0x8b, 0x4f, 0xb6, 0x0a, - 0xf9, 0xea, 0x3e, 0x3f, 0x21, 0x09, 0x65, 0x21, 0x22, 0xfe, 0x3d, 0x4e, 0x11, 0x5b, 0x9e, - 0x5a, 0x59, 0x8b, 0xdd, 0xd8, 0xce, 0xd6, 0xd9, 0x59, 0xd2, 0x1e, 0xfd, 0xef, 0x0d, 0x1b, - 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0x23, 0xc4, 0xeb, 0x54, 0x2a, 0xb7, 0xec, 0x5a, 0x36, 0xcf, 0x81, 0x10, 0xac, 0x74 -}; - -// clang-format off diff --git a/drivers/sensors/pmw33xx_common.c b/drivers/sensors/pmw33xx_common.c new file mode 100644 index 0000000000..13164cb150 --- /dev/null +++ b/drivers/sensors/pmw33xx_common.c @@ -0,0 +1,219 @@ +// Copyright 2022 Daniel Kao (dkao) +// Copyright 2022 Stefan Kerkmann (KarlK90) +// Copyright 2022 Ulrich Spörlein (@uqs) +// Copyright 2021 Alabastard (@Alabastard-64) +// Copyright 2020 Christopher Courtney, aka Drashna Jael're (@drashna) <drashna@live.com> +// Copyright 2019 Sunjun Kim +// Copyright 2020 Ploopy Corporation +// SPDX-License-Identifier: GPL-2.0-or-later + +#include "debug.h" +#include "pmw33xx_common.h" +#include "print.h" +#include "string.h" +#include "wait.h" +#include "spi_master.h" +#include "progmem.h" + +extern const uint8_t pmw33xx_firmware_data[PMW33XX_FIRMWARE_LENGTH] PROGMEM; +extern const uint8_t pmw33xx_firmware_signature[3] PROGMEM; + +static const pin_t cs_pins[] = PMW33XX_CS_PINS; +static bool in_burst[sizeof(cs_pins) / sizeof(pin_t)] = {0}; + +const size_t pmw33xx_number_of_sensors = sizeof(cs_pins) / sizeof(pin_t); + +bool __attribute__((cold)) pmw33xx_upload_firmware(uint8_t sensor); +bool __attribute__((cold)) pmw33xx_check_signature(uint8_t sensor); + +void pmw33xx_set_cpi_all_sensors(uint16_t cpi) { + for (uint8_t sensor = 0; sensor < pmw33xx_number_of_sensors; sensor++) { + pmw33xx_set_cpi(sensor, cpi); + } +} + +bool pmw33xx_spi_start(uint8_t sensor) { + if (!spi_start(cs_pins[sensor], false, 3, PMW33XX_SPI_DIVISOR)) { + spi_stop(); + return false; + } + // tNCS-SCLK, 10ns + wait_us(1); + return true; +} + +bool pmw33xx_write(uint8_t sensor, uint8_t reg_addr, uint8_t data) { + if (!pmw33xx_spi_start(sensor)) { + return false; + } + + if (reg_addr != REG_Motion_Burst) { + in_burst[sensor] = false; + } + + // send address of the register, with MSBit = 1 to indicate it's a write + uint8_t command[2] = {reg_addr | 0x80, data}; + if (spi_transmit(command, sizeof(command)) != SPI_STATUS_SUCCESS) { + return false; + } + + // tSCLK-NCS for write operation is 35us + wait_us(35); + spi_stop(); + + // tSWW/tSWR (=18us) minus tSCLK-NCS. Could be shortened, but it looks like + // a safe lower bound + wait_us(145); + return true; +} + +uint8_t pmw33xx_read(uint8_t sensor, uint8_t reg_addr) { + if (!pmw33xx_spi_start(sensor)) { + return 0; + } + + // send adress of the register, with MSBit = 0 to indicate it's a read + spi_write(reg_addr & 0x7f); + // tSRAD (=160us) + wait_us(160); + uint8_t data = spi_read(); + + // tSCLK-NCS, 120ns + wait_us(1); + spi_stop(); + + // tSRW/tSRR (=20us) mins tSCLK-NCS + wait_us(19); + return data; +} + +bool pmw33xx_check_signature(uint8_t sensor) { + uint8_t signature_dump[3] = { + pmw33xx_read(sensor, REG_Product_ID), + pmw33xx_read(sensor, REG_Inverse_Product_ID), + pmw33xx_read(sensor, REG_SROM_ID), + }; + + return memcmp(pmw33xx_firmware_signature, signature_dump, sizeof(signature_dump)) == 0; +} + +bool pmw33xx_upload_firmware(uint8_t sensor) { + // Datasheet claims we need to disable REST mode first, but during startup + // it's already disabled and we're not turning it on ... + // pmw33xx_write(REG_Config2, 0x00); // disable REST mode + if (!pmw33xx_write(sensor, REG_SROM_Enable, 0x1d)) { + return false; + } + wait_ms(10); + pmw33xx_write(sensor, REG_SROM_Enable, 0x18); + + if (!pmw33xx_spi_start(sensor)) { + return false; + } + + spi_write(REG_SROM_Load_Burst | 0x80); + wait_us(15); + + for (size_t i = 0; i < PMW33XX_FIRMWARE_LENGTH; i++) { + spi_write(pgm_read_byte(pmw33xx_firmware_data + i)); + wait_us(15); + } + wait_us(200); + + pmw33xx_read(sensor, REG_SROM_ID); + pmw33xx_write(sensor, REG_Config2, 0x00); + + return true; +} + +bool pmw33xx_init(uint8_t sensor) { + if (sensor >= pmw33xx_number_of_sensors) { + return false; + } + spi_init(); + + // power up, need to first drive NCS high then low. the datasheet does not + // say for how long, 40us works well in practice. + if (!pmw33xx_spi_start(sensor)) { + return false; + } + wait_us(40); + spi_stop(); + wait_us(40); + + if (!pmw33xx_write(sensor, REG_Power_Up_Reset, 0x5a)) { + return false; + } + wait_ms(50); + + // read registers and discard + pmw33xx_read(sensor, REG_Motion); + pmw33xx_read(sensor, REG_Delta_X_L); + pmw33xx_read(sensor, REG_Delta_X_H); + pmw33xx_read(sensor, REG_Delta_Y_L); + pmw33xx_read(sensor, REG_Delta_Y_H); + + if (!pmw33xx_upload_firmware(sensor)) { + dprintf("PMW33XX (%d): firmware upload failed!\n", sensor); + return false; + } + + spi_stop(); + + wait_ms(10); + pmw33xx_set_cpi(sensor, PMW33XX_CPI); + + wait_ms(1); + + pmw33xx_write(sensor, REG_Config2, 0x00); + pmw33xx_write(sensor, REG_Angle_Tune, CONSTRAIN(ROTATIONAL_TRANSFORM_ANGLE, -127, 127)); + pmw33xx_write(sensor, REG_Lift_Config, PMW33XX_LIFTOFF_DISTANCE); + + if (!pmw33xx_check_signature(sensor)) { + dprintf("PMW33XX (%d): firmware signature verification failed!\n", sensor); + return false; + } + + return true; +} + +pmw33xx_report_t pmw33xx_read_burst(uint8_t sensor) { + pmw33xx_report_t report = {0}; + + if (sensor >= pmw33xx_number_of_sensors) { + return report; + } + + if (!in_burst[sensor]) { + dprintf("PMW33XX (%d): burst\n", sensor); + if (!pmw33xx_write(sensor, REG_Motion_Burst, 0x00)) { + return report; + } + in_burst[sensor] = true; + } + + if (!pmw33xx_spi_start(sensor)) { + return report; + } + + spi_write(REG_Motion_Burst); + wait_us(35); // waits for tSRAD_MOTBR + + spi_receive((uint8_t*)&report, sizeof(report)); + + // panic recovery, sometimes burst mode works weird. + if (report.motion.w & 0b111) { + in_burst[sensor] = false; + } + + spi_stop(); + + if (debug_config.mouse) { + dprintf("PMW33XX (%d): motion: 0x%x dx: %i dy: %i\n", sensor, report.motion.w, report.delta_x, report.delta_y); + } + + report.delta_x *= -1; + report.delta_y *= -1; + + return report; +} diff --git a/drivers/sensors/pmw33xx_common.h b/drivers/sensors/pmw33xx_common.h new file mode 100644 index 0000000000..c725e80f24 --- /dev/null +++ b/drivers/sensors/pmw33xx_common.h @@ -0,0 +1,156 @@ +// Copyright 2022 Daniel Kao (dkao) +// Copyright 2022 Stefan Kerkmann (KarlK90) +// Copyright 2022 Ulrich Spörlein (@uqs) +// Copyright 2021 Alabastard (@Alabastard-64) +// Copyright 2020 Christopher Courtney, aka Drashna Jael're (@drashna) <drashna@live.com> +// Copyright 2019 Sunjun Kim +// Copyright 2020 Ploopy Corporation +// SPDX-License-Identifier: GPL-2.0-or-later + +#pragma once + +#include <stdint.h> +#include "spi_master.h" +#include "util.h" + +#if defined(POINTING_DEVICE_DRIVER_pmw3360) +# include "pmw3360.h" +#elif defined(POINTING_DEVICE_DRIVER_pmw3389) +# include "pmw3389.h" +#endif + +typedef struct __attribute__((packed)) { + union { + struct { + bool capture_from_raw_data : 1; // FRAME_RData_1st + uint8_t operation_mode : 2; // OP_MODE + bool is_lifted : 1; // Lift_stat + bool raw_data_grab_is_raw_data : 1; // RData_1st + uint8_t _reserved : 2; // 1 + Reserved + bool is_motion : 1; // MOT + } b; + uint8_t w; + } motion; + uint8_t observation; + int16_t delta_x; // displacement on x directions. Unit: Count. (CPI * Count = Inch value) + int16_t delta_y; // displacement on y directions. +} pmw33xx_report_t; + +_Static_assert(sizeof(pmw33xx_report_t) == 6, "pmw33xx_report_t must be 6 bytes in size"); +_Static_assert(sizeof((pmw33xx_report_t){0}.motion) == 1, "pmw33xx_report_t.motion must be 1 byte in size"); + +#if !defined(PMW33XX_CLOCK_SPEED) +# define PMW33XX_CLOCK_SPEED 2000000 +#endif + +#if !defined(PMW33XX_SPI_DIVISOR) +# ifdef __AVR__ +# define PMW33XX_SPI_DIVISOR (F_CPU / PMW33XX_CLOCK_SPEED) +# else +# define PMW33XX_SPI_DIVISOR 64 +# endif +#endif + +#if !defined(PMW33XX_LIFTOFF_DISTANCE) +# define PMW33XX_LIFTOFF_DISTANCE 0x02 +#endif + +#if !defined(ROTATIONAL_TRANSFORM_ANGLE) +# define ROTATIONAL_TRANSFORM_ANGLE 0x00 +#endif + +#if ROTATIONAL_TRANSFORM_ANGLE > 127 || ROTATIONAL_TRANSFORM_ANGLE < (-127) +# error ROTATIONAL_TRANSFORM_ANGLE has to be in the range of +/- 127 for all PMW33XX sensors. +#endif + +// Support single and plural spellings +#ifndef PMW33XX_CS_PINS +# ifndef PMW33XX_CS_PIN +# ifdef POINTING_DEVICE_CS_PIN +# define PMW33XX_CS_PIN POINTING_DEVICE_CS_PIN +# define PMW33XX_CS_PINS \ + { PMW33XX_CS_PIN } +# else +# error "No chip select pin defined -- missing PMW33XX_CS_PIN or PMW33XX_CS_PINS" +# endif +# else +# define PMW33XX_CS_PINS \ + { PMW33XX_CS_PIN } +# endif +#endif + +#if PMW33XX_CPI > PMW33XX_CPI_MAX || PMW33XX_CPI < PMW33XX_CPI_MIN || (PMW33XX_CPI % PMW33XX_CPI_STEP) != 0U +# pragma message "PMW33XX_CPI has to be in the range of " STR(PMW33XX_CPI_MAX) "-" STR(PMW33XX_CPI_MIN) " in increments of " STR(PMW33XX_CPI_STEP) ". But it is " STR(PMW33XX_CPI) "." +# error Use correct PMW33XX_CPI value. +#endif + +#define CONSTRAIN(amt, low, high) ((amt) < (low) ? (low) : ((amt) > (high) ? (high) : (amt))) + +/** + * @brief Initializes the given sensor so it is in a working state and ready to + * be polled for data. + * + * @param sensor Index of the sensors chip select pin + * @return true Initialization was a success + * @return false Initialization failed, do not proceed operation + */ +bool __attribute__((cold)) pmw33xx_init(uint8_t sensor); + +/** + * @brief Gets the currently set CPI value from the sensor. CPI is often + * refereed to as the sensors sensitivity. + * + * @param sensor Index of the sensors chip select pin + * @return uint16_t Current CPI value of the sensor + */ +uint16_t pmw33xx_get_cpi(uint8_t sensor); + +/** + * @brief Sets the given CPI value for the given PMW33XX sensor. CIP is often + * refereed to as the sensors sensitivity. Values outside of the allow range are + * constrained into legal values. + * + * @param sensor Index of the sensors chip select pin + * @param cpi CPI value to set, legal range depends on the PMW sensor type + */ +void pmw33xx_set_cpi(uint8_t sensor, uint16_t cpi); + +/** + * @brief Sets the given CPI value to all registered PMW33XX sensors. CPI is + * often refereed to as the sensors sensitivity. Values outside of the allow + * range are constrained into legal values. + * + * @param sensor Index of the sensors chip select pin + * @param cpi CPI value to set, legal range depends on the PMW sensor type + */ +void pmw33xx_set_cpi_all_sensors(uint16_t cpi); + +/** + * @brief Reads and clears the current delta, and motion register values on the + * given sensor. + * + * @param sensor Index of the sensors chip select pin + * @return pmw33xx_report_t Current values of the sensor, if errors occurred all + * fields are set to zero + */ +pmw33xx_report_t pmw33xx_read_burst(uint8_t sensor); + +/** + * @brief Read one byte of data from the given register on the sensor + * + * @param sensor Index of the sensors chip select pin + * @param reg_addr Register address to read from + * @return uint8_t + */ +uint8_t pmw33xx_read(uint8_t sensor, uint8_t reg_addr); + +/** + * @brief Writes one byte of data to the given register on the sensor + * + * @param sensor Index of the sensors chip select pin + * @param reg_addr Registers address to write to + * @param data Data to write to the register + * @return true Write was a success + * @return false Write failed, do not proceed operation + */ +bool pmw33xx_write(uint8_t sensor, uint8_t reg_addr, uint8_t data); diff --git a/drivers/serial.h b/drivers/serial.h index 0cfdbd9959..fb91b136e7 100644 --- a/drivers/serial.h +++ b/drivers/serial.h @@ -27,3 +27,13 @@ void soft_serial_initiator_init(void); void soft_serial_target_init(void); bool soft_serial_transaction(int sstd_index); + +#ifdef SERIAL_DEBUG +# include <debug.h> +# include <print.h> +# define serial_dprintf(...) dprintf(__VA_ARGS__) +#else +# define serial_dprintf(...) \ + do { \ + } while (0) +#endif diff --git a/drivers/wear_leveling/wear_leveling_flash_spi.c b/drivers/wear_leveling/wear_leveling_flash_spi.c new file mode 100644 index 0000000000..6191f8bf09 --- /dev/null +++ b/drivers/wear_leveling/wear_leveling_flash_spi.c @@ -0,0 +1,101 @@ +// Copyright 2022 Nick Brassel (@tzarc) +// SPDX-License-Identifier: GPL-2.0-or-later +#include <stdbool.h> +#include <hal.h> +#include "util.h" +#include "timer.h" +#include "wear_leveling.h" +#include "wear_leveling_internal.h" + +#ifndef WEAR_LEVELING_EXTERNAL_FLASH_BULK_COUNT +# define WEAR_LEVELING_EXTERNAL_FLASH_BULK_COUNT 32 +#endif // WEAR_LEVELING_EXTERNAL_FLASH_BULK_COUNT + +bool backing_store_init(void) { + bs_dprintf("Init\n"); + flash_init(); + return true; +} + +bool backing_store_unlock(void) { + bs_dprintf("Unlock\n"); + // No-op -- handled by the flash driver as it is. + return true; +} + +bool backing_store_erase(void) { +#ifdef WEAR_LEVELING_DEBUG_OUTPUT + uint32_t start = timer_read32(); +#endif + + bool ret = true; + for (int i = 0; i < (WEAR_LEVELING_EXTERNAL_FLASH_BLOCK_COUNT); ++i) { + flash_status_t status = flash_erase_block(((WEAR_LEVELING_EXTERNAL_FLASH_BLOCK_OFFSET) + i) * (EXTERNAL_FLASH_BLOCK_SIZE)); + if (status != FLASH_STATUS_SUCCESS) { + ret = false; + break; + } + } + + bs_dprintf("Backing store erase took %ldms to complete\n", ((long)(timer_read32() - start))); + return ret; +} + +bool backing_store_write(uint32_t address, backing_store_int_t value) { + return backing_store_write_bulk(address, &value, 1); +} + +bool backing_store_lock(void) { + bs_dprintf("Lock \n"); + // No-op -- handled by the flash driver as it is. + return true; +} + +bool backing_store_read(uint32_t address, backing_store_int_t *value) { + return backing_store_read_bulk(address, value, 1); +} + +bool backing_store_read_bulk(uint32_t address, backing_store_int_t *values, size_t item_count) { + bs_dprintf("Read "); + uint32_t offset = (WEAR_LEVELING_EXTERNAL_FLASH_BLOCK_OFFSET) * (EXTERNAL_FLASH_BLOCK_SIZE) + address; + flash_status_t status = flash_read_block(offset, values, sizeof(backing_store_int_t) * item_count); + if (status == FLASH_STATUS_SUCCESS) { + for (size_t i = 0; i < item_count; ++i) { + values[i] = ~values[i]; + } + wl_dump(offset, values, sizeof(backing_store_int_t) * item_count); + } + return status == FLASH_STATUS_SUCCESS; +} + +bool backing_store_write_bulk(uint32_t address, backing_store_int_t *values, size_t item_count) { + uint32_t offset = (WEAR_LEVELING_EXTERNAL_FLASH_BLOCK_OFFSET) * (EXTERNAL_FLASH_BLOCK_SIZE) + address; + size_t index = 0; + backing_store_int_t temp[WEAR_LEVELING_EXTERNAL_FLASH_BULK_COUNT]; + do { + // Copy out the block of data we want to transmit first + size_t this_loop = MIN(item_count, WEAR_LEVELING_EXTERNAL_FLASH_BULK_COUNT); + for (size_t i = 0; i < this_loop; ++i) { + temp[i] = values[index + i]; + } + + bs_dprintf("Write "); + wl_dump(offset, temp, sizeof(backing_store_int_t) * this_loop); + + // Take the complement instead + for (size_t i = 0; i < this_loop; ++i) { + temp[i] = ~temp[i]; + } + + // Write out the block + if (flash_write_block(offset, temp, sizeof(backing_store_int_t) * this_loop) != FLASH_STATUS_SUCCESS) { + return false; + } + + offset += this_loop * sizeof(backing_store_int_t); + index += this_loop; + item_count -= this_loop; + } while (item_count > 0); + + return true; +} diff --git a/drivers/wear_leveling/wear_leveling_flash_spi_config.h b/drivers/wear_leveling/wear_leveling_flash_spi_config.h new file mode 100644 index 0000000000..394370daa3 --- /dev/null +++ b/drivers/wear_leveling/wear_leveling_flash_spi_config.h @@ -0,0 +1,34 @@ +// Copyright 2022 Nick Brassel (@tzarc) +// SPDX-License-Identifier: GPL-2.0-or-later +#pragma once + +#ifndef __ASSEMBLER__ +# include <stdlib.h> +# include <stdint.h> +# include "flash_spi.h" +#endif + +// Use 1 block -- check the config for the SPI flash to determine how big it is +#ifndef WEAR_LEVELING_EXTERNAL_FLASH_BLOCK_COUNT +# define WEAR_LEVELING_EXTERNAL_FLASH_BLOCK_COUNT 1 +#endif // WEAR_LEVELING_EXTERNAL_FLASH_BLOCK_COUNT + +// Start at the first block of the external flash +#ifndef WEAR_LEVELING_EXTERNAL_FLASH_BLOCK_OFFSET +# define WEAR_LEVELING_EXTERNAL_FLASH_BLOCK_OFFSET 0 +#endif // WEAR_LEVELING_EXTERNAL_FLASH_BLOCK_OFFSET + +// 8-byte writes by default +#ifndef BACKING_STORE_WRITE_SIZE +# define BACKING_STORE_WRITE_SIZE 8 +#endif + +// The space allocated by the block +#ifndef WEAR_LEVELING_BACKING_SIZE +# define WEAR_LEVELING_BACKING_SIZE ((EXTERNAL_FLASH_BLOCK_SIZE) * (WEAR_LEVELING_EXTERNAL_FLASH_BLOCK_COUNT)) +#endif // WEAR_LEVELING_BACKING_SIZE + +// Use half of the backing size for logical EEPROM +#ifndef WEAR_LEVELING_LOGICAL_SIZE +# define WEAR_LEVELING_LOGICAL_SIZE ((WEAR_LEVELING_BACKING_SIZE) / 2) +#endif // WEAR_LEVELING_LOGICAL_SIZE |