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authortmk <nobody@nowhere>2013-11-19 03:39:15 +0900
committertmk <nobody@nowhere>2013-11-19 03:39:15 +0900
commit755e4d8b00a4f9be0c50c2b005d063b94c528f8c (patch)
tree5c8f33d7204868571370774e5ddb4d5c8e6ba469 /keyboard/onekey/config.h
parent44d2d5f5fda3fbdf73e311067807026bb53798c0 (diff)
Add PS/2 mouse configure to onekey
Diffstat (limited to 'keyboard/onekey/config.h')
-rw-r--r--keyboard/onekey/config.h85
1 files changed, 85 insertions, 0 deletions
diff --git a/keyboard/onekey/config.h b/keyboard/onekey/config.h
index c5bc64de9c..8403c9b65b 100644
--- a/keyboard/onekey/config.h
+++ b/keyboard/onekey/config.h
@@ -67,4 +67,89 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
//#define NO_ACTION_MACRO
//#define NO_ACTION_FUNCTION
+
+/* PS/2 mouse */
+#define PS2_MOUSE_DEBUG
+#ifdef PS2_USE_BUSYWAIT
+# define PS2_CLOCK_PORT PORTD
+# define PS2_CLOCK_PIN PIND
+# define PS2_CLOCK_DDR DDRD
+# define PS2_CLOCK_BIT 1
+# define PS2_DATA_PORT PORTD
+# define PS2_DATA_PIN PIND
+# define PS2_DATA_DDR DDRD
+# define PS2_DATA_BIT 2
+#endif
+
+
+#ifdef PS2_USE_INT
+/* uses INT1 for clock line(ATMega32U4) */
+#define PS2_CLOCK_PORT PORTD
+#define PS2_CLOCK_PIN PIND
+#define PS2_CLOCK_DDR DDRD
+#define PS2_CLOCK_BIT 1
+#define PS2_DATA_PORT PORTD
+#define PS2_DATA_PIN PIND
+#define PS2_DATA_DDR DDRD
+#define PS2_DATA_BIT 2
+
+#define PS2_INT_INIT() do { \
+ EICRA |= ((1<<ISC11) | \
+ (0<<ISC10)); \
+} while (0)
+#define PS2_INT_ON() do { \
+ EIMSK |= (1<<INT1); \
+} while (0)
+#define PS2_INT_OFF() do { \
+ EIMSK &= ~(1<<INT1); \
+} while (0)
+#define PS2_INT_VECT INT1_vect
+#endif
+
+
+#ifdef PS2_USE_USART
+#if defined(__AVR_ATmega16U4__) || defined(__AVR_ATmega32U4__)
+/* XCK for clock line and RXD for data line */
+#define PS2_CLOCK_PORT PORTD
+#define PS2_CLOCK_PIN PIND
+#define PS2_CLOCK_DDR DDRD
+#define PS2_CLOCK_BIT 5
+#define PS2_DATA_PORT PORTD
+#define PS2_DATA_PIN PIND
+#define PS2_DATA_DDR DDRD
+#define PS2_DATA_BIT 2
+
+/* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
+/* set DDR of CLOCK as input to be slave */
+#define PS2_USART_INIT() do { \
+ PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT); \
+ PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT); \
+ UCSR1C = ((1 << UMSEL10) | \
+ (3 << UPM10) | \
+ (0 << USBS1) | \
+ (3 << UCSZ10) | \
+ (0 << UCPOL1)); \
+ UCSR1A = 0; \
+ UBRR1H = 0; \
+ UBRR1L = 0; \
+} while (0)
+#define PS2_USART_RX_INT_ON() do { \
+ UCSR1B = ((1 << RXCIE1) | \
+ (1 << RXEN1)); \
+} while (0)
+#define PS2_USART_RX_POLL_ON() do { \
+ UCSR1B = (1 << RXEN1); \
+} while (0)
+#define PS2_USART_OFF() do { \
+ UCSR1C = 0; \
+ UCSR1B &= ~((1 << RXEN1) | \
+ (1 << TXEN1)); \
+} while (0)
+#define PS2_USART_RX_READY (UCSR1A & (1<<RXC1))
+#define PS2_USART_RX_DATA UDR1
+#define PS2_USART_ERROR (UCSR1A & ((1<<FE1) | (1<<DOR1) | (1<<UPE1)))
+#define PS2_USART_RX_VECT USART1_RX_vect
+#endif
+#endif
+
#endif