From e259a722e7e8abcb97606b6cfbcce99667a66277 Mon Sep 17 00:00:00 2001 From: Jun Wako Date: Fri, 2 Jan 2015 21:16:40 +0900 Subject: Add keyboard/infinity --- keyboard/infinity/MEMO.txt | 398 ++++++++++++++++++++++++++++++++++++++++++ keyboard/infinity/Makefile | 30 ++++ keyboard/infinity/config.h | 39 +++++ keyboard/infinity/infinity.ld | 156 +++++++++++++++++ keyboard/infinity/main.cpp | 29 +++ 5 files changed, 652 insertions(+) create mode 100644 keyboard/infinity/MEMO.txt create mode 100644 keyboard/infinity/Makefile create mode 100644 keyboard/infinity/config.h create mode 100644 keyboard/infinity/infinity.ld create mode 100644 keyboard/infinity/main.cpp (limited to 'keyboard') diff --git a/keyboard/infinity/MEMO.txt b/keyboard/infinity/MEMO.txt new file mode 100644 index 0000000000..ca0da937d7 --- /dev/null +++ b/keyboard/infinity/MEMO.txt @@ -0,0 +1,398 @@ +mbed patch for Infinity +----------------------- +Without ld script patch vector table it doesn't place vector table in binary file. +And clock setting is changed as Infinity uses internal oscillator instead of exteranl crystal. + +diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_GCC_ARM/MK20D5.ld b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_GCC_ARM/MK20D5.ld +index 600751c..55c3393 100644 +--- a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_GCC_ARM/MK20D5.ld ++++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_GCC_ARM/MK20D5.ld +@@ -43,7 +43,7 @@ SECTIONS + .isr_vector : + { + __vector_table = .; +- KEEP(*(.vector_table)) ++ KEEP(*(.isr_vector)) + *(.text.Reset_Handler) + *(.text.System_Init) + . = ALIGN(4); +diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/system_MK20D5.c b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/system_MK20D5.c +index 393d1f0..b78b71a 100644 +--- a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/system_MK20D5.c ++++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/system_MK20D5.c +@@ -44,7 +44,7 @@ + + #define DISABLE_WDOG 1 + +-#define CLOCK_SETUP 1 ++#define CLOCK_SETUP 0 + /* Predefined clock setups + 0 ... Multipurpose Clock Generator (MCG) in FLL Engaged Internal (FEI) mode + Reference clock source for MCG module is the slow internal clock source 32.768kHz + + + +CMSIS/mbed HAL +============== +http://developer.mbed.org/users/MACRUM/notebook/mbed-library-internals/ + +api/ mbed API +├── AnalogIn.h +├── AnalogOut.h +├── BusIn.h +├── BusInOut.h +├── BusOut.h +├── CallChain.h +├── CAN.h +├── can_helper.h +├── DigitalIn.h +├── DigitalInOut.h +├── DigitalOut.h +├── DirHandle.h +├── Ethernet.h +├── FileBase.h +├── FileHandle.h +├── FileLike.h +├── FilePath.h +├── FileSystemLike.h +├── FunctionPointer.h +├── I2C.h +├── I2CSlave.h +├── InterruptIn.h +├── InterruptManager.h +├── LocalFileSystem.h +├── mbed_assert.h +├── mbed_debug.h +├── mbed_error.h +├── mbed.h +├── mbed_interface.h +├── platform.h +├── PortIn.h +├── PortInOut.h +├── PortOut.h +├── PwmOut.h +├── RawSerial.h +├── rtc_time.h +├── semihost_api.h +├── SerialBase.h +├── Serial.h +├── SPI.h +├── SPISlave.h +├── Stream.h +├── Ticker.h +├── Timeout.h +├── TimerEvent.h +├── Timer.h +├── toolchain.h +└── wait_api.h + +common/ mbed API implementation + +hal/ mbed HAL implementation interface +├── analogin_api.h +├── analogout_api.h +├── can_api.h +├── ethernet_api.h +├── gpio_api.h +├── gpio_irq_api.h +├── i2c_api.h +├── pinmap.h +├── port_api.h +├── pwmout_api.h +├── rtc_api.h +├── serial_api.h +├── sleep_api.h +├── spi_api.h +└── us_ticker_api.h + +targets/hal/TARGET_/TARGET_/ + mbed HAL implementation + +targets/cmsis/ CMSIS interface + core_caInstr.h + core_ca9.h + core_cmFunc.h + core_caFunc.h + core_cmInstr.h + core_cm4_simd.h + core_ca_mmu.h + core_cm0.h + core_cm0plus.h + core_cm3.h + core_cm4.h + +targets/cmsis/TARGET_/TARGET_/ + .h + system_.[ch] + cmsis.h　 + cmsis_nvic.[ch] + +targets/cmsis/TARGET_/TARGET_/TOOLSCHAIN_/ + startup_.s + linker-script + + + +Infinity +======== +Massdrop Infinity Keyboard: +https://www.massdrop.com/buy/infinity-keyboard-kit + +Freescale MK20DX128VLF5 48-QFP: +http://cache.freescale.com/files/32bit/doc/data_sheet/K20P48M50SF0.pdf + +kiibohd controller(MD1): +https://github.com/kiibohd/controller + +DFU bootloader: +https://github.com/kiibohd/controller/tree/master/Bootloader + +Program with bootloader: + $ dfu-util -D kiibohd.dfu.bin + +Pinout: +https://github.com/kiibohd/controller/blob/master/Scan/MD1/pinout + + + +Pin Usage +========= + +mk20dx128vlf5 + + ---- +|Keys| + ---- + +* Strobe (Columns) + +PTB0 +PTB1 +PTB2 +PTB3 +PTB16 +PTB17 +PTC4 +PTC5 +PTD0 + + +* Sense (Rows) + +PTD1 +PTD2 +PTD3 +PTD4 +PTD5 +PTD6 +PTD7 + + + ----- +|Debug| + ----- + +* SWD + +PTA0 (Pull-down) +PTA3 (Pull-up) + +* LEDs + +PTA19 (LED only for PCB, not McHCK) (XTAL) + +* UARTs + +PTA1 - RX0 +PTA2 - TX0 + + + ------ +|Unused| + ------ + +* GPIO + +PTA1 (Not broken out on PCB, available on McHCK) (Pull-up) +PTA2 (") +PTA4 (Pull-up) +PTA18 (EXTAL) + +PTC0 +PTC1 +PTC2 +PTC3 +PTC6 +PTC7 + +* Analog + +ADC0_DP0 +ADC0_DM0 + + + +Freescale kinetis MK20DX128 +=========================== +If FSEC of flash config at 0x400-40F is changed accidentally SWD/JTAG debug access will be lost and very difficult to get back. +For example, high level adapter like stlink cannot work to get access back after FSEC is changed. To regain the chip to be programmable low level DAP inteface like JTAG, CMSIS-DAP or OpenSAD. + + +Memory map +========== +kiibohd bootloader: Lib/mk20dx128vlf5.bootloader.ld +0x0000_0000 +-------------------+ -----------------+---------------+ + | .vectors | ---------. | StackPointer0 | + | .startup | \ | ResetHandler1 | + | .rodata | \ | ... | +0x0000_0400 | .flashconfig | 0x10 \ | ... | + | .text | \ | ... 61 | 0xF7 + | .init | `--+---------------+ 0xF8 +0x0000_1000 +-------------------+ 4KB + | _app_rom | + ~ ~ + ~ ~ + | | +0x07FF_FFFF +-------------------+ 128KB + + +0x1FFF_E000 +-------------------+ + | | + | RAM | + | 8KB| +0x2000_0000 +-------------------+ + | | + | RAM | + | 8KB| +0x2000_2000 +-------------------+ _estack + + + + + +OpenOCD +======== +Synopsis of SWD, JTAG and SWJ-DP transport: +https://fedcsis.org/proceedings/2012/pliks/279.pdf + +OpenSDA Freescale: Mass storage bootloader & serial port; part of CMSIS-DAP? +http://cache.freescale.com/files/32bit/doc/user_guide/OPENSDAUG.pdf + + +interface_list: + 1: ftdi + 2: usb_blaster + 3: usbprog + 4: jlink + 5: vsllink + 6: rlink + 7: ulink + 8: arm-jtag-ew + 9: hla + 10: osbdm + 11: opendous + 12: aice + 13: cmsis-dap + +transport list: + stlink_swim + hla_jtag + hla_swd + aice_jtag + swd + cmsis-dap + jtag + +target types: + arm7tdmi + arm9tdmi + arm920t + arm720t + arm966e + arm946e + arm926ejs + fa526 + feroceon + dragonite + xscale + cortex_m + cortex_a + cortex_r4 + arm11 + mips_m4k + avr + dsp563xx + dsp5680xx + testee + avr32_ap7k + hla_target + nds32_v2 + nds32_v3 + nds32_v3m + or1k + quark_x10xx + + +TAP +--- +http://openocd.sourceforge.net/doc/html/TAP-Declaration.html#TAP-Declaration + jtag newtap chipname tapname configparams... + hla newtap chipname tapname configparams... + swd newtap chipname tapname configparams... + cmsis-dap newtap chipname tapname configparams... + + The tapname reflects the role of that TAP, and should follow this convention: + bs – For boundary scan if this is a separate TAP; + cpu – The main CPU of the chip, alternatively arm and dsp on chips with both ARM and DSP CPUs, arm1 and arm2 on chips with two ARMs, and so forth; + etb – For an embedded trace buffer (example: an ARM ETB11); + flash – If the chip has a flash TAP, like the str912; + jrc – For JTAG route controller (example: the ICEPick modules on many Texas Instruments chips, like the OMAP3530 on Beagleboards); + tap – Should be used only for FPGA- or CPLD-like devices with a single TAP; + unknownN – If you have no idea what the TAP is for (N is a number); + when in doubt – Use the chip maker's name in their data sheet. For example, the Freescale i.MX31 has a SDMA (Smart DMA) with a JTAG TAP; that TAP should be named sdma. + +-irlen NUMBER +The length in bits of the instruction register, such as 4 or 5 bits. + +Target +------ +http://openocd.sourceforge.net/doc/html/CPU-Configuration.html#CPU-Configuration + + target create target_name type configparams... + $target_name configure configparams... + + -chain-position dotted.name – names the TAP used to access this target. + -endian (big|little) – specifies whether the CPU uses big or little endian conventions + -event event_name event_body – See Target Events. Note that this updates a list of named event handlers. Calling this twice with two different event names assigns two different handlers, but calling it twice with the same event name assigns only one handler. + -work-area-backup (0|1) – says whether the work area gets backed up; by default, it is not backed up. When possible, use a working_area that doesn't need to be backed up, since performing a backup slows down operations. For example, the beginning of an SRAM block is likely to be used by most build systems, but the end is often unused. + -work-area-size size – specify work are size, in bytes. The same size applies regardless of whether its physical or virtual address is being used. + -work-area-phys address – set the work area base address to be used when no MMU is active. + -work-area-virt address – set the work area base address to be used when an MMU is active. Do not specify a value for this except on targets with an MMU. The value should normally correspond to a static mapping for the -work-area-phys address, set up by the current operating system. + -rtos rtos_type – enable rtos support for target, rtos_type can be one of auto|eCos|ThreadX| FreeRTOS|linux|ChibiOS|embKernel See RTOS Support. + +Flash +----- +http://openocd.sourceforge.net/doc/html/Flash-Commands.html#norconfiguration + + flash bank name driver base size chip_width bus_width target [driver_options] + + name ... may be used to reference the flash bank in other flash commands. A number is also available. + driver ... identifies the controller driver associated with the flash bank being declared. This is usually cfi for external flash, or else the name of a microcontroller with embedded flash memory. See Flash Driver List. + base ... Base address of the flash chip. + size ... Size of the chip, in bytes. For some drivers, this value is detected from the hardware. + chip_width ... Width of the flash chip, in bytes; ignored for most microcontroller drivers. + bus_width ... Width of the data bus used to access the chip, in bytes; ignored for most microcontroller drivers. + target ... Names the target used to issue commands to the flash controller. + driver_options ... drivers may support, or require, additional parameters. See the driver-specific documentation for more information. + + flash write_image [erase] [unlock] filename [offset] [type] + + +Memory Access +------------- +http://openocd.sourceforge.net/doc/html/General-Commands.html#imageaccess + {mdw,mdh,mdb} addr [count] + dump {word, half-word, byte} data + {mww,mwh,mwb} addr data + write data + diff --git a/keyboard/infinity/Makefile b/keyboard/infinity/Makefile new file mode 100644 index 0000000000..ec9dc00278 --- /dev/null +++ b/keyboard/infinity/Makefile @@ -0,0 +1,30 @@ +PROJECT = infinity + +TMK_DIR = ../.. +MBED_DIR = $(TMK_DIR)/mbed-sdk + +#VPATH += $(MBED_DIR):$(TMK_DIR) +vpath %.s .:$(MBED_DIR):$(TMK_DIR) +vpath %.c .:$(MBED_DIR):$(TMK_DIR) +vpath %.cpp .:$(MBED_DIR):$(TMK_DIR) + +OBJDIR = ./build + +OBJECTS = \ + $(OBJDIR)/main.o + +CONFIG_H = config.h + +INCLUDE_PATHS = -I. + + +# Build Options +# Comment out to disable +#BOOTMAGIC_ENABLE = yes +#MOUSEKEY_ENABLE = yes + + +include $(TMK_DIR)/tool/mbed/mk20d50m.mk +include $(TMK_DIR)/tool/mbed/mbed.mk +include $(TMK_DIR)/tool/mbed/common.mk +include $(TMK_DIR)/tool/mbed/gcc.mk diff --git a/keyboard/infinity/config.h b/keyboard/infinity/config.h new file mode 100644 index 0000000000..28f2ca0293 --- /dev/null +++ b/keyboard/infinity/config.h @@ -0,0 +1,39 @@ +/* +Copyright 2014 Jun Wako + +This program is free software: you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . +*/ + +#ifndef CONFIG_H +#define CONFIG_H + +#if 0 +// duplicated name against mbed USBDeivce +#define VENDOR_ID 0xFEED +#define PRODUCT_ID 0x3BED +#endif +#define DEVICE_VER 0x0001 +#define MANUFACTURER tmk. +#define PRODUCT Infinitiy +#define DESCRIPTION Massdrop Infinity keyboard firmware by tmk + + +/* matrix size */ +#define MATRIX_ROWS 9 // Strobe +#define MATRIX_COLS 7 // Sense + +/* key combination for command */ +#define IS_COMMAND() (keyboard_report->mods == (MOD_BIT(KC_LSHIFT) | MOD_BIT(KC_RSHIFT))) + +#endif diff --git a/keyboard/infinity/infinity.ld b/keyboard/infinity/infinity.ld new file mode 100644 index 0000000000..5f699a536f --- /dev/null +++ b/keyboard/infinity/infinity.ld @@ -0,0 +1,156 @@ +/* + * Linker script for Massdrop Infinity + * Infinity has bootloader in top 4KB sector of flash and app should be placed after the area. + * + * based on mbed.org K20 ARM GCC linker script file: MK20D5.ld + */ + +MEMORY +{ + /* Infinity blootloader uses 4KB */ + FLASH (rx) : ORIGIN = 4K, LENGTH = 128K - 4K + RAM (rwx) : ORIGIN = 0x1FFFE000, LENGTH = 16K +} + +/* Linker script to place sections and symbol values. Should be used together + * with other linker script that defines memory regions FLASH and RAM. + * It references following symbols, which must be defined in code: + * _reset_init : Entry of reset handler + * + * It defines following symbols, which code can use without definition: + * __exidx_start + * __exidx_end + * __etext + * __data_start__ + * __preinit_array_start + * __preinit_array_end + * __init_array_start + * __init_array_end + * __fini_array_start + * __fini_array_end + * __data_end__ + * __bss_start__ + * __bss_end__ + * __end__ + * end + * __HeapLimit + * __StackLimit + * __StackTop + * __stack + */ +ENTRY(Reset_Handler) + +SECTIONS +{ + .text : + { + __vector_table = .; + KEEP(*(.isr_vector)) + *(.text.Reset_Handler) + *(.text.System_Init) + . = ALIGN(4); + + *(.text*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.rodata*) + + KEEP(*(.eh_frame*)) + } > FLASH + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH + + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH + __exidx_end = .; + + __etext = .; + + .data : AT (__etext) + { + __data_start__ = .; + *(vtable) + *(.data*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + . = ALIGN(4); + /* All data end */ + __data_end__ = .; + + } > RAM + + .bss : + { + __bss_start__ = .; + *(.bss*) + *(COMMON) + __bss_end__ = .; + } > RAM + + .heap : + { + __end__ = .; + end = __end__; + *(.heap*) + __HeapLimit = .; + } > RAM + + /* .stack_dummy section doesn't contains any symbols. It is only + * used for linker to calculate size of stack sections, and assign + * values to stack symbols later */ + .stack_dummy : + { + *(.stack) + } > RAM + + /* Set stack top to end of RAM, and stack limit move down by + * size of stack_dummy section */ + __StackTop = ORIGIN(RAM) + LENGTH(RAM); + __StackLimit = __StackTop - SIZEOF(.stack_dummy); + PROVIDE(__stack = __StackTop); + + /* Check if data + heap + stack exceeds RAM limit */ + ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") +} diff --git a/keyboard/infinity/main.cpp b/keyboard/infinity/main.cpp new file mode 100644 index 0000000000..7db59cdfb9 --- /dev/null +++ b/keyboard/infinity/main.cpp @@ -0,0 +1,29 @@ +//#include "mbed.h" +#include "MK20D5.h" +#include "wait.h" +#include "gpio_api.h" +#include "PinNames.h" + + +//DigitalOut led(PTA19); + +int main() { + gpio_t led; + gpio_init_out(&led, PTA19); + while(1) { + gpio_write(&led, 1); + wait_ms(500); + gpio_write(&led, 0); + wait_ms(500); + } +/* + SIM->SCGC6 |= SIM_SCGC5_PORTA_MASK; + PORTA->PCR[19] = PORT_PCR_SRE_MASK | PORT_PCR_DSE_MASK | PORT_PCR_MUX(1); + PTA->PDDR |= (1<<19); + PTA->PSOR |= (1<<19); + while(1) { + PTA->PTOR |= (1<<19); + wait_ms(500); + } +*/ +} -- cgit v1.2.3 From d5e5dbd0aa28477884940ce045da09a9168859d8 Mon Sep 17 00:00:00 2001 From: Jun Wako Date: Fri, 2 Jan 2015 23:19:26 +0900 Subject: Add openocd config files for K20 --- keyboard/infinity/k20dx32_flash.cfg | 124 ++++++++++++++++++++++++++++++++++++ keyboard/infinity/openocd.cfg | 13 ++++ 2 files changed, 137 insertions(+) create mode 100644 keyboard/infinity/k20dx32_flash.cfg create mode 100644 keyboard/infinity/openocd.cfg (limited to 'keyboard') diff --git a/keyboard/infinity/k20dx32_flash.cfg b/keyboard/infinity/k20dx32_flash.cfg new file mode 100644 index 0000000000..714d9991f8 --- /dev/null +++ b/keyboard/infinity/k20dx32_flash.cfg @@ -0,0 +1,124 @@ +# FreeScale Kinetis K20 devices with 32kB Flash and 8kB Local On-Chip SRAM, +# Nemuisan's Special for MK20DN32VFT5,MK20DX32VFT5,MK10DN32VFT5,MK10DX32VFT5 + + +source [find target/swj-dp.tcl] + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME k20 +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +if { [info exists CPUTAPID] } { + set _CPUTAPID $CPUTAPID +} else { + if { [using_jtag] } { + set _CPUTAPID 0x4BA00477 + } { + # this is the SW-DP tap id not the jtag tap id + set _CPUTAPID 0x2BA01477 + } +} + +# Work-area is a space in RAM used for flash programming +# By default use 8kB +if { [info exists WORKAREASIZE] == 0 } { + set _WORKAREASIZE 0x2000 +} + +# Select "srst_only", Nemuisan said so! +echo "Kinetis MUST need Hardware SRST Control to Recover Secure-State!" +adapter_nsrst_delay 200 +reset_config srst_only + +swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME + +# It is important that "kinetis mdm check_security" is called for +# 'examine-end' event and not 'eximine-start'. Calling it in 'examine-start' +# causes "kinetis mdm check_security" to fail the first time openocd +# calls it when it tries to connect after the CPU has been power-cycled. +$_CHIPNAME.cpu configure -event examine-end { + kinetis mdm check_security +# Uncomment when gone into s*ck'n secured state! +# kinetis mdm mass_erase +} + +# K20 has minimun 8kB of SRAM and starts at 1FFFF000. +$_TARGETNAME configure -work-area-phys 0x1FFFF000 -work-area-size $_WORKAREASIZE -work-area-backup 0 -rtos auto + +# MK20DN32VFT5,MK20DX32VFT5,MK10DN32VFT5,MK10DX32VFT5 has 32kB of flash memory. +flash bank $_CHIPNAME.pflash kinetis 0x00000000 0x8000 0 4 $_TARGETNAME + + +proc mt_flash {IMGFILE} { + flash write_image erase $IMGFILE + reset run + halt + verify_image $IMGFILE + reset run + shutdown +} + +proc mt_flash_bin {IMGFILE OFFSET} { + flash write_image erase $IMGFILE $OFFSET bin + reset run + halt + verify_image $IMGFILE $OFFSET bin + reset run + shutdown +} + +proc mt_flash_hex {IMGFILE} { + flash write_image erase $IMGFILE 0 ihex + reset run + halt + verify_image $IMGFILE 0 ihex + reset run + shutdown +} + +proc mt_flash_srec {IMGFILE} { + flash write_image erase $IMGFILE 0 s19 + reset run + halt + verify_image $IMGFILE 0 s19 + reset run + shutdown +} + +proc mass_erase {} { + kinetis mdm mass_erase +} + +proc eraser {} { +# Verbose procedure confirmed erase routine + flash info 0 +# CAUTION! "flash erase_sector 0 0 last" goes into secure state!!! +# USE "mass_erase" command instead of +# flash erase_sector 0 0 last + mass_erase + shutdown +} + + +#debug_level 3 +# HLA doesn't have cortex_m commands +if {![using_hla]} { + # if srst is not fitted use SYSRESETREQ to + # perform a soft reset + cortex_m reset_config sysresetreq +} +adapter_khz 1000 +reset_config srst_only srst_nogate connect_assert_srst +gdb_target_description disable +init +reset init diff --git a/keyboard/infinity/openocd.cfg b/keyboard/infinity/openocd.cfg new file mode 100644 index 0000000000..2b0a63b933 --- /dev/null +++ b/keyboard/infinity/openocd.cfg @@ -0,0 +1,13 @@ +# mchack openocd +# https://github.com/mchck/mchck/wiki/Openocd +# +# adapter: frdm-kl05z with cmsis-dap firmware +# inteface: cmsis-dap +# transport: hla_swd +# target: MK20DX128VLF5 Freescale Kinetis + +# adapter/interface +source [find interface/cmsis-dap.cfg] + +# CPU +source [find k20dx32_flash.cfg] -- cgit v1.2.3 From 4acde45102cbf7b29f524c227bcd1c11aa83ebc0 Mon Sep 17 00:00:00 2001 From: Jun Wako Date: Sat, 3 Jan 2015 20:21:23 +0900 Subject: Fix linker script for NVIC vector on RAM --- keyboard/infinity/infinity.ld | 2 +- keyboard/infinity/main.cpp | 21 ++++++--------------- 2 files changed, 7 insertions(+), 16 deletions(-) (limited to 'keyboard') diff --git a/keyboard/infinity/infinity.ld b/keyboard/infinity/infinity.ld index 5f699a536f..decdaa26e0 100644 --- a/keyboard/infinity/infinity.ld +++ b/keyboard/infinity/infinity.ld @@ -9,7 +9,7 @@ MEMORY { /* Infinity blootloader uses 4KB */ FLASH (rx) : ORIGIN = 4K, LENGTH = 128K - 4K - RAM (rwx) : ORIGIN = 0x1FFFE000, LENGTH = 16K + RAM (rwx) : ORIGIN = 0x1FFFE0F8, LENGTH = 16K - 0xF8 } /* Linker script to place sections and symbol values. Should be used together diff --git a/keyboard/infinity/main.cpp b/keyboard/infinity/main.cpp index 7db59cdfb9..f28840d3ef 100644 --- a/keyboard/infinity/main.cpp +++ b/keyboard/infinity/main.cpp @@ -5,25 +5,16 @@ #include "PinNames.h" -//DigitalOut led(PTA19); - int main() { gpio_t led; gpio_init_out(&led, PTA19); while(1) { - gpio_write(&led, 1); - wait_ms(500); - gpio_write(&led, 0); - wait_ms(500); - } -/* - SIM->SCGC6 |= SIM_SCGC5_PORTA_MASK; - PORTA->PCR[19] = PORT_PCR_SRE_MASK | PORT_PCR_DSE_MASK | PORT_PCR_MUX(1); - PTA->PDDR |= (1<<19); - PTA->PSOR |= (1<<19); - while(1) { - PTA->PTOR |= (1<<19); wait_ms(500); + uint32_t delay = 0xf; + while (delay--) { + uint32_t delay2 = 0xffff; + while (delay2--) ; + } + gpio_write(&led, !gpio_read(&led)); } -*/ } -- cgit v1.2.3 From c6e533ce83d6ae4393e6cdf1f6d39ffefc790115 Mon Sep 17 00:00:00 2001 From: Jun Wako Date: Sun, 4 Jan 2015 03:27:24 +0900 Subject: infinity: Move project specific files to local --- keyboard/infinity/Makefile | 5 +- keyboard/infinity/infinity.ld | 156 ------------- keyboard/infinity/k20dx32_flash.cfg | 124 ---------- keyboard/infinity/mbed-infinity.mk | 45 ++++ keyboard/infinity/mbed-infinity/cmsis_nvic.c | 55 +++++ keyboard/infinity/mbed-infinity/infinity.ld | 156 +++++++++++++ keyboard/infinity/mbed-infinity/system_MK20D5.c | 299 ++++++++++++++++++++++++ keyboard/infinity/openocd.cfg | 13 -- keyboard/infinity/tool/k20dx32_flash.cfg | 124 ++++++++++ keyboard/infinity/tool/openocd.cfg | 13 ++ 10 files changed, 696 insertions(+), 294 deletions(-) delete mode 100644 keyboard/infinity/infinity.ld delete mode 100644 keyboard/infinity/k20dx32_flash.cfg create mode 100644 keyboard/infinity/mbed-infinity.mk create mode 100644 keyboard/infinity/mbed-infinity/cmsis_nvic.c create mode 100644 keyboard/infinity/mbed-infinity/infinity.ld create mode 100644 keyboard/infinity/mbed-infinity/system_MK20D5.c delete mode 100644 keyboard/infinity/openocd.cfg create mode 100644 keyboard/infinity/tool/k20dx32_flash.cfg create mode 100644 keyboard/infinity/tool/openocd.cfg (limited to 'keyboard') diff --git a/keyboard/infinity/Makefile b/keyboard/infinity/Makefile index ec9dc00278..e97f759dfa 100644 --- a/keyboard/infinity/Makefile +++ b/keyboard/infinity/Makefile @@ -24,7 +24,10 @@ INCLUDE_PATHS = -I. #MOUSEKEY_ENABLE = yes -include $(TMK_DIR)/tool/mbed/mk20d50m.mk +include mbed-infinity.mk include $(TMK_DIR)/tool/mbed/mbed.mk include $(TMK_DIR)/tool/mbed/common.mk include $(TMK_DIR)/tool/mbed/gcc.mk + +program: + dfu-util -D $(OBJDIR)/$(PROJECT).bin diff --git a/keyboard/infinity/infinity.ld b/keyboard/infinity/infinity.ld deleted file mode 100644 index decdaa26e0..0000000000 --- a/keyboard/infinity/infinity.ld +++ /dev/null @@ -1,156 +0,0 @@ -/* - * Linker script for Massdrop Infinity - * Infinity has bootloader in top 4KB sector of flash and app should be placed after the area. - * - * based on mbed.org K20 ARM GCC linker script file: MK20D5.ld - */ - -MEMORY -{ - /* Infinity blootloader uses 4KB */ - FLASH (rx) : ORIGIN = 4K, LENGTH = 128K - 4K - RAM (rwx) : ORIGIN = 0x1FFFE0F8, LENGTH = 16K - 0xF8 -} - -/* Linker script to place sections and symbol values. Should be used together - * with other linker script that defines memory regions FLASH and RAM. - * It references following symbols, which must be defined in code: - * _reset_init : Entry of reset handler - * - * It defines following symbols, which code can use without definition: - * __exidx_start - * __exidx_end - * __etext - * __data_start__ - * __preinit_array_start - * __preinit_array_end - * __init_array_start - * __init_array_end - * __fini_array_start - * __fini_array_end - * __data_end__ - * __bss_start__ - * __bss_end__ - * __end__ - * end - * __HeapLimit - * __StackLimit - * __StackTop - * __stack - */ -ENTRY(Reset_Handler) - -SECTIONS -{ - .text : - { - __vector_table = .; - KEEP(*(.isr_vector)) - *(.text.Reset_Handler) - *(.text.System_Init) - . = ALIGN(4); - - *(.text*) - - KEEP(*(.init)) - KEEP(*(.fini)) - - /* .ctors */ - *crtbegin.o(.ctors) - *crtbegin?.o(.ctors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) - *(SORT(.ctors.*)) - *(.ctors) - - /* .dtors */ - *crtbegin.o(.dtors) - *crtbegin?.o(.dtors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) - *(SORT(.dtors.*)) - *(.dtors) - - *(.rodata*) - - KEEP(*(.eh_frame*)) - } > FLASH - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > FLASH - - __exidx_start = .; - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > FLASH - __exidx_end = .; - - __etext = .; - - .data : AT (__etext) - { - __data_start__ = .; - *(vtable) - *(.data*) - - . = ALIGN(4); - /* preinit data */ - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP(*(.preinit_array)) - PROVIDE_HIDDEN (__preinit_array_end = .); - - . = ALIGN(4); - /* init data */ - PROVIDE_HIDDEN (__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE_HIDDEN (__init_array_end = .); - - - . = ALIGN(4); - /* finit data */ - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP(*(SORT(.fini_array.*))) - KEEP(*(.fini_array)) - PROVIDE_HIDDEN (__fini_array_end = .); - - . = ALIGN(4); - /* All data end */ - __data_end__ = .; - - } > RAM - - .bss : - { - __bss_start__ = .; - *(.bss*) - *(COMMON) - __bss_end__ = .; - } > RAM - - .heap : - { - __end__ = .; - end = __end__; - *(.heap*) - __HeapLimit = .; - } > RAM - - /* .stack_dummy section doesn't contains any symbols. It is only - * used for linker to calculate size of stack sections, and assign - * values to stack symbols later */ - .stack_dummy : - { - *(.stack) - } > RAM - - /* Set stack top to end of RAM, and stack limit move down by - * size of stack_dummy section */ - __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - SIZEOF(.stack_dummy); - PROVIDE(__stack = __StackTop); - - /* Check if data + heap + stack exceeds RAM limit */ - ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") -} diff --git a/keyboard/infinity/k20dx32_flash.cfg b/keyboard/infinity/k20dx32_flash.cfg deleted file mode 100644 index 714d9991f8..0000000000 --- a/keyboard/infinity/k20dx32_flash.cfg +++ /dev/null @@ -1,124 +0,0 @@ -# FreeScale Kinetis K20 devices with 32kB Flash and 8kB Local On-Chip SRAM, -# Nemuisan's Special for MK20DN32VFT5,MK20DX32VFT5,MK10DN32VFT5,MK10DX32VFT5 - - -source [find target/swj-dp.tcl] - -if { [info exists CHIPNAME] } { - set _CHIPNAME $CHIPNAME -} else { - set _CHIPNAME k20 -} - -if { [info exists ENDIAN] } { - set _ENDIAN $ENDIAN -} else { - set _ENDIAN little -} - -if { [info exists CPUTAPID] } { - set _CPUTAPID $CPUTAPID -} else { - if { [using_jtag] } { - set _CPUTAPID 0x4BA00477 - } { - # this is the SW-DP tap id not the jtag tap id - set _CPUTAPID 0x2BA01477 - } -} - -# Work-area is a space in RAM used for flash programming -# By default use 8kB -if { [info exists WORKAREASIZE] == 0 } { - set _WORKAREASIZE 0x2000 -} - -# Select "srst_only", Nemuisan said so! -echo "Kinetis MUST need Hardware SRST Control to Recover Secure-State!" -adapter_nsrst_delay 200 -reset_config srst_only - -swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID -set _TARGETNAME $_CHIPNAME.cpu -target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME - -# It is important that "kinetis mdm check_security" is called for -# 'examine-end' event and not 'eximine-start'. Calling it in 'examine-start' -# causes "kinetis mdm check_security" to fail the first time openocd -# calls it when it tries to connect after the CPU has been power-cycled. -$_CHIPNAME.cpu configure -event examine-end { - kinetis mdm check_security -# Uncomment when gone into s*ck'n secured state! -# kinetis mdm mass_erase -} - -# K20 has minimun 8kB of SRAM and starts at 1FFFF000. -$_TARGETNAME configure -work-area-phys 0x1FFFF000 -work-area-size $_WORKAREASIZE -work-area-backup 0 -rtos auto - -# MK20DN32VFT5,MK20DX32VFT5,MK10DN32VFT5,MK10DX32VFT5 has 32kB of flash memory. -flash bank $_CHIPNAME.pflash kinetis 0x00000000 0x8000 0 4 $_TARGETNAME - - -proc mt_flash {IMGFILE} { - flash write_image erase $IMGFILE - reset run - halt - verify_image $IMGFILE - reset run - shutdown -} - -proc mt_flash_bin {IMGFILE OFFSET} { - flash write_image erase $IMGFILE $OFFSET bin - reset run - halt - verify_image $IMGFILE $OFFSET bin - reset run - shutdown -} - -proc mt_flash_hex {IMGFILE} { - flash write_image erase $IMGFILE 0 ihex - reset run - halt - verify_image $IMGFILE 0 ihex - reset run - shutdown -} - -proc mt_flash_srec {IMGFILE} { - flash write_image erase $IMGFILE 0 s19 - reset run - halt - verify_image $IMGFILE 0 s19 - reset run - shutdown -} - -proc mass_erase {} { - kinetis mdm mass_erase -} - -proc eraser {} { -# Verbose procedure confirmed erase routine - flash info 0 -# CAUTION! "flash erase_sector 0 0 last" goes into secure state!!! -# USE "mass_erase" command instead of -# flash erase_sector 0 0 last - mass_erase - shutdown -} - - -#debug_level 3 -# HLA doesn't have cortex_m commands -if {![using_hla]} { - # if srst is not fitted use SYSRESETREQ to - # perform a soft reset - cortex_m reset_config sysresetreq -} -adapter_khz 1000 -reset_config srst_only srst_nogate connect_assert_srst -gdb_target_description disable -init -reset init diff --git a/keyboard/infinity/mbed-infinity.mk b/keyboard/infinity/mbed-infinity.mk new file mode 100644 index 0000000000..cd4434a230 --- /dev/null +++ b/keyboard/infinity/mbed-infinity.mk @@ -0,0 +1,45 @@ +# based on Makefile exported form mbed.org +# see http://mbed.org/handbook/Exporting-to-GCC-ARM-Embedded + +CPU = -mcpu=cortex-m4 -mthumb + +CC_SYMBOLS += \ + -DTARGET_K20D50M \ + -DTARGET_M4 \ + -DTARGET_CORTEX_M \ + -DTARGET_Freescale \ + -DTOOLCHAIN_GCC_ARM \ + -DTOOLCHAIN_GCC \ + -D__CORTEX_M4 \ + -DARM_MATH_CM4 \ + -D__MBED__=1 + +OBJECTS += \ + $(OBJDIR)/mbed-infinity/cmsis_nvic.o \ + $(OBJDIR)/mbed-infinity/system_MK20D5.o \ + $(OBJDIR)/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_GCC_ARM/startup_MK20D5.o \ + $(OBJDIR)/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/analogin_api.o \ + $(OBJDIR)/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/gpio_api.o \ + $(OBJDIR)/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/gpio_irq_api.o \ + $(OBJDIR)/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/i2c_api.o \ + $(OBJDIR)/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/pinmap.o \ + $(OBJDIR)/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/port_api.o \ + $(OBJDIR)/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/pwmout_api.o \ + $(OBJDIR)/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/rtc_api.o \ + $(OBJDIR)/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/serial_api.o \ + $(OBJDIR)/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/sleep.o \ + $(OBJDIR)/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/spi_api.o \ + $(OBJDIR)/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/us_ticker.o + +INCLUDE_PATHS += \ + -Imbed \ + -I$(MBED_DIR)/libraries/mbed/targets \ + -I$(MBED_DIR)/libraries/mbed/targets/cmsis \ + -I$(MBED_DIR)/libraries/mbed/targets/cmsis/TARGET_Freescale \ + -I$(MBED_DIR)/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M \ + -I$(MBED_DIR)/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_GCC_ARM \ + -I$(MBED_DIR)/libraries/mbed/targets/hal \ + -I$(MBED_DIR)/libraries/mbed/targets/hal/TARGET_Freescale \ + -I$(MBED_DIR)/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M + +LINKER_SCRIPT = mbed-infinity/infinity.ld diff --git a/keyboard/infinity/mbed-infinity/cmsis_nvic.c b/keyboard/infinity/mbed-infinity/cmsis_nvic.c new file mode 100644 index 0000000000..985c1d33f5 --- /dev/null +++ b/keyboard/infinity/mbed-infinity/cmsis_nvic.c @@ -0,0 +1,55 @@ +/* mbed Microcontroller Library + * CMSIS-style functionality to support dynamic vectors + ******************************************************************************* + * Copyright (c) 2011 ARM Limited. All rights reserved. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of ARM Limited nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + */ +#include "cmsis_nvic.h" + +#define NVIC_RAM_VECTOR_ADDRESS (0x1FFFE000) // Vectors positioned at start of RAM +#define NVIC_FLASH_VECTOR_ADDRESS (0x1000) // Initial vector position in flash + +void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { + uint32_t *vectors = (uint32_t*)SCB->VTOR; + uint32_t i; + + // Copy and switch to dynamic vectors if the first time called + if (SCB->VTOR == NVIC_FLASH_VECTOR_ADDRESS) { + uint32_t *old_vectors = vectors; + vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS; + for (i=0; iVTOR = (uint32_t)NVIC_RAM_VECTOR_ADDRESS; + } + vectors[IRQn + 16] = vector; +} + +uint32_t NVIC_GetVector(IRQn_Type IRQn) { + uint32_t *vectors = (uint32_t*)SCB->VTOR; + return vectors[IRQn + 16]; +} diff --git a/keyboard/infinity/mbed-infinity/infinity.ld b/keyboard/infinity/mbed-infinity/infinity.ld new file mode 100644 index 0000000000..decdaa26e0 --- /dev/null +++ b/keyboard/infinity/mbed-infinity/infinity.ld @@ -0,0 +1,156 @@ +/* + * Linker script for Massdrop Infinity + * Infinity has bootloader in top 4KB sector of flash and app should be placed after the area. + * + * based on mbed.org K20 ARM GCC linker script file: MK20D5.ld + */ + +MEMORY +{ + /* Infinity blootloader uses 4KB */ + FLASH (rx) : ORIGIN = 4K, LENGTH = 128K - 4K + RAM (rwx) : ORIGIN = 0x1FFFE0F8, LENGTH = 16K - 0xF8 +} + +/* Linker script to place sections and symbol values. Should be used together + * with other linker script that defines memory regions FLASH and RAM. + * It references following symbols, which must be defined in code: + * _reset_init : Entry of reset handler + * + * It defines following symbols, which code can use without definition: + * __exidx_start + * __exidx_end + * __etext + * __data_start__ + * __preinit_array_start + * __preinit_array_end + * __init_array_start + * __init_array_end + * __fini_array_start + * __fini_array_end + * __data_end__ + * __bss_start__ + * __bss_end__ + * __end__ + * end + * __HeapLimit + * __StackLimit + * __StackTop + * __stack + */ +ENTRY(Reset_Handler) + +SECTIONS +{ + .text : + { + __vector_table = .; + KEEP(*(.isr_vector)) + *(.text.Reset_Handler) + *(.text.System_Init) + . = ALIGN(4); + + *(.text*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.rodata*) + + KEEP(*(.eh_frame*)) + } > FLASH + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH + + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH + __exidx_end = .; + + __etext = .; + + .data : AT (__etext) + { + __data_start__ = .; + *(vtable) + *(.data*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + . = ALIGN(4); + /* All data end */ + __data_end__ = .; + + } > RAM + + .bss : + { + __bss_start__ = .; + *(.bss*) + *(COMMON) + __bss_end__ = .; + } > RAM + + .heap : + { + __end__ = .; + end = __end__; + *(.heap*) + __HeapLimit = .; + } > RAM + + /* .stack_dummy section doesn't contains any symbols. It is only + * used for linker to calculate size of stack sections, and assign + * values to stack symbols later */ + .stack_dummy : + { + *(.stack) + } > RAM + + /* Set stack top to end of RAM, and stack limit move down by + * size of stack_dummy section */ + __StackTop = ORIGIN(RAM) + LENGTH(RAM); + __StackLimit = __StackTop - SIZEOF(.stack_dummy); + PROVIDE(__stack = __StackTop); + + /* Check if data + heap + stack exceeds RAM limit */ + ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") +} diff --git a/keyboard/infinity/mbed-infinity/system_MK20D5.c b/keyboard/infinity/mbed-infinity/system_MK20D5.c new file mode 100644 index 0000000000..4f4e2a2624 --- /dev/null +++ b/keyboard/infinity/mbed-infinity/system_MK20D5.c @@ -0,0 +1,299 @@ +/* +** ################################################################### +** Compilers: ARM Compiler +** Freescale C/C++ for Embedded ARM +** GNU C Compiler +** IAR ANSI C/C++ Compiler for ARM +** +** Reference manuals: K20P64M50SF0RM Rev. 1, Oct 2011 +** K20P32M50SF0RM Rev. 1, Oct 2011 +** K20P48M50SF0RM Rev. 1, Oct 2011 +** +** Version: rev. 1.0, 2011-12-15 +** +** Abstract: +** Provides a system configuration function and a global variable that +** contains the system frequency. It configures the device and initializes +** the oscillator (PLL) that is part of the microcontroller device. +** +** Copyright: 2011 Freescale Semiconductor, Inc. All Rights Reserved. +** +** http: www.freescale.com +** mail: support@freescale.com +** +** Revisions: +** - rev. 1.0 (2011-12-15) +** Initial version +** +** ################################################################### +*/ + +/** + * @file MK20D5 + * @version 1.0 + * @date 2011-12-15 + * @brief Device specific configuration file for MK20D5 (implementation file) + * + * Provides a system configuration function and a global variable that contains + * the system frequency. It configures the device and initializes the oscillator + * (PLL) that is part of the microcontroller device. + */ + +#include +#include "MK20D5.h" + +#define DISABLE_WDOG 1 + +#define CLOCK_SETUP 3 +/* Predefined clock setups + 0 ... Multipurpose Clock Generator (MCG) in FLL Engaged Internal (FEI) mode + Reference clock source for MCG module is the slow internal clock source 32.768kHz + Core clock = 41.94MHz, BusClock = 41.94MHz + 1 ... Multipurpose Clock Generator (MCG) in PLL Engaged External (PEE) mode + Reference clock source for MCG module is an external crystal 8MHz + Core clock = 48MHz, BusClock = 48MHz + 2 ... Multipurpose Clock Generator (MCG) in Bypassed Low Power External (BLPE) mode + Core clock/Bus clock derived directly from an external crystal 8MHz with no multiplication + Core clock = 8MHz, BusClock = 8MHz +*/ + +/*---------------------------------------------------------------------------- + Define clock source values + *----------------------------------------------------------------------------*/ +#if (CLOCK_SETUP == 0) + #define CPU_XTAL_CLK_HZ 8000000u /* Value of the external crystal or oscillator clock frequency in Hz */ + #define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */ + #define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */ + #define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */ + #define DEFAULT_SYSTEM_CLOCK 41943040u /* Default System clock value */ +#elif (CLOCK_SETUP == 1) + #define CPU_XTAL_CLK_HZ 8000000u /* Value of the external crystal or oscillator clock frequency in Hz */ + #define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */ + #define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */ + #define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */ + #define DEFAULT_SYSTEM_CLOCK 48000000u /* Default System clock value */ +#elif (CLOCK_SETUP == 2) + #define CPU_XTAL_CLK_HZ 8000000u /* Value of the external crystal or oscillator clock frequency in Hz */ + #define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */ + #define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */ + #define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */ + #define DEFAULT_SYSTEM_CLOCK 8000000u /* Default System clock value */ +#elif (CLOCK_SETUP == 3) + /* for Infinity */ + #define CPU_XTAL_CLK_HZ 8000000u + #define CPU_XTAL32k_CLK_HZ 32768u + #define CPU_INT_SLOW_CLK_HZ 32768u + #define CPU_INT_FAST_CLK_HZ 4000000u + #define DEFAULT_SYSTEM_CLOCK 48000000u +#endif + + +/* ---------------------------------------------------------------------------- + -- Core clock + ---------------------------------------------------------------------------- */ + +uint32_t SystemCoreClock = DEFAULT_SYSTEM_CLOCK; + +/* ---------------------------------------------------------------------------- + -- SystemInit() + ---------------------------------------------------------------------------- */ + +void SystemInit (void) { +#if (DISABLE_WDOG) + /* Disable the WDOG module */ + /* WDOG_UNLOCK: WDOGUNLOCK=0xC520 */ + WDOG->UNLOCK = (uint16_t)0xC520u; /* Key 1 */ + /* WDOG_UNLOCK : WDOGUNLOCK=0xD928 */ + WDOG->UNLOCK = (uint16_t)0xD928u; /* Key 2 */ + /* WDOG_STCTRLH: ??=0,DISTESTWDOG=0,BYTESEL=0,TESTSEL=0,TESTWDOG=0,??=0,STNDBYEN=1,WAITEN=1,STOPEN=1,DBGEN=0,ALLOWUPDATE=1,WINEN=0,IRQRSTEN=0,CLKSRC=1,WDOGEN=0 */ + WDOG->STCTRLH = (uint16_t)0x01D2u; +#endif /* (DISABLE_WDOG) */ +#if (CLOCK_SETUP == 0) + /* SIM->CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV3=1,OUTDIV4=1,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */ + SIM->CLKDIV1 = (uint32_t)0x00110000u; /* Update system prescalers */ + /* Switch to FEI Mode */ + /* MCG->C1: CLKS=0,FRDIV=0,IREFS=1,IRCLKEN=1,IREFSTEN=0 */ + MCG->C1 = (uint8_t)0x06u; + /* MCG->C2: ??=0,??=0,RANGE0=0,HGO=0,EREFS=0,LP=0,IRCS=0 */ + MCG->C2 = (uint8_t)0x00u; + /* MCG_C4: DMX32=0,DRST_DRS=1 */ + MCG->C4 = (uint8_t)((MCG->C4 & (uint8_t)~(uint8_t)0xC0u) | (uint8_t)0x20u); + /* MCG->C5: ??=0,PLLCLKEN=0,PLLSTEN=0,PRDIV0=0 */ + MCG->C5 = (uint8_t)0x00u; + /* MCG->C6: LOLIE=0,PLLS=0,CME=0,VDIV0=0 */ + MCG->C6 = (uint8_t)0x00u; + while((MCG->S & MCG_S_IREFST_MASK) == 0u) { /* Check that the source of the FLL reference clock is the internal reference clock. */ + } + while((MCG->S & 0x0Cu) != 0x00u) { /* Wait until output of the FLL is selected */ + } +#elif (CLOCK_SETUP == 1) + /* SIM->CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV3=1,OUTDIV4=1,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */ + SIM->CLKDIV1 = (uint32_t)0x00110000u; /* Update system prescalers */ + /* Switch to FBE Mode */ + /* OSC0->CR: ERCLKEN=0,??=0,EREFSTEN=0,??=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */ + OSC0->CR = (uint8_t)0x00u; + /* MCG->C7: OSCSEL=0 */ + MCG->C7 = (uint8_t)0x00u; + /* MCG->C2: ??=0,??=0,RANGE0=2,HGO=0,EREFS=1,LP=0,IRCS=0 */ + MCG->C2 = (uint8_t)0x24u; + /* MCG->C1: CLKS=2,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */ + MCG->C1 = (uint8_t)0x9Au; + /* MCG->C4: DMX32=0,DRST_DRS=0 */ + MCG->C4 &= (uint8_t)~(uint8_t)0xE0u; + /* MCG->C5: ??=0,PLLCLKEN=0,PLLSTEN=0,PRDIV0=3 */ + MCG->C5 = (uint8_t)0x03u; + /* MCG->C6: LOLIE=0,PLLS=0,CME=0,VDIV0=0 */ + MCG->C6 = (uint8_t)0x00u; + while((MCG->S & MCG_S_OSCINIT0_MASK) == 0u) { /* Check that the oscillator is running */ + } +#if 0 /* ARM: THIS CHECK IS REMOVED DUE TO BUG WITH SLOW IRC IN REV. 1.0 */ + while((MCG->S & MCG_S_IREFST_MASK) != 0u) { /* Check that the source of the FLL reference clock is the external reference clock. */ + } +#endif + while((MCG->S & 0x0Cu) != 0x08u) { /* Wait until external reference clock is selected as MCG output */ + } + /* Switch to PBE Mode */ + /* MCG_C5: ??=0,PLLCLKEN=0,PLLSTEN=0,PRDIV0=3 */ + MCG->C5 = (uint8_t)0x03u; + /* MCG->C6: LOLIE=0,PLLS=1,CME=0,VDIV0=0 */ + MCG->C6 = (uint8_t)0x40u; + while((MCG->S & MCG_S_PLLST_MASK) == 0u) { /* Wait until the source of the PLLS clock has switched to the PLL */ + } + while((MCG->S & MCG_S_LOCK0_MASK) == 0u) { /* Wait until locked */ + } + /* Switch to PEE Mode */ + /* MCG->C1: CLKS=0,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */ + MCG->C1 = (uint8_t)0x1Au; + while((MCG->S & 0x0Cu) != 0x0Cu) { /* Wait until output of the PLL is selected */ + } + while((MCG->S & MCG_S_LOCK0_MASK) == 0u) { /* Wait until locked */ + } +#elif (CLOCK_SETUP == 2) + /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV3=1,OUTDIV4=1,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */ + SIM->CLKDIV1 = (uint32_t)0x00110000u; /* Update system prescalers */ + /* Switch to FBE Mode */ + /* OSC0->CR: ERCLKEN=0,??=0,EREFSTEN=0,??=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */ + OSC0->CR = (uint8_t)0x00u; + /* MCG->C7: OSCSEL=0 */ + MCG->C7 = (uint8_t)0x00u; + /* MCG->C2: ??=0,??=0,RANGE0=2,HGO=0,EREFS=1,LP=0,IRCS=0 */ + MCG->C2 = (uint8_t)0x24u; + /* MCG->C1: CLKS=2,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */ + MCG->C1 = (uint8_t)0x9Au; + /* MCG->C4: DMX32=0,DRST_DRS=0 */ + MCG->C4 &= (uint8_t)~(uint8_t)0xE0u; + /* MCG->C5: ??=0,PLLCLKEN=0,PLLSTEN=0,PRDIV0=0 */ + MCG->C5 = (uint8_t)0x00u; + /* MCG->C6: LOLIE=0,PLLS=0,CME=0,VDIV0=0 */ + MCG->C6 = (uint8_t)0x00u; + while((MCG->S & MCG_S_OSCINIT0_MASK) == 0u) { /* Check that the oscillator is running */ + } +#if 0 /* ARM: THIS CHECK IS REMOVED DUE TO BUG WITH SLOW IRC IN REV. 1.0 */ + while((MCG->S & MCG_S_IREFST_MASK) != 0u) { /* Check that the source of the FLL reference clock is the external reference clock. */ + } +#endif + while((MCG->S & 0x0CU) != 0x08u) { /* Wait until external reference clock is selected as MCG output */ + } + /* Switch to BLPE Mode */ + /* MCG->C2: ??=0,??=0,RANGE0=2,HGO=0,EREFS=1,LP=0,IRCS=0 */ + MCG->C2 = (uint8_t)0x24u; + +#elif (CLOCK_SETUP == 3) + /* for Infinity FEI: 48MHz */ + + /* OUTDIV1(core/system): 48/1, OUTDIV2(bus): 48/1, OUTDIV4(flash): 48/2 */ + SIM->CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(0) | SIM_CLKDIV1_OUTDIV4(1); + MCG->C1 = MCG_C1_IREFS_MASK | MCG_C1_IRCLKEN_MASK; + /* 32.768KHz x FLL(1464) = 48MHz */ + MCG->C4 = MCG_C4_DMX32_MASK | MCG_C4_DRST_DRS(1); + /* USB clock source: MCGPLLCLK/MCGFLLCLK */ + //SIM->SOPT2 = SIM_SOPT2_USBSRC_MASK | SIM_SOPT2_TRACECLKSEL_MASK; + + while((MCG->S & MCG_S_IREFST_MASK) == 0u) { } + while((MCG->S & 0x0Cu) != 0x00u) { } +#endif +} + +/* ---------------------------------------------------------------------------- + -- SystemCoreClockUpdate() + ---------------------------------------------------------------------------- */ + +void SystemCoreClockUpdate (void) { + uint32_t MCGOUTClock; /* Variable to store output clock frequency of the MCG module */ + uint8_t Divider; + + if ((MCG->C1 & MCG_C1_CLKS_MASK) == 0x0u) { + /* Output of FLL or PLL is selected */ + if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x0u) { + /* FLL is selected */ + if ((MCG->C1 & MCG_C1_IREFS_MASK) == 0x0u) { + /* External reference clock is selected */ + if ((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x0u) { + MCGOUTClock = CPU_XTAL_CLK_HZ; /* System oscillator drives MCG clock */ + } else { /* (!((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x0u)) */ + MCGOUTClock = CPU_XTAL32k_CLK_HZ; /* RTC 32 kHz oscillator drives MCG clock */ + } /* (!((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x0u)) */ + Divider = (uint8_t)(1u << ((MCG->C1 & MCG_C1_FRDIV_MASK) >> MCG_C1_FRDIV_SHIFT)); + MCGOUTClock = (MCGOUTClock / Divider); /* Calculate the divided FLL reference clock */ + if ((MCG->C2 & MCG_C2_RANGE0_MASK) != 0x0u) { + MCGOUTClock /= 32u; /* If high range is enabled, additional 32 divider is active */ + } /* ((MCG->C2 & MCG_C2_RANGE0_MASK) != 0x0u) */ + } else { /* (!((MCG->C1 & MCG_C1_IREFS_MASK) == 0x0u)) */ + MCGOUTClock = CPU_INT_SLOW_CLK_HZ; /* The slow internal reference clock is selected */ + } /* (!((MCG->C1 & MCG_C1_IREFS_MASK) == 0x0u)) */ + /* Select correct multiplier to calculate the MCG output clock */ + switch (MCG->C4 & (MCG_C4_DMX32_MASK | MCG_C4_DRST_DRS_MASK)) { + case 0x0u: + MCGOUTClock *= 640u; + break; + case 0x20u: + MCGOUTClock *= 1280u; + break; + case 0x40u: + MCGOUTClock *= 1920u; + break; + case 0x60u: + MCGOUTClock *= 2560u; + break; + case 0x80u: + MCGOUTClock *= 732u; + break; + case 0xA0u: + MCGOUTClock *= 1464u; + break; + case 0xC0u: + MCGOUTClock *= 2197u; + break; + case 0xE0u: + MCGOUTClock *= 2929u; + break; + default: + break; + } + } else { /* (!((MCG->C6 & MCG_C6_PLLS_MASK) == 0x0u)) */ + /* PLL is selected */ + Divider = (1u + (MCG->C5 & MCG_C5_PRDIV0_MASK)); + MCGOUTClock = (uint32_t)(CPU_XTAL_CLK_HZ / Divider); /* Calculate the PLL reference clock */ + Divider = ((MCG->C6 & MCG_C6_VDIV0_MASK) + 24u); + MCGOUTClock *= Divider; /* Calculate the MCG output clock */ + } /* (!((MCG->C6 & MCG_C6_PLLS_MASK) == 0x0u)) */ + } else if ((MCG->C1 & MCG_C1_CLKS_MASK) == 0x40u) { + /* Internal reference clock is selected */ + if ((MCG->C2 & MCG_C2_IRCS_MASK) == 0x0u) { + MCGOUTClock = CPU_INT_SLOW_CLK_HZ; /* Slow internal reference clock selected */ + } else { /* (!((MCG->C2 & MCG_C2_IRCS_MASK) == 0x0u)) */ + MCGOUTClock = CPU_INT_FAST_CLK_HZ / (1 << ((MCG->SC & MCG_SC_FCRDIV_MASK) >> MCG_SC_FCRDIV_SHIFT)); /* Fast internal reference clock selected */ + } /* (!((MCG->C2 & MCG_C2_IRCS_MASK) == 0x0u)) */ + } else if ((MCG->C1 & MCG_C1_CLKS_MASK) == 0x80u) { + /* External reference clock is selected */ + if ((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x0u) { + MCGOUTClock = CPU_XTAL_CLK_HZ; /* System oscillator drives MCG clock */ + } else { /* (!((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x0u)) */ + MCGOUTClock = CPU_XTAL32k_CLK_HZ; /* RTC 32 kHz oscillator drives MCG clock */ + } /* (!((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x0u)) */ + } else { /* (!((MCG->C1 & MCG_C1_CLKS_MASK) == 0x80u)) */ + /* Reserved value */ + return; + } /* (!((MCG->C1 & MCG_C1_CLKS_MASK) == 0x80u)) */ + SystemCoreClock = (MCGOUTClock / (1u + ((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV1_MASK) >> SIM_CLKDIV1_OUTDIV1_SHIFT))); +} diff --git a/keyboard/infinity/openocd.cfg b/keyboard/infinity/openocd.cfg deleted file mode 100644 index 2b0a63b933..0000000000 --- a/keyboard/infinity/openocd.cfg +++ /dev/null @@ -1,13 +0,0 @@ -# mchack openocd -# https://github.com/mchck/mchck/wiki/Openocd -# -# adapter: frdm-kl05z with cmsis-dap firmware -# inteface: cmsis-dap -# transport: hla_swd -# target: MK20DX128VLF5 Freescale Kinetis - -# adapter/interface -source [find interface/cmsis-dap.cfg] - -# CPU -source [find k20dx32_flash.cfg] diff --git a/keyboard/infinity/tool/k20dx32_flash.cfg b/keyboard/infinity/tool/k20dx32_flash.cfg new file mode 100644 index 0000000000..714d9991f8 --- /dev/null +++ b/keyboard/infinity/tool/k20dx32_flash.cfg @@ -0,0 +1,124 @@ +# FreeScale Kinetis K20 devices with 32kB Flash and 8kB Local On-Chip SRAM, +# Nemuisan's Special for MK20DN32VFT5,MK20DX32VFT5,MK10DN32VFT5,MK10DX32VFT5 + + +source [find target/swj-dp.tcl] + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME k20 +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +if { [info exists CPUTAPID] } { + set _CPUTAPID $CPUTAPID +} else { + if { [using_jtag] } { + set _CPUTAPID 0x4BA00477 + } { + # this is the SW-DP tap id not the jtag tap id + set _CPUTAPID 0x2BA01477 + } +} + +# Work-area is a space in RAM used for flash programming +# By default use 8kB +if { [info exists WORKAREASIZE] == 0 } { + set _WORKAREASIZE 0x2000 +} + +# Select "srst_only", Nemuisan said so! +echo "Kinetis MUST need Hardware SRST Control to Recover Secure-State!" +adapter_nsrst_delay 200 +reset_config srst_only + +swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME + +# It is important that "kinetis mdm check_security" is called for +# 'examine-end' event and not 'eximine-start'. Calling it in 'examine-start' +# causes "kinetis mdm check_security" to fail the first time openocd +# calls it when it tries to connect after the CPU has been power-cycled. +$_CHIPNAME.cpu configure -event examine-end { + kinetis mdm check_security +# Uncomment when gone into s*ck'n secured state! +# kinetis mdm mass_erase +} + +# K20 has minimun 8kB of SRAM and starts at 1FFFF000. +$_TARGETNAME configure -work-area-phys 0x1FFFF000 -work-area-size $_WORKAREASIZE -work-area-backup 0 -rtos auto + +# MK20DN32VFT5,MK20DX32VFT5,MK10DN32VFT5,MK10DX32VFT5 has 32kB of flash memory. +flash bank $_CHIPNAME.pflash kinetis 0x00000000 0x8000 0 4 $_TARGETNAME + + +proc mt_flash {IMGFILE} { + flash write_image erase $IMGFILE + reset run + halt + verify_image $IMGFILE + reset run + shutdown +} + +proc mt_flash_bin {IMGFILE OFFSET} { + flash write_image erase $IMGFILE $OFFSET bin + reset run + halt + verify_image $IMGFILE $OFFSET bin + reset run + shutdown +} + +proc mt_flash_hex {IMGFILE} { + flash write_image erase $IMGFILE 0 ihex + reset run + halt + verify_image $IMGFILE 0 ihex + reset run + shutdown +} + +proc mt_flash_srec {IMGFILE} { + flash write_image erase $IMGFILE 0 s19 + reset run + halt + verify_image $IMGFILE 0 s19 + reset run + shutdown +} + +proc mass_erase {} { + kinetis mdm mass_erase +} + +proc eraser {} { +# Verbose procedure confirmed erase routine + flash info 0 +# CAUTION! "flash erase_sector 0 0 last" goes into secure state!!! +# USE "mass_erase" command instead of +# flash erase_sector 0 0 last + mass_erase + shutdown +} + + +#debug_level 3 +# HLA doesn't have cortex_m commands +if {![using_hla]} { + # if srst is not fitted use SYSRESETREQ to + # perform a soft reset + cortex_m reset_config sysresetreq +} +adapter_khz 1000 +reset_config srst_only srst_nogate connect_assert_srst +gdb_target_description disable +init +reset init diff --git a/keyboard/infinity/tool/openocd.cfg b/keyboard/infinity/tool/openocd.cfg new file mode 100644 index 0000000000..2b0a63b933 --- /dev/null +++ b/keyboard/infinity/tool/openocd.cfg @@ -0,0 +1,13 @@ +# mchack openocd +# https://github.com/mchck/mchck/wiki/Openocd +# +# adapter: frdm-kl05z with cmsis-dap firmware +# inteface: cmsis-dap +# transport: hla_swd +# target: MK20DX128VLF5 Freescale Kinetis + +# adapter/interface +source [find interface/cmsis-dap.cfg] + +# CPU +source [find k20dx32_flash.cfg] -- cgit v1.2.3 From d0fefb76f8a1430c749e67bc72b4dba00c7143c9 Mon Sep 17 00:00:00 2001 From: Jun Wako Date: Sun, 4 Jan 2015 17:03:47 +0900 Subject: infinity: Add initial files for keyboard support --- keyboard/infinity/MEMO.txt | 398 ---------------- keyboard/infinity/Makefile | 6 +- keyboard/infinity/README | 81 ++++ keyboard/infinity/keymap.c | 47 ++ keyboard/infinity/keymap_common.c | 30 ++ keyboard/infinity/keymap_common.h | 58 +++ keyboard/infinity/led.c | 25 + keyboard/infinity/main.cpp | 38 +- keyboard/infinity/matrix.c | 107 +++++ keyboard/infinity/mbed-infinity.mk | 2 + keyboard/infinity/mbed-infinity/README | 39 ++ keyboard/infinity/mbed-infinity/USBHAL_KL25Z.cpp | 557 +++++++++++++++++++++++ keyboard/infinity/tool/README | 25 + 13 files changed, 1007 insertions(+), 406 deletions(-) delete mode 100644 keyboard/infinity/MEMO.txt create mode 100644 keyboard/infinity/README create mode 100644 keyboard/infinity/keymap.c create mode 100644 keyboard/infinity/keymap_common.c create mode 100644 keyboard/infinity/keymap_common.h create mode 100644 keyboard/infinity/led.c create mode 100644 keyboard/infinity/matrix.c create mode 100644 keyboard/infinity/mbed-infinity/README create mode 100644 keyboard/infinity/mbed-infinity/USBHAL_KL25Z.cpp create mode 100644 keyboard/infinity/tool/README (limited to 'keyboard') diff --git a/keyboard/infinity/MEMO.txt b/keyboard/infinity/MEMO.txt deleted file mode 100644 index ca0da937d7..0000000000 --- a/keyboard/infinity/MEMO.txt +++ /dev/null @@ -1,398 +0,0 @@ -mbed patch for Infinity ------------------------ -Without ld script patch vector table it doesn't place vector table in binary file. -And clock setting is changed as Infinity uses internal oscillator instead of exteranl crystal. - -diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_GCC_ARM/MK20D5.ld b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_GCC_ARM/MK20D5.ld -index 600751c..55c3393 100644 ---- a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_GCC_ARM/MK20D5.ld -+++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_GCC_ARM/MK20D5.ld -@@ -43,7 +43,7 @@ SECTIONS - .isr_vector : - { - __vector_table = .; -- KEEP(*(.vector_table)) -+ KEEP(*(.isr_vector)) - *(.text.Reset_Handler) - *(.text.System_Init) - . = ALIGN(4); -diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/system_MK20D5.c b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/system_MK20D5.c -index 393d1f0..b78b71a 100644 ---- a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/system_MK20D5.c -+++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/system_MK20D5.c -@@ -44,7 +44,7 @@ - - #define DISABLE_WDOG 1 - --#define CLOCK_SETUP 1 -+#define CLOCK_SETUP 0 - /* Predefined clock setups - 0 ... Multipurpose Clock Generator (MCG) in FLL Engaged Internal (FEI) mode - Reference clock source for MCG module is the slow internal clock source 32.768kHz - - - -CMSIS/mbed HAL -============== -http://developer.mbed.org/users/MACRUM/notebook/mbed-library-internals/ - -api/ mbed API -├── AnalogIn.h -├── AnalogOut.h -├── BusIn.h -├── BusInOut.h -├── BusOut.h -├── CallChain.h -├── CAN.h -├── can_helper.h -├── DigitalIn.h -├── DigitalInOut.h -├── DigitalOut.h -├── DirHandle.h -├── Ethernet.h -├── FileBase.h -├── FileHandle.h -├── FileLike.h -├── FilePath.h -├── FileSystemLike.h -├── FunctionPointer.h -├── I2C.h -├── I2CSlave.h -├── InterruptIn.h -├── InterruptManager.h -├── LocalFileSystem.h -├── mbed_assert.h -├── mbed_debug.h -├── mbed_error.h -├── mbed.h -├── mbed_interface.h -├── platform.h -├── PortIn.h -├── PortInOut.h -├── PortOut.h -├── PwmOut.h -├── RawSerial.h -├── rtc_time.h -├── semihost_api.h -├── SerialBase.h -├── Serial.h -├── SPI.h -├── SPISlave.h -├── Stream.h -├── Ticker.h -├── Timeout.h -├── TimerEvent.h -├── Timer.h -├── toolchain.h -└── wait_api.h - -common/ mbed API implementation - -hal/ mbed HAL implementation interface -├── analogin_api.h -├── analogout_api.h -├── can_api.h -├── ethernet_api.h -├── gpio_api.h -├── gpio_irq_api.h -├── i2c_api.h -├── pinmap.h -├── port_api.h -├── pwmout_api.h -├── rtc_api.h -├── serial_api.h -├── sleep_api.h -├── spi_api.h -└── us_ticker_api.h - -targets/hal/TARGET_/TARGET_/ - mbed HAL implementation - -targets/cmsis/ CMSIS interface - core_caInstr.h - core_ca9.h - core_cmFunc.h - core_caFunc.h - core_cmInstr.h - core_cm4_simd.h - core_ca_mmu.h - core_cm0.h - core_cm0plus.h - core_cm3.h - core_cm4.h - -targets/cmsis/TARGET_/TARGET_/ - .h - system_.[ch] - cmsis.h　 - cmsis_nvic.[ch] - -targets/cmsis/TARGET_/TARGET_/TOOLSCHAIN_/ - startup_.s - linker-script - - - -Infinity -======== -Massdrop Infinity Keyboard: -https://www.massdrop.com/buy/infinity-keyboard-kit - -Freescale MK20DX128VLF5 48-QFP: -http://cache.freescale.com/files/32bit/doc/data_sheet/K20P48M50SF0.pdf - -kiibohd controller(MD1): -https://github.com/kiibohd/controller - -DFU bootloader: -https://github.com/kiibohd/controller/tree/master/Bootloader - -Program with bootloader: - $ dfu-util -D kiibohd.dfu.bin - -Pinout: -https://github.com/kiibohd/controller/blob/master/Scan/MD1/pinout - - - -Pin Usage -========= - -mk20dx128vlf5 - - ---- -|Keys| - ---- - -* Strobe (Columns) - -PTB0 -PTB1 -PTB2 -PTB3 -PTB16 -PTB17 -PTC4 -PTC5 -PTD0 - - -* Sense (Rows) - -PTD1 -PTD2 -PTD3 -PTD4 -PTD5 -PTD6 -PTD7 - - - ----- -|Debug| - ----- - -* SWD - -PTA0 (Pull-down) -PTA3 (Pull-up) - -* LEDs - -PTA19 (LED only for PCB, not McHCK) (XTAL) - -* UARTs - -PTA1 - RX0 -PTA2 - TX0 - - - ------ -|Unused| - ------ - -* GPIO - -PTA1 (Not broken out on PCB, available on McHCK) (Pull-up) -PTA2 (") -PTA4 (Pull-up) -PTA18 (EXTAL) - -PTC0 -PTC1 -PTC2 -PTC3 -PTC6 -PTC7 - -* Analog - -ADC0_DP0 -ADC0_DM0 - - - -Freescale kinetis MK20DX128 -=========================== -If FSEC of flash config at 0x400-40F is changed accidentally SWD/JTAG debug access will be lost and very difficult to get back. -For example, high level adapter like stlink cannot work to get access back after FSEC is changed. To regain the chip to be programmable low level DAP inteface like JTAG, CMSIS-DAP or OpenSAD. - - -Memory map -========== -kiibohd bootloader: Lib/mk20dx128vlf5.bootloader.ld -0x0000_0000 +-------------------+ -----------------+---------------+ - | .vectors | ---------. | StackPointer0 | - | .startup | \ | ResetHandler1 | - | .rodata | \ | ... | -0x0000_0400 | .flashconfig | 0x10 \ | ... | - | .text | \ | ... 61 | 0xF7 - | .init | `--+---------------+ 0xF8 -0x0000_1000 +-------------------+ 4KB - | _app_rom | - ~ ~ - ~ ~ - | | -0x07FF_FFFF +-------------------+ 128KB - - -0x1FFF_E000 +-------------------+ - | | - | RAM | - | 8KB| -0x2000_0000 +-------------------+ - | | - | RAM | - | 8KB| -0x2000_2000 +-------------------+ _estack - - - - - -OpenOCD -======== -Synopsis of SWD, JTAG and SWJ-DP transport: -https://fedcsis.org/proceedings/2012/pliks/279.pdf - -OpenSDA Freescale: Mass storage bootloader & serial port; part of CMSIS-DAP? -http://cache.freescale.com/files/32bit/doc/user_guide/OPENSDAUG.pdf - - -interface_list: - 1: ftdi - 2: usb_blaster - 3: usbprog - 4: jlink - 5: vsllink - 6: rlink - 7: ulink - 8: arm-jtag-ew - 9: hla - 10: osbdm - 11: opendous - 12: aice - 13: cmsis-dap - -transport list: - stlink_swim - hla_jtag - hla_swd - aice_jtag - swd - cmsis-dap - jtag - -target types: - arm7tdmi - arm9tdmi - arm920t - arm720t - arm966e - arm946e - arm926ejs - fa526 - feroceon - dragonite - xscale - cortex_m - cortex_a - cortex_r4 - arm11 - mips_m4k - avr - dsp563xx - dsp5680xx - testee - avr32_ap7k - hla_target - nds32_v2 - nds32_v3 - nds32_v3m - or1k - quark_x10xx - - -TAP ---- -http://openocd.sourceforge.net/doc/html/TAP-Declaration.html#TAP-Declaration - jtag newtap chipname tapname configparams... - hla newtap chipname tapname configparams... - swd newtap chipname tapname configparams... - cmsis-dap newtap chipname tapname configparams... - - The tapname reflects the role of that TAP, and should follow this convention: - bs – For boundary scan if this is a separate TAP; - cpu – The main CPU of the chip, alternatively arm and dsp on chips with both ARM and DSP CPUs, arm1 and arm2 on chips with two ARMs, and so forth; - etb – For an embedded trace buffer (example: an ARM ETB11); - flash – If the chip has a flash TAP, like the str912; - jrc – For JTAG route controller (example: the ICEPick modules on many Texas Instruments chips, like the OMAP3530 on Beagleboards); - tap – Should be used only for FPGA- or CPLD-like devices with a single TAP; - unknownN – If you have no idea what the TAP is for (N is a number); - when in doubt – Use the chip maker's name in their data sheet. For example, the Freescale i.MX31 has a SDMA (Smart DMA) with a JTAG TAP; that TAP should be named sdma. - --irlen NUMBER -The length in bits of the instruction register, such as 4 or 5 bits. - -Target ------- -http://openocd.sourceforge.net/doc/html/CPU-Configuration.html#CPU-Configuration - - target create target_name type configparams... - $target_name configure configparams... - - -chain-position dotted.name – names the TAP used to access this target. - -endian (big|little) – specifies whether the CPU uses big or little endian conventions - -event event_name event_body – See Target Events. Note that this updates a list of named event handlers. Calling this twice with two different event names assigns two different handlers, but calling it twice with the same event name assigns only one handler. - -work-area-backup (0|1) – says whether the work area gets backed up; by default, it is not backed up. When possible, use a working_area that doesn't need to be backed up, since performing a backup slows down operations. For example, the beginning of an SRAM block is likely to be used by most build systems, but the end is often unused. - -work-area-size size – specify work are size, in bytes. The same size applies regardless of whether its physical or virtual address is being used. - -work-area-phys address – set the work area base address to be used when no MMU is active. - -work-area-virt address – set the work area base address to be used when an MMU is active. Do not specify a value for this except on targets with an MMU. The value should normally correspond to a static mapping for the -work-area-phys address, set up by the current operating system. - -rtos rtos_type – enable rtos support for target, rtos_type can be one of auto|eCos|ThreadX| FreeRTOS|linux|ChibiOS|embKernel See RTOS Support. - -Flash ------ -http://openocd.sourceforge.net/doc/html/Flash-Commands.html#norconfiguration - - flash bank name driver base size chip_width bus_width target [driver_options] - - name ... may be used to reference the flash bank in other flash commands. A number is also available. - driver ... identifies the controller driver associated with the flash bank being declared. This is usually cfi for external flash, or else the name of a microcontroller with embedded flash memory. See Flash Driver List. - base ... Base address of the flash chip. - size ... Size of the chip, in bytes. For some drivers, this value is detected from the hardware. - chip_width ... Width of the flash chip, in bytes; ignored for most microcontroller drivers. - bus_width ... Width of the data bus used to access the chip, in bytes; ignored for most microcontroller drivers. - target ... Names the target used to issue commands to the flash controller. - driver_options ... drivers may support, or require, additional parameters. See the driver-specific documentation for more information. - - flash write_image [erase] [unlock] filename [offset] [type] - - -Memory Access -------------- -http://openocd.sourceforge.net/doc/html/General-Commands.html#imageaccess - {mdw,mdh,mdb} addr [count] - dump {word, half-word, byte} data - {mww,mwh,mwb} addr data - write data - diff --git a/keyboard/infinity/Makefile b/keyboard/infinity/Makefile index e97f759dfa..758296f335 100644 --- a/keyboard/infinity/Makefile +++ b/keyboard/infinity/Makefile @@ -11,6 +11,10 @@ vpath %.cpp .:$(MBED_DIR):$(TMK_DIR) OBJDIR = ./build OBJECTS = \ + $(OBJDIR)/matrix.o \ + $(OBJDIR)/keymap.o \ + $(OBJDIR)/keymap_common.o \ + $(OBJDIR)/led.o \ $(OBJDIR)/main.o CONFIG_H = config.h @@ -29,5 +33,5 @@ include $(TMK_DIR)/tool/mbed/mbed.mk include $(TMK_DIR)/tool/mbed/common.mk include $(TMK_DIR)/tool/mbed/gcc.mk -program: +program: $(OBJDIR)/$(PROJECT).bin dfu-util -D $(OBJDIR)/$(PROJECT).bin diff --git a/keyboard/infinity/README b/keyboard/infinity/README new file mode 100644 index 0000000000..53d1c91737 --- /dev/null +++ b/keyboard/infinity/README @@ -0,0 +1,81 @@ +Infinity +======== +Massdrop Infinity Keyboard: +https://www.massdrop.com/buy/infinity-keyboard-kit + +kiibohd controller(MD1): +https://github.com/kiibohd/controller + +DFU bootloader: +https://github.com/kiibohd/controller/tree/master/Bootloader + +Program with bootloader: + $ dfu-util -D kiibohd.dfu.bin + +Pinout: +https://github.com/kiibohd/controller/blob/master/Scan/MD1/pinout + +MCHCK compatible: +https://mchck.org/about/ + +MCU Freescale MK20DX128VLF5 48-QFP: +http://cache.freescale.com/files/32bit/doc/data_sheet/K20P48M50SF0.pdf + + + +Pin Usage +========= +Key Matrix: + Strobe(output high): PTB0 PTB1 PTB2 PTB3 PTB16 PTB17 PTC4 PTC5 PTD0 + Sense(input with pull-down): PTD1 PTD2 PTD3 PTD4 PTD5 PTD6 PTD7 + + +SWD pinout: + SWD_CLK(PTA0) SWD_DIO(PTA3) + SWD pins are placed next to reset button; SWD_CLK, SWD_DIO, GND, VCC from top. + Note that RESET is also needed to get full control with OpenOCD. + +LED: + PTA19(turns on with output high) + + + +Memory map +========== +kiibohd bootloader: Lib/mk20dx128vlf5.bootloader.ld +0x0000_0000 +-------------------+ -----------------+---------------+ Vector table + | .vectors | ------------. | StackPointer0 | of Bootloader + | .startup | \ | ResetHandler1 | + | .rodata | `--+---------------+ 0xF8 +0x0000_0400 | .flashconfig(0x10)| + _0410 | .text | + | .init | +0x0000_1000 +-------------------+ -----------------+---------------+ Vector table + | _app_rom | ------------. | | of App + | | \ | | + | | `--+---------------+ + | | + ~ ~ + | | +0x07FF_FFFF +-------------------+ 128KB + + +0x1FFF_E000 +-------------------+ -----------------+---------------+ Vector table + _E0F8 | | ------------. | | of App(copied) + | | \ | | + | | `--+---------------+ mbed NVIC + | | + | RAM | + | 8KB| +0x2000_0000 +-------------------+ + | | + | | + | | + | | + | RAM | + | 8KB| +0x2000_2000 +-------------------+ _estack + + + + diff --git a/keyboard/infinity/keymap.c b/keyboard/infinity/keymap.c new file mode 100644 index 0000000000..100142f41c --- /dev/null +++ b/keyboard/infinity/keymap.c @@ -0,0 +1,47 @@ +#include "keymap_common.h" + +const uint8_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = { + /* Layer 0: Default Layer + * ,-----------------------------------------------------------. + * |Esc| 1| 2| 3| 4| 5| 6| 7| 8| 9| 0| -| =| `|BSp| + * |-----------------------------------------------------------| + * |Tab | Q| W| E| R| T| Y| U| I| O| P| [| ]| \| + * |-----------------------------------------------------------| + * |Contro| A| S| D| F| G| H| J| K| L| ;| '|Enter | + * |-----------------------------------------------------------| + * |Shift | Z| X| C| V| B| N| M| ,| .| /|Shift |Fn0| + * |-----------------------------------------------------------' + * | |Gui|Alt | Space |Alt |Gui| | | + * `-----------------------------------------------------------' + */ + [0] = + KEYMAP(ESC, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, MINS,EQL, BSLS, GRV, \ + TAB, Q, W, E, R, T, Y, U, I, O, P, LBRC,RBRC,BSPC, \ + LCTL,A, S, D, F, G, H, J, K, L, SCLN,QUOT,ENT, \ + LSFT,Z, X, C, V, B, N, M, COMM,DOT, SLSH,RSFT,FN0, \ + NO, LGUI,LALT, SPC, RALT,RGUI,NO, NO), + /* Layer 1: HHKB mode (HHKB Fn) + * ,-----------------------------------------------------------. + * |Pwr| F1| F2| F3| F4| F5| F6| F7| F8| F9|F10|F11|F12|Ins|Del| + * |-----------------------------------------------------------| + * |Caps | | | | | | | |Psc|Slk|Pus|Up | |Backs| + * |-----------------------------------------------------------| + * | |VoD|VoU|Mut| | | *| /|Hom|PgU|Lef|Rig|Enter | + * |-----------------------------------------------------------| + * | | | | | | | +| -|End|PgD|Dow| | | + * `-----------------------------------------------------------' + * | |Gui|Alt | Space |Alt |Gui| | | + * `-----------------------------------------------------------' + */ + [1]= + KEYMAP(PWR, F1, F2, F3, F4, F5, F6, F7, F8, F9, F10, F11, F12, INS, DEL, \ + CAPS,TRNS,TRNS,TRNS,TRNS,TRNS,TRNS,TRNS,PSCR,SLCK,PAUS, UP, TRNS, BSPC, \ + TRNS,VOLD,VOLU,MUTE,TRNS,TRNS,PAST,PSLS,HOME,PGUP,LEFT,RGHT,PENT, \ + TRNS,TRNS,TRNS,TRNS,TRNS,TRNS,PPLS,PMNS,END, PGDN,DOWN,TRNS,TRNS, \ + TRNS,TRNS,TRNS, TRNS, TRNS,TRNS,TRNS,TRNS), +}; + +const uint16_t PROGMEM fn_actions[] = { + [0] = ACTION_LAYER_MOMENTARY(1), +}; + diff --git a/keyboard/infinity/keymap_common.c b/keyboard/infinity/keymap_common.c new file mode 100644 index 0000000000..fdb1769e1c --- /dev/null +++ b/keyboard/infinity/keymap_common.c @@ -0,0 +1,30 @@ +/* +Copyright 2012,2013 Jun Wako + +This program is free software: you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . +*/ +#include "keymap_common.h" + + +/* translates key to keycode */ +uint8_t keymap_key_to_keycode(uint8_t layer, keypos_t key) +{ + return pgm_read_byte(&keymaps[(layer)][(key.row)][(key.col)]); +} + +/* translates Fn keycode to action */ +action_t keymap_fn_to_action(uint8_t keycode) +{ + return (action_t){ .code = pgm_read_word(&fn_actions[FN_INDEX(keycode)]) }; +} diff --git a/keyboard/infinity/keymap_common.h b/keyboard/infinity/keymap_common.h new file mode 100644 index 0000000000..7a5f778f2d --- /dev/null +++ b/keyboard/infinity/keymap_common.h @@ -0,0 +1,58 @@ +/* +Copyright 2014 Jun Wako + +This program is free software: you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . +*/ +#ifndef KEYMAP_COMMON_H +#define KEYMAP_COMMON_H + +#include +#include +#include "keycode.h" +#include "action.h" +#include "action_macro.h" +#include "report.h" +#include "host.h" +#include "print.h" +#include "debug.h" +#include "keymap.h" + + +extern const uint8_t keymaps[][MATRIX_ROWS][MATRIX_COLS]; +extern const uint16_t fn_actions[]; + + +/* GH60 keymap definition macro + * K2C, K31 and K3C are extra keys for ISO + */ +#define KEYMAP( \ + K00, K10, K20, K30, K40, K50, K60, K70, K80, K01, K11, K21, K31, K41, K86, \ + K51, K61, K71, K81, K02, K12, K22, K32, K42, K52, K62, K72, K82, K03, \ + K13, K23, K33, K43, K53, K63, K73, K83, K04, K14, K24, K34, K44, \ + K54, K64, K74, K84, K05, K15, K25, K35, K45, K55, K65, K75, K85, \ + K06, K16, K26, K36, K46, K56, K66, K76 \ +) { \ + { KC_##K00, KC_##K01, KC_##K02, KC_##K03, KC_##K04, KC_##K05, KC_##K06 }, \ + { KC_##K10, KC_##K11, KC_##K12, KC_##K13, KC_##K14, KC_##K15, KC_##K16 }, \ + { KC_##K20, KC_##K21, KC_##K22, KC_##K23, KC_##K24, KC_##K25, KC_##K26 }, \ + { KC_##K30, KC_##K31, KC_##K32, KC_##K33, KC_##K34, KC_##K35, KC_##K36 }, \ + { KC_##K40, KC_##K41, KC_##K42, KC_##K43, KC_##K44, KC_##K45, KC_##K46 }, \ + { KC_##K50, KC_##K51, KC_##K52, KC_##K53, KC_##K54, KC_##K55, KC_##K56 }, \ + { KC_##K60, KC_##K61, KC_##K62, KC_##K63, KC_##K64, KC_##K65, KC_##K66 }, \ + { KC_##K70, KC_##K71, KC_##K72, KC_##K73, KC_##K74, KC_##K75, KC_##K76 }, \ + { KC_##K80, KC_##K81, KC_##K82, KC_##K83, KC_##K84, KC_##K85, KC_##K86 } \ +} + +#endif + diff --git a/keyboard/infinity/led.c b/keyboard/infinity/led.c new file mode 100644 index 0000000000..b7e638b254 --- /dev/null +++ b/keyboard/infinity/led.c @@ -0,0 +1,25 @@ +/* +Copyright 2011 Jun Wako + +This program is free software: you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . +*/ + +#include "stdint.h" +#include "led.h" + + +/* HHKB has no LEDs */ +void led_set(uint8_t usb_led) +{ +} diff --git a/keyboard/infinity/main.cpp b/keyboard/infinity/main.cpp index f28840d3ef..847668a1de 100644 --- a/keyboard/infinity/main.cpp +++ b/keyboard/infinity/main.cpp @@ -1,20 +1,44 @@ -//#include "mbed.h" #include "MK20D5.h" #include "wait.h" #include "gpio_api.h" #include "PinNames.h" +#include "matrix.h" +#include "timer.h" + +#include "action.h" +#include "keycode.h" +#include "host.h" +#include "host_driver.h" +#include "mbed_driver.h" int main() { gpio_t led; gpio_init_out(&led, PTA19); + + uint16_t t = 0; + + host_set_driver(&mbed_driver); + keyboard_init(); + while(1) { - wait_ms(500); - uint32_t delay = 0xf; - while (delay--) { - uint32_t delay2 = 0xffff; - while (delay2--) ; + keyboard_task(); + + bool matrix_on = false; + matrix_scan(); + for (int i = 0; i < MATRIX_ROWS; i++) { + if (matrix_get_row(i)) { + matrix_on = true; + break; + } + } + if (matrix_on) + gpio_write(&led, 1); + else { + if (timer_elapsed(t) > 500) { + gpio_write(&led, !gpio_read(&led)); + t = timer_read(); + } } - gpio_write(&led, !gpio_read(&led)); } } diff --git a/keyboard/infinity/matrix.c b/keyboard/infinity/matrix.c new file mode 100644 index 0000000000..478a40fd9e --- /dev/null +++ b/keyboard/infinity/matrix.c @@ -0,0 +1,107 @@ +#include +#include +#include "gpio_api.h" +#include "timer.h" +#include "wait.h" +#include "matrix.h" + + +#ifndef DEBOUNCE +#define DEBOUNCE 5 +#endif + +/* + * Infinity Pinusage: + * Column pins are input with internal pull-down. Row pins are output and strobe with high. + * Key is high or 1 when it turns on. + * + * col: { PTD1, PTD2, PTD3, PTD4, PTD5, PTD6, PTD7 } + * row: { PTB0, PTB1, PTB2, PTB3, PTB16, PTB17, PTC4, PTC5, PTD0 } + */ +static gpio_t col[MATRIX_COLS]; +static gpio_t row[MATRIX_ROWS]; + +/* matrix state(1:on, 0:off) */ +static matrix_row_t matrix[MATRIX_ROWS]; +static matrix_row_t matrix_debouncing[MATRIX_ROWS]; +static bool debouncing = false; +static uint16_t debouncing_time = 0; + + +void matrix_init(void) +{ + /* Column(sense) */ + gpio_init_in_ex(&col[0], PTD1, PullDown); + gpio_init_in_ex(&col[1], PTD2, PullDown); + gpio_init_in_ex(&col[2], PTD3, PullDown); + gpio_init_in_ex(&col[3], PTD4, PullDown); + gpio_init_in_ex(&col[4], PTD5, PullDown); + gpio_init_in_ex(&col[5], PTD6, PullDown); + gpio_init_in_ex(&col[6], PTD7, PullDown); + + /* Row(strobe) */ + gpio_init_out_ex(&row[0], PTB0, 0); + gpio_init_out_ex(&row[1], PTB1, 0); + gpio_init_out_ex(&row[2], PTB2, 0); + gpio_init_out_ex(&row[3], PTB3, 0); + gpio_init_out_ex(&row[4], PTB16, 0); + gpio_init_out_ex(&row[5], PTB17, 0); + gpio_init_out_ex(&row[6], PTC4, 0); + gpio_init_out_ex(&row[7], PTC5, 0); + gpio_init_out_ex(&row[8], PTD0, 0); +} + +uint8_t matrix_scan(void) +{ + for (int i = 0; i < MATRIX_ROWS; i++) { + matrix_row_t r = 0; + + gpio_write(&row[i], 1); + wait_us(1); // need wait to settle pin state + for (int j = 0; j < MATRIX_COLS; j++) { + if (gpio_read(&col[j])) { + r |= (1< DEBOUNCE) { + for (int i = 0; i < MATRIX_ROWS; i++) { + matrix[i] = matrix_debouncing[i]; + } + debouncing = false; + } +/* + if (debouncing) { + if (--debouncing) { + return 0; + } else { + for (int i = 0; i < MATRIX_ROWS; i++) { + matrix[i] = matrix_debouncing[i]; + } + } + } +*/ + return 1; +} + +bool matrix_is_on(uint8_t row, uint8_t col) +{ + return (matrix[row] & (1<>1) + +// Get endpoint direction +#define IN_EP(endpoint) ((endpoint) & 1U ? true : false) +#define OUT_EP(endpoint) ((endpoint) & 1U ? false : true) + +#define BD_OWN_MASK (1<<7) +#define BD_DATA01_MASK (1<<6) +#define BD_KEEP_MASK (1<<5) +#define BD_NINC_MASK (1<<4) +#define BD_DTS_MASK (1<<3) +#define BD_STALL_MASK (1<<2) + +#define TX 1 +#define RX 0 +#define ODD 0 +#define EVEN 1 +// this macro waits a physical endpoint number +#define EP_BDT_IDX(ep, dir, odd) (((ep * 4) + (2 * dir) + (1 * odd))) + +#define SETUP_TOKEN 0x0D +#define IN_TOKEN 0x09 +#define OUT_TOKEN 0x01 +#define TOK_PID(idx) ((bdt[idx].info >> 2) & 0x0F) + +// for each endpt: 8 bytes +typedef struct BDT { + uint8_t info; // BD[0:7] + uint8_t dummy; // RSVD: BD[8:15] + uint16_t byte_count; // BD[16:32] + uint32_t address; // Addr +} BDT; + + +// there are: +// * 16 bidirectionnal endpt -> 32 physical endpt +// * as there are ODD and EVEN buffer -> 32*2 bdt +__attribute__((__aligned__(512))) BDT bdt[NUMBER_OF_PHYSICAL_ENDPOINTS * 2]; +uint8_t * endpoint_buffer[(NUMBER_OF_PHYSICAL_ENDPOINTS - 2) * 2]; +uint8_t * endpoint_buffer_iso[2*2]; + +static uint8_t set_addr = 0; +static uint8_t addr = 0; + +static uint32_t Data1 = 0x55555555; + +static uint32_t frameNumber() { + return((USB0->FRMNUML | (USB0->FRMNUMH << 8)) & 0x07FF); +} + +uint32_t USBHAL::endpointReadcore(uint8_t endpoint, uint8_t *buffer) { + return 0; +} + +USBHAL::USBHAL(void) { + // Disable IRQ + NVIC_DisableIRQ(USB0_IRQn); + +#if defined(TARGET_K64F) + MPU->CESR=0; +#endif + // fill in callback array + epCallback[0] = &USBHAL::EP1_OUT_callback; + epCallback[1] = &USBHAL::EP1_IN_callback; + epCallback[2] = &USBHAL::EP2_OUT_callback; + epCallback[3] = &USBHAL::EP2_IN_callback; + epCallback[4] = &USBHAL::EP3_OUT_callback; + epCallback[5] = &USBHAL::EP3_IN_callback; + epCallback[6] = &USBHAL::EP4_OUT_callback; + epCallback[7] = &USBHAL::EP4_IN_callback; + epCallback[8] = &USBHAL::EP5_OUT_callback; + epCallback[9] = &USBHAL::EP5_IN_callback; + epCallback[10] = &USBHAL::EP6_OUT_callback; + epCallback[11] = &USBHAL::EP6_IN_callback; + epCallback[12] = &USBHAL::EP7_OUT_callback; + epCallback[13] = &USBHAL::EP7_IN_callback; + epCallback[14] = &USBHAL::EP8_OUT_callback; + epCallback[15] = &USBHAL::EP8_IN_callback; + epCallback[16] = &USBHAL::EP9_OUT_callback; + epCallback[17] = &USBHAL::EP9_IN_callback; + epCallback[18] = &USBHAL::EP10_OUT_callback; + epCallback[19] = &USBHAL::EP10_IN_callback; + epCallback[20] = &USBHAL::EP11_OUT_callback; + epCallback[21] = &USBHAL::EP11_IN_callback; + epCallback[22] = &USBHAL::EP12_OUT_callback; + epCallback[23] = &USBHAL::EP12_IN_callback; + epCallback[24] = &USBHAL::EP13_OUT_callback; + epCallback[25] = &USBHAL::EP13_IN_callback; + epCallback[26] = &USBHAL::EP14_OUT_callback; + epCallback[27] = &USBHAL::EP14_IN_callback; + epCallback[28] = &USBHAL::EP15_OUT_callback; + epCallback[29] = &USBHAL::EP15_IN_callback; + +#if defined(TARGET_KL43Z) + // enable USBFS clock + SIM->SCGC4 |= SIM_SCGC4_USBFS_MASK; + + // enable the IRC48M clock + USB0->CLK_RECOVER_IRC_EN |= USB_CLK_RECOVER_IRC_EN_IRC_EN_MASK; + + // enable the USB clock recovery tuning + USB0->CLK_RECOVER_CTRL |= USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN_MASK; + + // choose usb src clock + SIM->SOPT2 |= SIM_SOPT2_USBSRC_MASK; +#elif defined(TARGET_INFINITY) + // USB clock source: FLL + SIM->SOPT2 |= SIM_SOPT2_USBSRC_MASK; + + // enable OTG clock + SIM->SCGC4 |= SIM_SCGC4_USBOTG_MASK; +#else + // choose usb src as PLL + SIM->SOPT2 &= ~SIM_SOPT2_PLLFLLSEL_MASK; + SIM->SOPT2 |= (SIM_SOPT2_USBSRC_MASK | (1 << SIM_SOPT2_PLLFLLSEL_SHIFT)); + + // enable OTG clock + SIM->SCGC4 |= SIM_SCGC4_USBOTG_MASK; +#endif + + // Attach IRQ + instance = this; + NVIC_SetVector(USB0_IRQn, (uint32_t)&_usbisr); + NVIC_EnableIRQ(USB0_IRQn); + + // USB Module Configuration + // Reset USB Module + USB0->USBTRC0 |= USB_USBTRC0_USBRESET_MASK; + while(USB0->USBTRC0 & USB_USBTRC0_USBRESET_MASK); + + // Set BDT Base Register + USB0->BDTPAGE1 = (uint8_t)((uint32_t)bdt>>8); + USB0->BDTPAGE2 = (uint8_t)((uint32_t)bdt>>16); + USB0->BDTPAGE3 = (uint8_t)((uint32_t)bdt>>24); + + // Clear interrupt flag + USB0->ISTAT = 0xff; + + // USB Interrupt Enablers + USB0->INTEN |= USB_INTEN_TOKDNEEN_MASK | + USB_INTEN_SOFTOKEN_MASK | + USB_INTEN_ERROREN_MASK | + USB_INTEN_USBRSTEN_MASK; + + // Disable weak pull downs + USB0->USBCTRL &= ~(USB_USBCTRL_PDE_MASK | USB_USBCTRL_SUSP_MASK); + + USB0->USBTRC0 |= 0x40; +} + +USBHAL::~USBHAL(void) { } + +void USBHAL::connect(void) { + // enable USB + USB0->CTL |= USB_CTL_USBENSOFEN_MASK; + // Pull up enable + USB0->CONTROL |= USB_CONTROL_DPPULLUPNONOTG_MASK; +} + +void USBHAL::disconnect(void) { + // disable USB + USB0->CTL &= ~USB_CTL_USBENSOFEN_MASK; + // Pull up disable + USB0->CONTROL &= ~USB_CONTROL_DPPULLUPNONOTG_MASK; + + //Free buffers if required: + for (int i = 0; i<(NUMBER_OF_PHYSICAL_ENDPOINTS - 2) * 2; i++) { + free(endpoint_buffer[i]); + endpoint_buffer[i] = NULL; + } + free(endpoint_buffer_iso[2]); + endpoint_buffer_iso[2] = NULL; + free(endpoint_buffer_iso[0]); + endpoint_buffer_iso[0] = NULL; +} + +void USBHAL::configureDevice(void) { + // not needed +} + +void USBHAL::unconfigureDevice(void) { + // not needed +} + +void USBHAL::setAddress(uint8_t address) { + // we don't set the address now otherwise the usb controller does not ack + // we set a flag instead + // see usbisr when an IN token is received + set_addr = 1; + addr = address; +} + +bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t flags) { + uint32_t handshake_flag = 0; + uint8_t * buf; + + if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { + return false; + } + + uint32_t log_endpoint = PHY_TO_LOG(endpoint); + + if ((flags & ISOCHRONOUS) == 0) { + handshake_flag = USB_ENDPT_EPHSHK_MASK; + if (IN_EP(endpoint)) { + if (endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)] == NULL) + endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)] = (uint8_t *) malloc (64*2); + buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)][0]; + } else { + if (endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)] == NULL) + endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)] = (uint8_t *) malloc (64*2); + buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)][0]; + } + } else { + if (IN_EP(endpoint)) { + if (endpoint_buffer_iso[2] == NULL) + endpoint_buffer_iso[2] = (uint8_t *) malloc (1023*2); + buf = &endpoint_buffer_iso[2][0]; + } else { + if (endpoint_buffer_iso[0] == NULL) + endpoint_buffer_iso[0] = (uint8_t *) malloc (1023*2); + buf = &endpoint_buffer_iso[0][0]; + } + } + + // IN endpt -> device to host (TX) + if (IN_EP(endpoint)) { + USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) + USB_ENDPT_EPTXEN_MASK; // en TX (IN) tran + bdt[EP_BDT_IDX(log_endpoint, TX, ODD )].address = (uint32_t) buf; + bdt[EP_BDT_IDX(log_endpoint, TX, EVEN)].address = 0; + } + // OUT endpt -> host to device (RX) + else { + USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) + USB_ENDPT_EPRXEN_MASK; // en RX (OUT) tran. + bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].byte_count = maxPacket; + bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].address = (uint32_t) buf; + bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info = BD_OWN_MASK | BD_DTS_MASK; + bdt[EP_BDT_IDX(log_endpoint, RX, EVEN)].info = 0; + } + + Data1 |= (1 << endpoint); + + return true; +} + +// read setup packet +void USBHAL::EP0setup(uint8_t *buffer) { + uint32_t sz; + endpointReadResult(EP0OUT, buffer, &sz); +} + +void USBHAL::EP0readStage(void) { + Data1 &= ~1UL; // set DATA0 + bdt[0].info = (BD_DTS_MASK | BD_OWN_MASK); +} + +void USBHAL::EP0read(void) { + uint32_t idx = EP_BDT_IDX(PHY_TO_LOG(EP0OUT), RX, 0); + bdt[idx].byte_count = MAX_PACKET_SIZE_EP0; +} + +uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) { + uint32_t sz; + endpointReadResult(EP0OUT, buffer, &sz); + return sz; +} + +void USBHAL::EP0write(uint8_t *buffer, uint32_t size) { + endpointWrite(EP0IN, buffer, size); +} + +void USBHAL::EP0getWriteResult(void) { +} + +void USBHAL::EP0stall(void) { + stallEndpoint(EP0OUT); +} + +EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize) { + endpoint = PHY_TO_LOG(endpoint); + uint32_t idx = EP_BDT_IDX(endpoint, RX, 0); + bdt[idx].byte_count = maximumSize; + return EP_PENDING; +} + +EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_t *bytesRead) { + uint32_t n, sz, idx, setup = 0; + uint8_t not_iso; + uint8_t * ep_buf; + + uint32_t log_endpoint = PHY_TO_LOG(endpoint); + + if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { + return EP_INVALID; + } + + // if read on a IN endpoint -> error + if (IN_EP(endpoint)) { + return EP_INVALID; + } + + idx = EP_BDT_IDX(log_endpoint, RX, 0); + sz = bdt[idx].byte_count; + not_iso = USB0->ENDPOINT[log_endpoint].ENDPT & USB_ENDPT_EPHSHK_MASK; + + //for isochronous endpoint, we don't wait an interrupt + if ((log_endpoint != 0) && not_iso && !(epComplete & EP(endpoint))) { + return EP_PENDING; + } + + if ((log_endpoint == 0) && (TOK_PID(idx) == SETUP_TOKEN)) { + setup = 1; + } + + // non iso endpoint + if (not_iso) { + ep_buf = endpoint_buffer[idx]; + } else { + ep_buf = endpoint_buffer_iso[0]; + } + + for (n = 0; n < sz; n++) { + buffer[n] = ep_buf[n]; + } + + if (((Data1 >> endpoint) & 1) == ((bdt[idx].info >> 6) & 1)) { + if (setup && (buffer[6] == 0)) // if no setup data stage, + Data1 &= ~1UL; // set DATA0 + else + Data1 ^= (1 << endpoint); + } + + if (((Data1 >> endpoint) & 1)) { + bdt[idx].info = BD_DTS_MASK | BD_DATA01_MASK | BD_OWN_MASK; + } + else { + bdt[idx].info = BD_DTS_MASK | BD_OWN_MASK; + } + + USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; + *bytesRead = sz; + + epComplete &= ~EP(endpoint); + return EP_COMPLETED; +} + +EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) { + uint32_t idx, n; + uint8_t * ep_buf; + + if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { + return EP_INVALID; + } + + // if write on a OUT endpoint -> error + if (OUT_EP(endpoint)) { + return EP_INVALID; + } + + idx = EP_BDT_IDX(PHY_TO_LOG(endpoint), TX, 0); + bdt[idx].byte_count = size; + + + // non iso endpoint + if (USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT & USB_ENDPT_EPHSHK_MASK) { + ep_buf = endpoint_buffer[idx]; + } else { + ep_buf = endpoint_buffer_iso[2]; + } + + for (n = 0; n < size; n++) { + ep_buf[n] = data[n]; + } + + if ((Data1 >> endpoint) & 1) { + bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK; + } else { + bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK | BD_DATA01_MASK; + } + + Data1 ^= (1 << endpoint); + + return EP_PENDING; +} + +EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint) { + if (epComplete & EP(endpoint)) { + epComplete &= ~EP(endpoint); + return EP_COMPLETED; + } + + return EP_PENDING; +} + +void USBHAL::stallEndpoint(uint8_t endpoint) { + USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK; +} + +void USBHAL::unstallEndpoint(uint8_t endpoint) { + USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; +} + +bool USBHAL::getEndpointStallState(uint8_t endpoint) { + uint8_t stall = (USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT & USB_ENDPT_EPSTALL_MASK); + return (stall) ? true : false; +} + +void USBHAL::remoteWakeup(void) { + // [TODO] +} + + +void USBHAL::_usbisr(void) { + instance->usbisr(); +} + + +void USBHAL::usbisr(void) { + uint8_t i; + uint8_t istat = USB0->ISTAT; + + // reset interrupt + if (istat & USB_ISTAT_USBRST_MASK) { + // disable all endpt + for(i = 0; i < 16; i++) { + USB0->ENDPOINT[i].ENDPT = 0x00; + } + + // enable control endpoint + realiseEndpoint(EP0OUT, MAX_PACKET_SIZE_EP0, 0); + realiseEndpoint(EP0IN, MAX_PACKET_SIZE_EP0, 0); + + Data1 = 0x55555555; + USB0->CTL |= USB_CTL_ODDRST_MASK; + + USB0->ISTAT = 0xFF; // clear all interrupt status flags + USB0->ERRSTAT = 0xFF; // clear all error flags + USB0->ERREN = 0xFF; // enable error interrupt sources + USB0->ADDR = 0x00; // set default address + + return; + } + + // resume interrupt + if (istat & USB_ISTAT_RESUME_MASK) { + USB0->ISTAT = USB_ISTAT_RESUME_MASK; + } + + // SOF interrupt + if (istat & USB_ISTAT_SOFTOK_MASK) { + USB0->ISTAT = USB_ISTAT_SOFTOK_MASK; + // SOF event, read frame number + SOF(frameNumber()); + } + + // stall interrupt + if (istat & 1<<7) { + if (USB0->ENDPOINT[0].ENDPT & USB_ENDPT_EPSTALL_MASK) + USB0->ENDPOINT[0].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; + USB0->ISTAT |= USB_ISTAT_STALL_MASK; + } + + // token interrupt + if (istat & 1<<3) { + uint32_t num = (USB0->STAT >> 4) & 0x0F; + uint32_t dir = (USB0->STAT >> 3) & 0x01; + uint32_t ev_odd = (USB0->STAT >> 2) & 0x01; + + // setup packet + if ((num == 0) && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == SETUP_TOKEN)) { + Data1 &= ~0x02; + bdt[EP_BDT_IDX(0, TX, EVEN)].info &= ~BD_OWN_MASK; + bdt[EP_BDT_IDX(0, TX, ODD)].info &= ~BD_OWN_MASK; + + // EP0 SETUP event (SETUP data received) + EP0setupCallback(); + + } else { + // OUT packet + if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == OUT_TOKEN) { + if (num == 0) + EP0out(); + else { + epComplete |= (1 << EP(num)); + if ((instance->*(epCallback[EP(num) - 2]))()) { + epComplete &= ~(1 << EP(num)); + } + } + } + + // IN packet + if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == IN_TOKEN) { + if (num == 0) { + EP0in(); + if (set_addr == 1) { + USB0->ADDR = addr & 0x7F; + set_addr = 0; + } + } + else { + epComplete |= (1 << (EP(num) + 1)); + if ((instance->*(epCallback[EP(num) + 1 - 2]))()) { + epComplete &= ~(1 << (EP(num) + 1)); + } + } + } + } + + USB0->ISTAT = USB_ISTAT_TOKDNE_MASK; + } + + // sleep interrupt + if (istat & 1<<4) { + USB0->ISTAT |= USB_ISTAT_SLEEP_MASK; + } + + // error interrupt + if (istat & USB_ISTAT_ERROR_MASK) { + USB0->ERRSTAT = 0xFF; + USB0->ISTAT |= USB_ISTAT_ERROR_MASK; + } +} + + +#endif diff --git a/keyboard/infinity/tool/README b/keyboard/infinity/tool/README new file mode 100644 index 0000000000..3dd3316568 --- /dev/null +++ b/keyboard/infinity/tool/README @@ -0,0 +1,25 @@ +OpenOCD config files for Kinetis +================================ +http://nemuisan.blog.bai.ne.jp/?eid=192848#OPENOCD + +These are needed for SWD debug and programing bootloader. To flash keyboard firmware use 'dfu-util'. + +Flash security of Freescale kinetis +----------------------------------- +If FSEC of flash config is changed accidentally SWD/JTAG you can't get debug access until doing 'mdm mass_erase' with JTAG, CMSIS-DAP or OpenSAD adapter. HLA(high level adapter) like stlink doesn't work for this. + + +Example +------- +Debug: + $ openocd -s tool -f tool/openocd.cfg + $ arm-none-eabi-gdb build/infinity.elf -ex "target remote localhost:3333" + +Flash bootloader: + $ openocd -s tool -f tool/openocd.cfg -c "mt_flash kiibohd_bootloader.bin" + + +Infinity SWD pinout +------------------- +SWD pins are placed next to reset button; SWD_CLK, SWD_DIO, GND, VCC from top. +Note that RESET is also needed to get full control with OpenOCD. -- cgit v1.2.3 From 10a6b2c7d8bc9c5d2657acdeefa1102be5035280 Mon Sep 17 00:00:00 2001 From: Jun Wako Date: Sun, 11 Jan 2015 01:54:17 +0900 Subject: hhkb: Add Makefile.jp for HHKB JP --- keyboard/hhkb/Makefile | 10 +++++----- keyboard/hhkb/Makefile.jp | 2 ++ keyboard/hhkb/README.md | 7 ++++++- 3 files changed, 13 insertions(+), 6 deletions(-) create mode 100644 keyboard/hhkb/Makefile.jp (limited to 'keyboard') diff --git a/keyboard/hhkb/Makefile b/keyboard/hhkb/Makefile index 5cf02d194e..dc5c06a948 100644 --- a/keyboard/hhkb/Makefile +++ b/keyboard/hhkb/Makefile @@ -121,11 +121,6 @@ NKRO_ENABLE = yes # USB Nkey Rollover #HHKB_JP = yes # HHKB JP support -ifdef HHKB_JP - OPT_DEFS += -DHHKB_JP -endif - - # # Keymap file # @@ -140,6 +135,11 @@ else endif +ifneq (, $(or $(findstring keymap_jp.c, $(SRC)), $(findstring yes, $(HHKB_JP)))) + OPT_DEFS += -DHHKB_JP +endif + + # Search Path VPATH += $(TARGET_DIR) VPATH += $(TOP_DIR) diff --git a/keyboard/hhkb/Makefile.jp b/keyboard/hhkb/Makefile.jp new file mode 100644 index 0000000000..e04dbb2424 --- /dev/null +++ b/keyboard/hhkb/Makefile.jp @@ -0,0 +1,2 @@ +HHKB_JP = yes +include Makefile diff --git a/keyboard/hhkb/README.md b/keyboard/hhkb/README.md index d4a2cd0223..f9fd165076 100644 --- a/keyboard/hhkb/README.md +++ b/keyboard/hhkb/README.md @@ -43,12 +43,15 @@ See [doc/HHKB.txt](doc/HHKB.txt) and files under [doc/](doc/) for internal of HH See [this document](../../doc/build.md) first. ### Configuration -Set `MCU`, `BOOTLOADER_SIZE` and other build options in `Makefile` and `config.h`. If your target is **HHKB JP** you need to set `HHKB_JP` build option in `Makefile`. +If your target is **HHKB JP** you need to set `HHKB_JP` build option in `Makefile` or use `Makefile.jp` instead of `Makefile`. + +If you use other than **TMK Alt Controller Board** set proper `MCU`, `BOOTLOADER_SIZE` and other build options in `Makefile` and `config.h`. At least PJRC Teensy requires changing `BOOTLOADER_SIZE` to 512. ### Build Several version of keymap are available in advance but you are recommended to define your favorite layout yourself. Just `make` with `KEYMAP` option like: $ make KEYMAP=[hasu|hhkb|spacefn|] + $ make -f Makefile.jp KEYMAP=[jp|] # for HHKB JP ### Program @@ -57,10 +60,12 @@ First, push reset button on board to start bootloader. This command programs the controller with [dfu-programmer] if the tool is installed and configured properly. $ make dfu + $ make -f Makefile.jp dfu # for HHKB JP Or you can also use [FLIP] command to program. Also the tool should be installed and configured properly. FLIP GUI application is also available. $ make flip + $ make -f Makefile.jp flip # for HHKB JP Use [Teensy Loader] if your controller is Teensy/Teensy++. -- cgit v1.2.3