diff options
Diffstat (limited to 'platforms/chibios')
24 files changed, 442 insertions, 270 deletions
diff --git a/platforms/chibios/boards/GENERIC_PROMICRO_RP2040/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_PROMICRO_RP2040/configs/mcuconf.h index 8348e5312f..5c0859901e 100644 --- a/platforms/chibios/boards/GENERIC_PROMICRO_RP2040/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_PROMICRO_RP2040/configs/mcuconf.h @@ -79,6 +79,19 @@ #define RP_SPI_DMA_ERROR_HOOK(spip) /* + * PWM driver system settings. + */ +#define RP_PWM_USE_PWM0 FALSE +#define RP_PWM_USE_PWM1 FALSE +#define RP_PWM_USE_PWM2 FALSE +#define RP_PWM_USE_PWM3 FALSE +#define RP_PWM_USE_PWM4 FALSE +#define RP_PWM_USE_PWM5 FALSE +#define RP_PWM_USE_PWM6 FALSE +#define RP_PWM_USE_PWM7 FALSE +#define RP_PWM_IRQ_WRAP_NUMBER_PRIORITY 3 + +/* * I2C driver system settings. */ #define RP_I2C_USE_I2C0 FALSE diff --git a/platforms/chibios/boards/GENERIC_RP_RP2040/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_RP_RP2040/configs/mcuconf.h index 9d8dc61aac..f7a66c6ab9 100644 --- a/platforms/chibios/boards/GENERIC_RP_RP2040/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_RP_RP2040/configs/mcuconf.h @@ -79,6 +79,19 @@ #define RP_SPI_DMA_ERROR_HOOK(spip) /* + * PWM driver system settings. + */ +#define RP_PWM_USE_PWM0 FALSE +#define RP_PWM_USE_PWM1 FALSE +#define RP_PWM_USE_PWM2 FALSE +#define RP_PWM_USE_PWM3 FALSE +#define RP_PWM_USE_PWM4 FALSE +#define RP_PWM_USE_PWM5 FALSE +#define RP_PWM_USE_PWM6 FALSE +#define RP_PWM_USE_PWM7 FALSE +#define RP_PWM_IRQ_WRAP_NUMBER_PRIORITY 3 + +/* * I2C driver system settings. */ #define RP_I2C_USE_I2C0 FALSE diff --git a/platforms/chibios/boards/GENERIC_STM32_F072XB/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_F072XB/configs/mcuconf.h index 32b2777a81..9d26849dff 100644 --- a/platforms/chibios/boards/GENERIC_STM32_F072XB/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_F072XB/configs/mcuconf.h @@ -80,6 +80,7 @@ #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_IRQ_PRIORITY 2 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) /* * GPT driver system settings. diff --git a/platforms/chibios/boards/GENERIC_WB32_F3G71XX/board/board.c b/platforms/chibios/boards/GENERIC_WB32_F3G71XX/board/board.c index e38a7e0054..f74c9e8be7 100644 --- a/platforms/chibios/boards/GENERIC_WB32_F3G71XX/board/board.c +++ b/platforms/chibios/boards/GENERIC_WB32_F3G71XX/board/board.c @@ -80,3 +80,7 @@ void __early_init(void) { void boardInit(void) { } + +void restart_usb_driver(USBDriver *usbp) { + // Do nothing. Restarting the USB driver on these boards breaks it. +} diff --git a/platforms/chibios/boards/GENERIC_WB32_FQ95XX/board/board.c b/platforms/chibios/boards/GENERIC_WB32_FQ95XX/board/board.c index 22b4ff73b5..a99537fc27 100644 --- a/platforms/chibios/boards/GENERIC_WB32_FQ95XX/board/board.c +++ b/platforms/chibios/boards/GENERIC_WB32_FQ95XX/board/board.c @@ -80,3 +80,7 @@ void __early_init(void) { void boardInit(void) { } + +void restart_usb_driver(USBDriver *usbp) { + // Do nothing. Restarting the USB driver on these boards breaks it. +} diff --git a/platforms/chibios/boards/GENERIC_WB32_FQ95XX/configs/config.h b/platforms/chibios/boards/GENERIC_WB32_FQ95XX/configs/config.h index e02e526113..d4c7e54642 100644 --- a/platforms/chibios/boards/GENERIC_WB32_FQ95XX/configs/config.h +++ b/platforms/chibios/boards/GENERIC_WB32_FQ95XX/configs/config.h @@ -18,3 +18,5 @@ #ifndef EARLY_INIT_PERFORM_BOOTLOADER_JUMP # define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE #endif + +#define USB_ENDPOINTS_ARE_REORDERABLE diff --git a/platforms/chibios/boards/QMK_PM2040/configs/mcuconf.h b/platforms/chibios/boards/QMK_PM2040/configs/mcuconf.h index a737b36c1c..e33d6d785f 100644 --- a/platforms/chibios/boards/QMK_PM2040/configs/mcuconf.h +++ b/platforms/chibios/boards/QMK_PM2040/configs/mcuconf.h @@ -79,6 +79,19 @@ #define RP_SPI_DMA_ERROR_HOOK(spip) /* + * PWM driver system settings. + */ +#define RP_PWM_USE_PWM0 FALSE +#define RP_PWM_USE_PWM1 FALSE +#define RP_PWM_USE_PWM2 FALSE +#define RP_PWM_USE_PWM3 FALSE +#define RP_PWM_USE_PWM4 FALSE +#define RP_PWM_USE_PWM5 FALSE +#define RP_PWM_USE_PWM6 FALSE +#define RP_PWM_USE_PWM7 FALSE +#define RP_PWM_IRQ_WRAP_NUMBER_PRIORITY 3 + +/* * I2C driver system settings. */ #define RP_I2C_USE_I2C0 FALSE diff --git a/platforms/chibios/bootloader.mk b/platforms/chibios/bootloader.mk new file mode 100644 index 0000000000..0568d35321 --- /dev/null +++ b/platforms/chibios/bootloader.mk @@ -0,0 +1,122 @@ +# Copyright 2017 Jack Humbert +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. + +# If it's possible that multiple bootloaders can be used for one project, +# you can leave this unset, and the correct size will be selected +# automatically. +# +# Sets the bootloader defined in the keyboard's/keymap's rules.mk +# +# Current options for ARM: +# halfkay PJRC Teensy +# kiibohd Input:Club Kiibohd bootloader (only used on their boards) +# stm32duino STM32Duino (STM32F103x8) +# stm32-dfu STM32 USB DFU in ROM +# apm32-dfu APM32 USB DFU in ROM +# wb32-dfu WB32 USB DFU in ROM +# tinyuf2 TinyUF2 +# rp2040 Raspberry Pi RP2040 +# Current options for RISC-V: +# gd32v-dfu GD32V USB DFU in ROM +# +# If you need to provide your own implementation, you can set inside `rules.mk` +# `BOOTLOADER = custom` -- you'll need to provide your own implementations. See +# the respective file under `platforms/<PLATFORM>/bootloaders/custom.c` to see +# which functions may be overridden. + +ifeq ($(strip $(BOOTLOADER)), custom) + OPT_DEFS += -DBOOTLOADER_CUSTOM + BOOTLOADER_TYPE = custom +endif + +ifeq ($(strip $(BOOTLOADER)), halfkay) + OPT_DEFS += -DBOOTLOADER_HALFKAY + BOOTLOADER_TYPE = halfkay + + # Teensy LC, 3.0, 3.1/2, 3.5, 3.6 + ifneq (,$(filter $(MCU_ORIG), MKL26Z64 MK20DX128 MK20DX256 MK64FX512 MK66FX1M0)) + FIRMWARE_FORMAT = hex + endif +endif +ifeq ($(strip $(BOOTLOADER)), stm32-dfu) + OPT_DEFS += -DBOOTLOADER_STM32_DFU + BOOTLOADER_TYPE = stm32_dfu + + # Options to pass to dfu-util when flashing + DFU_ARGS ?= -d 0483:DF11 -a 0 -s 0x08000000:leave + DFU_SUFFIX_ARGS ?= -v 0483 -p DF11 +endif +ifeq ($(strip $(BOOTLOADER)), apm32-dfu) + OPT_DEFS += -DBOOTLOADER_APM32_DFU + BOOTLOADER_TYPE = stm32_dfu + + # Options to pass to dfu-util when flashing + DFU_ARGS ?= -d 314B:0106 -a 0 -s 0x08000000:leave + DFU_SUFFIX_ARGS ?= -v 314B -p 0106 +endif +ifeq ($(strip $(BOOTLOADER)), gd32v-dfu) + OPT_DEFS += -DBOOTLOADER_GD32V_DFU + BOOTLOADER_TYPE = gd32v_dfu + + # Options to pass to dfu-util when flashing + DFU_ARGS ?= -d 28E9:0189 -a 0 -s 0x08000000:leave + DFU_SUFFIX_ARGS ?= -v 28E9 -p 0189 +endif +ifeq ($(strip $(BOOTLOADER)), kiibohd) + OPT_DEFS += -DBOOTLOADER_KIIBOHD + BOOTLOADER_TYPE = kiibohd + + ifeq ($(strip $(MCU_ORIG)), MK20DX128) + MCU_LDSCRIPT = MK20DX128BLDR4 + endif + ifeq ($(strip $(MCU_ORIG)), MK20DX256) + MCU_LDSCRIPT = MK20DX256BLDR8 + endif + + # Options to pass to dfu-util when flashing + DFU_ARGS = -d 1C11:B007 + DFU_SUFFIX_ARGS = -v 1C11 -p B007 +endif +ifeq ($(strip $(BOOTLOADER)), stm32duino) + OPT_DEFS += -DBOOTLOADER_STM32DUINO + MCU_LDSCRIPT = STM32F103x8_stm32duino_bootloader + BOARD = STM32_F103_STM32DUINO + BOOTLOADER_TYPE = stm32duino + + # Options to pass to dfu-util when flashing + DFU_ARGS = -d 1EAF:0003 -a 2 -R + DFU_SUFFIX_ARGS = -v 1EAF -p 0003 +endif +ifeq ($(strip $(BOOTLOADER)), tinyuf2) + OPT_DEFS += -DBOOTLOADER_TINYUF2 + BOOTLOADER_TYPE = tinyuf2 + FIRMWARE_FORMAT = uf2 +endif +ifeq ($(strip $(BOOTLOADER)), rp2040) + OPT_DEFS += -DBOOTLOADER_RP2040 + BOOTLOADER_TYPE = rp2040 +endif +ifeq ($(strip $(BOOTLOADER)), wb32-dfu) + OPT_DEFS += -DBOOTLOADER_WB32_DFU + BOOTLOADER_TYPE = wb32_dfu +endif + +ifeq ($(strip $(BOOTLOADER_TYPE)),) + ifneq ($(strip $(BOOTLOADER)),) + $(call CATASTROPHIC_ERROR,Invalid BOOTLOADER,Invalid bootloader specified. Please set an appropriate bootloader in your rules.mk or info.json.) + else + $(call CATASTROPHIC_ERROR,Invalid BOOTLOADER,No bootloader specified. Please set an appropriate bootloader in your rules.mk or info.json.) + endif +endif diff --git a/platforms/chibios/chibios_config.h b/platforms/chibios/chibios_config.h index 8dcc23727f..38d3a40f6b 100644 --- a/platforms/chibios/chibios_config.h +++ b/platforms/chibios/chibios_config.h @@ -28,6 +28,10 @@ # define USE_GPIOV1 # define PAL_OUTPUT_TYPE_OPENDRAIN _Static_assert(0, "RP2040 has no Open Drain GPIO configuration, setting this is not possible"); +# define BACKLIGHT_PAL_MODE (PAL_MODE_ALTERNATE_PWM | PAL_RP_PAD_DRIVE12 | PAL_RP_GPIO_OE) +# define BACKLIGHT_PWM_COUNTER_FREQUENCY 1000000 +# define BACKLIGHT_PWM_PERIOD BACKLIGHT_PWM_COUNTER_FREQUENCY / 2048 + # define usb_lld_endpoint_fields # define I2C1_SCL_PAL_MODE (PAL_MODE_ALTERNATE_I2C | PAL_RP_PAD_SLEWFAST | PAL_RP_PAD_PUE | PAL_RP_PAD_DRIVE4) diff --git a/platforms/chibios/converters/elite_c_to_elite_pi/_pin_defs.h b/platforms/chibios/converters/elite_c_to_elite_pi/_pin_defs.h new file mode 100644 index 0000000000..98dd37e279 --- /dev/null +++ b/platforms/chibios/converters/elite_c_to_elite_pi/_pin_defs.h @@ -0,0 +1,39 @@ +// Copyright 2022 QMK +// SPDX-License-Identifier: GPL-2.0-or-later + +#pragma once + +// Left side (front) +#define D3 0U +#define D2 1U +// GND +// GND +#define D1 2U +#define D0 3U +#define D4 4U +#define C6 5U +#define D7 6U +#define E6 7U +#define B4 8U +#define B5 9U + +// Right side (front) +// RAW +// GND +// RESET +// VCC +#define F4 29U +#define F5 28U +#define F6 27U +#define F7 26U +#define B1 22U +#define B3 20U +#define B2 23U +#define B6 21U + +// Bottom row +#define B7 12U +#define D5 13U +#define C7 14U +#define F1 15U +#define F0 16U diff --git a/platforms/chibios/converters/elite_c_to_elite_pi/converter.mk b/platforms/chibios/converters/elite_c_to_elite_pi/converter.mk new file mode 100644 index 0000000000..590a004189 --- /dev/null +++ b/platforms/chibios/converters/elite_c_to_elite_pi/converter.mk @@ -0,0 +1,9 @@ +# Elite-Pi MCU settings for converting AVR projects +MCU := RP2040 +BOARD := QMK_PM2040 +BOOTLOADER := rp2040 + +# These are defaults based on what has been implemented for RP2040 boards +SERIAL_DRIVER ?= vendor +WS2812_DRIVER ?= vendor +BACKLIGHT_DRIVER ?= software diff --git a/platforms/chibios/converters/elite_c_to_stemcell/_pin_defs.h b/platforms/chibios/converters/elite_c_to_stemcell/_pin_defs.h new file mode 100644 index 0000000000..4458abfa1c --- /dev/null +++ b/platforms/chibios/converters/elite_c_to_stemcell/_pin_defs.h @@ -0,0 +1,54 @@ +// Copyright 2022 Mega Mind (@megamind4089) +// SPDX-License-Identifier: GPL-2.0-or-later + +#pragma once + +// Pindefs for v2.0.0 +// https://megamind4089.github.io/STeMCell/pinout/ + +// Left side (front) +#ifdef STEMCELL_UART_SWAP +# define D3 PAL_LINE(GPIOA, 3) +# define D2 PAL_LINE(GPIOA, 2) +#else +# define D3 PAL_LINE(GPIOA, 2) +# define D2 PAL_LINE(GPIOA, 3) +#endif +// GND +// GND +#ifdef STEMCELL_I2C_SWAP +# define D1 PAL_LINE(GPIOB, 6) +# define D0 PAL_LINE(GPIOB, 7) +#else +# define D1 PAL_LINE(GPIOB, 7) +# define D0 PAL_LINE(GPIOB, 6) +#endif + +#define D4 PAL_LINE(GPIOA, 15) +#define C6 PAL_LINE(GPIOB, 3) +#define D7 PAL_LINE(GPIOB, 4) +#define E6 PAL_LINE(GPIOB, 5) +#define B4 PAL_LINE(GPIOB, 8) +#define B5 PAL_LINE(GPIOB, 9) + +// Right side (front) +// RAW +// GND +// RESET +// VCC +#define F4 PAL_LINE(GPIOB, 10) +#define F5 PAL_LINE(GPIOB, 2) +#define F6 PAL_LINE(GPIOB, 1) +#define F7 PAL_LINE(GPIOB, 0) + +#define B1 PAL_LINE(GPIOA, 5) +#define B3 PAL_LINE(GPIOA, 6) +#define B2 PAL_LINE(GPIOA, 7) +#define B6 PAL_LINE(GPIOA, 4) + +// Bottom row +#define B7 PAL_LINE(GPIOC, 13) +#define D5 PAL_LINE(GPIOC, 14) +#define C7 PAL_LINE(GPIOC, 15) +#define F1 PAL_LINE(GPIOA, 0) +#define F0 PAL_LINE(GPIOA, 1) diff --git a/platforms/chibios/converters/elite_c_to_stemcell/converter.mk b/platforms/chibios/converters/elite_c_to_stemcell/converter.mk new file mode 100644 index 0000000000..1bbe9bf09e --- /dev/null +++ b/platforms/chibios/converters/elite_c_to_stemcell/converter.mk @@ -0,0 +1,18 @@ +# Copyright 2022 Mega Mind (@megamind4089) +# SPDX-License-Identifier: GPL-2.0-or-later + +MCU := STM32F411 +BOARD := STEMCELL +BOOTLOADER := tinyuf2 + +SERIAL_DRIVER ?= usart +WS2812_DRIVER ?= bitbang + +ifeq ($(strip $(STMC_US)), yes) + OPT_DEFS += -DSTEMCELL_UART_SWAP +endif + +ifeq ($(strip $(STMC_IS)), yes) + OPT_DEFS += -DSTEMCELL_I2C_SWAP +endif + diff --git a/platforms/chibios/converters/promicro_to_elite_pi/_pin_defs.h b/platforms/chibios/converters/promicro_to_elite_pi/_pin_defs.h new file mode 100644 index 0000000000..1372bef79e --- /dev/null +++ b/platforms/chibios/converters/promicro_to_elite_pi/_pin_defs.h @@ -0,0 +1,36 @@ +// Copyright 2022 QMK +// SPDX-License-Identifier: GPL-2.0-or-later + +#pragma once + +// Left side (front) +#define D3 0U +#define D2 1U +// GND +// GND +#define D1 2U +#define D0 3U +#define D4 4U +#define C6 5U +#define D7 6U +#define E6 7U +#define B4 8U +#define B5 9U + +// Right side (front) +// RAW +// GND +// RESET +// VCC +#define F4 29U +#define F5 28U +#define F6 27U +#define F7 26U +#define B1 22U +#define B3 20U +#define B2 23U +#define B6 21U + +// LEDs +#define D5 12U +#define B0 13U diff --git a/platforms/chibios/converters/promicro_to_elite_pi/converter.mk b/platforms/chibios/converters/promicro_to_elite_pi/converter.mk new file mode 100644 index 0000000000..590a004189 --- /dev/null +++ b/platforms/chibios/converters/promicro_to_elite_pi/converter.mk @@ -0,0 +1,9 @@ +# Elite-Pi MCU settings for converting AVR projects +MCU := RP2040 +BOARD := QMK_PM2040 +BOOTLOADER := rp2040 + +# These are defaults based on what has been implemented for RP2040 boards +SERIAL_DRIVER ?= vendor +WS2812_DRIVER ?= vendor +BACKLIGHT_DRIVER ?= software diff --git a/platforms/chibios/drivers/serial_protocol.c b/platforms/chibios/drivers/serial_protocol.c index c95aed9885..ccaf73282d 100644 --- a/platforms/chibios/drivers/serial_protocol.c +++ b/platforms/chibios/drivers/serial_protocol.c @@ -102,15 +102,11 @@ static inline bool react_to_transaction(void) { * @return bool Indicates success of transaction. */ bool soft_serial_transaction(int index) { - bool result = initiate_transaction((uint8_t)index); + /* Clear the receive queue, to start with a clean slate. + * Parts of failed transactions or spurious bytes could still be in it. */ + serial_transport_driver_clear(); - if (unlikely(!result)) { - /* Clear the receive queue, to start with a clean slate. - * Parts of failed transactions or spurious bytes could still be in it. */ - serial_transport_driver_clear(); - } - - return result; + return initiate_transaction((uint8_t)index); } /** diff --git a/platforms/chibios/drivers/uart.c b/platforms/chibios/drivers/uart.c index 396803f33b..b16130d80b 100644 --- a/platforms/chibios/drivers/uart.c +++ b/platforms/chibios/drivers/uart.c @@ -18,7 +18,9 @@ #include "quantum.h" -#if defined(WB32F3G71xx) || defined(WB32FQ95xx) +#if defined(MCU_KINETIS) +static SerialConfig serialConfig = {SERIAL_DEFAULT_BITRATE}; +#elif defined(WB32F3G71xx) || defined(WB32FQ95xx) static SerialConfig serialConfig = {SERIAL_DEFAULT_BITRATE, SD1_WRDLEN, SD1_STPBIT, SD1_PARITY, SD1_ATFLCT}; #else static SerialConfig serialConfig = {SERIAL_DEFAULT_BITRATE, SD1_CR1, SD1_CR2, SD1_CR3}; @@ -30,11 +32,15 @@ void uart_init(uint32_t baud) { if (!is_initialised) { is_initialised = true; +#if defined(MCU_KINETIS) + serialConfig.sc_speed = baud; +#else serialConfig.speed = baud; +#endif #if defined(USE_GPIOV1) - palSetLineMode(SD1_TX_PIN, PAL_MODE_ALTERNATE_OPENDRAIN); - palSetLineMode(SD1_RX_PIN, PAL_MODE_ALTERNATE_OPENDRAIN); + palSetLineMode(SD1_TX_PIN, SD1_TX_PAL_MODE); + palSetLineMode(SD1_RX_PIN, SD1_RX_PAL_MODE); #else palSetLineMode(SD1_TX_PIN, PAL_MODE_ALTERNATE(SD1_TX_PAL_MODE) | PAL_OUTPUT_TYPE_OPENDRAIN); palSetLineMode(SD1_RX_PIN, PAL_MODE_ALTERNATE(SD1_RX_PAL_MODE) | PAL_OUTPUT_TYPE_OPENDRAIN); diff --git a/platforms/chibios/drivers/uart.h b/platforms/chibios/drivers/uart.h index 603d51037b..db97840270 100644 --- a/platforms/chibios/drivers/uart.h +++ b/platforms/chibios/drivers/uart.h @@ -28,32 +28,50 @@ # define SD1_TX_PIN A9 #endif -#ifndef SD1_TX_PAL_MODE -# define SD1_TX_PAL_MODE 7 -#endif - #ifndef SD1_RX_PIN # define SD1_RX_PIN A10 #endif -#ifndef SD1_RX_PAL_MODE -# define SD1_RX_PAL_MODE 7 -#endif - #ifndef SD1_CTS_PIN # define SD1_CTS_PIN A11 #endif -#ifndef SD1_CTS_PAL_MODE -# define SD1_CTS_PAL_MODE 7 -#endif - #ifndef SD1_RTS_PIN # define SD1_RTS_PIN A12 #endif -#ifndef SD1_RTS_PAL_MODE -# define SD1_RTS_PAL_MODE 7 +#ifdef USE_GPIOV1 +# ifndef SD1_TX_PAL_MODE +# define SD1_TX_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN +# endif + +# ifndef SD1_RX_PAL_MODE +# define SD1_RX_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN +# endif + +# ifndef SD1_CTS_PAL_MODE +# define SD1_CTS_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN +# endif + +# ifndef SD1_RTS_PAL_MODE +# define SD1_RTS_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN +# endif +#else +# ifndef SD1_TX_PAL_MODE +# define SD1_TX_PAL_MODE 7 +# endif + +# ifndef SD1_RX_PAL_MODE +# define SD1_RX_PAL_MODE 7 +# endif + +# ifndef SD1_CTS_PAL_MODE +# define SD1_CTS_PAL_MODE 7 +# endif + +# ifndef SD1_RTS_PAL_MODE +# define SD1_RTS_PAL_MODE 7 +# endif #endif #ifndef SD1_CR1 diff --git a/platforms/chibios/drivers/vendor/RP/RP2040/serial_vendor.c b/platforms/chibios/drivers/vendor/RP/RP2040/serial_vendor.c index 764764b3f9..dd4723a086 100644 --- a/platforms/chibios/drivers/vendor/RP/RP2040/serial_vendor.c +++ b/platforms/chibios/drivers/vendor/RP/RP2040/serial_vendor.c @@ -140,9 +140,8 @@ void pio_serve_interrupt(void) { // strength is chosen because the transmitting side must still be able to drive // the signal low. With this configuration the rise times are fast enough and // the generated low level with 360mV will generate a logical zero. -static inline void enter_rx_state(void) { +static void __no_inline_not_in_flash_func(enter_rx_state)(void) { osalSysLock(); - nvicEnableVector(RP_USBCTRL_IRQ_NUMBER, RP_IRQ_USB0_PRIORITY); // Wait for the transmitting state machines FIFO to run empty. At this point // the last byte has been pulled from the transmitting state machines FIFO // into the output shift register. We have to wait a tiny bit more until @@ -162,11 +161,8 @@ static inline void enter_rx_state(void) { osalSysUnlock(); } -static inline void leave_rx_state(void) { +static void __no_inline_not_in_flash_func(leave_rx_state)(void) { osalSysLock(); - // We don't want to be interrupted by frequent (1KHz) USB interrupts while - // doing our timing critical sending operation. - nvicDisableVector(RP_USBCTRL_IRQ_NUMBER); // In Half-duplex operation the tx pin dual-functions as sender and // receiver. To not receive the data we will send, we disable the receiving // state machine. @@ -185,12 +181,13 @@ static inline void leave_rx_state(void) {} #endif /** - * @brief Clear the RX and TX hardware FIFOs of the state machines. + * @brief Clear the FIFO of the RX state machine. */ inline void serial_transport_driver_clear(void) { osalSysLock(); - pio_sm_clear_fifos(pio, rx_state_machine); - pio_sm_clear_fifos(pio, tx_state_machine); + while (!pio_sm_is_rx_fifo_empty(pio, rx_state_machine)) { + pio_sm_clear_fifos(pio, rx_state_machine); + } osalSysUnlock(); } @@ -198,11 +195,6 @@ static inline msg_t sync_tx(sysinterval_t timeout) { msg_t msg = MSG_OK; osalSysLock(); while (pio_sm_is_tx_fifo_full(pio, tx_state_machine)) { -#if !defined(SERIAL_USART_FULL_DUPLEX) - // Enable USB interrupts again, because we might sleep for a long time - // here and don't want to be disconnected from the host. - nvicEnableVector(RP_USBCTRL_IRQ_NUMBER, RP_IRQ_USB0_PRIORITY); -#endif pio_set_irq0_source_enabled(pio, pis_sm0_tx_fifo_not_full + tx_state_machine, true); msg = osalThreadSuspendTimeoutS(&tx_thread, timeout); if (msg < MSG_OK) { @@ -210,10 +202,6 @@ static inline msg_t sync_tx(sysinterval_t timeout) { break; } } -#if !defined(SERIAL_USART_FULL_DUPLEX) - // Entering timing critical territory again. - nvicDisableVector(RP_USBCTRL_IRQ_NUMBER); -#endif osalSysUnlock(); return msg; } diff --git a/platforms/chibios/drivers/ws2812_spi.c b/platforms/chibios/drivers/ws2812_spi.c index a73eb69720..390884a2a4 100644 --- a/platforms/chibios/drivers/ws2812_spi.c +++ b/platforms/chibios/drivers/ws2812_spi.c @@ -181,7 +181,7 @@ void ws2812_init(void) { spiStart(&WS2812_SPI, &spicfg); /* Setup transfer parameters. */ spiSelect(&WS2812_SPI); /* Slave Select assertion. */ #ifdef WS2812_SPI_USE_CIRCULAR_BUFFER - spiStartSend(&WS2812_SPI, sizeof(txbuf) / sizeof(txbuf[0]), txbuf); + spiStartSend(&WS2812_SPI, ARRAY_SIZE(txbuf), txbuf); #endif } @@ -200,9 +200,9 @@ void ws2812_setleds(LED_TYPE* ledarray, uint16_t leds) { // Instead spiSend can be used to send synchronously (or the thread logic can be added back). #ifndef WS2812_SPI_USE_CIRCULAR_BUFFER # ifdef WS2812_SPI_SYNC - spiSend(&WS2812_SPI, sizeof(txbuf) / sizeof(txbuf[0]), txbuf); + spiSend(&WS2812_SPI, ARRAY_SIZE(txbuf), txbuf); # else - spiStartSend(&WS2812_SPI, sizeof(txbuf) / sizeof(txbuf[0]), txbuf); + spiStartSend(&WS2812_SPI, ARRAY_SIZE(txbuf), txbuf); # endif #endif } diff --git a/platforms/chibios/flash.mk b/platforms/chibios/flash.mk index 023da34bb5..6e23d96e1c 100644 --- a/platforms/chibios/flash.mk +++ b/platforms/chibios/flash.mk @@ -23,6 +23,7 @@ define EXEC_DFU_UTIL $(DFU_UTIL) $(DFU_ARGS) -D $(BUILD_DIR)/$(TARGET).bin endef +WB32_DFU_UPDATER ?= wb32-dfu-updater_cli define EXEC_WB32_DFU_UPDATER if ! wb32-dfu-updater_cli -l | grep -q "Found DFU"; then \ @@ -34,7 +35,7 @@ define EXEC_WB32_DFU_UPDATER done ;\ printf "\n" ;\ fi - wb32-dfu-updater_cli -D $(BUILD_DIR)/$(TARGET).bin + $(WB32_DFU_UPDATER) -D $(BUILD_DIR)/$(TARGET).bin && $(WB32_DFU_UPDATER) -R endef dfu-util: $(BUILD_DIR)/$(TARGET).bin cpfirmware sizeafter diff --git a/platforms/chibios/hardware_id.c b/platforms/chibios/hardware_id.c index 888a275465..1097db5966 100644 --- a/platforms/chibios/hardware_id.c +++ b/platforms/chibios/hardware_id.c @@ -6,10 +6,15 @@ hardware_id_t get_hardware_id(void) { hardware_id_t id = {0}; -#ifdef UID_BASE +#if defined(RP2040) + // Forward declare as including "hardware/flash.h" here causes more issues... + void flash_get_unique_id(uint8_t *); + + flash_get_unique_id((uint8_t *)&id); +#elif defined(UID_BASE) id.data[0] = (uint32_t)(*((uint32_t *)UID_BASE)); id.data[1] = (uint32_t)(*((uint32_t *)(UID_BASE + 4))); - id.data[1] = (uint32_t)(*((uint32_t *)(UID_BASE + 8))); + id.data[2] = (uint32_t)(*((uint32_t *)(UID_BASE + 8))); #endif return id; } diff --git a/platforms/chibios/vendors/RP/RP2040.mk b/platforms/chibios/vendors/RP/RP2040.mk index de426c9c40..4360512c05 100644 --- a/platforms/chibios/vendors/RP/RP2040.mk +++ b/platforms/chibios/vendors/RP/RP2040.mk @@ -11,7 +11,8 @@ endif # Raspberry Pi Pico SDK Support ############################################################################## ADEFS += -DCRT0_VTOR_INIT=1 \ - -DCRT0_EXTRA_CORES_NUMBER=0 + -DCRT0_EXTRA_CORES_NUMBER=0 \ + -DCRT0_INIT_VECTORS=1 CFLAGS += -DPICO_NO_FPGA_CHECK \ -DNDEBUG @@ -65,223 +66,34 @@ EXTRAINCDIRS += $(PLATFORM_RP2040_PATH) # RP2040 optimized compiler intrinsics ############################################################################## -# Enables optimized Compiler intrinsics which are located in the RP2040 -# bootrom. This needs startup code and linker script support from ChibiOS, -# which is WIP. Therefore disabled by default for now. -RP2040_INTRINSICS_ENABLED ?= no -ifeq ($(strip $(RP2040_INTRINSICS_ENABLED)), yes) - PICOSDKINTRINSICSSRC = $(PICOSDKROOT)/src/rp2_common/pico_float/float_aeabi.S \ - $(PICOSDKROOT)/src/rp2_common/pico_float/float_math.c \ - $(PICOSDKROOT)/src/rp2_common/pico_float/float_init_rom.c \ - $(PICOSDKROOT)/src/rp2_common/pico_float/float_v1_rom_shim.S \ - $(PICOSDKROOT)/src/rp2_common/pico_double/double_aeabi.S \ - $(PICOSDKROOT)/src/rp2_common/pico_double/double_math.c \ - $(PICOSDKROOT)/src/rp2_common/pico_double/double_init_rom.c \ - $(PICOSDKROOT)/src/rp2_common/pico_double/double_v1_rom_shim.S \ - $(PICOSDKROOT)/src/rp2_common/pico_divider/divider.S \ - $(PICOSDKROOT)/src/rp2_common/pico_int64_ops/pico_int64_ops_aeabi.S \ - $(PICOSDKROOT)/src/rp2_common/pico_mem_ops/mem_ops_aeabi.S \ - $(PICOSDKROOT)/src/rp2_common/pico_malloc/pico_malloc.c \ - $(PICOSDKROOT)/src/rp2_common/pico_bit_ops/bit_ops_aeabi.S - - PICOSDKINTRINSICSINC = $(PICOSDKROOT)/src/common/pico_base/include \ - $(PICOSDKROOT)/src/rp2_common/pico_platfrom/include \ - $(PICOSDKROOT)/src/rp2_common/pico_bootrom/include \ - $(PICOSDKROOT)/src/rp2_common/hardware_divider/include \ - $(PICOSDKROOT)/src/rp2_common/pico_float/include \ - $(PICOSDKROOT)/src/rp2_common/pico_double/include \ - $(PICOSDKROOT)/src/rp2_common/pico_malloc/include - - OPT_DEFS += -DPICO_FLOAT_SUPPORT_ROM_V1=0 -DPICO_DOUBLE_SUPPORT_ROM_V1=0 - - CFLAGS += -Wl,--defsym=__StackLimit=__heap_end__ - CFLAGS += -Wl,--defsym=__unhandled_user_irq=_unhandled_exception - CFLAGS += -Wl,--build-id=none - - # single precision floating point intrinsics - OPT_DEFS += -DPICO_FLOAT_IN_RAM=1 - OPT_DEFS += -DPICO_FLOAT_PROPAGATE_NANS=0 - - CFLAGS += -Wl,--wrap=__aeabi_fdiv - CFLAGS += -Wl,--wrap=__aeabi_fmul - CFLAGS += -Wl,--wrap=__aeabi_frsub - CFLAGS += -Wl,--wrap=__aeabi_fsub - CFLAGS += -Wl,--wrap=__aeabi_cfcmpeq - CFLAGS += -Wl,--wrap=__aeabi_cfrcmple - CFLAGS += -Wl,--wrap=__aeabi_cfcmple - CFLAGS += -Wl,--wrap=__aeabi_fcmpeq - CFLAGS += -Wl,--wrap=__aeabi_fcmplt - CFLAGS += -Wl,--wrap=__aeabi_fcmple - CFLAGS += -Wl,--wrap=__aeabi_fcmpge - CFLAGS += -Wl,--wrap=__aeabi_fcmpgt - CFLAGS += -Wl,--wrap=__aeabi_fcmpun - CFLAGS += -Wl,--wrap=__aeabi_i2f - CFLAGS += -Wl,--wrap=__aeabi_l2f - CFLAGS += -Wl,--wrap=__aeabi_ui2f - CFLAGS += -Wl,--wrap=__aeabi_ul2f - CFLAGS += -Wl,--wrap=__aeabi_i2f - CFLAGS += -Wl,--wrap=__aeabi_f2iz - CFLAGS += -Wl,--wrap=__aeabi_f2lz - CFLAGS += -Wl,--wrap=__aeabi_f2uiz - CFLAGS += -Wl,--wrap=__aeabi_f2ulz - CFLAGS += -Wl,--wrap=__aeabi_f2d - CFLAGS += -Wl,--wrap=sqrtf - CFLAGS += -Wl,--wrap=cosf - CFLAGS += -Wl,--wrap=sinf - CFLAGS += -Wl,--wrap=tanf - CFLAGS += -Wl,--wrap=atan2f - CFLAGS += -Wl,--wrap=expf - CFLAGS += -Wl,--wrap=logf - CFLAGS += -Wl,--wrap=ldexpf - CFLAGS += -Wl,--wrap=copysignf - CFLAGS += -Wl,--wrap=truncf - CFLAGS += -Wl,--wrap=floorf - CFLAGS += -Wl,--wrap=ceilf - CFLAGS += -Wl,--wrap=roundf - CFLAGS += -Wl,--wrap=sincosf - CFLAGS += -Wl,--wrap=asinf - CFLAGS += -Wl,--wrap=acosf - CFLAGS += -Wl,--wrap=atanf - CFLAGS += -Wl,--wrap=sinhf - CFLAGS += -Wl,--wrap=coshf - CFLAGS += -Wl,--wrap=tanhf - CFLAGS += -Wl,--wrap=asinhf - CFLAGS += -Wl,--wrap=acoshf - CFLAGS += -Wl,--wrap=atanhf - CFLAGS += -Wl,--wrap=exp2f - CFLAGS += -Wl,--wrap=log2f - CFLAGS += -Wl,--wrap=exp10f - CFLAGS += -Wl,--wrap=log10f - CFLAGS += -Wl,--wrap=powf - CFLAGS += -Wl,--wrap=powintf - CFLAGS += -Wl,--wrap=hypotf - CFLAGS += -Wl,--wrap=cbrtf - CFLAGS += -Wl,--wrap=fmodf - CFLAGS += -Wl,--wrap=dremf - CFLAGS += -Wl,--wrap=remainderf - CFLAGS += -Wl,--wrap=remquof - CFLAGS += -Wl,--wrap=expm1f - CFLAGS += -Wl,--wrap=log1pf - CFLAGS += -Wl,--wrap=fmaf - - # double precision floating point intrinsics - OPT_DEFS += -DPICO_DOUBLE_IN_RAM=1 - OPT_DEFS += -DPICO_DOUBLE_PROPAGATE_NANS=0 - - CFLAGS += -Wl,--wrap=__aeabi_dadd - CFLAGS += -Wl,--wrap=__aeabi_ddiv - CFLAGS += -Wl,--wrap=__aeabi_dmul - CFLAGS += -Wl,--wrap=__aeabi_drsub - CFLAGS += -Wl,--wrap=__aeabi_dsub - CFLAGS += -Wl,--wrap=__aeabi_cdcmpeq - CFLAGS += -Wl,--wrap=__aeabi_cdrcmple - CFLAGS += -Wl,--wrap=__aeabi_cdcmple - CFLAGS += -Wl,--wrap=__aeabi_dcmpeq - CFLAGS += -Wl,--wrap=__aeabi_dcmplt - CFLAGS += -Wl,--wrap=__aeabi_dcmple - CFLAGS += -Wl,--wrap=__aeabi_dcmpge - CFLAGS += -Wl,--wrap=__aeabi_dcmpgt - CFLAGS += -Wl,--wrap=__aeabi_dcmpun - CFLAGS += -Wl,--wrap=__aeabi_i2d - CFLAGS += -Wl,--wrap=__aeabi_l2d - CFLAGS += -Wl,--wrap=__aeabi_ui2d - CFLAGS += -Wl,--wrap=__aeabi_ul2d - CFLAGS += -Wl,--wrap=__aeabi_d2iz - CFLAGS += -Wl,--wrap=__aeabi_d2lz - CFLAGS += -Wl,--wrap=__aeabi_d2uiz - CFLAGS += -Wl,--wrap=__aeabi_d2ulz - CFLAGS += -Wl,--wrap=__aeabi_d2f - CFLAGS += -Wl,--wrap=sqrt - CFLAGS += -Wl,--wrap=cos - CFLAGS += -Wl,--wrap=sin - CFLAGS += -Wl,--wrap=tan - CFLAGS += -Wl,--wrap=atan2 - CFLAGS += -Wl,--wrap=exp - CFLAGS += -Wl,--wrap=log - CFLAGS += -Wl,--wrap=ldexp - CFLAGS += -Wl,--wrap=copysign - CFLAGS += -Wl,--wrap=trunc - CFLAGS += -Wl,--wrap=floor - CFLAGS += -Wl,--wrap=ceil - CFLAGS += -Wl,--wrap=round - CFLAGS += -Wl,--wrap=sincos - CFLAGS += -Wl,--wrap=asin - CFLAGS += -Wl,--wrap=acos - CFLAGS += -Wl,--wrap=atan - CFLAGS += -Wl,--wrap=sinh - CFLAGS += -Wl,--wrap=cosh - CFLAGS += -Wl,--wrap=tanh - CFLAGS += -Wl,--wrap=asinh - CFLAGS += -Wl,--wrap=acosh - CFLAGS += -Wl,--wrap=atanh - CFLAGS += -Wl,--wrap=exp2 - CFLAGS += -Wl,--wrap=log2 - CFLAGS += -Wl,--wrap=exp10 - CFLAGS += -Wl,--wrap=log10 - CFLAGS += -Wl,--wrap=pow - CFLAGS += -Wl,--wrap=powint - CFLAGS += -Wl,--wrap=hypot - CFLAGS += -Wl,--wrap=cbrt - CFLAGS += -Wl,--wrap=fmod - CFLAGS += -Wl,--wrap=drem - CFLAGS += -Wl,--wrap=remainder - CFLAGS += -Wl,--wrap=remquo - CFLAGS += -Wl,--wrap=expm1 - CFLAGS += -Wl,--wrap=log1p - CFLAGS += -Wl,--wrap=fma - - # bit operation intrinsics - OPT_DEFS += -DPICO_BITS_IN_RAM=1 - - CFLAGS += -Wl,--wrap=__clzsi2 - CFLAGS += -Wl,--wrap=__clzsi2 - CFLAGS += -Wl,--wrap=__clzdi2 - CFLAGS += -Wl,--wrap=__ctzsi2 - CFLAGS += -Wl,--wrap=__ctzdi2 - CFLAGS += -Wl,--wrap=__popcountsi2 - CFLAGS += -Wl,--wrap=__popcountdi2 - CFLAGS += -Wl,--wrap=__clz - CFLAGS += -Wl,--wrap=__clzl - CFLAGS += -Wl,--wrap=__clzsi2 - CFLAGS += -Wl,--wrap=__clzll - - # integer division intrinsics - OPT_DEFS += -DPICO_DIVIDER_IN_RAM=1 - OPT_DEFS += -DPICO_DIVIDER_DISABLE_INTERRUPTS=1 - - CFLAGS += -Wl,--wrap=__aeabi_idiv - CFLAGS += -Wl,--wrap=__aeabi_idivmod - CFLAGS += -Wl,--wrap=__aeabi_ldivmod - CFLAGS += -Wl,--wrap=__aeabi_uidiv - CFLAGS += -Wl,--wrap=__aeabi_uidivmod - CFLAGS += -Wl,--wrap=__aeabi_uldivmod - - # 64bit integer intrinsics - OPT_DEFS += -DPICO_INT64_OPS_IN_RAM=1 - - CFLAGS += -Wl,--wrap=__aeabi_lmul - - # malloc and friends functions - OPT_DEFS += -DPICO_USE_MALLOC_MUTEX=0 - OPT_DEFS += -DPICO_DEBUG_MALLOC=0 - OPT_DEFS ?= -DPICO_MALLOC_PANIC=0 - - CFLAGS += -Wl,--wrap=malloc - CFLAGS += -Wl,--wrap=calloc - CFLAGS += -Wl,--wrap=free - - # memory operation intrinsics - OPT_DEFS += -DPICO_MEM_IN_RAM=1 - - CFLAGS += -Wl,--wrap=memcpy - CFLAGS += -Wl,--wrap=memset - CFLAGS += -Wl,--wrap=__aeabi_memcpy - CFLAGS += -Wl,--wrap=__aeabi_memset - CFLAGS += -Wl,--wrap=__aeabi_memcpy4 - CFLAGS += -Wl,--wrap=__aeabi_memset4 - CFLAGS += -Wl,--wrap=__aeabi_memcpy8 - CFLAGS += -Wl,--wrap=__aeabi_memset8 - - PLATFORM_SRC += $(PICOSDKINTRINSICSSRC) - EXTRAINCDIRS += $(PICOSDKINTRINSICSINC) -endif +# The RP2040 sdk provides optimized compiler intrinsics which override the GCC +# built-ins. Some of these functions are located in the bootrom of the RP2040. +# Execution of these functions is realized via a vtable that is populated on +# bootup. This mechanism needs startup code and linker script support from +# ChibiOS, which is currently not implemented thus these functions are disabled +# ATM. +PICOSDKINTRINSICSSRC = $(PICOSDKROOT)/src/rp2_common/pico_divider/divider.S \ + $(PICOSDKROOT)/src/rp2_common/pico_int64_ops/pico_int64_ops_aeabi.S + +PICOSDKINTRINSICSINC = $(PICOSDKROOT)/src/common/pico_base/include \ + $(PICOSDKROOT)/src/rp2_common/pico_platfrom/include \ + $(PICOSDKROOT)/src/rp2_common/hardware_divider/include + +# integer division intrinsics utilizing the RP2040 hardware divider +OPT_DEFS += -DPICO_DIVIDER_IN_RAM=1 +OPT_DEFS += -DPICO_DIVIDER_DISABLE_INTERRUPTS=1 + +CFLAGS += -Wl,--wrap=__aeabi_idiv +CFLAGS += -Wl,--wrap=__aeabi_idivmod +CFLAGS += -Wl,--wrap=__aeabi_ldivmod +CFLAGS += -Wl,--wrap=__aeabi_uidiv +CFLAGS += -Wl,--wrap=__aeabi_uidivmod +CFLAGS += -Wl,--wrap=__aeabi_uldivmod + +# 64bit integer intrinsics +OPT_DEFS += -DPICO_INT64_OPS_IN_RAM=1 + +CFLAGS += -Wl,--wrap=__aeabi_lmul + +PLATFORM_SRC += $(PICOSDKINTRINSICSSRC) +EXTRAINCDIRS += $(PICOSDKINTRINSICSINC) diff --git a/platforms/chibios/vendors/RP/_pin_defs.h b/platforms/chibios/vendors/RP/_pin_defs.h index 4241845369..b56ab31406 100644 --- a/platforms/chibios/vendors/RP/_pin_defs.h +++ b/platforms/chibios/vendors/RP/_pin_defs.h @@ -35,3 +35,8 @@ #define GP28 28U #define GP29 29U #define GP30 30U + +/* Aliases for GPIO PWM channels - every pin has at least one PWM channel + * assigned */ +#define RP2040_PWM_CHANNEL_A 1U +#define RP2040_PWM_CHANNEL_B 2U |