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-rw-r--r--platforms/chibios/drivers/analog.c53
-rw-r--r--platforms/chibios/drivers/audio_dac_additive.c2
-rw-r--r--platforms/chibios/drivers/audio_dac_basic.c2
-rw-r--r--platforms/chibios/drivers/serial_usart.c24
-rw-r--r--platforms/chibios/drivers/uart.c4
-rw-r--r--platforms/chibios/drivers/uart.h11
-rw-r--r--platforms/chibios/drivers/vendor/RP/RP2040/ws2812_vendor.c14
7 files changed, 54 insertions, 56 deletions
diff --git a/platforms/chibios/drivers/analog.c b/platforms/chibios/drivers/analog.c
index 8b03e73849..bf84ce8f76 100644
--- a/platforms/chibios/drivers/analog.c
+++ b/platforms/chibios/drivers/analog.c
@@ -22,8 +22,8 @@
# error "You need to set HAL_USE_ADC to TRUE in your halconf.h to use the ADC."
#endif
-#if !STM32_ADC_USE_ADC1 && !STM32_ADC_USE_ADC2 && !STM32_ADC_USE_ADC3 && !STM32_ADC_USE_ADC4 && !WB32_ADC_USE_ADC1
-# error "You need to set one of the 'STM32_ADC_USE_ADCx' settings to TRUE in your mcuconf.h to use the ADC."
+#if !RP_ADC_USE_ADC1 && !STM32_ADC_USE_ADC1 && !STM32_ADC_USE_ADC2 && !STM32_ADC_USE_ADC3 && !STM32_ADC_USE_ADC4 && !WB32_ADC_USE_ADC1
+# error "You need to set one of the 'xxx_ADC_USE_ADCx' settings to TRUE in your mcuconf.h to use the ADC."
#endif
#if STM32_ADC_DUAL_MODE
@@ -42,7 +42,7 @@
#endif
// BODGE to make v2 look like v1,3 and 4
-#ifdef USE_ADCV2
+#if defined(USE_ADCV2) || defined(RP2040)
# if !defined(ADC_SMPR_SMP_1P5) && defined(ADC_SAMPLE_3)
# define ADC_SMPR_SMP_1P5 ADC_SAMPLE_3
# define ADC_SMPR_SMP_7P5 ADC_SAMPLE_15
@@ -74,7 +74,7 @@
/* User configurable ADC options */
#ifndef ADC_COUNT
-# if defined(STM32F0XX) || defined(STM32F1XX) || defined(STM32F4XX) || defined(GD32VF103) || defined(WB32F3G71xx) || defined(WB32FQ95xx)
+# if defined(RP2040) || defined(STM32F0XX) || defined(STM32F1XX) || defined(STM32F4XX) || defined(GD32VF103) || defined(WB32F3G71xx) || defined(WB32FQ95xx)
# define ADC_COUNT 1
# elif defined(STM32F3XX)
# define ADC_COUNT 4
@@ -126,6 +126,8 @@ static ADCConversionGroup adcConversionGroup = {
# endif
.smpr2 = ADC_SMPR2_SMP_AN0(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN1(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN2(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN3(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN4(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN5(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN6(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN7(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN8(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN9(ADC_SAMPLING_RATE),
.smpr1 = ADC_SMPR1_SMP_AN10(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN11(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN12(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN13(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN14(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN15(ADC_SAMPLING_RATE),
+#elif defined(RP2040)
+// RP2040 does not have any extra config here
#else
.cfgr = ADC_CFGR_CONT | ADC_RESOLUTION,
.smpr = {ADC_SMPR1_SMP_AN0(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN1(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN2(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN3(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN4(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN5(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN6(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN7(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN8(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN9(ADC_SAMPLING_RATE), ADC_SMPR2_SMP_AN10(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN11(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN12(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN13(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN14(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN15(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN16(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN17(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN18(ADC_SAMPLING_RATE)},
@@ -136,22 +138,22 @@ static ADCConversionGroup adcConversionGroup = {
__attribute__((weak)) adc_mux pinToMux(pin_t pin) {
switch (pin) {
#if defined(STM32F0XX)
- case A0: return TO_MUX( ADC_CHSELR_CHSEL0, 0 );
- case A1: return TO_MUX( ADC_CHSELR_CHSEL1, 0 );
- case A2: return TO_MUX( ADC_CHSELR_CHSEL2, 0 );
- case A3: return TO_MUX( ADC_CHSELR_CHSEL3, 0 );
- case A4: return TO_MUX( ADC_CHSELR_CHSEL4, 0 );
- case A5: return TO_MUX( ADC_CHSELR_CHSEL5, 0 );
- case A6: return TO_MUX( ADC_CHSELR_CHSEL6, 0 );
- case A7: return TO_MUX( ADC_CHSELR_CHSEL7, 0 );
- case B0: return TO_MUX( ADC_CHSELR_CHSEL8, 0 );
- case B1: return TO_MUX( ADC_CHSELR_CHSEL9, 0 );
- case C0: return TO_MUX( ADC_CHSELR_CHSEL10, 0 );
- case C1: return TO_MUX( ADC_CHSELR_CHSEL11, 0 );
- case C2: return TO_MUX( ADC_CHSELR_CHSEL12, 0 );
- case C3: return TO_MUX( ADC_CHSELR_CHSEL13, 0 );
- case C4: return TO_MUX( ADC_CHSELR_CHSEL14, 0 );
- case C5: return TO_MUX( ADC_CHSELR_CHSEL15, 0 );
+ case A0: return TO_MUX( 0, 0 );
+ case A1: return TO_MUX( 1, 0 );
+ case A2: return TO_MUX( 2, 0 );
+ case A3: return TO_MUX( 3, 0 );
+ case A4: return TO_MUX( 4, 0 );
+ case A5: return TO_MUX( 5, 0 );
+ case A6: return TO_MUX( 6, 0 );
+ case A7: return TO_MUX( 7, 0 );
+ case B0: return TO_MUX( 8, 0 );
+ case B1: return TO_MUX( 9, 0 );
+ case C0: return TO_MUX( 10, 0 );
+ case C1: return TO_MUX( 11, 0 );
+ case C2: return TO_MUX( 12, 0 );
+ case C3: return TO_MUX( 13, 0 );
+ case C4: return TO_MUX( 14, 0 );
+ case C5: return TO_MUX( 15, 0 );
#elif defined(STM32F3XX)
case A0: return TO_MUX( ADC_CHANNEL_IN1, 0 );
case A1: return TO_MUX( ADC_CHANNEL_IN2, 0 );
@@ -238,6 +240,11 @@ __attribute__((weak)) adc_mux pinToMux(pin_t pin) {
case C5: return TO_MUX( ADC_CHANNEL_IN15, 0 );
// STM32F103x[C-G] in 144-pin packages also have analog inputs on F6...F10, but they are on ADC3, and the
// ChibiOS ADC driver for STM32F1xx currently supports only ADC1, therefore these pins are not usable.
+#elif defined(RP2040)
+ case 26U: return TO_MUX(0, 0);
+ case 27U: return TO_MUX(1, 0);
+ case 28U: return TO_MUX(2, 0);
+ case 29U: return TO_MUX(3, 0);
#endif
}
@@ -248,7 +255,7 @@ __attribute__((weak)) adc_mux pinToMux(pin_t pin) {
static inline ADCDriver* intToADCDriver(uint8_t adcInt) {
switch (adcInt) {
-#if STM32_ADC_USE_ADC1 || WB32_ADC_USE_ADC1
+#if RP_ADC_USE_ADC1 || STM32_ADC_USE_ADC1 || WB32_ADC_USE_ADC1
case 0:
return &ADCD1;
#endif
@@ -296,6 +303,8 @@ int16_t adc_read(adc_mux mux) {
adcConversionGroup.chselr = 1 << mux.input; /*no macro to convert N to ADC_CHSELR_CHSEL1*/
#elif defined(USE_ADCV2)
adcConversionGroup.sqr3 = ADC_SQR3_SQ1_N(mux.input);
+#elif defined(RP2040)
+ adcConversionGroup.channel_mask = 1 << mux.input;
#else
adcConversionGroup.sqr[0] = ADC_SQR1_SQ1_N(mux.input);
#endif
@@ -310,7 +319,7 @@ int16_t adc_read(adc_mux mux) {
return 0;
}
-#ifdef USE_ADCV2
+#if defined(USE_ADCV2) || defined(RP2040)
// fake 12-bit -> N-bit scale
return (*sampleBuffer) >> (12 - ADC_RESOLUTION);
#else
diff --git a/platforms/chibios/drivers/audio_dac_additive.c b/platforms/chibios/drivers/audio_dac_additive.c
index db07c4b393..68ce13788e 100644
--- a/platforms/chibios/drivers/audio_dac_additive.c
+++ b/platforms/chibios/drivers/audio_dac_additive.c
@@ -281,7 +281,7 @@ static const DACConfig dac_conf = {.init = AUDIO_DAC_OFF_VALUE, .datamode = DAC_
*/
static const DACConversionGroup dac_conv_cfg = {.num_channels = 1U, .end_cb = dac_end, .error_cb = dac_error, .trigger = DAC_TRG(0b000)};
-void audio_driver_initialize() {
+void audio_driver_initialize(void) {
if ((AUDIO_PIN == A4) || (AUDIO_PIN_ALT == A4)) {
palSetLineMode(A4, PAL_MODE_INPUT_ANALOG);
dacStart(&DACD1, &dac_conf);
diff --git a/platforms/chibios/drivers/audio_dac_basic.c b/platforms/chibios/drivers/audio_dac_basic.c
index 64439a1e3c..5f0cbf8f84 100644
--- a/platforms/chibios/drivers/audio_dac_basic.c
+++ b/platforms/chibios/drivers/audio_dac_basic.c
@@ -187,7 +187,7 @@ static void gpt_audio_state_cb(GPTDriver *gptp) {
}
}
-void audio_driver_initialize() {
+void audio_driver_initialize(void) {
if ((AUDIO_PIN == A4) || (AUDIO_PIN_ALT == A4)) {
palSetPadMode(GPIOA, 4, PAL_MODE_INPUT_ANALOG);
dacStart(&DACD1, &dac_conf_ch1);
diff --git a/platforms/chibios/drivers/serial_usart.c b/platforms/chibios/drivers/serial_usart.c
index 6581a5b6e9..6ebbf7c8ca 100644
--- a/platforms/chibios/drivers/serial_usart.c
+++ b/platforms/chibios/drivers/serial_usart.c
@@ -72,27 +72,17 @@ inline void serial_transport_driver_clear(void) {
#elif HAL_USE_SIO
-void clear_rx_evt_cb(SIODriver* siop) {
- osalSysLockFromISR();
- /* If errors occured during transactions this callback is invoked. We just
- * clear the error sources and move on. We rely on the fact that we check
- * for the success of the transaction by comparing the received/send bytes
- * with the actual received/send bytes in the send/receive functions. */
- sioGetAndClearEventsI(serial_driver);
- osalSysUnlockFromISR();
-}
-
-static const SIOOperation serial_usart_operation = {.rx_cb = NULL, .rx_idle_cb = NULL, .tx_cb = NULL, .tx_end_cb = NULL, .rx_evt_cb = &clear_rx_evt_cb};
-
/**
* @brief SIO Driver startup routine.
*/
static inline void usart_driver_start(void) {
sioStart(serial_driver, &serial_config);
- sioStartOperation(serial_driver, &serial_usart_operation);
}
inline void serial_transport_driver_clear(void) {
+ if (sioHasRXErrorsX(serial_driver)) {
+ sioGetAndClearErrors(serial_driver);
+ }
osalSysLock();
while (!sioIsRXEmptyX(serial_driver)) {
(void)sioGetX(serial_driver);
@@ -132,10 +122,10 @@ inline bool serial_transport_send(const uint8_t* source, const size_t size) {
return serial_transport_receive(dump, bytes_left);
# else
/* The SIO driver directly accesses the hardware FIFOs of the USART
- * peripheral. As these are limited in depth, the RX FIFO might have been
- * overflowed by a large that we just send. Therefore we attempt to read
- * back all the data we send or until the FIFO runs empty in case it
- * overflowed and data was truncated. */
+ * peripheral. As these are limited in depth, the RX FIFO might have
+ * been overflowed by a large transaction that we just send. Therefore
+ * we attempt to read back all the data we send or until the FIFO runs
+ * empty in case it overflowed and data was truncated. */
if (unlikely(sioSynchronizeTXEnd(serial_driver, TIME_MS2I(SERIAL_USART_TIMEOUT)) < MSG_OK)) {
return false;
}
diff --git a/platforms/chibios/drivers/uart.c b/platforms/chibios/drivers/uart.c
index b16130d80b..34f77232b6 100644
--- a/platforms/chibios/drivers/uart.c
+++ b/platforms/chibios/drivers/uart.c
@@ -42,8 +42,8 @@ void uart_init(uint32_t baud) {
palSetLineMode(SD1_TX_PIN, SD1_TX_PAL_MODE);
palSetLineMode(SD1_RX_PIN, SD1_RX_PAL_MODE);
#else
- palSetLineMode(SD1_TX_PIN, PAL_MODE_ALTERNATE(SD1_TX_PAL_MODE) | PAL_OUTPUT_TYPE_OPENDRAIN);
- palSetLineMode(SD1_RX_PIN, PAL_MODE_ALTERNATE(SD1_RX_PAL_MODE) | PAL_OUTPUT_TYPE_OPENDRAIN);
+ palSetLineMode(SD1_TX_PIN, PAL_MODE_ALTERNATE(SD1_TX_PAL_MODE) | PAL_OUTPUT_TYPE_PUSHPULL | PAL_OUTPUT_SPEED_HIGHEST);
+ palSetLineMode(SD1_RX_PIN, PAL_MODE_ALTERNATE(SD1_RX_PAL_MODE) | PAL_OUTPUT_TYPE_PUSHPULL | PAL_OUTPUT_SPEED_HIGHEST);
#endif
sdStart(&SERIAL_DRIVER, &serialConfig);
}
diff --git a/platforms/chibios/drivers/uart.h b/platforms/chibios/drivers/uart.h
index db97840270..e9e3b0855b 100644
--- a/platforms/chibios/drivers/uart.h
+++ b/platforms/chibios/drivers/uart.h
@@ -42,19 +42,16 @@
#ifdef USE_GPIOV1
# ifndef SD1_TX_PAL_MODE
-# define SD1_TX_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN
+# define SD1_TX_PAL_MODE PAL_MODE_ALTERNATE_PUSHPULL
# endif
-
# ifndef SD1_RX_PAL_MODE
-# define SD1_RX_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN
+# define SD1_RX_PAL_MODE PAL_MODE_INPUT
# endif
-
# ifndef SD1_CTS_PAL_MODE
-# define SD1_CTS_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN
+# define SD1_CTS_PAL_MODE PAL_MODE_INPUT
# endif
-
# ifndef SD1_RTS_PAL_MODE
-# define SD1_RTS_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN
+# define SD1_RTS_PAL_MODE PAL_MODE_ALTERNATE_PUSHPULL
# endif
#else
# ifndef SD1_TX_PAL_MODE
diff --git a/platforms/chibios/drivers/vendor/RP/RP2040/ws2812_vendor.c b/platforms/chibios/drivers/vendor/RP/RP2040/ws2812_vendor.c
index bc03213f3b..a46b099195 100644
--- a/platforms/chibios/drivers/vendor/RP/RP2040/ws2812_vendor.c
+++ b/platforms/chibios/drivers/vendor/RP/RP2040/ws2812_vendor.c
@@ -1,10 +1,13 @@
// Copyright 2022 Stefan Kerkmann (@KarlK90)
// SPDX-License-Identifier: GPL-2.0-or-later
-#include "quantum.h"
#include "ws2812.h"
-#include "hardware/pio.h"
+#include "hardware/timer.h"
#include "hardware/clocks.h"
+// Keep this exact include order otherwise we run into naming conflicts between
+// pico-sdk and rp2040.h which we don't control.
+#include "quantum.h"
+#include "hardware/pio.h"
#if !defined(MCU_RP)
# error PIO Driver is only available for Raspberry Pi 2040 MCUs!
@@ -132,7 +135,7 @@ static uint32_t RP_DMA_MODE_WS2812;
static int STATE_MACHINE = -1;
static SEMAPHORE_DECL(TRANSFER_COUNTER, 1);
-static rtcnt_t LAST_TRANSFER;
+static absolute_time_t LAST_TRANSFER;
/**
* @brief Convert RGBW value into WS2812 compatible 32-bit data word.
@@ -161,7 +164,7 @@ static void ws2812_dma_callback(void* p, uint32_t ct) {
// Convert from ns to us
time_to_completion /= 1000;
- LAST_TRANSFER = chSysGetRealtimeCounterX() + time_to_completion + WS2812_TRST_US;
+ update_us_since_boot(&LAST_TRANSFER, time_us_64() + time_to_completion + WS2812_TRST_US);
osalSysLockFromISR();
chSemSignalI(&TRANSFER_COUNTER);
@@ -256,8 +259,7 @@ static inline void sync_ws2812_transfer(void) {
}
// Busy wait until last transfer has finished
- while (unlikely(!timer_expired32(chSysGetRealtimeCounterX(), LAST_TRANSFER))) {
- }
+ busy_wait_until(LAST_TRANSFER);
}
void ws2812_setleds(LED_TYPE* ledarray, uint16_t leds) {
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-05 16:49:19 +0000