summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
Diffstat
-rw-r--r--docs/adc_driver.md154
-rw-r--r--drivers/chibios/analog.c57
2 files changed, 131 insertions, 80 deletions
diff --git a/docs/adc_driver.md b/docs/adc_driver.md
index 6e3d513863..69fff4b3c2 100644
--- a/docs/adc_driver.md
+++ b/docs/adc_driver.md
@@ -47,73 +47,79 @@ Note that some of these pins are doubled-up on ADCs with the same channel. This
Also note that the F0 and F3 use different numbering schemes. The F0 has a single ADC and the channels are 0-indexed, whereas the F3 has 4 ADCs and the channels are 1-indexed. This is because the F0 uses the `ADCv1` implementation of the ADC, whereas the F3 uses the `ADCv3` implementation.
-|ADC|Channel|STM32F0xx|STM32F3xx|
-|---|-------|---------|---------|
-|1 |0 |`A0` | |
-|1 |1 |`A1` |`A0` |
-|1 |2 |`A2` |`A1` |
-|1 |3 |`A3` |`A2` |
-|1 |4 |`A4` |`A3` |
-|1 |5 |`A5` |`F4` |
-|1 |6 |`A6` |`C0` |
-|1 |7 |`A7` |`C1` |
-|1 |8 |`B0` |`C2` |
-|1 |9 |`B1` |`C3` |
-|1 |10 |`C0` |`F2` |
-|1 |11 |`C1` | |
-|1 |12 |`C2` | |
-|1 |13 |`C3` | |
-|1 |14 |`C4` | |
-|1 |15 |`C5` | |
-|1 |16 | | |
-|2 |1 | |`A4` |
-|2 |2 | |`A5` |
-|2 |3 | |`A6` |
-|2 |4 | |`A7` |
-|2 |5 | |`C4` |
-|2 |6 | |`C0` |
-|2 |7 | |`C1` |
-|2 |8 | |`C2` |
-|2 |9 | |`C3` |
-|2 |10 | |`F2` |
-|2 |11 | |`C5` |
-|2 |12 | |`B2` |
-|2 |13 | | |
-|2 |14 | | |
-|2 |15 | | |
-|2 |16 | | |
-|3 |1 | |`B1` |
-|3 |2 | |`E9` |
-|3 |3 | |`E13` |
-|3 |4 | | |
-|3 |5 | | |
-|3 |6 | |`E8` |
-|3 |7 | |`D10` |
-|3 |8 | |`D11` |
-|3 |9 | |`D12` |
-|3 |10 | |`D13` |
-|3 |11 | |`D14` |
-|3 |12 | |`B0` |
-|3 |13 | |`E7` |
-|3 |14 | |`E10` |
-|3 |15 | |`E11` |
-|3 |16 | |`E12` |
-|4 |1 | |`E14` |
-|4 |2 | |`B12` |
-|4 |3 | |`B13` |
-|4 |4 | |`B14` |
-|4 |5 | |`B15` |
-|4 |6 | |`E8` |
-|4 |7 | |`D10` |
-|4 |8 | |`D11` |
-|4 |9 | |`D12` |
-|4 |10 | |`D13` |
-|4 |11 | |`D14` |
-|4 |12 | |`D8` |
-|4 |13 | |`D9` |
-|4 |14 | | |
-|4 |15 | | |
-|4 |16 | | |
+|ADC|Channel|STM32F0xx|STM32F1xx|STM32F3xx|STM32F4xx|
+|---|-------|---------|---------|---------|---------|
+|1 |0 |`A0` |`A0` | |`A0` |
+|1 |1 |`A1` |`A1` |`A0` |`A1` |
+|1 |2 |`A2` |`A2` |`A1` |`A2` |
+|1 |3 |`A3` |`A3` |`A2` |`A3` |
+|1 |4 |`A4` |`A4` |`A3` |`A4` |
+|1 |5 |`A5` |`A5` |`F4` |`A5` |
+|1 |6 |`A6` |`A6` |`C0` |`A6` |
+|1 |7 |`A7` |`A7` |`C1` |`A7` |
+|1 |8 |`B0` |`B0` |`C2` |`B0` |
+|1 |9 |`B1` |`B1` |`C3` |`B1` |
+|1 |10 |`C0` |`C0` |`F2` |`C0` |
+|1 |11 |`C1` |`C1` | |`C1` |
+|1 |12 |`C2` |`C2` | |`C2` |
+|1 |13 |`C3` |`C3` | |`C3` |
+|1 |14 |`C4` |`C4` | |`C4` |
+|1 |15 |`C5` |`C5` | |`C5` |
+|1 |16 | | | | |
+|2 |0 | |`A0`¹ | |`A0`² |
+|2 |1 | |`A1`¹ |`A4` |`A1`² |
+|2 |2 | |`A2`¹ |`A5` |`A2`² |
+|2 |3 | |`A3`¹ |`A6` |`A3`² |
+|2 |4 | |`A4`¹ |`A7` |`A4`² |
+|2 |5 | |`A5`¹ |`C4` |`A5`² |
+|2 |6 | |`A6`¹ |`C0` |`A6`² |
+|2 |7 | |`A7`¹ |`C1` |`A7`² |
+|2 |8 | |`B0`¹ |`C2` |`B0`² |
+|2 |9 | |`B1`¹ |`C3` |`B1`² |
+|2 |10 | |`C0`¹ |`F2` |`C0`² |
+|2 |11 | |`C1`¹ |`C5` |`C1`² |
+|2 |12 | |`C2`¹ |`B2` |`C2`² |
+|2 |13 | |`C3`¹ | |`C3`² |
+|2 |14 | |`C4`¹ | |`C4`² |
+|2 |15 | |`C5`¹ | |`C5`² |
+|2 |16 | | | | |
+|3 |0 | |`A0`¹ | |`A0`² |
+|3 |1 | |`A1`¹ |`B1` |`A1`² |
+|3 |2 | |`A2`¹ |`E9` |`A2`² |
+|3 |3 | |`A3`¹ |`E13` |`A3`² |
+|3 |4 | |`F6`¹ | |`F6`² |
+|3 |5 | |`F7`¹ |`B13` |`F7`² |
+|3 |6 | |`F8`¹ |`E8` |`F8`² |
+|3 |7 | |`F9`¹ |`D10` |`F9`² |
+|3 |8 | |`F10`¹ |`D11` |`F10`² |
+|3 |9 | | |`D12` |`F3`² |
+|3 |10 | |`C0`¹ |`D13` |`C0`² |
+|3 |11 | |`C1`¹ |`D14` |`C1`² |
+|3 |12 | |`C2`¹ |`B0` |`C2`² |
+|3 |13 | |`C3`¹ |`E7` |`C3`² |
+|3 |14 | | |`E10` |`F4`² |
+|3 |15 | | |`E11` |`F5`² |
+|3 |16 | | |`E12` | |
+|4 |1 | | |`E14` | |
+|4 |2 | | |`E15` | |
+|4 |3 | | |`B12` | |
+|4 |4 | | |`B14` | |
+|4 |5 | | |`B15` | |
+|4 |6 | | |`E8` | |
+|4 |7 | | |`D10` | |
+|4 |8 | | |`D11` | |
+|4 |9 | | |`D12` | |
+|4 |10 | | |`D13` | |
+|4 |11 | | |`D14` | |
+|4 |12 | | |`D8` | |
+|4 |13 | | |`D9` | |
+|4 |14 | | | | |
+|4 |15 | | | | |
+|4 |16 | | | | |
+
+<sup>¹ As of ChibiOS 20.3.4, the ADC driver for STM32F1xx devices supports only ADC1, therefore any configurations involving ADC2 or ADC3 cannot actually be used. In particular, pins `F6`…`F10`, which are present at least on some STM32F103x[C-G] devices, cannot be used as ADC inputs because of this driver limitation.</sup>
+
+<sup>² Not all STM32F4xx devices have ADC2 and/or ADC3, therefore some configurations shown in this table may be unavailable; in particular, pins `F4`…`F10` cannot be used as ADC inputs on devices which do not have ADC3. Check the device datasheet to confirm which pin functions are supported.</sup>
## Functions
@@ -141,10 +147,10 @@ Also note that the F0 and F3 use different numbering schemes. The F0 has a singl
The ARM implementation of the ADC has a few additional options that you can override in your own keyboards and keymaps to change how it operates. Please consult the corresponding `hal_adc_lld.h` in ChibiOS for your specific microcontroller for further documentation on your available options.
-|`#define` |Type |Default |Description |
-|---------------------|------|---------------------|------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
-|`ADC_CIRCULAR_BUFFER`|`bool`|`false` |If `true`, then the implementation will use a circular buffer. |
-|`ADC_NUM_CHANNELS` |`int` |`1` |Sets the number of channels that will be scanned as part of an ADC operation. The current implementation only supports `1`. |
-|`ADC_BUFFER_DEPTH` |`int` |`2` |Sets the depth of each result. Since we are only getting a 12-bit result by default, we set this to 2 bytes so we can contain our one value. This could be set to 1 if you opt for an 8-bit or lower result.|
-|`ADC_SAMPLING_RATE` |`int` |`ADC_SMPR_SMP_1P5` |Sets the sampling rate of the ADC. By default, it is set to the fastest setting. |
-|`ADC_RESOLUTION` |`int` |`ADC_CFGR1_RES_12BIT`|The resolution of your result. We choose 12 bit by default, but you can opt for 12, 10, 8, or 6 bit. |
+|`#define` |Type |Default |Description |
+|---------------------|------|----------------------------------------------|------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
+|`ADC_CIRCULAR_BUFFER`|`bool`|`false` |If `true`, then the implementation will use a circular buffer. |
+|`ADC_NUM_CHANNELS` |`int` |`1` |Sets the number of channels that will be scanned as part of an ADC operation. The current implementation only supports `1`. |
+|`ADC_BUFFER_DEPTH` |`int` |`2` |Sets the depth of each result. Since we are only getting a 10-bit result by default, we set this to 2 bytes so we can contain our one value. This could be set to 1 if you opt for an 8-bit or lower result.|
+|`ADC_SAMPLING_RATE` |`int` |`ADC_SMPR_SMP_1P5` |Sets the sampling rate of the ADC. By default, it is set to the fastest setting. |
+|`ADC_RESOLUTION` |`int` |`ADC_CFGR1_RES_10BIT` or `ADC_CFGR_RES_10BITS`|The resolution of your result. We choose 10 bit by default, but you can opt for 12, 10, 8, or 6 bit. Different MCUs use slightly different names for the resolution constants. |
diff --git a/drivers/chibios/analog.c b/drivers/chibios/analog.c
index 2b3872afbb..b1081623d3 100644
--- a/drivers/chibios/analog.c
+++ b/drivers/chibios/analog.c
@@ -101,7 +101,11 @@
// Options are 12, 10, 8, and 6 bit.
#ifndef ADC_RESOLUTION
-# define ADC_RESOLUTION ADC_CFGR1_RES_10BIT
+# ifdef ADC_CFGR_RES_10BITS // ADCv3, ADCv4
+# define ADC_RESOLUTION ADC_CFGR_RES_10BITS
+# else // ADCv1, ADCv5, or the bodge for ADCv2 above
+# define ADC_RESOLUTION ADC_CFGR1_RES_10BIT
+# endif
#endif
static ADCConfig adcCfg = {};
@@ -161,8 +165,8 @@ __attribute__((weak)) adc_mux pinToMux(pin_t pin) {
case B0: return TO_MUX( ADC_CHANNEL_IN12, 2 );
case B1: return TO_MUX( ADC_CHANNEL_IN1, 2 );
case B2: return TO_MUX( ADC_CHANNEL_IN12, 1 );
- case B12: return TO_MUX( ADC_CHANNEL_IN2, 3 );
- case B13: return TO_MUX( ADC_CHANNEL_IN3, 3 );
+ case B12: return TO_MUX( ADC_CHANNEL_IN3, 3 );
+ case B13: return TO_MUX( ADC_CHANNEL_IN5, 2 );
case B14: return TO_MUX( ADC_CHANNEL_IN4, 3 );
case B15: return TO_MUX( ADC_CHANNEL_IN5, 3 );
case C0: return TO_MUX( ADC_CHANNEL_IN6, 0 ); // Can also be ADC2
@@ -189,11 +193,52 @@ __attribute__((weak)) adc_mux pinToMux(pin_t pin) {
case E15: return TO_MUX( ADC_CHANNEL_IN2, 3 );
case F2: return TO_MUX( ADC_CHANNEL_IN10, 0 ); // Can also be ADC2
case F4: return TO_MUX( ADC_CHANNEL_IN5, 0 );
-#elif defined(STM32F4XX) // TODO: add all pins
+#elif defined(STM32F4XX)
case A0: return TO_MUX( ADC_CHANNEL_IN0, 0 );
- //case A1: return TO_MUX( ADC_CHANNEL_IN1, 0 );
-#elif defined(STM32F1XX) // TODO: add all pins
+ case A1: return TO_MUX( ADC_CHANNEL_IN1, 0 );
+ case A2: return TO_MUX( ADC_CHANNEL_IN2, 0 );
+ case A3: return TO_MUX( ADC_CHANNEL_IN3, 0 );
+ case A4: return TO_MUX( ADC_CHANNEL_IN4, 0 );
+ case A5: return TO_MUX( ADC_CHANNEL_IN5, 0 );
+ case A6: return TO_MUX( ADC_CHANNEL_IN6, 0 );
+ case A7: return TO_MUX( ADC_CHANNEL_IN7, 0 );
+ case B0: return TO_MUX( ADC_CHANNEL_IN8, 0 );
+ case B1: return TO_MUX( ADC_CHANNEL_IN9, 0 );
+ case C0: return TO_MUX( ADC_CHANNEL_IN10, 0 );
+ case C1: return TO_MUX( ADC_CHANNEL_IN11, 0 );
+ case C2: return TO_MUX( ADC_CHANNEL_IN12, 0 );
+ case C3: return TO_MUX( ADC_CHANNEL_IN13, 0 );
+ case C4: return TO_MUX( ADC_CHANNEL_IN14, 0 );
+ case C5: return TO_MUX( ADC_CHANNEL_IN15, 0 );
+# if STM32_ADC_USE_ADC3
+ case F3: return TO_MUX( ADC_CHANNEL_IN9, 2 );
+ case F4: return TO_MUX( ADC_CHANNEL_IN14, 2 );
+ case F5: return TO_MUX( ADC_CHANNEL_IN15, 2 );
+ case F6: return TO_MUX( ADC_CHANNEL_IN4, 2 );
+ case F7: return TO_MUX( ADC_CHANNEL_IN5, 2 );
+ case F8: return TO_MUX( ADC_CHANNEL_IN6, 2 );
+ case F9: return TO_MUX( ADC_CHANNEL_IN7, 2 );
+ case F10: return TO_MUX( ADC_CHANNEL_IN8, 2 );
+# endif
+#elif defined(STM32F1XX)
case A0: return TO_MUX( ADC_CHANNEL_IN0, 0 );
+ case A1: return TO_MUX( ADC_CHANNEL_IN1, 0 );
+ case A2: return TO_MUX( ADC_CHANNEL_IN2, 0 );
+ case A3: return TO_MUX( ADC_CHANNEL_IN3, 0 );
+ case A4: return TO_MUX( ADC_CHANNEL_IN4, 0 );
+ case A5: return TO_MUX( ADC_CHANNEL_IN5, 0 );
+ case A6: return TO_MUX( ADC_CHANNEL_IN6, 0 );
+ case A7: return TO_MUX( ADC_CHANNEL_IN7, 0 );
+ case B0: return TO_MUX( ADC_CHANNEL_IN8, 0 );
+ case B1: return TO_MUX( ADC_CHANNEL_IN9, 0 );
+ case C0: return TO_MUX( ADC_CHANNEL_IN10, 0 );
+ case C1: return TO_MUX( ADC_CHANNEL_IN11, 0 );
+ case C2: return TO_MUX( ADC_CHANNEL_IN12, 0 );
+ case C3: return TO_MUX( ADC_CHANNEL_IN13, 0 );
+ case C4: return TO_MUX( ADC_CHANNEL_IN14, 0 );
+ case C5: return TO_MUX( ADC_CHANNEL_IN15, 0 );
+ // STM32F103x[C-G] in 144-pin packages also have analog inputs on F6...F10, but they are on ADC3, and the
+ // ChibiOS ADC driver for STM32F1xx currently supports only ADC1, therefore these pins are not usable.
#endif
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-28 03:25:37 +0000