diff options
27 files changed, 3228 insertions, 0 deletions
| diff --git a/keyboards/chavdai40/boards/GENERIC_STM32_F042X6/board.c b/keyboards/chavdai40/boards/GENERIC_STM32_F042X6/board.c new file mode 100644 index 0000000000..2bd2c5e216 --- /dev/null +++ b/keyboards/chavdai40/boards/GENERIC_STM32_F042X6/board.c @@ -0,0 +1,266 @@ +/* +    ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio + +    Licensed under the Apache License, Version 2.0 (the "License"); +    you may not use this file except in compliance with the License. +    You may obtain a copy of the License at + +        http://www.apache.org/licenses/LICENSE-2.0 + +    Unless required by applicable law or agreed to in writing, software +    distributed under the License is distributed on an "AS IS" BASIS, +    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +    See the License for the specific language governing permissions and +    limitations under the License. +*/ + +/* + * This file has been automatically generated using ChibiStudio board + * generator plugin. Do not edit manually. + */ + +#include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions.                                                 */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables.                                                */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types.                                         */ +/*===========================================================================*/ + +/** + * @brief   Type of STM32 GPIO port setup. + */ +typedef struct { +  uint32_t              moder; +  uint32_t              otyper; +  uint32_t              ospeedr; +  uint32_t              pupdr; +  uint32_t              odr; +  uint32_t              afrl; +  uint32_t              afrh; +} gpio_setup_t; + +/** + * @brief   Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) +  gpio_setup_t          PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) +  gpio_setup_t          PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) +  gpio_setup_t          PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) +  gpio_setup_t          PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) +  gpio_setup_t          PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) +  gpio_setup_t          PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) +  gpio_setup_t          PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) +  gpio_setup_t          PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) +  gpio_setup_t          PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) +  gpio_setup_t          PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) +  gpio_setup_t          PKData; +#endif +} gpio_config_t; + +/** + * @brief   STM32 GPIO static initialization data. + */ +static const gpio_config_t gpio_default_config = { +#if STM32_HAS_GPIOA +  {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, +   VAL_GPIOA_ODR,   VAL_GPIOA_AFRL,   VAL_GPIOA_AFRH}, +#endif +#if STM32_HAS_GPIOB +  {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, +   VAL_GPIOB_ODR,   VAL_GPIOB_AFRL,   VAL_GPIOB_AFRH}, +#endif +#if STM32_HAS_GPIOC +  {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, +   VAL_GPIOC_ODR,   VAL_GPIOC_AFRL,   VAL_GPIOC_AFRH}, +#endif +#if STM32_HAS_GPIOD +  {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, +   VAL_GPIOD_ODR,   VAL_GPIOD_AFRL,   VAL_GPIOD_AFRH}, +#endif +#if STM32_HAS_GPIOE +  {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, +   VAL_GPIOE_ODR,   VAL_GPIOE_AFRL,   VAL_GPIOE_AFRH}, +#endif +#if STM32_HAS_GPIOF +  {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, +   VAL_GPIOF_ODR,   VAL_GPIOF_AFRL,   VAL_GPIOF_AFRH}, +#endif +#if STM32_HAS_GPIOG +  {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, +   VAL_GPIOG_ODR,   VAL_GPIOG_AFRL,   VAL_GPIOG_AFRH}, +#endif +#if STM32_HAS_GPIOH +  {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, +   VAL_GPIOH_ODR,   VAL_GPIOH_AFRL,   VAL_GPIOH_AFRH}, +#endif +#if STM32_HAS_GPIOI +  {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, +   VAL_GPIOI_ODR,   VAL_GPIOI_AFRL,   VAL_GPIOI_AFRH}, +#endif +#if STM32_HAS_GPIOJ +  {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, +   VAL_GPIOJ_ODR,   VAL_GPIOJ_AFRL,   VAL_GPIOJ_AFRH}, +#endif +#if STM32_HAS_GPIOK +  {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, +   VAL_GPIOK_ODR,   VAL_GPIOK_AFRL,   VAL_GPIOK_AFRH} +#endif +}; + +/*===========================================================================*/ +/* Driver local functions.                                                   */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + +  gpiop->OTYPER  = config->otyper; +  gpiop->OSPEEDR = config->ospeedr; +  gpiop->PUPDR   = config->pupdr; +  gpiop->ODR     = config->odr; +  gpiop->AFRL    = config->afrl; +  gpiop->AFRH    = config->afrh; +  gpiop->MODER   = config->moder; +} + +static void stm32_gpio_init(void) { + +  /* Enabling GPIO-related clocks, the mask comes from the +     registry header file.*/ +  rccResetAHB(STM32_GPIO_EN_MASK); +  rccEnableAHB(STM32_GPIO_EN_MASK, true); + +  /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA +  gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB +  gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC +  gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD +  gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE +  gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF +  gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG +  gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH +  gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI +  gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ +  gpio_init(GPIOJ, &gpio_default_config.PJData); +#endif +#if STM32_HAS_GPIOK +  gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers.                                                */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions.                                                */ +/*===========================================================================*/ + +/** + * @brief   Early initialization code. + * @details GPIO ports and system clocks are initialized before everything + *          else. + */ +void __early_init(void) { + +  stm32_gpio_init(); +  stm32_clock_init(); +} + +#if HAL_USE_SDC || defined(__DOXYGEN__) +/** + * @brief   SDC card detection. + */ +bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { + +  (void)sdcp; +  /* CHTODO: Fill the implementation.*/ +  return true; +} + +/** + * @brief   SDC card write protection detection. + */ +bool sdc_lld_is_write_protected(SDCDriver *sdcp) { + +  (void)sdcp; +  /* CHTODO: Fill the implementation.*/ +  return false; +} +#endif /* HAL_USE_SDC */ + +#if HAL_USE_MMC_SPI || defined(__DOXYGEN__) +/** + * @brief   MMC_SPI card detection. + */ +bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { + +  (void)mmcp; +  /* CHTODO: Fill the implementation.*/ +  return true; +} + +/** + * @brief   MMC_SPI card write protection detection. + */ +bool mmc_lld_is_write_protected(MMCDriver *mmcp) { + +  (void)mmcp; +  /* CHTODO: Fill the implementation.*/ +  return false; +} +#endif + +/** + * @brief   Board-specific initialization code. + * @note    You can add your board-specific code here. + */ +void boardInit(void) { + +} diff --git a/keyboards/chavdai40/boards/GENERIC_STM32_F042X6/board.h b/keyboards/chavdai40/boards/GENERIC_STM32_F042X6/board.h new file mode 100644 index 0000000000..ea8a45029b --- /dev/null +++ b/keyboards/chavdai40/boards/GENERIC_STM32_F042X6/board.h @@ -0,0 +1,805 @@ +/* +    ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio + +    Licensed under the Apache License, Version 2.0 (the "License"); +    you may not use this file except in compliance with the License. +    You may obtain a copy of the License at + +        http://www.apache.org/licenses/LICENSE-2.0 + +    Unless required by applicable law or agreed to in writing, software +    distributed under the License is distributed on an "AS IS" BASIS, +    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +    See the License for the specific language governing permissions and +    limitations under the License. +*/ + +/* + * This file has been automatically generated using ChibiStudio board + * generator plugin. Do not edit manually. + */ + +#ifndef BOARD_H +#define BOARD_H + +/*===========================================================================*/ +/* Driver constants.                                                         */ +/*===========================================================================*/ + +/* + * Setup for ST STM32F0-Discovery board. + */ + +/* + * Board identifier. + */ +#define BOARD_GENERIC_STM32_F042X6 +#define BOARD_NAME                  "Chavdai40" + +/* + * Board oscillators-related settings. + * NOTE: LSE not fitted. + * NOTE: HSE not fitted. + */ +#if !defined(STM32_LSECLK) +#define STM32_LSECLK                0U +#endif + +#define STM32_LSEDRV                (3U << 3U) + +#if !defined(STM32_HSECLK) +#define STM32_HSECLK                0U +#endif + +#define STM32_HSE_BYPASS + +/* + * MCU type as defined in the ST header. + */ +#define STM32F042x6 + +/* + * IO pins assignments. + */ +#define GPIOA_BUTTON                0U +#define GPIOA_PIN1                  1U +#define GPIOA_PIN2                  2U +#define GPIOA_PIN3                  3U +#define GPIOA_PIN4                  4U +#define GPIOA_PIN5                  5U +#define GPIOA_PIN6                  6U +#define GPIOA_PIN7                  7U +#define GPIOA_PIN8                  8U +#define GPIOA_PIN9                  9U +#define GPIOA_PIN10                 10U +#define GPIOA_PIN11                 11U +#define GPIOA_PIN12                 12U +#define GPIOA_SWDAT                 13U +#define GPIOA_SWCLK                 14U +#define GPIOA_PIN15                 15U + +#define GPIOB_PIN0                  0U +#define GPIOB_PIN1                  1U +#define GPIOB_PIN2                  2U +#define GPIOB_PIN3                  3U +#define GPIOB_PIN4                  4U +#define GPIOB_PIN5                  5U +#define GPIOB_PIN6                  6U +#define GPIOB_PIN7                  7U +#define GPIOB_PIN8                  8U +#define GPIOB_PIN9                  9U +#define GPIOB_PIN10                 10U +#define GPIOB_PIN11                 11U +#define GPIOB_PIN12                 12U +#define GPIOB_PIN13                 13U +#define GPIOB_PIN14                 14U +#define GPIOB_PIN15                 15U + +#define GPIOC_PIN0                  0U +#define GPIOC_PIN1                  1U +#define GPIOC_PIN2                  2U +#define GPIOC_PIN3                  3U +#define GPIOC_PIN4                  4U +#define GPIOC_PIN5                  5U +#define GPIOC_PIN6                  6U +#define GPIOC_PIN7                  7U +#define GPIOC_LED4                  8U +#define GPIOC_LED3                  9U +#define GPIOC_PIN10                 10U +#define GPIOC_PIN11                 11U +#define GPIOC_PIN12                 12U +#define GPIOC_PIN13                 13U +#define GPIOC_OSC32_IN              14U +#define GPIOC_OSC32_OUT             15U + +#define GPIOD_PIN0                  0U +#define GPIOD_PIN1                  1U +#define GPIOD_PIN2                  2U +#define GPIOD_PIN3                  3U +#define GPIOD_PIN4                  4U +#define GPIOD_PIN5                  5U +#define GPIOD_PIN6                  6U +#define GPIOD_PIN7                  7U +#define GPIOD_PIN8                  8U +#define GPIOD_PIN9                  9U +#define GPIOD_PIN10                 10U +#define GPIOD_PIN11                 11U +#define GPIOD_PIN12                 12U +#define GPIOD_PIN13                 13U +#define GPIOD_PIN14                 14U +#define GPIOD_PIN15                 15U + +// #define GPIOF_OSC_IN                0U +// #define GPIOF_OSC_OUT               1U +#define GPIOF_I2C1_SDA              0U +#define GPIOF_I2C1_SCL              1U +#define GPIOF_PIN2                  2U +#define GPIOF_PIN3                  3U +#define GPIOF_PIN4                  4U +#define GPIOF_PIN5                  5U +#define GPIOF_PIN6                  6U +#define GPIOF_PIN7                  7U +#define GPIOF_PIN8                  8U +#define GPIOF_PIN9                  9U +#define GPIOF_PIN10                 10U +#define GPIOF_PIN11                 11U +#define GPIOF_PIN12                 12U +#define GPIOF_PIN13                 13U +#define GPIOF_PIN14                 14U +#define GPIOF_PIN15                 15U + +/* + * IO lines assignments. + */ +#define LINE_BUTTON                 PAL_LINE(GPIOA, 0U) +#define LINE_SWDAT                  PAL_LINE(GPIOA, 13U) +#define LINE_SWCLK                  PAL_LINE(GPIOA, 14U) +#define LINE_LED4                   PAL_LINE(GPIOC, 8U) +#define LINE_LED3                   PAL_LINE(GPIOC, 9U) +#define LINE_OSC32_IN               PAL_LINE(GPIOC, 14U) +#define LINE_OSC32_OUT              PAL_LINE(GPIOC, 15U) +//#define LINE_OSC_IN                 PAL_LINE(GPIOF, 0U) +//#define LINE_OSC_OUT                PAL_LINE(GPIOF, 1U) +#define LINE_I2C1_SDA               PAL_LINE(GPIOF, 0U) +#define LINE_I2C1_SCL               PAL_LINE(GPIOF, 1U) + +/*===========================================================================*/ +/* Driver pre-compile time settings.                                         */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks.                                       */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types.                                         */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver macros.                                                            */ +/*===========================================================================*/ + +/* + * I/O ports initial setup, this configuration is established soon after reset + * in the initialization code. + * Please refer to the STM32 Reference Manual for details. + */ +#define PIN_MODE_INPUT(n)           (0U << ((n) * 2U)) +#define PIN_MODE_OUTPUT(n)          (1U << ((n) * 2U)) +#define PIN_MODE_ALTERNATE(n)       (2U << ((n) * 2U)) +#define PIN_MODE_ANALOG(n)          (3U << ((n) * 2U)) +#define PIN_ODR_LOW(n)              (0U << (n)) +#define PIN_ODR_HIGH(n)             (1U << (n)) +#define PIN_OTYPE_PUSHPULL(n)       (0U << (n)) +#define PIN_OTYPE_OPENDRAIN(n)      (1U << (n)) +#define PIN_OSPEED_VERYLOW(n)       (0U << ((n) * 2U)) +#define PIN_OSPEED_LOW(n)           (1U << ((n) * 2U)) +#define PIN_OSPEED_MEDIUM(n)        (2U << ((n) * 2U)) +#define PIN_OSPEED_HIGH(n)          (3U << ((n) * 2U)) +#define PIN_PUPDR_FLOATING(n)       (0U << ((n) * 2U)) +#define PIN_PUPDR_PULLUP(n)         (1U << ((n) * 2U)) +#define PIN_PUPDR_PULLDOWN(n)       (2U << ((n) * 2U)) +#define PIN_AFIO_AF(n, v)           ((v) << (((n) % 8U) * 4U)) + +/* + * GPIOA setup: + * + * PA0  - BUTTON                    (input floating). + * PA1  - PIN1                      (input pullup). + * PA2  - PIN2                      (input pullup). + * PA3  - PIN3                      (input pullup). + * PA4  - PIN4                      (input pullup). + * PA5  - PIN5                      (input pullup). + * PA6  - PIN6                      (input pullup). + * PA7  - PIN7                      (input pullup). + * PA8  - PIN8                      (input pullup). + * PA9  - PIN9                      (input pullup). + * PA10 - PIN10                     (input pullup). + * PA11 - PIN11                     (input pullup). + * PA12 - PIN12                     (input pullup). + * PA13 - SWDAT                     (alternate 0). + * PA14 - SWCLK                     (alternate 0). + * PA15 - PIN15                     (input pullup). + */ +#define VAL_GPIOA_MODER             (PIN_MODE_INPUT(GPIOA_BUTTON) |         \ +                                     PIN_MODE_INPUT(GPIOA_PIN1) |           \ +                                     PIN_MODE_INPUT(GPIOA_PIN2) |           \ +                                     PIN_MODE_INPUT(GPIOA_PIN3) |           \ +                                     PIN_MODE_INPUT(GPIOA_PIN4) |           \ +                                     PIN_MODE_INPUT(GPIOA_PIN5) |           \ +                                     PIN_MODE_INPUT(GPIOA_PIN6) |           \ +                                     PIN_MODE_INPUT(GPIOA_PIN7) |           \ +                                     PIN_MODE_INPUT(GPIOA_PIN8) |           \ +                                     PIN_MODE_INPUT(GPIOA_PIN9) |           \ +                                     PIN_MODE_INPUT(GPIOA_PIN10) |          \ +                                     PIN_MODE_INPUT(GPIOA_PIN11) |          \ +                                     PIN_MODE_INPUT(GPIOA_PIN12) |          \ +                                     PIN_MODE_ALTERNATE(GPIOA_SWDAT) |      \ +                                     PIN_MODE_ALTERNATE(GPIOA_SWCLK) |      \ +                                     PIN_MODE_INPUT(GPIOA_PIN15)) +#define VAL_GPIOA_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOA_BUTTON) |     \ +                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN1) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN2) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN3) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN4) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN5) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN6) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN7) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN8) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN9) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN10) |      \ +                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN11) |      \ +                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN12) |      \ +                                     PIN_OTYPE_PUSHPULL(GPIOA_SWDAT) |      \ +                                     PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) |      \ +                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) +#define VAL_GPIOA_OSPEEDR           (PIN_OSPEED_VERYLOW(GPIOA_BUTTON) |     \ +                                     PIN_OSPEED_VERYLOW(GPIOA_PIN1) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOA_PIN2) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOA_PIN3) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOA_PIN4) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOA_PIN5) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOA_PIN6) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOA_PIN7) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOA_PIN8) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOA_PIN9) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOA_PIN10) |      \ +                                     PIN_OSPEED_VERYLOW(GPIOA_PIN11) |      \ +                                     PIN_OSPEED_VERYLOW(GPIOA_PIN12) |      \ +                                     PIN_OSPEED_HIGH(GPIOA_SWDAT) |         \ +                                     PIN_OSPEED_HIGH(GPIOA_SWCLK) |         \ +                                     PIN_OSPEED_HIGH(GPIOA_PIN15)) +#define VAL_GPIOA_PUPDR             (PIN_PUPDR_FLOATING(GPIOA_BUTTON) |     \ +                                     PIN_PUPDR_PULLUP(GPIOA_PIN1) |         \ +                                     PIN_PUPDR_PULLUP(GPIOA_PIN2) |         \ +                                     PIN_PUPDR_PULLUP(GPIOA_PIN3) |         \ +                                     PIN_PUPDR_PULLUP(GPIOA_PIN4) |         \ +                                     PIN_PUPDR_PULLUP(GPIOA_PIN5) |         \ +                                     PIN_PUPDR_PULLUP(GPIOA_PIN6) |         \ +                                     PIN_PUPDR_PULLUP(GPIOA_PIN7) |         \ +                                     PIN_PUPDR_PULLUP(GPIOA_PIN8) |         \ +                                     PIN_PUPDR_PULLUP(GPIOA_PIN9) |         \ +                                     PIN_PUPDR_PULLUP(GPIOA_PIN10) |        \ +                                     PIN_PUPDR_PULLUP(GPIOA_PIN11) |        \ +                                     PIN_PUPDR_PULLUP(GPIOA_PIN12) |        \ +                                     PIN_PUPDR_PULLUP(GPIOA_SWDAT) |        \ +                                     PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) |      \ +                                     PIN_PUPDR_PULLUP(GPIOA_PIN15)) +#define VAL_GPIOA_ODR               (PIN_ODR_HIGH(GPIOA_BUTTON) |           \ +                                     PIN_ODR_HIGH(GPIOA_PIN1) |             \ +                                     PIN_ODR_HIGH(GPIOA_PIN2) |             \ +                                     PIN_ODR_HIGH(GPIOA_PIN3) |             \ +                                     PIN_ODR_HIGH(GPIOA_PIN4) |             \ +                                     PIN_ODR_HIGH(GPIOA_PIN5) |             \ +                                     PIN_ODR_HIGH(GPIOA_PIN6) |             \ +                                     PIN_ODR_HIGH(GPIOA_PIN7) |             \ +                                     PIN_ODR_HIGH(GPIOA_PIN8) |             \ +                                     PIN_ODR_HIGH(GPIOA_PIN9) |             \ +                                     PIN_ODR_HIGH(GPIOA_PIN10) |            \ +                                     PIN_ODR_HIGH(GPIOA_PIN11) |            \ +                                     PIN_ODR_HIGH(GPIOA_PIN12) |            \ +                                     PIN_ODR_HIGH(GPIOA_SWDAT) |            \ +                                     PIN_ODR_HIGH(GPIOA_SWCLK) |            \ +                                     PIN_ODR_HIGH(GPIOA_PIN15)) +#define VAL_GPIOA_AFRL              (PIN_AFIO_AF(GPIOA_BUTTON, 0U) |        \ +                                     PIN_AFIO_AF(GPIOA_PIN1, 0U) |          \ +                                     PIN_AFIO_AF(GPIOA_PIN2, 0U) |          \ +                                     PIN_AFIO_AF(GPIOA_PIN3, 0U) |          \ +                                     PIN_AFIO_AF(GPIOA_PIN4, 0U) |          \ +                                     PIN_AFIO_AF(GPIOA_PIN5, 0U) |          \ +                                     PIN_AFIO_AF(GPIOA_PIN6, 0U) |          \ +                                     PIN_AFIO_AF(GPIOA_PIN7, 0U)) +#define VAL_GPIOA_AFRH              (PIN_AFIO_AF(GPIOA_PIN8, 0U) |          \ +                                     PIN_AFIO_AF(GPIOA_PIN9, 0U) |          \ +                                     PIN_AFIO_AF(GPIOA_PIN10, 0U) |         \ +                                     PIN_AFIO_AF(GPIOA_PIN11, 0U) |         \ +                                     PIN_AFIO_AF(GPIOA_PIN12, 0U) |         \ +                                     PIN_AFIO_AF(GPIOA_SWDAT, 0U) |         \ +                                     PIN_AFIO_AF(GPIOA_SWCLK, 0U) |         \ +                                     PIN_AFIO_AF(GPIOA_PIN15, 0U)) + +/* + * GPIOB setup: + * + * PB0  - PIN0                      (input pullup). + * PB1  - PIN1                      (input pullup). + * PB2  - PIN2                      (input pullup). + * PB3  - PIN3                      (input pullup). + * PB4  - PIN4                      (input pullup). + * PB5  - PIN5                      (input pullup). + * PB6  - PIN6                      (input pullup). + * PB7  - PIN7                      (input pullup). + * PB8  - PIN8                      (input pullup). + * PB9  - PIN9                      (input pullup). + * PB10 - PIN10                     (input pullup). + * PB11 - PIN11                     (input pullup). + * PB12 - PIN12                     (input pullup). + * PB13 - PIN13                     (input pullup). + * PB14 - PIN14                     (input pullup). + * PB15 - PIN15                     (input pullup). + */ +#define VAL_GPIOB_MODER             (PIN_MODE_INPUT(GPIOB_PIN0) |           \ +                                     PIN_MODE_INPUT(GPIOB_PIN1) |           \ +                                     PIN_MODE_INPUT(GPIOB_PIN2) |           \ +                                     PIN_MODE_INPUT(GPIOB_PIN3) |           \ +                                     PIN_MODE_INPUT(GPIOB_PIN4) |           \ +                                     PIN_MODE_INPUT(GPIOB_PIN5) |           \ +                                     PIN_MODE_INPUT(GPIOB_PIN6) |           \ +                                     PIN_MODE_INPUT(GPIOB_PIN7) |           \ +                                     PIN_MODE_INPUT(GPIOB_PIN8) |           \ +                                     PIN_MODE_INPUT(GPIOB_PIN9) |           \ +                                     PIN_MODE_INPUT(GPIOB_PIN10) |          \ +                                     PIN_MODE_INPUT(GPIOB_PIN11) |          \ +                                     PIN_MODE_INPUT(GPIOB_PIN12) |          \ +                                     PIN_MODE_INPUT(GPIOB_PIN13) |          \ +                                     PIN_MODE_INPUT(GPIOB_PIN14) |          \ +                                     PIN_MODE_INPUT(GPIOB_PIN15)) +#define VAL_GPIOB_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN1) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN2) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN3) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN4) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN5) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN6) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN7) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN8) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN9) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN10) |      \ +                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN11) |      \ +                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN12) |      \ +                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN13) |      \ +                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN14) |      \ +                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN15)) +#define VAL_GPIOB_OSPEEDR           (PIN_OSPEED_VERYLOW(GPIOB_PIN0) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOB_PIN1) |       \ +                                     PIN_OSPEED_HIGH(GPIOB_PIN2) |          \ +                                     PIN_OSPEED_HIGH(GPIOB_PIN3) |          \ +                                     PIN_OSPEED_HIGH(GPIOB_PIN4) |          \ +                                     PIN_OSPEED_VERYLOW(GPIOB_PIN5) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOB_PIN6) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOB_PIN7) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOB_PIN8) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOB_PIN9) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOB_PIN10) |      \ +                                     PIN_OSPEED_VERYLOW(GPIOB_PIN11) |      \ +                                     PIN_OSPEED_VERYLOW(GPIOB_PIN12) |      \ +                                     PIN_OSPEED_VERYLOW(GPIOB_PIN13) |      \ +                                     PIN_OSPEED_VERYLOW(GPIOB_PIN14) |      \ +                                     PIN_OSPEED_VERYLOW(GPIOB_PIN15)) +#define VAL_GPIOB_PUPDR             (PIN_PUPDR_PULLUP(GPIOB_PIN0) |         \ +                                     PIN_PUPDR_PULLUP(GPIOB_PIN1) |         \ +                                     PIN_PUPDR_PULLUP(GPIOB_PIN2) |         \ +                                     PIN_PUPDR_PULLUP(GPIOB_PIN3) |         \ +                                     PIN_PUPDR_PULLUP(GPIOB_PIN4) |         \ +                                     PIN_PUPDR_PULLUP(GPIOB_PIN5) |         \ +                                     PIN_PUPDR_PULLUP(GPIOB_PIN6) |         \ +                                     PIN_PUPDR_PULLUP(GPIOB_PIN7) |         \ +                                     PIN_PUPDR_PULLUP(GPIOB_PIN8) |         \ +                                     PIN_PUPDR_PULLUP(GPIOB_PIN9) |         \ +                                     PIN_PUPDR_PULLUP(GPIOB_PIN10) |        \ +                                     PIN_PUPDR_PULLUP(GPIOB_PIN11) |        \ +                                     PIN_PUPDR_PULLUP(GPIOB_PIN12) |        \ +                                     PIN_PUPDR_PULLUP(GPIOB_PIN13) |        \ +                                     PIN_PUPDR_PULLUP(GPIOB_PIN14) |        \ +                                     PIN_PUPDR_PULLUP(GPIOB_PIN15)) +#define VAL_GPIOB_ODR               (PIN_ODR_HIGH(GPIOB_PIN0) |             \ +                                     PIN_ODR_HIGH(GPIOB_PIN1) |             \ +                                     PIN_ODR_HIGH(GPIOB_PIN2) |             \ +                                     PIN_ODR_HIGH(GPIOB_PIN3) |             \ +                                     PIN_ODR_HIGH(GPIOB_PIN4) |             \ +                                     PIN_ODR_HIGH(GPIOB_PIN5) |             \ +                                     PIN_ODR_HIGH(GPIOB_PIN6) |             \ +                                     PIN_ODR_HIGH(GPIOB_PIN7) |             \ +                                     PIN_ODR_HIGH(GPIOB_PIN8) |             \ +                                     PIN_ODR_HIGH(GPIOB_PIN9) |             \ +                                     PIN_ODR_HIGH(GPIOB_PIN10) |            \ +                                     PIN_ODR_HIGH(GPIOB_PIN11) |            \ +                                     PIN_ODR_HIGH(GPIOB_PIN12) |            \ +                                     PIN_ODR_HIGH(GPIOB_PIN13) |            \ +                                     PIN_ODR_HIGH(GPIOB_PIN14) |            \ +                                     PIN_ODR_HIGH(GPIOB_PIN15)) +#define VAL_GPIOB_AFRL              (PIN_AFIO_AF(GPIOB_PIN0, 0U) |          \ +                                     PIN_AFIO_AF(GPIOB_PIN1, 0U) |          \ +                                     PIN_AFIO_AF(GPIOB_PIN2, 0U) |          \ +                                     PIN_AFIO_AF(GPIOB_PIN3, 0U) |          \ +                                     PIN_AFIO_AF(GPIOB_PIN4, 0U) |          \ +                                     PIN_AFIO_AF(GPIOB_PIN5, 0U) |          \ +                                     PIN_AFIO_AF(GPIOB_PIN6, 0U) |          \ +                                     PIN_AFIO_AF(GPIOB_PIN7, 0U)) +#define VAL_GPIOB_AFRH              (PIN_AFIO_AF(GPIOB_PIN8, 0U) |          \ +                                     PIN_AFIO_AF(GPIOB_PIN9, 0U) |          \ +                                     PIN_AFIO_AF(GPIOB_PIN10, 0U) |         \ +                                     PIN_AFIO_AF(GPIOB_PIN11, 0U) |         \ +                                     PIN_AFIO_AF(GPIOB_PIN12, 0U) |         \ +                                     PIN_AFIO_AF(GPIOB_PIN13, 0U) |         \ +                                     PIN_AFIO_AF(GPIOB_PIN14, 0U) |         \ +                                     PIN_AFIO_AF(GPIOB_PIN15, 0U)) + +/* + * GPIOC setup: + * + * PC0  - PIN0                      (input pullup). + * PC1  - PIN1                      (input pullup). + * PC2  - PIN2                      (input pullup). + * PC3  - PIN3                      (input pullup). + * PC4  - PIN4                      (input pullup). + * PC5  - PIN5                      (input pullup). + * PC6  - PIN6                      (input pullup). + * PC7  - PIN7                      (input pullup). + * PC8  - LED4                      (output pushpull maximum). + * PC9  - LED3                      (output pushpull maximum). + * PC10 - PIN10                     (input pullup). + * PC11 - PIN11                     (input pullup). + * PC12 - PIN12                     (input pullup). + * PC13 - PIN13                     (input pullup). + * PC14 - OSC32_IN                  (input floating). + * PC15 - OSC32_OUT                 (input floating). + */ +#define VAL_GPIOC_MODER             (PIN_MODE_INPUT(GPIOC_PIN0) |           \ +                                     PIN_MODE_INPUT(GPIOC_PIN1) |           \ +                                     PIN_MODE_INPUT(GPIOC_PIN2) |           \ +                                     PIN_MODE_INPUT(GPIOC_PIN3) |           \ +                                     PIN_MODE_INPUT(GPIOC_PIN4) |           \ +                                     PIN_MODE_INPUT(GPIOC_PIN5) |           \ +                                     PIN_MODE_INPUT(GPIOC_PIN6) |           \ +                                     PIN_MODE_INPUT(GPIOC_PIN7) |           \ +                                     PIN_MODE_OUTPUT(GPIOC_LED4) |          \ +                                     PIN_MODE_OUTPUT(GPIOC_LED3) |          \ +                                     PIN_MODE_INPUT(GPIOC_PIN10) |          \ +                                     PIN_MODE_INPUT(GPIOC_PIN11) |          \ +                                     PIN_MODE_INPUT(GPIOC_PIN12) |          \ +                                     PIN_MODE_INPUT(GPIOC_PIN13) |          \ +                                     PIN_MODE_INPUT(GPIOC_OSC32_IN) |       \ +                                     PIN_MODE_INPUT(GPIOC_OSC32_OUT)) +#define VAL_GPIOC_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN1) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN2) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN3) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN4) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN5) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN6) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN7) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOC_LED4) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOC_LED3) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN10) |      \ +                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN11) |      \ +                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN12) |      \ +                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN13) |      \ +                                     PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) |   \ +                                     PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT)) +#define VAL_GPIOC_OSPEEDR           (PIN_OSPEED_VERYLOW(GPIOC_PIN0) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOC_PIN1) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOC_PIN2) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOC_PIN3) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOC_PIN4) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOC_PIN5) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOC_PIN6) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOC_PIN7) |       \ +                                     PIN_OSPEED_HIGH(GPIOC_LED4) |          \ +                                     PIN_OSPEED_HIGH(GPIOC_LED3) |          \ +                                     PIN_OSPEED_VERYLOW(GPIOC_PIN10) |      \ +                                     PIN_OSPEED_VERYLOW(GPIOC_PIN11) |      \ +                                     PIN_OSPEED_VERYLOW(GPIOC_PIN12) |      \ +                                     PIN_OSPEED_VERYLOW(GPIOC_PIN13) |      \ +                                     PIN_OSPEED_HIGH(GPIOC_OSC32_IN) |      \ +                                     PIN_OSPEED_HIGH(GPIOC_OSC32_OUT)) +#define VAL_GPIOC_PUPDR             (PIN_PUPDR_PULLUP(GPIOC_PIN0) |         \ +                                     PIN_PUPDR_PULLUP(GPIOC_PIN1) |         \ +                                     PIN_PUPDR_PULLUP(GPIOC_PIN2) |         \ +                                     PIN_PUPDR_PULLUP(GPIOC_PIN3) |         \ +                                     PIN_PUPDR_PULLUP(GPIOC_PIN4) |         \ +                                     PIN_PUPDR_PULLUP(GPIOC_PIN5) |         \ +                                     PIN_PUPDR_PULLUP(GPIOC_PIN6) |         \ +                                     PIN_PUPDR_PULLUP(GPIOC_PIN7) |         \ +                                     PIN_PUPDR_FLOATING(GPIOC_LED4) |       \ +                                     PIN_PUPDR_FLOATING(GPIOC_LED3) |       \ +                                     PIN_PUPDR_PULLUP(GPIOC_PIN10) |        \ +                                     PIN_PUPDR_PULLUP(GPIOC_PIN11) |        \ +                                     PIN_PUPDR_PULLUP(GPIOC_PIN12) |        \ +                                     PIN_PUPDR_PULLUP(GPIOC_PIN13) |        \ +                                     PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) |   \ +                                     PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT)) +#define VAL_GPIOC_ODR               (PIN_ODR_HIGH(GPIOC_PIN0) |             \ +                                     PIN_ODR_HIGH(GPIOC_PIN1) |             \ +                                     PIN_ODR_HIGH(GPIOC_PIN2) |             \ +                                     PIN_ODR_HIGH(GPIOC_PIN3) |             \ +                                     PIN_ODR_HIGH(GPIOC_PIN4) |             \ +                                     PIN_ODR_HIGH(GPIOC_PIN5) |             \ +                                     PIN_ODR_HIGH(GPIOC_PIN6) |             \ +                                     PIN_ODR_HIGH(GPIOC_PIN7) |             \ +                                     PIN_ODR_LOW(GPIOC_LED4) |              \ +                                     PIN_ODR_LOW(GPIOC_LED3) |              \ +                                     PIN_ODR_HIGH(GPIOC_PIN10) |            \ +                                     PIN_ODR_HIGH(GPIOC_PIN11) |            \ +                                     PIN_ODR_HIGH(GPIOC_PIN12) |            \ +                                     PIN_ODR_HIGH(GPIOC_PIN13) |            \ +                                     PIN_ODR_HIGH(GPIOC_OSC32_IN) |         \ +                                     PIN_ODR_HIGH(GPIOC_OSC32_OUT)) +#define VAL_GPIOC_AFRL              (PIN_AFIO_AF(GPIOC_PIN0, 0U) |          \ +                                     PIN_AFIO_AF(GPIOC_PIN1, 0U) |          \ +                                     PIN_AFIO_AF(GPIOC_PIN2, 0U) |          \ +                                     PIN_AFIO_AF(GPIOC_PIN3, 0U) |          \ +                                     PIN_AFIO_AF(GPIOC_PIN4, 0U) |          \ +                                     PIN_AFIO_AF(GPIOC_PIN5, 0U) |          \ +                                     PIN_AFIO_AF(GPIOC_PIN6, 0U) |          \ +                                     PIN_AFIO_AF(GPIOC_PIN7, 0U)) +#define VAL_GPIOC_AFRH              (PIN_AFIO_AF(GPIOC_LED4, 0U) |          \ +                                     PIN_AFIO_AF(GPIOC_LED3, 0U) |          \ +                                     PIN_AFIO_AF(GPIOC_PIN10, 0U) |         \ +                                     PIN_AFIO_AF(GPIOC_PIN11, 0U) |         \ +                                     PIN_AFIO_AF(GPIOC_PIN12, 0U) |         \ +                                     PIN_AFIO_AF(GPIOC_PIN13, 0U) |         \ +                                     PIN_AFIO_AF(GPIOC_OSC32_IN, 0U) |      \ +                                     PIN_AFIO_AF(GPIOC_OSC32_OUT, 0U)) + +/* + * GPIOD setup: + * + * PD0  - PIN0                      (input pullup). + * PD1  - PIN1                      (input pullup). + * PD2  - PIN2                      (input pullup). + * PD3  - PIN3                      (input pullup). + * PD4  - PIN4                      (input pullup). + * PD5  - PIN5                      (input pullup). + * PD6  - PIN6                      (input pullup). + * PD7  - PIN7                      (input pullup). + * PD8  - PIN8                      (input pullup). + * PD9  - PIN9                      (input pullup). + * PD10 - PIN10                     (input pullup). + * PD11 - PIN11                     (input pullup). + * PD12 - PIN12                     (input pullup). + * PD13 - PIN13                     (input pullup). + * PD14 - PIN14                     (input pullup). + * PD15 - PIN15                     (input pullup). + */ +#define VAL_GPIOD_MODER             (PIN_MODE_INPUT(GPIOD_PIN0) |           \ +                                     PIN_MODE_INPUT(GPIOD_PIN1) |           \ +                                     PIN_MODE_INPUT(GPIOD_PIN2) |           \ +                                     PIN_MODE_INPUT(GPIOD_PIN3) |           \ +                                     PIN_MODE_INPUT(GPIOD_PIN4) |           \ +                                     PIN_MODE_INPUT(GPIOD_PIN5) |           \ +                                     PIN_MODE_INPUT(GPIOD_PIN6) |           \ +                                     PIN_MODE_INPUT(GPIOD_PIN7) |           \ +                                     PIN_MODE_INPUT(GPIOD_PIN8) |           \ +                                     PIN_MODE_INPUT(GPIOD_PIN9) |           \ +                                     PIN_MODE_INPUT(GPIOD_PIN10) |          \ +                                     PIN_MODE_INPUT(GPIOD_PIN11) |          \ +                                     PIN_MODE_INPUT(GPIOD_PIN12) |          \ +                                     PIN_MODE_INPUT(GPIOD_PIN13) |          \ +                                     PIN_MODE_INPUT(GPIOD_PIN14) |          \ +                                     PIN_MODE_INPUT(GPIOD_PIN15)) +#define VAL_GPIOD_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN1) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN2) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN3) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN4) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN5) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN6) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN7) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN8) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN9) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN10) |      \ +                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN11) |      \ +                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN12) |      \ +                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN13) |      \ +                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN14) |      \ +                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN15)) +#define VAL_GPIOD_OSPEEDR           (PIN_OSPEED_VERYLOW(GPIOD_PIN0) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOD_PIN1) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOD_PIN2) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOD_PIN3) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOD_PIN4) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOD_PIN5) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOD_PIN6) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOD_PIN7) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOD_PIN8) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOD_PIN9) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOD_PIN10) |      \ +                                     PIN_OSPEED_VERYLOW(GPIOD_PIN11) |      \ +                                     PIN_OSPEED_VERYLOW(GPIOD_PIN12) |      \ +                                     PIN_OSPEED_VERYLOW(GPIOD_PIN13) |      \ +                                     PIN_OSPEED_VERYLOW(GPIOD_PIN14) |      \ +                                     PIN_OSPEED_VERYLOW(GPIOD_PIN15)) +#define VAL_GPIOD_PUPDR             (PIN_PUPDR_PULLUP(GPIOD_PIN0) |         \ +                                     PIN_PUPDR_PULLUP(GPIOD_PIN1) |         \ +                                     PIN_PUPDR_PULLUP(GPIOD_PIN2) |         \ +                                     PIN_PUPDR_PULLUP(GPIOD_PIN3) |         \ +                                     PIN_PUPDR_PULLUP(GPIOD_PIN4) |         \ +                                     PIN_PUPDR_PULLUP(GPIOD_PIN5) |         \ +                                     PIN_PUPDR_PULLUP(GPIOD_PIN6) |         \ +                                     PIN_PUPDR_PULLUP(GPIOD_PIN7) |         \ +                                     PIN_PUPDR_PULLUP(GPIOD_PIN8) |         \ +                                     PIN_PUPDR_PULLUP(GPIOD_PIN9) |         \ +                                     PIN_PUPDR_PULLUP(GPIOD_PIN10) |        \ +                                     PIN_PUPDR_PULLUP(GPIOD_PIN11) |        \ +                                     PIN_PUPDR_PULLUP(GPIOD_PIN12) |        \ +                                     PIN_PUPDR_PULLUP(GPIOD_PIN13) |        \ +                                     PIN_PUPDR_PULLUP(GPIOD_PIN14) |        \ +                                     PIN_PUPDR_PULLUP(GPIOD_PIN15)) +#define VAL_GPIOD_ODR               (PIN_ODR_HIGH(GPIOD_PIN0) |             \ +                                     PIN_ODR_HIGH(GPIOD_PIN1) |             \ +                                     PIN_ODR_HIGH(GPIOD_PIN2) |             \ +                                     PIN_ODR_HIGH(GPIOD_PIN3) |             \ +                                     PIN_ODR_HIGH(GPIOD_PIN4) |             \ +                                     PIN_ODR_HIGH(GPIOD_PIN5) |             \ +                                     PIN_ODR_HIGH(GPIOD_PIN6) |             \ +                                     PIN_ODR_HIGH(GPIOD_PIN7) |             \ +                                     PIN_ODR_HIGH(GPIOD_PIN8) |             \ +                                     PIN_ODR_HIGH(GPIOD_PIN9) |             \ +                                     PIN_ODR_HIGH(GPIOD_PIN10) |            \ +                                     PIN_ODR_HIGH(GPIOD_PIN11) |            \ +                                     PIN_ODR_HIGH(GPIOD_PIN12) |            \ +                                     PIN_ODR_HIGH(GPIOD_PIN13) |            \ +                                     PIN_ODR_HIGH(GPIOD_PIN14) |            \ +                                     PIN_ODR_HIGH(GPIOD_PIN15)) +#define VAL_GPIOD_AFRL              (PIN_AFIO_AF(GPIOD_PIN0, 0U) |          \ +                                     PIN_AFIO_AF(GPIOD_PIN1, 0U) |          \ +                                     PIN_AFIO_AF(GPIOD_PIN2, 0U) |          \ +                                     PIN_AFIO_AF(GPIOD_PIN3, 0U) |          \ +                                     PIN_AFIO_AF(GPIOD_PIN4, 0U) |          \ +                                     PIN_AFIO_AF(GPIOD_PIN5, 0U) |          \ +                                     PIN_AFIO_AF(GPIOD_PIN6, 0U) |          \ +                                     PIN_AFIO_AF(GPIOD_PIN7, 0U)) +#define VAL_GPIOD_AFRH              (PIN_AFIO_AF(GPIOD_PIN8, 0U) |          \ +                                     PIN_AFIO_AF(GPIOD_PIN9, 0U) |          \ +                                     PIN_AFIO_AF(GPIOD_PIN10, 0U) |         \ +                                     PIN_AFIO_AF(GPIOD_PIN11, 0U) |         \ +                                     PIN_AFIO_AF(GPIOD_PIN12, 0U) |         \ +                                     PIN_AFIO_AF(GPIOD_PIN13, 0U) |         \ +                                     PIN_AFIO_AF(GPIOD_PIN14, 0U) |         \ +                                     PIN_AFIO_AF(GPIOD_PIN15, 0U)) + +/* + * GPIOF setup: + * + ******** PF0  - OSC_IN                    (input floating). + ******** PF1  - OSC_OUT                   (input floating). + * PF0  - I2C1_SDA                  (alternate 0). + * PF1  - I2C1_SCL                  (alternate 0). + * PF2  - PIN2                      (input pullup). + * PF3  - PIN3                      (input pullup). + * PF4  - PIN4                      (input pullup). + * PF5  - PIN5                      (input pullup). + * PF6  - PIN6                      (input pullup). + * PF7  - PIN7                      (input pullup). + * PF8  - PIN8                      (input pullup). + * PF9  - PIN9                      (input pullup). + * PF10 - PIN10                     (input pullup). + * PF11 - PIN11                     (input pullup). + * PF12 - PIN12                     (input pullup). + * PF13 - PIN13                     (input pullup). + * PF14 - PIN14                     (input pullup). + * PF15 - PIN15                     (input pullup). + */ +#define VAL_GPIOF_MODER             (PIN_MODE_ALTERNATE(GPIOF_I2C1_SDA) |         \ +                                     PIN_MODE_ALTERNATE(GPIOF_I2C1_SCL) |        \ +                                     PIN_MODE_INPUT(GPIOF_PIN2) |           \ +                                     PIN_MODE_INPUT(GPIOF_PIN3) |           \ +                                     PIN_MODE_INPUT(GPIOF_PIN4) |           \ +                                     PIN_MODE_INPUT(GPIOF_PIN5) |           \ +                                     PIN_MODE_INPUT(GPIOF_PIN6) |           \ +                                     PIN_MODE_INPUT(GPIOF_PIN7) |           \ +                                     PIN_MODE_INPUT(GPIOF_PIN8) |           \ +                                     PIN_MODE_INPUT(GPIOF_PIN9) |           \ +                                     PIN_MODE_INPUT(GPIOF_PIN10) |          \ +                                     PIN_MODE_INPUT(GPIOF_PIN11) |          \ +                                     PIN_MODE_INPUT(GPIOF_PIN12) |          \ +                                     PIN_MODE_INPUT(GPIOF_PIN13) |          \ +                                     PIN_MODE_INPUT(GPIOF_PIN14) |          \ +                                     PIN_MODE_INPUT(GPIOF_PIN15)) +#define VAL_GPIOF_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOF_I2C1_SDA) |     \ +                                     PIN_OTYPE_PUSHPULL(GPIOF_I2C1_SCL) |    \ +                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN2) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN3) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN4) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN5) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN6) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN7) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN8) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN9) |       \ +                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN10) |      \ +                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN11) |      \ +                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN12) |      \ +                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN13) |      \ +                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN14) |      \ +                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) +#define VAL_GPIOF_OSPEEDR           (PIN_OSPEED_HIGH(GPIOF_I2C1_SDA) |     \ +                                     PIN_OSPEED_HIGH(GPIOF_I2C1_SCL) |    \ +                                     PIN_OSPEED_VERYLOW(GPIOF_PIN2) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOF_PIN3) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOF_PIN4) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOF_PIN5) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOF_PIN6) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOF_PIN7) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOF_PIN8) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOF_PIN9) |       \ +                                     PIN_OSPEED_VERYLOW(GPIOF_PIN10) |      \ +                                     PIN_OSPEED_VERYLOW(GPIOF_PIN11) |      \ +                                     PIN_OSPEED_VERYLOW(GPIOF_PIN12) |      \ +                                     PIN_OSPEED_VERYLOW(GPIOF_PIN13) |      \ +                                     PIN_OSPEED_VERYLOW(GPIOF_PIN14) |      \ +                                     PIN_OSPEED_VERYLOW(GPIOF_PIN15)) +#define VAL_GPIOF_PUPDR             (PIN_PUPDR_PULLUP(GPIOF_I2C1_SDA) |     \ +                                     PIN_PUPDR_PULLUP(GPIOF_I2C1_SCL) |    \ +                                     PIN_PUPDR_PULLUP(GPIOF_PIN2) |         \ +                                     PIN_PUPDR_PULLUP(GPIOF_PIN3) |         \ +                                     PIN_PUPDR_PULLUP(GPIOF_PIN4) |         \ +                                     PIN_PUPDR_PULLUP(GPIOF_PIN5) |         \ +                                     PIN_PUPDR_PULLUP(GPIOF_PIN6) |         \ +                                     PIN_PUPDR_PULLUP(GPIOF_PIN7) |         \ +                                     PIN_PUPDR_PULLUP(GPIOF_PIN8) |         \ +                                     PIN_PUPDR_PULLUP(GPIOF_PIN9) |         \ +                                     PIN_PUPDR_PULLUP(GPIOF_PIN10) |        \ +                                     PIN_PUPDR_PULLUP(GPIOF_PIN11) |        \ +                                     PIN_PUPDR_PULLUP(GPIOF_PIN12) |        \ +                                     PIN_PUPDR_PULLUP(GPIOF_PIN13) |        \ +                                     PIN_PUPDR_PULLUP(GPIOF_PIN14) |        \ +                                     PIN_PUPDR_PULLUP(GPIOF_PIN15)) +#define VAL_GPIOF_ODR               (PIN_ODR_HIGH(GPIOF_I2C1_SDA) |           \ +                                     PIN_ODR_HIGH(GPIOF_I2C1_SCL) |          \ +                                     PIN_ODR_HIGH(GPIOF_PIN2) |             \ +                                     PIN_ODR_HIGH(GPIOF_PIN3) |             \ +                                     PIN_ODR_HIGH(GPIOF_PIN4) |             \ +                                     PIN_ODR_HIGH(GPIOF_PIN5) |             \ +                                     PIN_ODR_HIGH(GPIOF_PIN6) |             \ +                                     PIN_ODR_HIGH(GPIOF_PIN7) |             \ +                                     PIN_ODR_HIGH(GPIOF_PIN8) |             \ +                                     PIN_ODR_HIGH(GPIOF_PIN9) |             \ +                                     PIN_ODR_HIGH(GPIOF_PIN10) |            \ +                                     PIN_ODR_HIGH(GPIOF_PIN11) |            \ +                                     PIN_ODR_HIGH(GPIOF_PIN12) |            \ +                                     PIN_ODR_HIGH(GPIOF_PIN13) |            \ +                                     PIN_ODR_HIGH(GPIOF_PIN14) |            \ +                                     PIN_ODR_HIGH(GPIOF_PIN15)) +#define VAL_GPIOF_AFRL              (PIN_AFIO_AF(GPIOF_I2C1_SDA, 0U) |        \ +                                     PIN_AFIO_AF(GPIOF_I2C1_SCL, 0U) |       \ +                                     PIN_AFIO_AF(GPIOF_PIN2, 0U) |          \ +                                     PIN_AFIO_AF(GPIOF_PIN3, 0U) |          \ +                                     PIN_AFIO_AF(GPIOF_PIN4, 0U) |          \ +                                     PIN_AFIO_AF(GPIOF_PIN5, 0U) |          \ +                                     PIN_AFIO_AF(GPIOF_PIN6, 0U) |          \ +                                     PIN_AFIO_AF(GPIOF_PIN7, 0U)) +#define VAL_GPIOF_AFRH              (PIN_AFIO_AF(GPIOF_PIN8, 0U) |          \ +                                     PIN_AFIO_AF(GPIOF_PIN9, 0U) |          \ +                                     PIN_AFIO_AF(GPIOF_PIN10, 0U) |         \ +                                     PIN_AFIO_AF(GPIOF_PIN11, 0U) |         \ +                                     PIN_AFIO_AF(GPIOF_PIN12, 0U) |         \ +                                     PIN_AFIO_AF(GPIOF_PIN13, 0U) |         \ +                                     PIN_AFIO_AF(GPIOF_PIN14, 0U) |         \ +                                     PIN_AFIO_AF(GPIOF_PIN15, 0U)) + +/*===========================================================================*/ +/* External declarations.                                                    */ +/*===========================================================================*/ + +#if !defined(_FROM_ASM_) +#ifdef __cplusplus +extern "C" { +#endif +  void boardInit(void); +#ifdef __cplusplus +} +#endif +#endif /* _FROM_ASM_ */ + +#endif /* BOARD_H */ diff --git a/keyboards/chavdai40/boards/GENERIC_STM32_F042X6/board.mk b/keyboards/chavdai40/boards/GENERIC_STM32_F042X6/board.mk new file mode 100644 index 0000000000..3fff4fbbf8 --- /dev/null +++ b/keyboards/chavdai40/boards/GENERIC_STM32_F042X6/board.mk @@ -0,0 +1,9 @@ +# List of all the board related files. +BOARDSRC = $(BOARD_PATH)/boards/GENERIC_STM32_F042X6/board.c + +# Required include directories +BOARDINC = $(BOARD_PATH)/boards/GENERIC_STM32_F042X6 + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC  += $(BOARDINC) diff --git a/keyboards/chavdai40/bootloader_defs.h b/keyboards/chavdai40/bootloader_defs.h new file mode 100644 index 0000000000..4994be9c24 --- /dev/null +++ b/keyboards/chavdai40/bootloader_defs.h @@ -0,0 +1,7 @@ +/* Address for jumping to bootloader on STM32 chips. */ +/* It is chip dependent, the correct number can be looked up here: + * http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf + * This also requires a patch to chibios: + *  <tmk_dir>/tmk_core/tool/chibios/ch-bootloader-jump.patch + */ +#define STM32_BOOTLOADER_ADDRESS 0x1FFFC400
\ No newline at end of file diff --git a/keyboards/chavdai40/chavdai40.c b/keyboards/chavdai40/chavdai40.c new file mode 100644 index 0000000000..6101732e2b --- /dev/null +++ b/keyboards/chavdai40/chavdai40.c @@ -0,0 +1,16 @@ +/* Copyright 2020 t-miyajima + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ +#include "chavdai40.h" diff --git a/keyboards/chavdai40/chavdai40.h b/keyboards/chavdai40/chavdai40.h new file mode 100644 index 0000000000..a10f695c78 --- /dev/null +++ b/keyboards/chavdai40/chavdai40.h @@ -0,0 +1,49 @@ +/* Copyright 2020 t-miyajima + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ + + +#pragma once + +#define XXX KC_NO + +#include "quantum.h" + +// This a shortcut to help you visually see your layout. + +#define LAYOUT_44key( \ +    k01, k02, k03, k04, k05, k06, k07, k08, k09, k10, k11, k12, k13, \ +    k14 , k15, k16, k17, k18, k19, k20, k21, k22, k23, k24,  k25   , \ +     k26 ,  k27, k28, k29, k30, k31, k32, k33, k34, k35,  k36,  k37, \ +         k38,  k39,      k40,         k41,   k42,   k43,   k44       \ +) { \ +    { k01, k02, k03, k04, k05, k06, k07, k08, k09, k10, k11, k12, k13 }, \ +    { k14, k15, k16, k17, k18, k19, k20, k21, k22, k23, k24, k25, XXX }, \ +    { k26, k27, k28, k29, k30, k31, k32, k33, k34, k35, k36, k37, XXX }, \ +    { k38, k39, XXX, k40, XXX, k41, XXX, XXX, k42, k43, k44, XXX, XXX }  \ +} + +#define LAYOUT_42key( \ +    k01, k02, k03, k04, k05, k06, k07, k08, k09, k10, k11, k12, k13, \ +    k14 , k15, k16, k17, k18, k19, k20, k21, k22, k23, k24,  k25   , \ +     k26 ,  k27, k28, k29, k30, k31, k32, k33, k34, k35,  k36,  k37, \ +         k38,  k39,                   k41,          k43,   k44       \ +) { \ +    { k01, k02, k03, k04, k05, k06, k07, k08, k09, k10, k11, k12, k13 }, \ +    { k14, k15, k16, k17, k18, k19, k20, k21, k22, k23, k24, k25, XXX }, \ +    { k26, k27, k28, k29, k30, k31, k32, k33, k34, k35, k36, k37, XXX }, \ +    { k38, k39, XXX, XXX, XXX, k41, XXX, XXX, XXX, k43, k44, XXX, XXX }  \ +} + diff --git a/keyboards/chavdai40/chconf.h b/keyboards/chavdai40/chconf.h new file mode 100644 index 0000000000..6d169b36e9 --- /dev/null +++ b/keyboards/chavdai40/chconf.h @@ -0,0 +1,714 @@ +/* +    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + +    Licensed under the Apache License, Version 2.0 (the "License"); +    you may not use this file except in compliance with the License. +    You may obtain a copy of the License at + +        http://www.apache.org/licenses/LICENSE-2.0 + +    Unless required by applicable law or agreed to in writing, software +    distributed under the License is distributed on an "AS IS" BASIS, +    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +    See the License for the specific language governing permissions and +    limitations under the License. +*/ + +/** + * @file    rt/templates/chconf.h + * @brief   Configuration file template. + * @details A copy of this file must be placed in each project directory, it + *          contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_RT_CONF_ +#define _CHIBIOS_RT_CONF_VER_6_0_ + +/*===========================================================================*/ +/** + * @name System timers settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief   System time counter resolution. + * @note    Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_ST_RESOLUTION) +#define CH_CFG_ST_RESOLUTION                32 +#endif + +/** + * @brief   System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + *          setting also defines the system tick time unit. + */ +#if !defined(CH_CFG_ST_FREQUENCY) +#define CH_CFG_ST_FREQUENCY                 10000 +#endif + +/** + * @brief   Time intervals data size. + * @note    Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE               32 +#endif + +/** + * @brief   Time types data size. + * @note    Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE              32 +#endif + +/** + * @brief   Time delta constant for the tick-less mode. + * @note    If this value is zero then the system uses the classic + *          periodic tick. This value represents the minimum number + *          of ticks that is safe to specify in a timeout directive. + *          The value one is not valid, timeouts are rounded up to + *          this value. + */ +#if !defined(CH_CFG_ST_TIMEDELTA) +#define CH_CFG_ST_TIMEDELTA                 2 +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief   Round robin interval. + * @details This constant is the number of system ticks allowed for the + *          threads before preemption occurs. Setting this value to zero + *          disables the preemption for threads with equal priority and the + *          round robin becomes cooperative. Note that higher priority + *          threads can still preempt, the kernel is always preemptive. + * @note    Disabling the round robin preemption makes the kernel more compact + *          and generally faster. + * @note    The round robin preemption is not supported in tickless mode and + *          must be set to zero in that case. + */ +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM                 0 +#endif + +/** + * @brief   Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + *          then the whole available RAM is used. The core memory is made + *          available to the heap allocator and/or can be used directly through + *          the simplified core memory allocator. + * + * @note    In order to let the OS manage the whole RAM the linker script must + *          provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note    Requires @p CH_CFG_USE_MEMCORE. + */ +#if !defined(CH_CFG_MEMCORE_SIZE) +#define CH_CFG_MEMCORE_SIZE                 0 +#endif + +/** + * @brief   Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + *          does not spawn the idle thread. The application @p main() + *          function becomes the idle thread and must implement an + *          infinite loop. + */ +#if !defined(CH_CFG_NO_IDLE_THREAD) +#define CH_CFG_NO_IDLE_THREAD               FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief   OS optimization. + * @details If enabled then time efficient rather than space efficient code + *          is used when two possible implementations exist. + * + * @note    This is not related to the compiler optimization options. + * @note    The default is @p TRUE. + */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) +#define CH_CFG_OPTIMIZE_SPEED               TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief   Time Measurement APIs. + * @details If enabled then the time measurement APIs are included in + *          the kernel. + * + * @note    The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_TM) +#define CH_CFG_USE_TM                       FALSE +#endif + +/** + * @brief   Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note    The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_REGISTRY) +#define CH_CFG_USE_REGISTRY                 TRUE +#endif + +/** + * @brief   Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + *          the kernel. + * + * @note    The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_WAITEXIT) +#define CH_CFG_USE_WAITEXIT                 TRUE +#endif + +/** + * @brief   Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note    The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_SEMAPHORES) +#define CH_CFG_USE_SEMAPHORES               TRUE +#endif + +/** + * @brief   Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + *          priority rather than in FIFO order. + * + * @note    The default is @p FALSE. Enable this if you have special + *          requirements. + * @note    Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) +#define CH_CFG_USE_SEMAPHORES_PRIORITY      FALSE +#endif + +/** + * @brief   Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note    The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MUTEXES) +#define CH_CFG_USE_MUTEXES                  TRUE +#endif + +/** + * @brief   Enables recursive behavior on mutexes. + * @note    Recursive mutexes are heavier and have an increased + *          memory footprint. + * + * @note    The default is @p FALSE. + * @note    Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) +#define CH_CFG_USE_MUTEXES_RECURSIVE        FALSE +#endif + +/** + * @brief   Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + *          in the kernel. + * + * @note    The default is @p TRUE. + * @note    Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_CONDVARS) +#define CH_CFG_USE_CONDVARS                 TRUE +#endif + +/** + * @brief   Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + *          specification are included in the kernel. + * + * @note    The default is @p TRUE. + * @note    Requires @p CH_CFG_USE_CONDVARS. + */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) +#define CH_CFG_USE_CONDVARS_TIMEOUT         TRUE +#endif + +/** + * @brief   Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note    The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_EVENTS) +#define CH_CFG_USE_EVENTS                   TRUE +#endif + +/** + * @brief   Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + *          are included in the kernel. + * + * @note    The default is @p TRUE. + * @note    Requires @p CH_CFG_USE_EVENTS. + */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) +#define CH_CFG_USE_EVENTS_TIMEOUT           TRUE +#endif + +/** + * @brief   Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + *          in the kernel. + * + * @note    The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MESSAGES) +#define CH_CFG_USE_MESSAGES                 TRUE +#endif + +/** + * @brief   Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + *          FIFO order. + * + * @note    The default is @p FALSE. Enable this if you have special + *          requirements. + * @note    Requires @p CH_CFG_USE_MESSAGES. + */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) +#define CH_CFG_USE_MESSAGES_PRIORITY        FALSE +#endif + +/** + * @brief   Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + *          included in the kernel. + * + * @note    The default is @p TRUE. + * @note    Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_MAILBOXES) +#define CH_CFG_USE_MAILBOXES                TRUE +#endif + +/** + * @brief   Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + *          in the kernel. + * + * @note    The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMCORE) +#define CH_CFG_USE_MEMCORE                  TRUE +#endif + +/** + * @brief   Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + *          in the kernel. + * + * @note    The default is @p TRUE. + * @note    Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or + *          @p CH_CFG_USE_SEMAPHORES. + * @note    Mutexes are recommended. + */ +#if !defined(CH_CFG_USE_HEAP) +#define CH_CFG_USE_HEAP                     TRUE +#endif + +/** + * @brief   Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + *          in the kernel. + * + * @note    The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMPOOLS) +#define CH_CFG_USE_MEMPOOLS                 TRUE +#endif + +/** + * @brief   Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + *          in the kernel. + * + * @note    The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS                TRUE +#endif + +/** + * @brief   Pipes APIs. + * @details If enabled then the pipes APIs are included + *          in the kernel. + * + * @note    The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_PIPES) +#define CH_CFG_USE_PIPES                    TRUE +#endif + +/** + * @brief   Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + *          in the kernel. + * + * @note    The default is @p TRUE. + * @note    Requires @p CH_CFG_USE_WAITEXIT. + * @note    Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. + */ +#if !defined(CH_CFG_USE_DYNAMIC) +#define CH_CFG_USE_DYNAMIC                  TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief   Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + *          kernel. + * + * @note    The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY                  TRUE +#endif + +/** + * @brief   Maximum length for object names. + * @details If the specified length is zero then the name is stored by + *          pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH     8 +#endif + +/** + * @brief   Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY     TRUE +#endif + +/** + * @brief   Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS      TRUE +#endif + +/** + * @brief   Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES           TRUE +#endif + +/** + * @brief   Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES            TRUE +#endif + +/** + * @brief   Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS            TRUE +#endif + +/** + * @brief   Enables factory for Pipes. + */ +#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__) +#define CH_CFG_FACTORY_PIPES                TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief   Debug option, kernel statistics. + * + * @note    The default is @p FALSE. + */ +#if !defined(CH_DBG_STATISTICS) +#define CH_DBG_STATISTICS                   FALSE +#endif + +/** + * @brief   Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + *          at runtime. + * + * @note    The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK           FALSE +#endif + +/** + * @brief   Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + *          parameters are activated. + * + * @note    The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS                FALSE +#endif + +/** + * @brief   Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + *          activated. This includes consistency checks inside the kernel, + *          runtime anomalies and port-defined checks. + * + * @note    The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS               FALSE +#endif + +/** + * @brief   Debug option, trace buffer. + * @details If enabled then the trace buffer is activated. + * + * @note    The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK                   CH_DBG_TRACE_MASK_DISABLED +#endif + +/** + * @brief   Trace buffer entries. + * @note    The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + *          different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE            128 +#endif + +/** + * @brief   Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note    The default is @p FALSE. + * @note    The stack check is performed in a architecture/port dependent way. + *          It may not be implemented or some ports. + * @note    The default failure mode is to halt the system with the global + *          @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK           FALSE +#endif + +/** + * @brief   Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + *          value when a thread is created. This can be useful for the + *          runtime measurement of the used stack. + * + * @note    The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS                 FALSE +#endif + +/** + * @brief   Debug option, threads profiling. + * @details If enabled then a field is added to the @p thread_t structure that + *          counts the system ticks occurred while executing the thread. + * + * @note    The default is @p FALSE. + * @note    This debug option is not currently compatible with the + *          tickless mode. + */ +#if !defined(CH_DBG_THREADS_PROFILING) +#define CH_DBG_THREADS_PROFILING            FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief   System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS                                          \ +  /* Add threads custom fields here.*/ + +/** + * @brief   System initialization hook. + * @details User initialization code added to the @p chSysInit() function + *          just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() {                                         \ +  /* Add threads initialization code here.*/                                \ +} + +/** + * @brief   Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +#define CH_CFG_THREAD_EXTRA_FIELDS                                          \ +  /* Add threads custom fields here.*/ + +/** + * @brief   Threads initialization hook. + * @details User initialization code added to the @p _thread_init() function. + * + * @note    It is invoked from within @p _thread_init() and implicitly from all + *          the threads creation APIs. + */ +#define CH_CFG_THREAD_INIT_HOOK(tp) {                                       \ +  /* Add threads initialization code here.*/                                \ +} + +/** + * @brief   Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + */ +#define CH_CFG_THREAD_EXIT_HOOK(tp) {                                       \ +  /* Add threads finalization code here.*/                                  \ +} + +/** + * @brief   Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) {                              \ +  /* Context switch code here.*/                                            \ +} + +/** + * @brief   ISR enter hook. + */ +#define CH_CFG_IRQ_PROLOGUE_HOOK() {                                        \ +  /* IRQ prologue code here.*/                                              \ +} + +/** + * @brief   ISR exit hook. + */ +#define CH_CFG_IRQ_EPILOGUE_HOOK() {                                        \ +  /* IRQ epilogue code here.*/                                              \ +} + +/** + * @brief   Idle thread enter hook. + * @note    This hook is invoked within a critical zone, no OS functions + *          should be invoked from here. + * @note    This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() {                                          \ +  /* Idle-enter code here.*/                                                \ +} + +/** + * @brief   Idle thread leave hook. + * @note    This hook is invoked within a critical zone, no OS functions + *          should be invoked from here. + * @note    This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() {                                          \ +  /* Idle-leave code here.*/                                                \ +} + +/** + * @brief   Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#define CH_CFG_IDLE_LOOP_HOOK() {                                           \ +  /* Idle loop code here.*/                                                 \ +} + +/** + * @brief   System tick event hook. + * @details This hook is invoked in the system tick handler immediately + *          after processing the virtual timers queue. + */ +#define CH_CFG_SYSTEM_TICK_HOOK() {                                         \ +  /* System tick event code here.*/                                         \ +} + +/** + * @brief   System halt hook. + * @details This hook is invoked in case to a system halting error before + *          the system is halted. + */ +#define CH_CFG_SYSTEM_HALT_HOOK(reason) {                                   \ +  /* System halt code here.*/                                               \ +} + +/** + * @brief   Trace hook. + * @details This hook is invoked each time a new record is written in the + *          trace buffer. + */ +#define CH_CFG_TRACE_HOOK(tep) {                                            \ +  /* Trace code here.*/                                                     \ +} + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h).    */ +/*===========================================================================*/ + +#endif  /* CHCONF_H */ + +/** @} */ diff --git a/keyboards/chavdai40/config.h b/keyboards/chavdai40/config.h new file mode 100644 index 0000000000..a3dcf84e9a --- /dev/null +++ b/keyboards/chavdai40/config.h @@ -0,0 +1,74 @@ +/* Copyright 2020 t-miyajima + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ + + +#pragma once + +#include "config_common.h" + +/* USB Device descriptor parameter */ +#define VENDOR_ID       0x16D0 +#define PRODUCT_ID      0x0F95 +#define DEVICE_VER      0x0001 +#define MANUFACTURER    t-miyajima +#define PRODUCT         Chavdai40 + +/* usb power settings */ +#define USB_MAX_POWER_CONSUMPTION 100 + +/* key matrix size */ +#define MATRIX_ROWS 4 +#define MATRIX_COLS 13 + +  +#define MATRIX_ROW_PINS { A0, A15, B5, B6 } +#define MATRIX_COL_PINS { B8, B4, B3, B2, B1, B0, A7, A6, A5, A4, A3, A2, A1 } +#define UNUSED_PINS + +/* COL2ROW, ROW2COL*/ +#define DIODE_DIRECTION COL2ROW + +/* Debounce reduces chatter (unintended double-presses) - set 0 if debouncing is not needed */ +#define DEBOUNCE 5 + +/* define if matrix has ghost (lacks anti-ghosting diodes) */ +//#define MATRIX_HAS_GHOST + +/* If defined, GRAVE_ESC will always act as ESC when CTRL is held. + * This is userful for the Windows task manager shortcut (ctrl+shift+esc). + */ +// #define GRAVE_ESC_CTRL_OVERRIDE + +/* + * Force NKRO + * + * Force NKRO (nKey Rollover) to be enabled by default, regardless of the saved + * state in the bootmagic EEPROM settings. (Note that NKRO must be enabled in the + * makefile for this to work.) + * + * If forced on, NKRO can be disabled via magic key (default = LShift+RShift+N) + * until the next keyboard reset. + * + * NKRO may prevent your keystrokes from being detected in the BIOS, but it is + * fully operational during normal computer usage. + * + * For a less heavy-handed approach, enable NKRO via magic key (LShift+RShift+N) + * or via bootmagic (hold SPACE+N while plugging in the keyboard). Once set by + * bootmagic, NKRO mode will always be enabled until it is toggled again during a + * power-up. + * + */ +//#define FORCE_NKRO diff --git a/keyboards/chavdai40/halconf.h b/keyboards/chavdai40/halconf.h new file mode 100644 index 0000000000..383f3a8bb4 --- /dev/null +++ b/keyboards/chavdai40/halconf.h @@ -0,0 +1,525 @@ +/* +    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + +    Licensed under the Apache License, Version 2.0 (the "License"); +    you may not use this file except in compliance with the License. +    You may obtain a copy of the License at + +        http://www.apache.org/licenses/LICENSE-2.0 + +    Unless required by applicable law or agreed to in writing, software +    distributed under the License is distributed on an "AS IS" BASIS, +    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +    See the License for the specific language governing permissions and +    limitations under the License. +*/ + +/** + * @file    templates/halconf.h + * @brief   HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + *          various device drivers from your application. You may also use + *          this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef HALCONF_H +#define HALCONF_H + +#define _CHIBIOS_HAL_CONF_ +#define _CHIBIOS_HAL_CONF_VER_7_0_ + +#include "mcuconf.h" + +/** + * @brief   Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL                         TRUE +#endif + +/** + * @brief   Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC                         FALSE +#endif + +/** + * @brief   Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN                         FALSE +#endif + +/** + * @brief   Enables the cryptographic subsystem. + */ +#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) +#define HAL_USE_CRY                         FALSE +#endif + +/** + * @brief   Enables the DAC subsystem. + */ +#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) +#define HAL_USE_DAC                         FALSE +#endif + +/** + * @brief   Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT                         FALSE +#endif + +/** + * @brief   Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C                         FALSE +#endif + +/** + * @brief   Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S                         FALSE +#endif + +/** + * @brief   Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU                         FALSE +#endif + +/** + * @brief   Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC                         FALSE +#endif + +/** + * @brief   Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI                     FALSE +#endif + +/** + * @brief   Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM                         FALSE +#endif + +/** + * @brief   Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC                         FALSE +#endif + +/** + * @brief   Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC                         FALSE +#endif + +/** + * @brief   Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL                      TRUE +#endif + +/** + * @brief   Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB                  FALSE +#endif + +/** + * @brief   Enables the SIO subsystem. + */ +#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) +#define HAL_USE_SIO                         FALSE +#endif + +/** + * @brief   Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI                         FALSE +#endif + +/** + * @brief   Enables the TRNG subsystem. + */ +#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) +#define HAL_USE_TRNG                        FALSE +#endif + +/** + * @brief   Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART                        FALSE +#endif + +/** + * @brief   Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB                         TRUE +#endif + +/** + * @brief   Enables the WDG subsystem. + */ +#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) +#define HAL_USE_WDG                         FALSE +#endif + +/** + * @brief   Enables the WSPI subsystem. + */ +#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) +#define HAL_USE_WSPI                        FALSE +#endif + +/*===========================================================================*/ +/* PAL driver related settings.                                              */ +/*===========================================================================*/ + +/** + * @brief   Enables synchronous APIs. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) +#define PAL_USE_CALLBACKS                   FALSE +#endif + +/** + * @brief   Enables synchronous APIs. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) +#define PAL_USE_WAIT                        FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings.                                              */ +/*===========================================================================*/ + +/** + * @brief   Enables synchronous APIs. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT                        TRUE +#endif + +/** + * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION            TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings.                                              */ +/*===========================================================================*/ + +/** + * @brief   Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE                  TRUE +#endif + +/** + * @brief   Enforces the driver to use direct callbacks rather than OSAL events. + */ +#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) +#define CAN_ENFORCE_USE_CALLBACKS           FALSE +#endif + +/*===========================================================================*/ +/* CRY driver related settings.                                              */ +/*===========================================================================*/ + +/** + * @brief   Enables the SW fall-back of the cryptographic driver. + * @details When enabled, this option, activates a fall-back software + *          implementation for algorithms not supported by the underlying + *          hardware. + * @note    Fall-back implementations may not be present for all algorithms. + */ +#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_USE_FALLBACK                FALSE +#endif + +/** + * @brief   Makes the driver forcibly use the fall-back implementations. + */ +#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_ENFORCE_FALLBACK            FALSE +#endif + +/*===========================================================================*/ +/* DAC driver related settings.                                              */ +/*===========================================================================*/ + +/** + * @brief   Enables synchronous APIs. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) +#define DAC_USE_WAIT                        TRUE +#endif + +/** + * @brief   Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define DAC_USE_MUTUAL_EXCLUSION            TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings.                                              */ +/*===========================================================================*/ + +/** + * @brief   Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION            TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings.                                              */ +/*===========================================================================*/ + +/** + * @brief   Enables the zero-copy API. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY                   FALSE +#endif + +/** + * @brief   Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS                      TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings.                                          */ +/*===========================================================================*/ + +/** + * @brief   Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + *          routines releasing some extra CPU time for the threads with + *          lower priority, this may slow down the driver a bit however. + *          This option is recommended also if the SPI driver does not + *          use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING                    TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings.                                              */ +/*===========================================================================*/ + +/** + * @brief   Number of initialization attempts before rejecting the card. + * @note    Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY                      100 +#endif + +/** + * @brief   Include support for MMC cards. + * @note    MMC support is not yet implemented so this option must be kept + *          at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT                     FALSE +#endif + +/** + * @brief   Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + *          routines releasing some extra CPU time for the threads with + *          lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING                    TRUE +#endif + +/** + * @brief   OCR initialization constant for V20 cards. + */ +#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) +#define SDC_INIT_OCR_V20                    0x50FF8000U +#endif + +/** + * @brief   OCR initialization constant for non-V20 cards. + */ +#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) +#define SDC_INIT_OCR                        0x80100000U +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings.                                           */ +/*===========================================================================*/ + +/** + * @brief   Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + *          default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE              38400 +#endif + +/** + * @brief   Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + *          buffers depending on the requirements of your application. + * @note    The default is 16 bytes for both the transmission and receive + *          buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE                 16 +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting.                                        */ +/*===========================================================================*/ + +/** + * @brief   Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + *          the USB data endpoint maximum packet size. + * @note    The default is 256 bytes for both the transmission and receive + *          buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE             256 +#endif + +/** + * @brief   Serial over USB number of buffers. + * @note    The default is 2 buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_NUMBER           2 +#endif + +/*===========================================================================*/ +/* SPI driver related settings.                                              */ +/*===========================================================================*/ + +/** + * @brief   Enables synchronous APIs. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT                        TRUE +#endif + +/** + * @brief   Enables circular transfers APIs. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) +#define SPI_USE_CIRCULAR                    FALSE +#endif + + +/** + * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION            TRUE +#endif + +/** + * @brief   Handling method for SPI CS line. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) +#define SPI_SELECT_MODE                     SPI_SELECT_MODE_PAD +#endif + +/*===========================================================================*/ +/* UART driver related settings.                                             */ +/*===========================================================================*/ + +/** + * @brief   Enables synchronous APIs. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) +#define UART_USE_WAIT                       FALSE +#endif + +/** + * @brief   Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define UART_USE_MUTUAL_EXCLUSION           FALSE +#endif + +/*===========================================================================*/ +/* USB driver related settings.                                              */ +/*===========================================================================*/ + +/** + * @brief   Enables synchronous APIs. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) +#define USB_USE_WAIT                        TRUE +#endif + +/*===========================================================================*/ +/* WSPI driver related settings.                                             */ +/*===========================================================================*/ + +/** + * @brief   Enables synchronous APIs. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) +#define WSPI_USE_WAIT                       TRUE +#endif + +/** + * @brief   Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. + * @note    Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define WSPI_USE_MUTUAL_EXCLUSION           TRUE +#endif + +#endif /* HALCONF_H */ + +/** @} */ diff --git a/keyboards/chavdai40/info.json b/keyboards/chavdai40/info.json new file mode 100644 index 0000000000..53007b923d --- /dev/null +++ b/keyboards/chavdai40/info.json @@ -0,0 +1,101 @@ +{ +    "keyboard_name": "chavdai40",  +    "url": "https://github.com/dvorak55/chavdai40",  +    "maintainer": "t-miyajima",  +    "width": 14,  +    "height": 4,  +    "layouts": { +        "LAYOUT_44key": { +            "layout": [ +                {"x":0, "y":0, "w":1.5},  +                {"label":"Q", "x":1.5, "y":0},  +                {"label":"W", "x":2.5, "y":0},  +                {"label":"E", "x":3.5, "y":0},  +                {"label":"R", "x":4.5, "y":0},  +                {"label":"T", "x":5.5, "y":0},  +                {"label":"Y", "x":6.5, "y":0},  +                {"label":"U", "x":7.5, "y":0},  +                {"label":"I", "x":8.5, "y":0},  +                {"label":"O", "x":9.5, "y":0},  +                {"label":"P", "x":10.5, "y":0},  +                {"label":"_", "x":11.5, "y":0},  +                {"label":"Backspace", "x":12.5, "y":0, "w":1.5},  +                {"label":"Ctrl", "x":0, "y":1, "w":1.75},  +                {"label":"A", "x":1.75, "y":1},  +                {"label":"S", "x":2.75, "y":1},  +                {"label":"D", "x":3.75, "y":1},  +                {"label":"F", "x":4.75, "y":1},  +                {"label":"G", "x":5.75, "y":1},  +                {"label":"H", "x":6.75, "y":1},  +                {"label":"J", "x":7.75, "y":1},  +                {"label":"K", "x":8.75, "y":1},  +                {"label":"L", "x":9.75, "y":1},  +                {"label":":", "x":10.75, "y":1},  +                {"label":"Enter", "x":11.75, "y":1, "w":2.25},  +                {"label":"Shift", "x":0, "y":2, "w":2.25},  +                {"label":"Z", "x":2.25, "y":2},  +                {"label":"X", "x":3.25, "y":2},  +                {"label":"C", "x":4.25, "y":2},  +                {"label":"V", "x":5.25, "y":2},  +                {"label":"B", "x":6.25, "y":2},  +                {"label":"N", "x":7.25, "y":2},  +                {"label":"M", "x":8.25, "y":2},  +                {"label":"<", "x":9.25, "y":2},  +                {"label":">", "x":10.25, "y":2},  +                {"label":"?", "x":11.25, "y":2, "w":1.25},  +                {"x":12.5, "y":2, "w":1.25},  +                {"label":"Alt", "x":1.38, "y":3, "w":1.25},  +                {"label":"Win", "x":2.63, "y":3, "w":1.25},  +                {"x":3.88, "y":3, "w":2.25},  +                {"x":6.13, "y":3, "w":2.75},  +                {"label":"Win", "x":8.88, "y":3, "w":1.25},  +                {"label":"Alt", "x":10.13, "y":3, "w":1.25},  +                {"label":"Esc", "x":11.38, "y":3, "w":1.25}] +        }, +        "LAYOUT_42key": { +            "layout": [ +                {"x":0, "y":0, "w":1.5}, +                {"label":"Q", "x":1.5, "y":0}, +                {"label":"W", "x":2.5, "y":0}, +                {"label":"E", "x":3.5, "y":0}, +                {"label":"R", "x":4.5, "y":0}, +                {"label":"T", "x":5.5, "y":0}, +                {"label":"Y", "x":6.5, "y":0}, +                {"label":"U", "x":7.5, "y":0}, +                {"label":"I", "x":8.5, "y":0}, +                {"label":"O", "x":9.5, "y":0}, +                {"label":"P", "x":10.5, "y":0}, +                {"label":"_", "x":11.5, "y":0}, +                {"label":"Backspace", "x":12.5, "y":0, "w":1.5}, +                {"label":"Ctrl", "x":0, "y":1, "w":1.75}, +                {"label":"A", "x":1.75, "y":1}, +                {"label":"S", "x":2.75, "y":1}, +                {"label":"D", "x":3.75, "y":1}, +                {"label":"F", "x":4.75, "y":1}, +                {"label":"G", "x":5.75, "y":1}, +                {"label":"H", "x":6.75, "y":1}, +                {"label":"J", "x":7.75, "y":1}, +                {"label":"K", "x":8.75, "y":1}, +                {"label":"L", "x":9.75, "y":1}, +                {"label":":", "x":10.75, "y":1}, +                {"label":"Enter", "x":11.75, "y":1, "w":2.25}, +                {"label":"Shift", "x":0, "y":2, "w":2.25}, +                {"label":"Z", "x":2.25, "y":2},  +                {"label":"X", "x":3.25, "y":2},  +                {"label":"C", "x":4.25, "y":2},  +                {"label":"V", "x":5.25, "y":2},  +                {"label":"B", "x":6.25, "y":2},  +                {"label":"N", "x":7.25, "y":2},  +                {"label":"M", "x":8.25, "y":2},  +                {"label":"<", "x":9.25, "y":2},  +                {"label":">", "x":10.25, "y":2}, +                {"label":"?", "x":11.25, "y":2, "w":1.25}, +                {"x":12.5, "y":2, "w":1.25}, +                {"label":"Alt", "x":1.38, "y":3, "w":1.25}, +                {"label":"Win", "x":2.63, "y":3, "w":1.25}, +                {"x":3.88, "y":3, "w":6.25}, +                {"label":"Win", "x":10.13, "y":3, "w":1.25}, +                {"label":"Alt", "x":11.38, "y":3, "w":1.25}] +        } +    } +}
\ No newline at end of file diff --git a/keyboards/chavdai40/keymaps/42keys-dvorak/config.h b/keyboards/chavdai40/keymaps/42keys-dvorak/config.h new file mode 100644 index 0000000000..bbcd7cdf98 --- /dev/null +++ b/keyboards/chavdai40/keymaps/42keys-dvorak/config.h @@ -0,0 +1,22 @@ +/* Copyright 2020 t-miyajima + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ + +#pragma once + +// place overrides here +#define PERMISSIVE_HOLD +#define RETRO_TAPPING +#define TAPPING_TERM 5 diff --git a/keyboards/chavdai40/keymaps/42keys-dvorak/keymap.c b/keyboards/chavdai40/keymaps/42keys-dvorak/keymap.c new file mode 100644 index 0000000000..3ea66f5f3f --- /dev/null +++ b/keyboards/chavdai40/keymaps/42keys-dvorak/keymap.c @@ -0,0 +1,41 @@ + /* Copyright 2020 t-miyajima + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ +#include QMK_KEYBOARD_H + +const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = { +  /* Keymap _BL: (Base Layer) Default Layer +   * ,-------------------------------------------------------. +   * | Tab |  /|  ,|  .|  P|  Y|  F|  G|  C|  R|  L|  -| Bspc| +   * |-------------------------------------------------------| +   * | Ctrl  |  A|  O|  E|  U|  I|  D|  H|  T|  N|  S| Return| +   * |-------------------------------------------------------| +   * | Shift  |  ;|  Q|  J|  K|  X|  B|  M|  W|  V|   Z| Lyr| +   * `----.---------------------------------------------.---' +   *      | Alt |Win |           Space        |Win |Alt | +   *      `---------------------------------------------' +   */ +    LAYOUT_42key( /* Base */ +        KC_TAB, KC_SLASH, KC_COMMA, KC_DOT, KC_P, KC_Y, KC_F, KC_G, KC_C, KC_R, KC_L, KC_MINUS, KC_BSPACE, +        KC_LCTRL, KC_A, KC_O, KC_E, KC_U, KC_I, KC_D, KC_H, KC_T, KC_N, KC_S, KC_ENTER, +        KC_LSFT, KC_SCOLON, KC_Q, KC_J, KC_K, KC_X, KC_B, KC_M, KC_W, KC_V, KC_Z, MO(1), +        KC_LALT, KC_LGUI, KC_SPACE, KC_RGUI, KC_RALT), +    LAYOUT_42key( /* layer 1 */ +        KC_GRAVE, KC_EXCLAIM, KC_AT, KC_HASH, KC_QUOTE, KC_PERCENT, KC_CIRCUMFLEX, KC_AMPERSAND, KC_ASTERISK, KC_LEFT_PAREN, KC_RIGHT_PAREN, KC_LBRACKET, KC_RBRACKET, +        KC_TRNS, KC_1, KC_2, KC_3, KC_4, KC_5, KC_6, KC_7, KC_8, KC_9, KC_0, KC_TRNS, +        KC_TRNS, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_EQUAL, KC_TRNS, +        KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS), +}; + diff --git a/keyboards/chavdai40/keymaps/42keys-eucalyn/config.h b/keyboards/chavdai40/keymaps/42keys-eucalyn/config.h new file mode 100644 index 0000000000..bbcd7cdf98 --- /dev/null +++ b/keyboards/chavdai40/keymaps/42keys-eucalyn/config.h @@ -0,0 +1,22 @@ +/* Copyright 2020 t-miyajima + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ + +#pragma once + +// place overrides here +#define PERMISSIVE_HOLD +#define RETRO_TAPPING +#define TAPPING_TERM 5 diff --git a/keyboards/chavdai40/keymaps/42keys-eucalyn/keymap.c b/keyboards/chavdai40/keymaps/42keys-eucalyn/keymap.c new file mode 100644 index 0000000000..a464a586e7 --- /dev/null +++ b/keyboards/chavdai40/keymaps/42keys-eucalyn/keymap.c @@ -0,0 +1,40 @@ + /* Copyright 2020 t-miyajima + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ +#include QMK_KEYBOARD_H + +const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = { +  /* Keymap _BL: (Base Layer) Default Layer +   * ,-------------------------------------------------------. +   * | Tab |  ;|  ,|  .|  P|  Q|  Y|  G|  D|  M|  F|  -| Bspc| +   * |-------------------------------------------------------| +   * | Ctrl  |  A|  O|  E|  I|  U|  B|  N|  T|  R|  S| Return| +   * |-------------------------------------------------------| +   * | Shift  |  Z|  X|  C|  V|  W|  H|  J|  K|  L|   /| Lyr| +   * `----.---------------------------------------------.---' +   *      | Alt |Win |           Space        |Win |Alt | +   *      `---------------------------------------------' +   */ +    LAYOUT_42key( /* Base */ +        KC_TAB, KC_SCOLON, KC_COMMA, KC_DOT, KC_P, KC_Q, KC_Y, KC_G, KC_D, KC_M, KC_F, KC_MINUS, KC_BSPACE, +        KC_LCTRL, KC_A, KC_O, KC_E, KC_I, KC_U, KC_B, KC_N, KC_T, KC_R, KC_S, KC_ENTER, +        KC_LSFT, KC_Z, KC_X, KC_C, KC_V, KC_W, KC_H, KC_J, KC_K, KC_L, KC_SLASH, MO(1), +        KC_LALT, KC_LGUI, KC_SPACE, KC_RGUI, KC_RALT), +    LAYOUT_42key( /* layer 1 */ +        KC_GRAVE, KC_EXCLAIM, KC_AT, KC_HASH, KC_QUOTE, KC_PERCENT, KC_CIRCUMFLEX, KC_AMPERSAND, KC_ASTERISK, KC_LEFT_PAREN, KC_RIGHT_PAREN, KC_LBRACKET, KC_RBRACKET, +        KC_TRNS, KC_1, KC_2, KC_3, KC_4, KC_5, KC_6, KC_7, KC_8, KC_9, KC_0, KC_TRNS, +        KC_TRNS, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_EQUAL, KC_TRNS, +        KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS), +}; diff --git a/keyboards/chavdai40/keymaps/42keys-qwerty/config.h b/keyboards/chavdai40/keymaps/42keys-qwerty/config.h new file mode 100644 index 0000000000..bbcd7cdf98 --- /dev/null +++ b/keyboards/chavdai40/keymaps/42keys-qwerty/config.h @@ -0,0 +1,22 @@ +/* Copyright 2020 t-miyajima + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ + +#pragma once + +// place overrides here +#define PERMISSIVE_HOLD +#define RETRO_TAPPING +#define TAPPING_TERM 5 diff --git a/keyboards/chavdai40/keymaps/42keys-qwerty/keymap.c b/keyboards/chavdai40/keymaps/42keys-qwerty/keymap.c new file mode 100644 index 0000000000..fb5a7bd69e --- /dev/null +++ b/keyboards/chavdai40/keymaps/42keys-qwerty/keymap.c @@ -0,0 +1,40 @@ + /* Copyright 2020 t-miyajima + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ +#include QMK_KEYBOARD_H + +const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = { +  /* Keymap _BL: (Base Layer) Default Layer +   * ,-------------------------------------------------------. +   * | Tab |  Q|  W|  E|  R|  T|  Y|  U|  I|  O|  P|  -| Bspc| +   * |-------------------------------------------------------| +   * | Ctrl  |  A|  S|  D|  F|  G|  H|  J|  K|  L|  ;| Return| +   * |-------------------------------------------------------| +   * | Shift  |  Z|  X|  C|  V|  B|  N|  M|  ,|  .|   /| Lyr| +   * `----.---------------------------------------------.---' +   *      | Alt |Win |           Space        |Win |Alt | +   *      `---------------------------------------------' +   */ +    LAYOUT_42key( /* Base */ +        KC_TAB, KC_Q, KC_W, KC_E, KC_R, KC_T, KC_Y, KC_U, KC_I, KC_O, KC_P, KC_MINUS, KC_BSPACE, +        KC_LCTRL, KC_A, KC_S, KC_D, KC_F, KC_G, KC_H, KC_J, KC_K, KC_L, KC_SCOLON, KC_ENTER, +        KC_LSHIFT, KC_Z, KC_X, KC_C, KC_V, KC_B, KC_N, KC_M, KC_COMMA, KC_DOT, KC_SLASH, MO(1), +        KC_LALT, KC_LGUI, KC_SPACE, KC_RGUI, KC_RALT), +    LAYOUT_42key( /* layer 1 */ +        KC_GRAVE, KC_EXCLAIM, KC_AT, KC_HASH, KC_QUOTE, KC_PERCENT, KC_CIRCUMFLEX, KC_AMPERSAND, KC_ASTERISK, KC_LEFT_PAREN, KC_RIGHT_PAREN, KC_LBRACKET, KC_RBRACKET, +        KC_TRNS, KC_1, KC_2, KC_3, KC_4, KC_5, KC_6, KC_7, KC_8, KC_9, KC_0, KC_TRNS, +        KC_TRNS, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_EQUAL, KC_TRNS, +        KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS), +}; diff --git a/keyboards/chavdai40/keymaps/44keys-dvorak/config.h b/keyboards/chavdai40/keymaps/44keys-dvorak/config.h new file mode 100644 index 0000000000..bbcd7cdf98 --- /dev/null +++ b/keyboards/chavdai40/keymaps/44keys-dvorak/config.h @@ -0,0 +1,22 @@ +/* Copyright 2020 t-miyajima + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ + +#pragma once + +// place overrides here +#define PERMISSIVE_HOLD +#define RETRO_TAPPING +#define TAPPING_TERM 5 diff --git a/keyboards/chavdai40/keymaps/44keys-dvorak/keymap.c b/keyboards/chavdai40/keymaps/44keys-dvorak/keymap.c new file mode 100644 index 0000000000..09dd15e71b --- /dev/null +++ b/keyboards/chavdai40/keymaps/44keys-dvorak/keymap.c @@ -0,0 +1,40 @@ + /* Copyright 2020 t-miyajima + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ +#include QMK_KEYBOARD_H + +const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = { +  /* Keymap _BL: (Base Layer) Default Layer +   * ,-------------------------------------------------------. +   * | Tab |  /|  ,|  .|  P|  Y|  F|  G|  C|  R|  L|  -| Bspc| +   * |-------------------------------------------------------| +   * | Ctrl  |  A|  O|  E|  U|  I|  D|  H|  T|  N|  S| Return| +   * |-------------------------------------------------------| +   * | Shift  |  ;|  Q|  J|  K|  X|  B|  M|  W|  V|   Z| Del| +   * `----.---------------------------------------------.---' +   *      | Alt |Win | Layer |   Space   |Win |Alt |Esc | +   *      `---------------------------------------------' +   */ +    LAYOUT_44key( /* Base */ +        KC_TAB, KC_SLASH, KC_COMMA, KC_DOT, KC_P, KC_Y, KC_F, KC_G, KC_C, KC_R, KC_L, KC_MINUS, KC_BSPACE, +        KC_LCTRL, KC_A, KC_O, KC_E, KC_U, KC_I, KC_D, KC_H, KC_T, KC_N, KC_S, KC_ENTER, +        KC_LSFT, KC_SCOLON, KC_Q, KC_J, KC_K, KC_X, KC_B, KC_M, KC_W, KC_V, KC_Z, KC_DELETE, +        KC_LALT, KC_LGUI, MO(1), KC_SPACE, KC_RGUI, KC_RALT, KC_ESCAPE), +    LAYOUT_44key( /* layer 1 */ +        KC_GRAVE, KC_EXCLAIM, KC_AT, KC_HASH, KC_QUOTE, KC_PERCENT, KC_CIRCUMFLEX, KC_AMPERSAND, KC_ASTERISK, KC_LEFT_PAREN, KC_RIGHT_PAREN, KC_LBRACKET, KC_RBRACKET, +        KC_TRNS, KC_1, KC_2, KC_3, KC_4, KC_5, KC_6, KC_7, KC_8, KC_9, KC_0, KC_TRNS, +        KC_TRNS, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_EQUAL, KC_TRNS, +        KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS), +}; diff --git a/keyboards/chavdai40/keymaps/44keys-eucalyn/config.h b/keyboards/chavdai40/keymaps/44keys-eucalyn/config.h new file mode 100644 index 0000000000..bbcd7cdf98 --- /dev/null +++ b/keyboards/chavdai40/keymaps/44keys-eucalyn/config.h @@ -0,0 +1,22 @@ +/* Copyright 2020 t-miyajima + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ + +#pragma once + +// place overrides here +#define PERMISSIVE_HOLD +#define RETRO_TAPPING +#define TAPPING_TERM 5 diff --git a/keyboards/chavdai40/keymaps/44keys-eucalyn/keymap.c b/keyboards/chavdai40/keymaps/44keys-eucalyn/keymap.c new file mode 100644 index 0000000000..a8a48899eb --- /dev/null +++ b/keyboards/chavdai40/keymaps/44keys-eucalyn/keymap.c @@ -0,0 +1,40 @@ + /* Copyright 2020 t-miyajima + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ +#include QMK_KEYBOARD_H + +const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = { +  /* Keymap _BL: (Base Layer) Default Layer +   * ,-------------------------------------------------------. +   * | Tab |  ;|  ,|  .|  P|  Q|  Y|  G|  D|  M|  F|  -| Bspc| +   * |-------------------------------------------------------| +   * | Ctrl  |  A|  O|  E|  I|  U|  B|  N|  T|  R|  S| Return| +   * |-------------------------------------------------------| +   * | Shift  |  Z|  X|  C|  V|  W|  H|  J|  K|  L|   /| Del| +   * `----.---------------------------------------------.---' +   *      | Alt |Win | Layer |   Space   |Win |Alt |Esc | +   *      `---------------------------------------------' +   */ +    LAYOUT_44key( /* Base */ +        KC_TAB, KC_SCOLON, KC_COMMA, KC_DOT, KC_P, KC_Q, KC_Y, KC_G, KC_D, KC_M, KC_F, KC_MINUS, KC_BSPACE, +        KC_LCTRL, KC_A, KC_O, KC_E, KC_I, KC_U, KC_B, KC_N, KC_T, KC_R, KC_S, KC_ENTER, +        KC_LSFT, KC_Z, KC_X, KC_C, KC_V, KC_W, KC_H, KC_J, KC_K, KC_L, KC_SLASH, KC_DELETE, +        KC_LALT, KC_LGUI, MO(1), KC_SPACE, KC_RGUI, KC_RALT, KC_ESCAPE), +    LAYOUT_44key( /* layer 1 */ +        KC_GRAVE, KC_EXCLAIM, KC_AT, KC_HASH, KC_QUOTE, KC_PERCENT, KC_CIRCUMFLEX, KC_AMPERSAND, KC_ASTERISK, KC_LEFT_PAREN, KC_RIGHT_PAREN, KC_LBRACKET, KC_RBRACKET, +        KC_TRNS, KC_1, KC_2, KC_3, KC_4, KC_5, KC_6, KC_7, KC_8, KC_9, KC_0, KC_TRNS, +        KC_TRNS, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_EQUAL, KC_TRNS, +        KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS), +}; diff --git a/keyboards/chavdai40/keymaps/44keys-qwerty/config.h b/keyboards/chavdai40/keymaps/44keys-qwerty/config.h new file mode 100644 index 0000000000..bbcd7cdf98 --- /dev/null +++ b/keyboards/chavdai40/keymaps/44keys-qwerty/config.h @@ -0,0 +1,22 @@ +/* Copyright 2020 t-miyajima + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ + +#pragma once + +// place overrides here +#define PERMISSIVE_HOLD +#define RETRO_TAPPING +#define TAPPING_TERM 5 diff --git a/keyboards/chavdai40/keymaps/44keys-qwerty/keymap.c b/keyboards/chavdai40/keymaps/44keys-qwerty/keymap.c new file mode 100644 index 0000000000..b709b34fbd --- /dev/null +++ b/keyboards/chavdai40/keymaps/44keys-qwerty/keymap.c @@ -0,0 +1,40 @@ + /* Copyright 2020 t-miyajima + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ +#include QMK_KEYBOARD_H + +const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = { +  /* Keymap _BL: (Base Layer) Default Layer +   * ,-------------------------------------------------------. +   * | Tab |  Q|  W|  E|  R|  T|  Y|  U|  I|  O|  P|  -| Bspc| +   * |-------------------------------------------------------| +   * | Ctrl  |  A|  S|  D|  F|  G|  H|  J|  K|  L|  ;| Return| +   * |-------------------------------------------------------| +   * | Shift  |  Z|  X|  C|  V|  B|  N|  M|  ,|  .|   /| Del| +   * `----.---------------------------------------------.---' +   *      | Alt |Win | Layer |   Space   |Win |Alt |Esc | +   *      `---------------------------------------------' +   */ +    LAYOUT_44key( /* Base */ +        KC_TAB, KC_Q, KC_W, KC_E, KC_R, KC_T, KC_Y, KC_U, KC_I, KC_O, KC_P, KC_MINUS, KC_BSPACE, +        KC_LCTRL, KC_A, KC_S, KC_D, KC_F, KC_G, KC_H, KC_J, KC_K, KC_L, KC_SCOLON, KC_ENTER, +        KC_LSHIFT, KC_Z, KC_X, KC_C, KC_V, KC_B, KC_N, KC_M, KC_COMMA, KC_DOT, KC_SLASH, KC_DELETE, +        KC_LALT, KC_LGUI, MO(1), KC_SPACE, KC_RGUI, KC_RALT, KC_ESCAPE), +    LAYOUT_44key( /* layer 1 */ +        KC_GRAVE, KC_EXCLAIM, KC_AT, KC_HASH, KC_QUOTE, KC_PERCENT, KC_CIRCUMFLEX, KC_AMPERSAND, KC_ASTERISK, KC_LEFT_PAREN, KC_RIGHT_PAREN, KC_LBRACKET, KC_RBRACKET, +        KC_TRNS, KC_1, KC_2, KC_3, KC_4, KC_5, KC_6, KC_7, KC_8, KC_9, KC_0, KC_TRNS, +        KC_TRNS, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_EQUAL, KC_TRNS, +        KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS), +}; diff --git a/keyboards/chavdai40/keymaps/default/config.h b/keyboards/chavdai40/keymaps/default/config.h new file mode 100644 index 0000000000..bbcd7cdf98 --- /dev/null +++ b/keyboards/chavdai40/keymaps/default/config.h @@ -0,0 +1,22 @@ +/* Copyright 2020 t-miyajima + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ + +#pragma once + +// place overrides here +#define PERMISSIVE_HOLD +#define RETRO_TAPPING +#define TAPPING_TERM 5 diff --git a/keyboards/chavdai40/keymaps/default/keymap.c b/keyboards/chavdai40/keymaps/default/keymap.c new file mode 100644 index 0000000000..b709b34fbd --- /dev/null +++ b/keyboards/chavdai40/keymaps/default/keymap.c @@ -0,0 +1,40 @@ + /* Copyright 2020 t-miyajima + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see <http://www.gnu.org/licenses/>. + */ +#include QMK_KEYBOARD_H + +const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = { +  /* Keymap _BL: (Base Layer) Default Layer +   * ,-------------------------------------------------------. +   * | Tab |  Q|  W|  E|  R|  T|  Y|  U|  I|  O|  P|  -| Bspc| +   * |-------------------------------------------------------| +   * | Ctrl  |  A|  S|  D|  F|  G|  H|  J|  K|  L|  ;| Return| +   * |-------------------------------------------------------| +   * | Shift  |  Z|  X|  C|  V|  B|  N|  M|  ,|  .|   /| Del| +   * `----.---------------------------------------------.---' +   *      | Alt |Win | Layer |   Space   |Win |Alt |Esc | +   *      `---------------------------------------------' +   */ +    LAYOUT_44key( /* Base */ +        KC_TAB, KC_Q, KC_W, KC_E, KC_R, KC_T, KC_Y, KC_U, KC_I, KC_O, KC_P, KC_MINUS, KC_BSPACE, +        KC_LCTRL, KC_A, KC_S, KC_D, KC_F, KC_G, KC_H, KC_J, KC_K, KC_L, KC_SCOLON, KC_ENTER, +        KC_LSHIFT, KC_Z, KC_X, KC_C, KC_V, KC_B, KC_N, KC_M, KC_COMMA, KC_DOT, KC_SLASH, KC_DELETE, +        KC_LALT, KC_LGUI, MO(1), KC_SPACE, KC_RGUI, KC_RALT, KC_ESCAPE), +    LAYOUT_44key( /* layer 1 */ +        KC_GRAVE, KC_EXCLAIM, KC_AT, KC_HASH, KC_QUOTE, KC_PERCENT, KC_CIRCUMFLEX, KC_AMPERSAND, KC_ASTERISK, KC_LEFT_PAREN, KC_RIGHT_PAREN, KC_LBRACKET, KC_RBRACKET, +        KC_TRNS, KC_1, KC_2, KC_3, KC_4, KC_5, KC_6, KC_7, KC_8, KC_9, KC_0, KC_TRNS, +        KC_TRNS, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_EQUAL, KC_TRNS, +        KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS), +}; diff --git a/keyboards/chavdai40/mcuconf.h b/keyboards/chavdai40/mcuconf.h new file mode 100644 index 0000000000..0cc575d40f --- /dev/null +++ b/keyboards/chavdai40/mcuconf.h @@ -0,0 +1,190 @@ +/* +    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + +    Licensed under the Apache License, Version 2.0 (the "License"); +    you may not use this file except in compliance with the License. +    You may obtain a copy of the License at + +        http://www.apache.org/licenses/LICENSE-2.0 + +    Unless required by applicable law or agreed to in writing, software +    distributed under the License is distributed on an "AS IS" BASIS, +    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +    See the License for the specific language governing permissions and +    limitations under the License. +*/ + +#ifndef MCUCONF_H +#define MCUCONF_H + +/* + * STM32F0xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 3...0       Lowest...Highest. + * + * DMA priorities: + * 0...3        Lowest...Highest. + */ + +#define STM32F0xx_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT                       FALSE +#define STM32_PVD_ENABLE                    FALSE +#define STM32_PLS                           STM32_PLS_LEV0 +#define STM32_HSI_ENABLED                   TRUE +#define STM32_HSI14_ENABLED                 TRUE +#define STM32_HSI48_ENABLED                 FALSE +#define STM32_LSI_ENABLED                   TRUE +#define STM32_HSE_ENABLED                   FALSE +#define STM32_LSE_ENABLED                   FALSE +#define STM32_SW                            STM32_SW_PLL +#define STM32_PLLSRC                        STM32_PLLSRC_HSI_DIV2 +#define STM32_PREDIV_VALUE                  1 +#define STM32_PLLMUL_VALUE                  12 +#define STM32_HPRE                          STM32_HPRE_DIV1 +#define STM32_PPRE                          STM32_PPRE_DIV1 +#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE                        STM32_MCOPRE_DIV1 +#define STM32_PLLNODIV                      STM32_PLLNODIV_DIV2 +#define STM32_USBSW                         STM32_USBSW_HSI48 +#define STM32_CECSW                         STM32_CECSW_HSI +#define STM32_I2C1SW                        STM32_I2C1SW_HSI +#define STM32_USART1SW                      STM32_USART1SW_PCLK +#define STM32_RTCSEL                        STM32_RTCSEL_LSI + +/* + * IRQ system settings. + */ +#define STM32_IRQ_EXTI0_1_IRQ_PRIORITY      3 +#define STM32_IRQ_EXTI2_3_IRQ_PRIORITY      3 +#define STM32_IRQ_EXTI4_15_IRQ_PRIORITY     3 +#define STM32_IRQ_EXTI16_IRQ_PRIORITY       3 +#define STM32_IRQ_EXTI17_20_IRQ_PRIORITY    3 +#define STM32_IRQ_EXTI21_22_IRQ_PRIORITY    3 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1                  FALSE +#define STM32_ADC_ADC1_CKMODE               STM32_ADC_CKMODE_ADCCLK +#define STM32_ADC_ADC1_DMA_PRIORITY         2 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     2 +#define STM32_ADC_ADC1_DMA_STREAM           STM32_DMA_STREAM_ID(1, 1) + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1                  FALSE +#define STM32_GPT_USE_TIM2                  FALSE +#define STM32_GPT_USE_TIM3                  FALSE +#define STM32_GPT_USE_TIM14                 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY         2 +#define STM32_GPT_TIM2_IRQ_PRIORITY         2 +#define STM32_GPT_TIM3_IRQ_PRIORITY         2 +#define STM32_GPT_TIM14_IRQ_PRIORITY        2 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1                  FALSE +#define STM32_I2C_BUSY_TIMEOUT              50 +#define STM32_I2C_I2C1_IRQ_PRIORITY         3 +#define STM32_I2C_USE_DMA                   TRUE +#define STM32_I2C_I2C1_DMA_PRIORITY         1 +#define STM32_I2C_I2C1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3) +#define STM32_I2C_I2C1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure") + +/* + * I2S driver system settings. + */ +#define STM32_I2S_USE_SPI1                  FALSE +#define STM32_I2S_SPI1_MODE                 (STM32_I2S_MODE_MASTER |        \ +                                             STM32_I2S_MODE_RX) +#define STM32_I2S_SPI1_IRQ_PRIORITY         2 +#define STM32_I2S_SPI1_DMA_PRIORITY         1 +#define STM32_I2S_SPI1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2S_SPI1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3) +#define STM32_I2S_DMA_ERROR_HOOK(i2sp)      osalSysHalt("DMA failure") + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1                  FALSE +#define STM32_ICU_USE_TIM2                  FALSE +#define STM32_ICU_USE_TIM3                  FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY         3 +#define STM32_ICU_TIM2_IRQ_PRIORITY         3 +#define STM32_ICU_TIM3_IRQ_PRIORITY         3 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED              FALSE +#define STM32_PWM_USE_TIM1                  FALSE +#define STM32_PWM_USE_TIM2                  FALSE +#define STM32_PWM_USE_TIM3                  FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY         3 +#define STM32_PWM_TIM2_IRQ_PRIORITY         3 +#define STM32_PWM_TIM3_IRQ_PRIORITY         3 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1             FALSE +#define STM32_SERIAL_USE_USART2             TRUE +#define STM32_SERIAL_USART1_PRIORITY        3 +#define STM32_SERIAL_USART2_PRIORITY        3 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1                  FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY         1 +#define STM32_SPI_SPI1_IRQ_PRIORITY         2 +#define STM32_SPI_SPI1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2) +#define STM32_SPI_SPI1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure") + +/* + * ST driver system settings. + */ +#define STM32_ST_IRQ_PRIORITY               2 +#define STM32_ST_USE_TIMER                  2 + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1               FALSE +#define STM32_UART_USE_USART2               FALSE +#define STM32_UART_USART1_IRQ_PRIORITY      3 +#define STM32_UART_USART2_IRQ_PRIORITY      3 +#define STM32_UART_USART1_DMA_PRIORITY      0 +#define STM32_UART_USART2_DMA_PRIORITY      0 +#define STM32_UART_USART1_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART1_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 2) +#define STM32_UART_USART2_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 4) +#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure") + +/* + * WDG driver system settings. + */ +#define STM32_WDG_USE_IWDG                  FALSE + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1                  TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND      FALSE +#define STM32_USB_USB1_LP_IRQ_PRIORITY      3 + +#endif /* MCUCONF_H */ diff --git a/keyboards/chavdai40/readme.md b/keyboards/chavdai40/readme.md new file mode 100644 index 0000000000..57af68d0ab --- /dev/null +++ b/keyboards/chavdai40/readme.md @@ -0,0 +1,19 @@ +# chavdai40 + + + +Chavdai40 is very simple decoratable 40% keyboard + +* Keyboard Maintainer: [t-miyajima](https://github.com/dvorak55) +* Hardware Supported: Chavdai40 PCB rev1 +* Hardware Availability: not yet available. + +Make example for this keyboard (after setting up your build environment): + +    make chavdai40:default + +Flashing example for this keyboard: + +    make chavdai40:default:flash + +See the [build environment setup](https://docs.qmk.fm/#/getting_started_build_tools) and the [make instructions](https://docs.qmk.fm/#/getting_started_make_guide) for more information. Brand new to QMK? Start with our [Complete Newbs Guide](https://docs.qmk.fm/#/newbs). diff --git a/keyboards/chavdai40/rules.mk b/keyboards/chavdai40/rules.mk new file mode 100644 index 0000000000..64c6f662af --- /dev/null +++ b/keyboards/chavdai40/rules.mk @@ -0,0 +1,18 @@ +# MCU name +MCU = STM32F042 + +# Build Options +#   change yes to no to disable +BOOTMAGIC_ENABLE = lite     # Virtual DIP switch configuration +MOUSEKEY_ENABLE = yes       # Mouse keys +EXTRAKEY_ENABLE = yes       # Audio control and System control +CONSOLE_ENABLE = no         # Console for debug +COMMAND_ENABLE = no         # Commands for debug and configuration +# Do not enable SLEEP_LED_ENABLE. it uses the same timer as BACKLIGHT_ENABLE +SLEEP_LED_ENABLE = no       # Breathing sleep LED during USB suspend +# if this doesn't work, see here: https://github.com/tmk/tmk_keyboard/wiki/FAQ#nkro-doesnt-work +NKRO_ENABLE = no            # USB Nkey Rollover +BACKLIGHT_ENABLE = no       # Enable keyboard backlight functionality +RGBLIGHT_ENABLE = no        # Enable keyboard RGB underglow +BLUETOOTH_ENABLE = no       # Enable Bluetooth +AUDIO_ENABLE = no           # Audio output
\ No newline at end of file | 
